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verilog-ethernet/example/VCU108
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Alex Forencich 4618edcd8e Use quad wrappers in VCU108 example design 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-08-26 01:15:29 -07:00
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fpga_1g
Use quad wrappers in VCU108 example design
2023-08-26 01:15:29 -07:00
fpga_10g
Use quad wrappers in VCU108 example design
2023-08-26 01:15:29 -07:00