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FPGA
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verilog-ethernet
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https://github.com/alexforencich/verilog-ethernet.git
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verilog-ethernet
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example
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ExaNIC_X10
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fpga
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ip
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Alex Forencich
cfcd9da375
Update IP
2019-06-26 20:50:05 -07:00
..
gtwizard_ultrascale_0.xci
Update IP
2019-06-26 20:50:05 -07:00