mirror of
https://github.com/alexforencich/verilog-ethernet.git
synced 2025-01-14 06:43:18 +08:00
342 lines
9.6 KiB
Python
342 lines
9.6 KiB
Python
#!/usr/bin/env python
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"""
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Copyright (c) 2021 Alex Forencich
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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"""
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import itertools
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import logging
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import os
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import random
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import subprocess
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import cocotb_test.simulator
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import pytest
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import cocotb
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from cocotb.clock import Clock
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from cocotb.triggers import RisingEdge, Event
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from cocotb.regression import TestFactory
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from cocotbext.axi import AxiStreamBus, AxiStreamFrame, AxiStreamSource, AxiStreamSink
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class TB(object):
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def __init__(self, dut):
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self.dut = dut
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ports = len(dut.axis_arb_mux_inst.s_axis_tvalid)
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self.log = logging.getLogger("cocotb.tb")
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self.log.setLevel(logging.DEBUG)
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cocotb.fork(Clock(dut.clk, 10, units="ns").start())
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self.source = [AxiStreamSource(AxiStreamBus.from_prefix(dut, f"s{k:02d}_axis"), dut.clk, dut.rst) for k in range(ports)]
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self.sink = AxiStreamSink(AxiStreamBus.from_prefix(dut, "m_axis"), dut.clk, dut.rst)
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def set_idle_generator(self, generator=None):
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if generator:
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for source in self.source:
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source.set_pause_generator(generator())
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def set_backpressure_generator(self, generator=None):
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if generator:
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self.sink.set_pause_generator(generator())
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async def reset(self):
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self.dut.rst.setimmediatevalue(0)
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await RisingEdge(self.dut.clk)
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await RisingEdge(self.dut.clk)
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self.dut.rst <= 1
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await RisingEdge(self.dut.clk)
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await RisingEdge(self.dut.clk)
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self.dut.rst <= 0
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await RisingEdge(self.dut.clk)
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await RisingEdge(self.dut.clk)
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async def run_test(dut, payload_lengths=None, payload_data=None, idle_inserter=None, backpressure_inserter=None, port=0):
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tb = TB(dut)
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id_count = 2**len(tb.source[port].bus.tid)
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cur_id = 1
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await tb.reset()
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tb.set_idle_generator(idle_inserter)
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tb.set_backpressure_generator(backpressure_inserter)
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test_frames = []
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for test_data in [payload_data(x) for x in payload_lengths()]:
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test_frame = AxiStreamFrame(test_data)
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test_frame.tid = cur_id
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test_frame.tdest = cur_id
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test_frames.append(test_frame)
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await tb.source[port].send(test_frame)
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cur_id = (cur_id + 1) % id_count
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for test_frame in test_frames:
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rx_frame = await tb.sink.recv()
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assert rx_frame.tdata == test_frame.tdata
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assert rx_frame.tid == test_frame.tid
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assert rx_frame.tdest == test_frame.tdest
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assert not rx_frame.tuser
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assert tb.sink.empty()
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await RisingEdge(dut.clk)
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await RisingEdge(dut.clk)
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async def run_test_tuser_assert(dut, port=0):
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tb = TB(dut)
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await tb.reset()
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test_data = bytearray(itertools.islice(itertools.cycle(range(256)), 32))
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test_frame = AxiStreamFrame(test_data, tuser=1)
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await tb.source[port].send(test_frame)
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rx_frame = await tb.sink.recv()
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assert rx_frame.tdata == test_data
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assert rx_frame.tuser
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assert tb.sink.empty()
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await RisingEdge(dut.clk)
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await RisingEdge(dut.clk)
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async def run_arb_test(dut):
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tb = TB(dut)
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byte_lanes = tb.source[0].byte_lanes
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id_count = 2**len(tb.source[0].bus.tid)
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cur_id = 1
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await tb.reset()
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test_frames = []
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length = byte_lanes*16
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test_data = bytearray(itertools.islice(itertools.cycle(range(256)), length))
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for k in range(5):
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test_frame = AxiStreamFrame(test_data, tx_complete=Event())
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test_frame.tid = cur_id
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if k == 0:
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test_frame.tdest = 0
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elif k == 4:
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await test_frames[1].tx_complete.wait()
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for j in range(8):
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await RisingEdge(dut.clk)
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test_frame.tdest = 0
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else:
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test_frame.tdest = 1
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test_frames.append(test_frame)
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await tb.source[test_frame.tdest].send(test_frame)
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cur_id = (cur_id + 1) % id_count
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for k in [0, 1, 2, 4, 3]:
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test_frame = test_frames[k]
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rx_frame = await tb.sink.recv()
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assert rx_frame.tdata == test_frame.tdata
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assert rx_frame.tid == test_frame.tid
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assert rx_frame.tdest == test_frame.tdest
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assert not rx_frame.tuser
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assert tb.sink.empty()
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await RisingEdge(dut.clk)
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await RisingEdge(dut.clk)
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async def run_stress_test(dut, idle_inserter=None, backpressure_inserter=None):
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tb = TB(dut)
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byte_lanes = tb.source[0].byte_lanes
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id_count = 2**len(tb.source[0].bus.tid)
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cur_id = 1
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await tb.reset()
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tb.set_idle_generator(idle_inserter)
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tb.set_backpressure_generator(backpressure_inserter)
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test_frames = [list() for x in tb.source]
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for p in range(len(tb.source)):
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for k in range(128):
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length = random.randint(1, byte_lanes*16)
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test_data = bytearray(itertools.islice(itertools.cycle(range(256)), length))
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test_frame = AxiStreamFrame(test_data)
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test_frame.tid = p
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test_frame.tdest = cur_id
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test_frames[p].append(test_frame)
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await tb.source[p].send(test_frame)
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cur_id = (cur_id + 1) % id_count
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while any(test_frames):
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rx_frame = await tb.sink.recv()
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test_frame = None
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for lst in test_frames:
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if lst and lst[0].tid == rx_frame.tid:
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test_frame = lst.pop(0)
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break
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assert test_frame is not None
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assert rx_frame.tdata == test_frame.tdata
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assert rx_frame.tid == test_frame.tid
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assert rx_frame.tdest == test_frame.tdest
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assert not rx_frame.tuser
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assert tb.sink.empty()
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await RisingEdge(dut.clk)
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await RisingEdge(dut.clk)
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def cycle_pause():
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return itertools.cycle([1, 1, 1, 0])
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def size_list():
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data_width = len(cocotb.top.s00_axis_tdata)
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byte_width = data_width // 8
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return list(range(1, byte_width*4+1))+[512]+[1]*64
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def incrementing_payload(length):
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return bytearray(itertools.islice(itertools.cycle(range(256)), length))
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if cocotb.SIM_NAME:
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ports = len(cocotb.top.axis_arb_mux_inst.s_axis_tvalid)
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factory = TestFactory(run_test)
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factory.add_option("payload_lengths", [size_list])
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factory.add_option("payload_data", [incrementing_payload])
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factory.add_option("idle_inserter", [None, cycle_pause])
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factory.add_option("backpressure_inserter", [None, cycle_pause])
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factory.add_option("port", list(range(ports)))
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factory.generate_tests()
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for test in [run_test_tuser_assert]:
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factory = TestFactory(test)
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factory.add_option("port", list(range(ports)))
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factory.generate_tests()
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if ports > 1:
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factory = TestFactory(run_arb_test)
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factory.generate_tests()
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factory = TestFactory(run_stress_test)
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factory.add_option("idle_inserter", [None, cycle_pause])
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factory.add_option("backpressure_inserter", [None, cycle_pause])
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factory.generate_tests()
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# cocotb-test
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tests_dir = os.path.dirname(__file__)
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rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
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@pytest.mark.parametrize("round_robin", [0, 1])
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@pytest.mark.parametrize("data_width", [8, 16, 32])
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@pytest.mark.parametrize("ports", [1, 4])
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def test_axis_arb_mux(request, ports, data_width, round_robin):
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dut = "axis_arb_mux"
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wrapper = f"{dut}_wrap_{ports}"
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module = os.path.splitext(os.path.basename(__file__))[0]
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toplevel = wrapper
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# generate wrapper
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wrapper_file = os.path.join(tests_dir, f"{wrapper}.v")
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if not os.path.exists(wrapper_file):
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subprocess.Popen(
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[os.path.join(rtl_dir, f"{dut}_wrap.py"), "-p", f"{ports}"],
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cwd=tests_dir
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).wait()
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verilog_sources = [
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wrapper_file,
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os.path.join(rtl_dir, f"{dut}.v"),
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os.path.join(rtl_dir, "arbiter.v"),
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os.path.join(rtl_dir, "priority_encoder.v"),
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]
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parameters = {}
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parameters['PORTS'] = ports
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parameters['DATA_WIDTH'] = data_width
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parameters['KEEP_ENABLE'] = int(parameters['DATA_WIDTH'] > 8)
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parameters['KEEP_WIDTH'] = parameters['DATA_WIDTH'] // 8
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parameters['ID_ENABLE'] = 1
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parameters['ID_WIDTH'] = 8
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parameters['DEST_ENABLE'] = 1
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parameters['DEST_WIDTH'] = 8
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parameters['USER_ENABLE'] = 1
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parameters['USER_WIDTH'] = 1
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parameters['LAST_ENABLE'] = 1
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parameters['ARB_TYPE_ROUND_ROBIN'] = round_robin
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parameters['ARB_LSB_HIGH_PRIORITY'] = 1
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extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
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sim_build = os.path.join(tests_dir, "sim_build",
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request.node.name.replace('[', '-').replace(']', ''))
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cocotb_test.simulator.run(
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python_search=[tests_dir],
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verilog_sources=verilog_sources,
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toplevel=toplevel,
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module=module,
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parameters=parameters,
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sim_build=sim_build,
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extra_env=extra_env,
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)
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