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verilog-ethernet/tb/axis_xgmii_tx_64
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Alex Forencich 2858aaaef7 Add TX PTP timestamp enable bit in tuser 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-07-17 10:58:40 -07:00
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Makefile
Add TX PTP timestamp enable bit in tuser
2023-07-17 10:58:40 -07:00
test_axis_xgmii_tx_64.py
Add TX PTP timestamp enable bit in tuser
2023-07-17 10:58:40 -07:00