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verilog-ethernet/tb/eth_mac_phy_10g
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Alex Forencich 2858aaaef7 Add TX PTP timestamp enable bit in tuser 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-07-17 10:58:40 -07:00
..
baser.py
Add cocotb testbenches for 10G MAC+PHY modules
2021-10-15 01:37:10 -07:00
Makefile
Add TX PTP timestamp enable bit in tuser
2023-07-17 10:58:40 -07:00
test_eth_mac_phy_10g.py
Add TX PTP timestamp enable bit in tuser
2023-07-17 10:58:40 -07:00