mirror of
https://github.com/alexforencich/verilog-ethernet.git
synced 2025-01-14 06:43:18 +08:00
8214e2abf9
git-subtree-dir: lib/axis git-subtree-mainline: d64445b9e057cf97ae8fd57fbe83c5505c6ba45c git-subtree-split: ac2f7e546df3b7f4a936cdb4d558adc517c5ddb4
17 lines
423 B
YAML
17 lines
423 B
YAML
language: python
|
|
python:
|
|
- "2.7"
|
|
virtualenv:
|
|
system_site_packages: true
|
|
before_install:
|
|
- export d=`pwd`
|
|
- sudo apt-get update -qq
|
|
- sudo apt-get install -y iverilog
|
|
- hg clone https://bitbucket.org/jandecaluwe/myhdl
|
|
- cd $d/myhdl && sudo python setup.py install
|
|
- cd $d/myhdl/cosimulation/icarus && make && sudo install -m 0755 -D ./myhdl.vpi /usr/lib/ivl/myhdl.vpi
|
|
- cd $d
|
|
script:
|
|
- cd tb && py.test
|
|
|