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verilog-ethernet
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verilog-ethernet
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example
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KC705
History
Alex Forencich
a91e2b7e17
Add KC705 SGMII example design
2020-12-30 17:15:34 -08:00
..
fpga_gmii
Update KC705 XDC
2020-12-30 16:54:30 -08:00
fpga_rgmii
Add KC705 RGMII example design
2020-12-30 17:15:18 -08:00
fpga_sgmii
Add KC705 SGMII example design
2020-12-30 17:15:34 -08:00