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https://github.com/alexforencich/verilog-ethernet.git
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24 lines
253 B
Makefile
24 lines
253 B
Makefile
# Tools
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QMEGAWIZ=qmegawiz
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# Sources
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QMWSRC=phy.v
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QMWSRC+=phy_reconfig.v
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# Targets
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TARGETS=$(QMWSRC:.v=)
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# Rules
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.PHONY: all
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all: $(TARGETS)
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.PHONY: clean
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clean:
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-rm -rf $(TARGETS)
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%: %.v
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mkdir -p $@
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cp -a $< $@
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cd $@ && $(QMEGAWIZ) -silent $<
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