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verilog-ethernet
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verilog-ethernet
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tb
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eth_phy_10g
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Alex Forencich
20c542051d
Use cfg prefix for configuration signals
...
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-08-22 17:14:52 -07:00
..
baser.py
Add cocotb testbench for 10G PHY
2021-10-15 01:07:26 -07:00
Makefile
Remove recursively-expanded macros for module parameters in makefiles
2023-02-17 16:04:16 -08:00
test_eth_phy_10g.py
Use cfg prefix for configuration signals
2023-08-22 17:14:52 -07:00