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verilog-ethernet/example/ZCU106
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Alex Forencich d5df47d8b0 Use quad wrappers in ZCU106 example design 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-08-26 12:42:04 -07:00
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fpga
Use quad wrappers in ZCU106 example design
2023-08-26 12:42:04 -07:00