Handshaking fixes
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@ -230,7 +230,7 @@ always @* begin
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4'b1zz1: m_axis_cc_tdata_int[28:16] = 13'd4; // Byte count
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endcase
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m_axis_cc_tdata_int[42:32] = 11'd1; // DWORD count
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m_axis_cc_tdata_int[45:43] = status_next;
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m_axis_cc_tdata_int[45:43] = status_reg;
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m_axis_cc_tdata_int[63:48] = requester_id_reg;
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if (AXIS_PCIE_DATA_WIDTH > 64) begin
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m_axis_cc_tdata_int[71:64] = tag_reg;
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@ -302,7 +302,7 @@ always @* begin
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// read request
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if (s_axis_cq_tlast && dword_count_next == 11'd1) begin
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m_axil_arvalid_next = 1'b1;
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m_axil_rready_next = 1'b1;
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m_axil_rready_next = m_axis_cc_tready_int_early;
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s_axis_cq_tready_next = 1'b0;
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state_next = STATE_READ;
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end else begin
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@ -327,6 +327,7 @@ always @* begin
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s_axis_cq_tready_next = 1'b0;
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state_next = STATE_WRITE_2;
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end else if (AXIS_PCIE_DATA_WIDTH < 256 && dword_count_next == 11'd1) begin
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s_axis_cq_tready_next = 1'b1;
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state_next = STATE_WRITE_1;
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end else begin
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// bad length
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@ -407,7 +408,7 @@ always @* begin
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// read request
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if (s_axis_cq_tlast && dword_count_next == 11'd1) begin
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m_axil_arvalid_next = 1'b1;
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m_axil_rready_next = 1'b1;
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m_axil_rready_next = m_axis_cc_tready_int_early;
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s_axis_cq_tready_next = 1'b0;
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state_next = STATE_READ;
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end else begin
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@ -426,6 +427,7 @@ always @* begin
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end else if (type_next == 4'b0001 || type_next == 4'b0011) begin
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// write request
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if (dword_count_next == 11'd1) begin
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s_axis_cq_tready_next = 1'b1;
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state_next = STATE_WRITE_1;
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end else begin
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// bad length
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@ -487,7 +489,7 @@ always @* begin
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end
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STATE_READ: begin
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// read state, wait for read response
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m_axil_rready_next = 1'b1;
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m_axil_rready_next = m_axis_cc_tready_int_early;
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m_axis_cc_tdata_int[42:32] = 11'd1; // DWORD count
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m_axis_cc_tdata_int[45:43] = 3'b000; // status: successful completion
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@ -522,7 +524,7 @@ always @* begin
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end
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STATE_WRITE_1: begin
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// write 1 state, store write data and initiate write
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s_axis_cq_tready_next = m_axis_cc_tready_int_early;
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s_axis_cq_tready_next = 1'b1;
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// data
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m_axil_wdata_next = s_axis_cq_tdata[31:0];
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