4 Commits

Author	SHA1	Message	Date
Alex Forencich	63006e8092	Add output FIFO to DMA IF mux for read response data	2021-02-24 13:54:40 -08:00
Alex Forencich	a1d0fb810f	Reorganize	2019-12-02 15:27:27 -08:00
Alex Forencich	2afef8c6d8	Fix use before define	2019-12-02 15:18:08 -08:00
Alex Forencich	75563c65f0	Add DMA interface mux modules	2019-10-12 23:08:21 -07:00