224 Commits

Author SHA1 Message Date
Alex Forencich
97500d10f6 Improved link speed control script 2019-08-03 23:32:02 -07:00
Alex Forencich
f518aec219 Include instance names in error messages 2019-07-25 16:38:54 -07:00
Alex Forencich
c75f29c648 Add parameter documentation 2019-07-24 18:01:13 -07:00
Alex Forencich
7c500e6b6e Update axis_arb_mux 2019-07-24 17:52:53 -07:00
Alex Forencich
8f36c4a216 Update priority encoder 2019-07-24 14:23:04 -07:00
Alex Forencich
6e5a3934b2 Add get_free_tag methods 2019-07-15 20:38:09 -07:00
Alex Forencich
4bf1205514 Fix completion handling in function 2019-07-15 20:25:23 -07:00
Alex Forencich
a0bd74a198 Add Xilinx VCU118 example design 2019-07-15 17:24:50 -07:00
Alex Forencich
b0b51fdb34 Add Alpha Data ADM-PCIE-9V3 example design 2019-07-15 17:23:31 -07:00
Alex Forencich
f1348db2f7 Add Ultrascale Plus PCIe hard IP core model and testbench 2019-07-15 17:18:39 -07:00
Alex Forencich
1d79a4375b Add PCIe related scripts 2019-07-15 12:33:35 -07:00
Alex Forencich
b5e520e9da Add gitignore 2019-07-15 12:29:19 -07:00
Alex Forencich
d3b24e734f Don't use traceSignals 2019-07-14 21:45:10 -07:00
Alex Forencich
ece7186671 Fix typo 2019-07-14 21:41:21 -07:00
Alex Forencich
d99afcb2f1 Change tag count 2019-07-13 11:21:19 -07:00
Alex Forencich
9c176b0916 Add ExaNIC X10 example design 2019-07-13 11:06:29 -07:00
Alex Forencich
8ecf4a22ef Add pcie_us_cfg module 2019-07-13 10:24:25 -07:00
Alex Forencich
dcd8d7cd77 Update readme 2019-07-12 12:15:58 -07:00
Alex Forencich
0515d354e3 Critical path optimization 2019-06-28 17:28:12 -07:00
Alex Forencich
4afbd71f1f Fanout optimization 2019-06-28 17:24:37 -07:00
Alex Forencich
209cb7d41d Fix completion handling 2019-06-12 21:29:19 -07:00
Alex Forencich
db8a2e1e96 Parametrize cycle count widths 2019-05-13 22:06:41 -07:00
Alex Forencich
74a75772ec Pipeline tag table write 2019-05-13 19:15:43 -07:00
Alex Forencich
6810c75723 Fix parameter 2019-05-09 23:20:36 -07:00
Alex Forencich
2f09c69e34 Add wrappers for word access 2019-04-22 16:43:21 -07:00
Alex Forencich
c1c4971d73 Use correct variable 2019-04-09 17:54:04 -07:00
Alex Forencich
f53b7ab75e Fix MSI wrapper 2019-03-27 17:42:37 -07:00
Alex Forencich
5d42112477 Enable PCIe extended tag based on tag count 2019-03-21 00:01:48 -07:00
Alex Forencich
b592c7d7af Add missing parameter 2019-03-03 22:32:35 -08:00
Alex Forencich
56ebc966e1 Update parameters 2019-03-03 13:37:34 -08:00
Alex Forencich
33dceb493b More asserts 2019-03-01 01:09:27 -08:00
Alex Forencich
67d31ecef0 Set more parameters during enumeration 2019-03-01 01:07:57 -08:00
Alex Forencich
f92c1ea980 Reorder capability registrations 2019-02-28 23:46:39 -08:00
Alex Forencich
1480be2173 Rewrite capability management 2019-02-28 23:45:23 -08:00
Alex Forencich
6baede4717 Broadcast message support 2019-02-15 18:04:46 -08:00
Alex Forencich
1630200cd8 Implement proper downstream TLP routing 2019-02-15 17:55:24 -08:00
Alex Forencich
178133498b Fix indentation 2019-02-15 17:23:33 -08:00
Alex Forencich
13d35569fa Match IO bars for routing IO operations 2019-02-15 17:23:14 -08:00
Alex Forencich
35a4d62fb8 Split SwitchBridge into separate upstream and downstream ports 2019-02-15 16:56:21 -08:00
Alex Forencich
247bca01f3 Add default_switch_port parameter 2019-02-15 15:26:09 -08:00
Alex Forencich
8cb607be04 Fix calls to read and write root complex regions 2019-02-15 14:40:24 -08:00
Alex Forencich
9f36acebc2 Print TLP payloads in hex 2019-01-28 18:17:21 -08:00
Alex Forencich
667b5c42c5 Add support for registering MSI callbacks 2019-01-28 16:30:19 -08:00
Alex Forencich
201c5faa80 Always ready on RC channel in idle for 64 bits 2019-01-22 23:00:17 -08:00
Alex Forencich
4422b908bf Backpressure for awvalid 2019-01-22 22:54:40 -08:00
Alex Forencich
fac972bfe6 RC channel backpressure fix 2019-01-22 22:50:15 -08:00
Alex Forencich
263bb5c670 Index based on correct tag value 2019-01-22 22:47:15 -08:00
Alex Forencich
d86fb594c5 More fixes for tlp_cmd backpressure 2019-01-12 00:37:38 -08:00
Alex Forencich
5c24dcc1df Ensure tlp_cmd registers are clear when generating a new request 2019-01-11 01:27:52 -08:00
Alex Forencich
5cf9597201 Only generate a request if a tag is available 2019-01-10 19:00:19 -08:00