FPGA/verilog-pcie
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5 Commits

Author SHA1 Message Date
Alex Forencich
a2685a102b Update LED driver timing constraints 2020-09-28 17:24:24 -07:00
Alex Forencich
1f93608527 Add fb2CG flash programming commands 2020-09-27 01:47:00 -07:00
Alex Forencich
ef2f01bd9f Update XDC 2020-09-23 14:24:42 -07:00
Alex Forencich
4ae9ec818c Add timing constraints for LED driver 2020-09-22 22:13:54 -07:00
Alex Forencich
c7594c77ab Add fb2CG AXI example design 2020-09-20 01:17:52 -07:00