33 lines
1.2 KiB
Tcl
33 lines
1.2 KiB
Tcl
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create_ip -name pcie3_ultrascale -vendor xilinx.com -library ip -module_name pcie3_ultrascale_0
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set_property -dict [list \
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CONFIG.PL_LINK_CAP_MAX_LINK_SPEED {8.0_GT/s} \
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CONFIG.PL_LINK_CAP_MAX_LINK_WIDTH {X8} \
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CONFIG.AXISTEN_IF_RC_STRADDLE {false} \
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CONFIG.axisten_if_width {256_bit} \
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CONFIG.extended_tag_field {true} \
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CONFIG.axisten_freq {250} \
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CONFIG.PF0_CLASS_CODE {020000} \
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CONFIG.PF0_DEVICE_ID {0001} \
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CONFIG.PF0_MSI_CAP_MULTIMSGCAP {32_vectors} \
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CONFIG.PF0_SUBSYSTEM_ID {0001} \
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CONFIG.PF0_SUBSYSTEM_VENDOR_ID {1234} \
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CONFIG.PF0_Use_Class_Code_Lookup_Assistant {true} \
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CONFIG.pf0_base_class_menu {Network_controller} \
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CONFIG.pf0_sub_class_interface_menu {Ethernet_controller} \
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CONFIG.pf0_class_code_base {02} \
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CONFIG.pf0_class_code_sub {00} \
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CONFIG.pf0_bar0_scale {Megabytes} \
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CONFIG.pf0_bar0_size {16} \
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CONFIG.pf0_bar1_enabled {true} \
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CONFIG.pf0_bar1_type {Memory} \
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CONFIG.pf0_bar1_scale {Megabytes} \
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CONFIG.pf0_bar1_size {16} \
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CONFIG.PF0_INTERRUPT_PIN {NONE} \
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CONFIG.PF0_MSIX_CAP_TABLE_BIR {BAR_0} \
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CONFIG.PF0_MSIX_CAP_PBA_BIR {BAR_0} \
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CONFIG.vendor_id {1234} \
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CONFIG.en_msi_per_vec_masking {true} \
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] [get_ips pcie3_ultrascale_0]
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