2014-12-31 11:49:12 -05:00
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#ifndef INTERFACE_H
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#define INTERFACE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define REGISTER_NB 32
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2015-10-29 00:58:33 +00:00
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#define MEM_SIZE (126*1024*1024)
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2014-12-31 11:49:12 -05:00
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2014-12-31 13:30:36 -05:00
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// init/exit function for device interface
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2014-12-31 11:49:12 -05:00
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int axis_init(const char *path);
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2014-12-31 13:16:19 -05:00
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int axis_exit();
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2014-12-31 13:30:36 -05:00
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// configuration bus
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void cfg_write(unsigned int addr, unsigned int data);
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2015-01-09 17:17:34 -05:00
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void cfg_write_array(unsigned int addr, unsigned int *data, int length);
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void cfg_write_sequence(unsigned int *addr,
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unsigned int *data, int length);
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2014-12-31 13:30:36 -05:00
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int cfg_read(unsigned int addr);
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2015-01-09 17:17:34 -05:00
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void cfg_poll(unsigned int addr, unsigned int data);
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2015-01-09 13:44:46 -05:00
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// dma memory
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void *mem_alloc(const int length, const int byte_nb);
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int mem_alloc_size(const int length, const int byte_nb);
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int mem_alloc_length(const int length, const int byte_nb);
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2014-12-31 13:30:36 -05:00
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2015-10-29 14:42:25 +00:00
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void mem_alloc_state(void **start, unsigned int *offset);
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2015-01-09 17:01:57 -05:00
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// axis ports
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unsigned int axis_port_id(const int index, const int dirc);
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unsigned int axis_memory_addr(void *ptr);
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unsigned int axis_stream_length(const int length, const int byte_nb);
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2014-12-31 11:49:12 -05:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* INTERFACE_H */
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