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Use blocking assignment in non-clocked always block

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Combinational logic shouldn't use the non-blocking assignment.
This commit is contained in:
Berin Martini 2016-05-30 19:47:58 -07:00
parent 180d20067b
commit 1885150a4c
1 changed files with 8 additions and 8 deletions
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16
hdl/axis/axis_read_data.v
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@ -148,29 +148,29 @@ module axis_read_data
always @* begin : DATA_
state_nx <= 'b0;
state_nx = 'b0;
case (1'b1)
state[IDLE] : begin
if (cfg_valid) begin
state_nx[ACTIVE] <= 1'b1;
state_nx[ACTIVE] = 1'b1;
end
else state_nx[IDLE] <= 1'b1;
else state_nx[IDLE] = 1'b1;
end
state[ACTIVE] : begin
if (buf_pop & (str_length == str_cnt)) begin
state_nx[WAIT] <= 1'b1;
state_nx[WAIT] = 1'b1;
end
else state_nx[ACTIVE] <= 1'b1;
else state_nx[ACTIVE] = 1'b1;
end
state[WAIT] : begin
state_nx[DONE] <= 1'b1;
state_nx[DONE] = 1'b1;
end
state[DONE] : begin
state_nx[IDLE] <= 1'b1;
state_nx[IDLE] = 1'b1;
end
default : begin
state_nx[IDLE] <= 1'b1;
state_nx[IDLE] = 1'b1;
end
endcase
end