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Move some of the axis_addr assigns around module

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Moves them closer to where they are used for readability.
This commit is contained in:
Berin Martini 2018-06-03 15:12:48 -07:00
parent 0d560dff11
commit 4ad550b31a
1 changed files with 10 additions and 8 deletions
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18
hdl/axis/axis_addr.v
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@ -91,14 +91,6 @@ module axis_addr
assign cfg_ready = state[IDLE];
assign axi_aaddr = axi_address;
assign axi_alen = state[BURST] ? (BURST_LENGTH-1) : last_nb;
assign axi_avalid = state[BURST] | state[LAST];
assign burst_done = (burst_nb == burst_cnt);
always @(posedge clk)
if (rst) cfg_valid_r <= 1'b0;
@ -150,6 +142,9 @@ module axis_addr
end
assign burst_done = (burst_nb == burst_cnt);
always @(posedge clk)
if (rst) begin
state <= 'b0;
@ -202,6 +197,13 @@ module axis_addr
end
assign axi_aaddr = axi_address;
assign axi_alen = state[BURST] ? (BURST_LENGTH-1) : last_nb;
assign axi_avalid = state[BURST] | state[LAST];
endmodule
`undef MIN