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Use blocking assignment in non-clocked always block

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Combinational logic shouldn't use the non-blocking assignment.
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Berin Martini 2016-05-30 19:48:30 -07:00
parent 1885150a4c
commit b05b6bd6d4
1 changed files with 9 additions and 9 deletions
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18
hdl/axis/axis_write_data.v
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@ -174,32 +174,32 @@ module axis_write_data
always @* begin : DATA_
state_nx <= 'b0;
state_nx = 'b0;
case (1'b1)
state[IDLE] : begin
if (cfg_valid) begin
state_nx[ACTIVE] <= 1'b1;
state_nx[ACTIVE] = 1'b1;
end
else state_nx[IDLE] <= 1'b1;
else state_nx[IDLE] = 1'b1;
end
state[ACTIVE] : begin
if (axi_wready & buf_pop & (str_length == str_cnt)) begin
state_nx[WAIT] <= 1'b1;
state_nx[WAIT] = 1'b1;
end
else state_nx[ACTIVE] <= 1'b1;
else state_nx[ACTIVE] = 1'b1;
end
state[WAIT] : begin
if (axi_wready & axi_wlast) begin
state_nx[DONE] <= 1'b1;
state_nx[DONE] = 1'b1;
end
else state_nx[WAIT] <= 1'b1;
else state_nx[WAIT] = 1'b1;
end
state[DONE] : begin
state_nx[IDLE] <= 1'b1;
state_nx[IDLE] = 1'b1;
end
default : begin
state_nx[IDLE] <= 1'b1;
state_nx[IDLE] = 1'b1;
end
endcase
end