This change makes a clear distention of the physical address and the user space
address for the memory array. It also scopes the variables to the file so they
will not be exported in the object file which can cause naming conflicts in
programs that use it.
The functionality of the axis_memory_offset function can be replicated by using
mem_alloc_state while at the same times provides a more powerful interface to
the memory allocation system.
The 1st argument passed to the new mem_alloc_state functions is a pointer to a
void pointer (start) whose value will be overwritten to be the start pointer of
the CMA memory area. The 2nd argument is a pointer to a unsigned int whose
values will be overwritten to be the current 'offset' from that start pointer
and thus represents how many bytes has been allocated.
This function takes as argument an offset indexed from zero and returns a usage
pointer corresponding to the offset from the start of the CMA region. Thus an
argument offset of zero would give the pointer to the start of the CMA region.
This change prepends the CROSS_COMPILE environmental variable to the compilers
definition. Thus adding the possibility of cross compiling when the cross
compiling tool chain has been setup correctly.
The memory is addressable using the AXIS ports in 64 bit (8 byte) chunks. Thus
when allocating memory from CMA region, the start address needs to be 64 bit
aligned, not page aligned. This change will thus reduce the 'padding' at the
end of arrays and thus RAM.
Similar functions could be constructed using calls to the already existing
functions, however, it seems more efficient to add them to the library in case
the application cannot optimizes external library calls.
The uio driver exports files to the /sys directory, one of which gives the RAM
memory offset for the *mem* CMA array. This will be needed when giving address
to the axis ports, it is thus read from the file during the init function call.
Arrays that will be used to pass data between the host and fpga need to be page
aligned and be slices of the DMA array the driver has reserved. These new
functions allocate slices from the DMA array and ensures that the starting
address is page aligned.
The driver sets ups a DMA contiguous array that will be used as a memory area
to share data between the PS and PL. The library memory maps this DMA array to
make it available to the host applications. The array is cache coherent and
thus data written or read from it bypass the CPU cache and read/write directly
from main memory. This ensures that the data is always the same between the
host and fpga but at a cost of long data accesses from the host CPU.
