Berin Martini 65d8079cda Terminate axi_rresp & axi_rlast in axis.v ...

Since these signals are never used, they do not need to be propagated
past the axis.v module.

2015-01-11 13:04:29 -05:00

app

Add function to help configure the axis ports

2015-01-09 17:15:12 -05:00

dev

Allocate CMA memory on driver probe

2014-12-31 11:15:11 -05:00

hdl

Terminate axi_rresp & axi_rlast in axis.v

2015-01-11 13:04:29 -05:00

lib

Add some more configuration bus functions

2015-01-09 17:17:34 -05:00

syn

Auto assign address to HP0

2015-01-06 16:14:53 -05:00

util

Tab completion script for zynq-axis repo scripts

2015-01-02 13:03:51 -05:00

.gitignore

Add gitignore file to vim swap file and others

2014-12-31 13:18:54 -05:00

LICENSE.md

Add License information

2015-01-10 13:30:43 -05:00

sim-module

Add bash script to run testbenchs

2015-01-02 17:32:39 -05:00

syn-proj

Add scripts to synthesize bitstream via CLI

2014-12-31 20:20:40 -05:00

syn-proj-prep

Add bash script to prepare project build directories

2014-12-31 15:34:29 -05:00

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