This website requires JavaScript.
Explore
Help
Sign In
FPGA
/
zynq-axis
Watch
1
Star
0
Fork
0
You've already forked zynq-axis
mirror of
https://github.com/bmartini/zynq-axis.git
synced
2024-09-05 19:19:27 +08:00
Code
Issues
Projects
Releases
Wiki
Activity
zynq-axis
/
hdl
History
Berin Martini
c77f0abac8
Update default parameters axis_(read|write)_data.v
...
This is to remove Verilator warnings due to invalid default parameter values.
2016-05-30 21:55:59 -07:00
..
axis
Update default parameters axis_(read|write)_data.v
2016-05-30 21:55:59 -07:00
ctrl
Update axi4lite_cfg parameters for standard compatibility
2016-02-27 18:38:40 -05:00
fifo
Add synchronous FIFO & testbench
2015-01-02 17:32:39 -05:00
top
Remove old 2014.2 Xilinx projects
2016-02-28 18:06:43 -05:00