FPGA

FPGA常用学习仓库以及代码

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basic_verilog
Verilog 0 0
Updated 2024-11-08 03:07:19 +08:00
SM3_core
Verilog 0 0
Updated 2024-09-06 13:54:26 +08:00
riffa
Verilog 0 0
Updated 2024-06-11 22:10:01 +08:00
oh
Verilog 0 0
Updated 2024-05-08 11:12:54 +08:00
verilog-ethernet
Verilog 0 0
Updated 2024-02-13 09:29:31 +08:00
corundum
Verilog 0 0
Updated 2023-12-02 17:30:49 +08:00
FpOC
Verilog 0 0
bldc field-oriented-control foc fpga motor pmsm svpwm systemverilog verilog
Updated 2023-09-15 09:27:41 +08:00
FPGA-DDR-SDRAM
Verilog 0 0
fpga systemverilog verilog rtl axi4 controller ddr-sdram ddr1 soft-core
Updated 2023-09-15 09:19:11 +08:00
DetectHumanFaces
Verilog 0 0
Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
Updated 2023-08-15 11:14:13 +08:00
MMC
Verilog 0 0
MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计
Updated 2023-05-24 09:45:07 +08:00
verilog-axi
Verilog 0 0
Updated 2023-03-30 15:12:13 +08:00
usb3_pipe
Verilog 0 0
Updated 2022-05-03 15:10:00 +08:00
verilog-pcie
Verilog 0 0
Updated 2021-03-13 15:22:59 +08:00
reserve Archived
Verilog 0 0
reserve
Updated 2020-06-09 15:55:15 +08:00
study Archived
Verilog 0 0
Updated 2020-06-09 15:49:52 +08:00