mirror of
https://github.com/candle-usb/candleLight_fw.git
synced 2025-01-14 05:42:53 +08:00
rewrote can functions to remove CAN_HAL calls and allow for peripheral reset during can_enable()
This commit is contained in:
Hubert Denkmair
parent
1bcc1b0097
commit
a02ec96b24
@ -31,9 +31,6 @@ THE SOFTWARE.
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#include "stm32f0xx_hal.h"
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#include <gs_usb.h>
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void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
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void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
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void can_init(CAN_HandleTypeDef *hcan, CAN_TypeDef *instance);
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void can_set_bittiming(CAN_HandleTypeDef *hcan, uint16_t brp, uint8_t phase_seg1, uint8_t phase_seg2, uint8_t sjw);
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void can_enable(CAN_HandleTypeDef *hcan, bool loop_back, bool listen_only, bool one_shot);
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151
src/can.c
151
src/can.c
@ -26,44 +26,23 @@ THE SOFTWARE.
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#include "can.h"
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void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
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{
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if(hcan->Instance==CAN)
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{
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__HAL_RCC_CAN1_CLK_ENABLE();
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GPIO_InitTypeDef itd;
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itd.Pin = GPIO_PIN_8|GPIO_PIN_9;
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itd.Mode = GPIO_MODE_AF_PP;
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itd.Pull = GPIO_NOPULL;
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itd.Speed = GPIO_SPEED_FREQ_HIGH;
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itd.Alternate = GPIO_AF4_CAN;
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HAL_GPIO_Init(GPIOB, &itd);
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}
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}
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void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
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{
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if(hcan->Instance==CAN) {
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__HAL_RCC_CAN1_CLK_DISABLE();
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
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}
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}
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void can_init(CAN_HandleTypeDef *hcan, CAN_TypeDef *instance)
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{
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__HAL_RCC_CAN1_CLK_ENABLE();
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GPIO_InitTypeDef itd;
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itd.Pin = GPIO_PIN_8|GPIO_PIN_9;
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itd.Mode = GPIO_MODE_AF_PP;
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itd.Pull = GPIO_NOPULL;
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itd.Speed = GPIO_SPEED_FREQ_HIGH;
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itd.Alternate = GPIO_AF4_CAN;
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HAL_GPIO_Init(GPIOB, &itd);
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hcan->Instance = instance;
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hcan->Init.Prescaler = 6-1;
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hcan->Init.Mode = CAN_MODE_SILENT;
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hcan->Init.SJW = CAN_SJW_1TQ;
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hcan->Init.BS1 = CAN_BS1_13TQ;
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hcan->Init.BS2 = CAN_BS2_2TQ;
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hcan->Init.TTCM = DISABLE;
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hcan->Init.ABOM = DISABLE;
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hcan->Init.AWUM = DISABLE;
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hcan->Init.NART = DISABLE;
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hcan->Init.RFLM = DISABLE;
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hcan->Init.TXFP = ENABLE;
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hcan->Init.SJW = CAN_SJW_1TQ;
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}
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void can_set_bittiming(CAN_HandleTypeDef *hcan, uint16_t brp, uint8_t phase_seg1, uint8_t phase_seg2, uint8_t sjw)
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@ -85,49 +64,68 @@ void can_set_bittiming(CAN_HandleTypeDef *hcan, uint16_t brp, uint8_t phase_seg1
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void can_enable(CAN_HandleTypeDef *hcan, bool loop_back, bool listen_only, bool one_shot)
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{
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hcan->Init.Mode = 0;
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if (loop_back) {
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hcan->Init.Mode |= CAN_MODE_LOOPBACK;
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}
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if (listen_only) {
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hcan->Init.Mode |= CAN_MODE_SILENT;
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}
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CAN_TypeDef *can = hcan->Instance;
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hcan->Init.NART = one_shot ? ENABLE : DISABLE;
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HAL_CAN_Init(hcan);
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uint32_t mcr = CAN_MCR_INRQ
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| CAN_MCR_ABOM
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| CAN_MCR_TXFP
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| (one_shot ? CAN_MCR_NART : 0);
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uint32_t btr = hcan->Init.SJW
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| hcan->Init.BS1
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| hcan->Init.BS2
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| (hcan->Init.Prescaler - 1)
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| (loop_back ? CAN_MODE_LOOPBACK : 0)
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| (listen_only ? CAN_MODE_SILENT : 0);
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// Reset CAN peripheral
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can->MCR |= CAN_MCR_RESET;
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while((can->MCR & CAN_MCR_RESET) != 0); // reset bit is set to zero after reset
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while((can->MSR & CAN_MSR_SLAK) == 0); // should be in sleep mode after reset
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can->MCR |= CAN_MCR_INRQ ;
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while((can->MSR & CAN_MSR_INAK) != 0);
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can->MCR = mcr;
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can->BTR = btr;
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can->MCR &= ~CAN_MCR_INRQ;
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while((can->MSR & CAN_MSR_INAK) == 0);
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uint32_t filter_bit = 0x00000001;
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can->FMR |= CAN_FMR_FINIT;
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can->FMR &= ~CAN_FMR_CAN2SB;
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can->FA1R &= ~filter_bit; // disable filter
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can->FS1R |= filter_bit; // set to single 32-bit filter mode
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can->FM1R &= ~filter_bit; // set filter mask mode for filter 0
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can->sFilterRegister[0].FR1 = 0; // filter ID = 0
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can->sFilterRegister[0].FR2 = 0; // filter Mask = 0
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can->FFA1R &= ~filter_bit; // assign filter 0 to FIFO 0
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can->FA1R |= filter_bit; // enable filter
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can->FMR &= ~CAN_FMR_FINIT;
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CAN_FilterConfTypeDef fd;
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fd.FilterNumber = 0;
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fd.FilterMode = CAN_FILTERMODE_IDMASK;
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fd.FilterScale = CAN_FILTERSCALE_32BIT;
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fd.BankNumber = 0;
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fd.FilterIdLow = 0;
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fd.FilterIdHigh = 0;
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fd.FilterMaskIdLow = 0;
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fd.FilterMaskIdHigh = 0;
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fd.FilterActivation = ENABLE;
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fd.FilterFIFOAssignment = CAN_FILTER_FIFO0;
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HAL_CAN_ConfigFilter(hcan, &fd);
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}
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void can_disable(CAN_HandleTypeDef *hcan)
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{
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HAL_CAN_DeInit(hcan);
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CAN_TypeDef *can = hcan->Instance;
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can->MCR |= CAN_MCR_INRQ ; // send can controller into initialization mode
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}
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bool can_is_rx_pending(CAN_HandleTypeDef *hcan)
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{
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return ((hcan->Instance->RF0R & CAN_RF0R_FMP0)!=0);
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CAN_TypeDef *can = hcan->Instance;
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return ((can->RF0R & CAN_RF0R_FMP0) != 0);
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}
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bool can_receive(CAN_HandleTypeDef *hcan, struct gs_host_frame *rx_frame)
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{
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bool retval = false;
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CAN_TypeDef *can = hcan->Instance;
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__HAL_LOCK(hcan);
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if (can_is_rx_pending(hcan)) {
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CAN_FIFOMailBox_TypeDef *fifo = &hcan->Instance->sFIFOMailBox[0];
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CAN_FIFOMailBox_TypeDef *fifo = &can->sFIFOMailBox[0];
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if (fifo->RIR & CAN_RI0R_IDE) {
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rx_frame->can_id = CAN_EFF_FLAG | ((fifo->RIR >> 3) & 0x1FFFFFFF);
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@ -150,24 +148,28 @@ bool can_receive(CAN_HandleTypeDef *hcan, struct gs_host_frame *rx_frame)
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rx_frame->data[6] = (fifo->RDHR >> 16) & 0xFF;
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rx_frame->data[7] = (fifo->RDHR >> 24) & 0xFF;
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hcan->Instance->RF0R |= CAN_RF0R_RFOM0; // release FIFO
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can->RF0R |= CAN_RF0R_RFOM0; // release FIFO
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return true;
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} else {
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return false;
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retval = true;
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}
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__HAL_UNLOCK(hcan);
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return retval;
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}
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static CAN_TxMailBox_TypeDef *can_find_free_mailbox(CAN_HandleTypeDef *hcan)
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{
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uint32_t tsr = hcan->Instance->TSR;
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CAN_TypeDef *can = hcan->Instance;
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uint32_t tsr = can->TSR;
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if ( tsr & CAN_TSR_TME0 ) {
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return &hcan->Instance->sTxMailBox[0];
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return &can->sTxMailBox[0];
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} else if ( tsr & CAN_TSR_TME1 ) {
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return &hcan->Instance->sTxMailBox[1];
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return &can->sTxMailBox[1];
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} else if ( tsr & CAN_TSR_TME2 ) {
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return &hcan->Instance->sTxMailBox[2];
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return &can->sTxMailBox[2];
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} else {
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return 0;
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}
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@ -175,10 +177,6 @@ static CAN_TxMailBox_TypeDef *can_find_free_mailbox(CAN_HandleTypeDef *hcan)
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bool can_send(CAN_HandleTypeDef *hcan, struct gs_host_frame *frame)
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{
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bool retval;
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__HAL_LOCK(hcan);
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CAN_TxMailBox_TypeDef *mb = can_find_free_mailbox(hcan);
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if (mb != 0) {
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@ -213,19 +211,16 @@ bool can_send(CAN_HandleTypeDef *hcan, struct gs_host_frame *frame)
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/* request transmission */
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mb->TIR |= CAN_TI0R_TXRQ;
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retval = true;
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return true;
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} else {
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retval = false;
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return false;
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}
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__HAL_UNLOCK(hcan);
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return retval;
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}
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uint32_t can_get_error_status(CAN_HandleTypeDef *hcan)
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{
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return hcan->Instance->ESR;
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CAN_TypeDef *can = hcan->Instance;
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return can->ESR;
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}
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bool can_parse_error_status(uint32_t err, struct gs_host_frame *frame)
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