diff --git a/src/interrupts.c b/src/interrupts.c
index ed04658..4300824 100644
--- a/src/interrupts.c
+++ b/src/interrupts.c
@@ -206,4 +206,57 @@ const pFunc InterruptVectorTable[84] = {
 	USB_Handler,          // int 66: USB OTG FS
 	// don't need to define any interrupts after this one
 };
+#elif defined(STM32G0)
+__attribute__((used, section(".vectors")))
+const pFunc InterruptVectorTable[48] = {
+	(pFunc)(&__StackTop), // initial stack pointer
+	Reset_Handler,        // reset handler
+	NMI_Handler,          // -14: NMI
+	HardFault_Handler,    // -13: HardFault
+	0,                    // -12: MemManage_Handler
+	0,                    // -11: BusFault_Handler
+	0,                    // -10: UsageFault_Handler
+	0,                    //
+	0,                    //
+	0,                    //
+	0,                    //
+	0,                    // -5: SVC_Handler
+	0,                    // -4: DebugMon_Handler
+	0,                    //
+	0,                    // -2: PendSV
+	SysTick_Handler,      // -1: SysTick
+// External Interrupts
+	0,                    /* Window WatchDog              */
+	0,                    /* PVD through EXTI Line detect */
+	0,                    /* RTC through the EXTI line    */
+	0,                    /* FLASH                        */
+	0,                    /* RCC & CRS                    */
+	0,                    /* EXTI Line 0 and 1            */
+	0,                    /* EXTI Line 2 and 3            */
+	0,                    /* EXTI Line 4 to 15            */
+	USB_Handler,          /* USB, UCPD1, UCPD2            */
+	0,                    /* DMA1 Channel 1               */
+	0,                    /* DMA1 Channel 2 and Channel 3 */
+	0,                    /* DMA1 Ch4 to Ch7, DMA2 Ch1 to Ch5, DMAMUX1 overrun */
+	0,                    /* ADC1, COMP1 and COMP2         */
+	0,                    /* TIM1 Break, Update, Trigger and Commutation */
+	0,                    /* TIM1 Capture Compare         */
+	0,                    /* TIM2                         */
+	0,                    /* TIM3, TIM4                   */
+	0,                    /* TIM6, DAC and LPTIM1         */
+	0,                    /* TIM7 and LPTIM2              */
+	0,                    /* TIM14                        */
+	0,                    /* TIM15                        */
+	0,                    /* TIM16 & FDCAN1_IT0 & FDCAN2_IT0 */
+	0,                    /* TIM17 & FDCAN1_IT1 & FDCAN2_IT1 */
+	0,                    /* I2C1                         */
+	0,                    /* I2C2, I2C3                   */
+	0,                    /* SPI1                         */
+	0,                    /* SPI2, SPI3                   */
+	0,                    /* USART1                       */
+	0,                    /* USART2 & LPUART2             */
+	0,                    /* USART3, USART4, USART5, USART6, LPUART1   */
+	0,                    /* CEC                          */
+	// don't need to define any interrupts after this one
+};
 #endif
diff --git a/src/main.c b/src/main.c
index a363575..84dd78d 100644
--- a/src/main.c
+++ b/src/main.c
@@ -182,6 +182,9 @@ void HAL_MspInit(void)
 #if defined(STM32F4)
 	__HAL_RCC_PWR_CLK_ENABLE();
 	__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+#elif defined(STM32G0)
+	__HAL_RCC_PWR_CLK_ENABLE();
+	HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
 #endif
 	HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
 }
@@ -240,6 +243,40 @@ void SystemClock_Config(void)
 	RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
 	RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
 	HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
+#elif defined(STM32G0)
+	/** Configure the main internal regulator output voltage
+	*/
+	HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+	/** Initializes the RCC Oscillators according to the specified parameters
+	* in the RCC_OscInitTypeDef structure.
+	*/
+	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI48;
+	RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+	RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+	RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
+	RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+	RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+	RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+	RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+	RCC_OscInitStruct.PLL.PLLN = 8;
+	RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+	RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+	RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+	HAL_RCC_OscConfig(&RCC_OscInitStruct);
+	/** Initializes the CPU, AHB and APB buses clocks
+	*/
+	RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+								  |RCC_CLOCKTYPE_PCLK1;
+	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+	RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+	RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+
+	HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+
+	RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+	PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+	PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+	HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
 #endif
 
 	HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);