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hellotouchGFX/SPI_W25QXX_Template/SYSTEM/sys/sys.c

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#include "sys.h"
//////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB>ѧϰʹ<CFB0>ã<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κ<EFBFBD><CEBA><EFBFBD>;
//ALIENTEK STM32<33><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//ϵͳʱ<CDB3>ӳ<EFBFBD>ʼ<EFBFBD><CABC>
//<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F>жϹ<D0B6><CFB9><EFBFBD>/GPIO<49><4F><EFBFBD>õ<EFBFBD>
//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD>@ALIENTEK
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̳:www.openedv.com
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:2015/12/4
//<2F>汾<EFBFBD><E6B1BE>V1.0
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//<2F><>Ȩ<EFBFBD><C8A8><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE><EFBFBD>
//Copyright(C) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾ 2014-2024
//All rights reserved
//********************************************************************************
//<2F>޸<EFBFBD>˵<EFBFBD><CBB5>
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//<2F><><EFBFBD><EFBFBD>̽<EFBFBD><CCBD><EFBFBD><EFBFBD>STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
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//////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
//NVIC_VectTab:<3A><>ַ
//Offset:ƫ<><C6AB><EFBFBD><EFBFBD>
void MY_NVIC_SetVectorTable(u32 NVIC_VectTab,u32 Offset)
{
SCB->VTOR=NVIC_VectTab|(Offset&(u32)0xFFFFFE00);//<2F><><EFBFBD><EFBFBD>NVIC<49><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>,VTOR<4F><52>9λ<39><CEBB><EFBFBD><EFBFBD>,<2C><>[8:0]<5D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
//<2F><><EFBFBD><EFBFBD>NVIC<49><43><EFBFBD><EFBFBD>
//NVIC_Group:NVIC<49><43><EFBFBD><EFBFBD> 0~4 <20>ܹ<EFBFBD>5<EFBFBD><35>
void MY_NVIC_PriorityGroupConfig(u8 NVIC_Group)
{
u32 temp,temp1;
temp1=(~NVIC_Group)&0x07;//ȡ<><C8A1><EFBFBD><EFBFBD>λ
temp1<<=8;
temp=SCB->AIRCR; //<2F><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
temp&=0X0000F8FF; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>
temp|=0X05FA0000; //д<><D0B4>Կ<EFBFBD><D4BF>
temp|=temp1;
SCB->AIRCR=temp; //<2F><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD>
}
//<2F><><EFBFBD><EFBFBD>NVIC
//NVIC_PreemptionPriority:<3A><>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>
//NVIC_SubPriority :<3A><>Ӧ<EFBFBD><D3A6><EFBFBD>ȼ<EFBFBD>
//NVIC_Channel :<3A>жϱ<D0B6><CFB1><EFBFBD>
//NVIC_Group :<3A>жϷ<D0B6><CFB7><EFBFBD> 0~4
//ע<><D7A2><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD><EFBFBD>趨<EFBFBD><E8B6A8><EFBFBD><EFBFBD><EFBFBD>ķ<EFBFBD>Χ!<21><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>벻<EFBFBD><EBB2BB><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
//<2F>黮<EFBFBD><E9BBAE>:
//<2F><>0:0λ<30><CEBB>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>,4λ<34><CEBB>Ӧ<EFBFBD><D3A6><EFBFBD>ȼ<EFBFBD>
//<2F><>1:1λ<31><CEBB>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>,3λ<33><CEBB>Ӧ<EFBFBD><D3A6><EFBFBD>ȼ<EFBFBD>
//<2F><>2:2λ<32><CEBB>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>,2λ<32><CEBB>Ӧ<EFBFBD><D3A6><EFBFBD>ȼ<EFBFBD>
//<2F><>3:3λ<33><CEBB>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>,1λ<31><CEBB>Ӧ<EFBFBD><D3A6><EFBFBD>ȼ<EFBFBD>
//<2F><>4:4λ<34><CEBB>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>,0λ<30><CEBB>Ӧ<EFBFBD><D3A6><EFBFBD>ȼ<EFBFBD>
//NVIC_SubPriority<74><79>NVIC_PreemptionPriority<74><79>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD>,<2C><>ֵԽС,Խ<><D4BD><EFBFBD><EFBFBD>
void MY_NVIC_Init(u8 NVIC_PreemptionPriority,u8 NVIC_SubPriority,u8 NVIC_Channel,u8 NVIC_Group)
{
u32 temp;
MY_NVIC_PriorityGroupConfig(NVIC_Group);//<2F><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD>
temp=NVIC_PreemptionPriority<<(4-NVIC_Group);
temp|=NVIC_SubPriority&(0x0f>>NVIC_Group);
temp&=0xf; //ȡ<><C8A1><EFBFBD><EFBFBD>λ
NVIC->ISER[NVIC_Channel/32]|=1<<NVIC_Channel%32;//ʹ<><CAB9><EFBFBD>ж<EFBFBD>λ(Ҫ<><D2AA><EFBFBD><EFBFBD><EFBFBD>Ļ<EFBFBD>,<2C><><EFBFBD><EFBFBD>ICER<45><52>ӦλΪ1<CEAA><31><EFBFBD><EFBFBD>)
NVIC->IP[NVIC_Channel]|=temp<<4; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD>
}
//<2F>ⲿ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
//ֻ<><D6BB><EFBFBD><EFBFBD>GPIOA~I;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PVD,RTC,USB_OTG,USB_HS,<2C><>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD>ѵ<EFBFBD>
//<2F><><EFBFBD><EFBFBD>:
//GPIOx:0~8,<2C><><EFBFBD><EFBFBD>GPIOA~I
//BITx:<3A><>Ҫʹ<D2AA>ܵ<EFBFBD>λ;
//TRIM:<3A><><EFBFBD><EFBFBD>ģʽ,1,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>;2,<2C>Ͻ<EFBFBD><CFBD><EFBFBD>;3<><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD>
//<2F>ú<EFBFBD><C3BA><EFBFBD>һ<EFBFBD><D2BB>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31>IO<49><4F>,<2C><><EFBFBD><EFBFBD>IO<49><4F>,<2C><><EFBFBD><EFBFBD><EFBFBD>ε<EFBFBD><CEB5><EFBFBD>
//<2F>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>ж<EFBFBD>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void Ex_NVIC_Config(u8 GPIOx,u8 BITx,u8 TRIM)
{
u8 EXTOFFSET=(BITx%4)*4;
RCC->APB2ENR|=1<<14; //ʹ<><CAB9>SYSCFGʱ<47><CAB1>
SYSCFG->EXTICR[BITx/4]&=~(0x000F<<EXTOFFSET);//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>
SYSCFG->EXTICR[BITx/4]|=GPIOx<<EXTOFFSET; //EXTI.BITxӳ<78>䵽GPIOx.BITx
//<2F>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>
EXTI->IMR|=1<<BITx; //<2F><><EFBFBD><EFBFBD>line BITx<54>ϵ<EFBFBD><CFB5>ж<EFBFBD>(<28><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>ֹ<EFBFBD>жϣ<D0B6><CFA3>򷴲<EFBFBD><F2B7B4B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
if(TRIM&0x01)EXTI->FTSR|=1<<BITx; //line BITx<54><78><EFBFBD>¼<EFBFBD><C2BC>½<EFBFBD><C2BD>ش<EFBFBD><D8B4><EFBFBD>
if(TRIM&0x02)EXTI->RTSR|=1<<BITx; //line BITx<54><78><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ش<EFBFBD><D8B4><EFBFBD>
}
//GPIO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//GPIOx:GPIOA~GPIOI.
//BITx:0~15,<2C><><EFBFBD><EFBFBD>IO<49><4F><EFBFBD>ű<EFBFBD><C5B1><EFBFBD>.
//AFx:0~15,<2C><><EFBFBD><EFBFBD>AF0~AF15.
//AF0~15<31><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>г<EFBFBD><D0B3><EFBFBD><EFBFBD>õ<EFBFBD>,<2C><>ϸ<EFBFBD><CFB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>429/746<34><36><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD>,Table 12):
//AF0:MCO/SWD/SWCLK/RTC AF1:TIM1/TIM2; AF2:TIM3~5; AF3:TIM8~11
//AF4:I2C1~I2C4; AF5:SPI1~SPI6; AF6:SPI3/SAI1; AF7:SPI2/3/USART1~3/UART5/SPDIFRX;
//AF8:USART4~8/SPDIFRX/SAI2; AF9;CAN1~2/TIM12~14/LCD/QSPI; AF10:USB_OTG/USB_HS/SAI2/QSPI AF11:ETH
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//AF12:FMC/SDIO/OTG/HS AF13:DCIM AF14:LCD; AF15:EVENTOUT
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void GPIO_AF_Set(GPIO_TypeDef* GPIOx,u8 BITx,u8 AFx)
{
GPIOx->AFR[BITx>>3]&=~(0X0F<<((BITx&0X07)*4));
GPIOx->AFR[BITx>>3]|=(u32)AFx<<((BITx&0X07)*4);
}
//GPIOͨ<4F><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//GPIOx:GPIOA~GPIOI.
//BITx:0X0000~0XFFFF,λ<><CEBB><EFBFBD><EFBFBD>,ÿ<><C3BF>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>IO,<2C><>0λ<30><CEBB><EFBFBD><EFBFBD>Px0,<2C><>1λ<31><CEBB><EFBFBD><EFBFBD>Px1,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.<2E><><EFBFBD><EFBFBD>0X0101,<2C><><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>Px0<78><30>Px8.
//MODE:0~3;ģʽѡ<CABD><D1A1>,0,<2C><><EFBFBD><EFBFBD>(ϵͳ<CFB5><CDB3>λĬ<CEBB><C4AC>״̬);1,<2C><>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>;2,<2C><><EFBFBD>ù<EFBFBD><C3B9><EFBFBD>;3,ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
//OTYPE:0/1;<3B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>,0,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>;1,<2C><>©<EFBFBD><C2A9><EFBFBD><EFBFBD>.
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//OSPEED:0~3;<3B><><EFBFBD><EFBFBD><EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD><EFBFBD>,0,2Mhz;1,25Mhz;2,50Mhz;3,100Mh.
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//PUPD:0~3:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>;1,<2C><><EFBFBD><EFBFBD>;2,<2C><><EFBFBD><EFBFBD>;3,<2C><><EFBFBD><EFBFBD>.
//ע<><D7A2>:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ(<28><>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>/ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><>,OTYPE<50><45>OSPEED<45><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч!!
void GPIO_Set(GPIO_TypeDef* GPIOx,u32 BITx,u32 MODE,u32 OTYPE,u32 OSPEED,u32 PUPD)
{
u32 pinpos=0,pos=0,curpin=0;
for(pinpos=0;pinpos<16;pinpos++)
{
pos=1<<pinpos; //һ<><D2BB><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
curpin=BITx&pos;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
if(curpin==pos) //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
{
GPIOx->MODER&=~(3<<(pinpos*2)); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
GPIOx->MODER|=MODE<<(pinpos*2); //<2F><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>ģʽ
if((MODE==0X01)||(MODE==0X02)) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ/<2F><><EFBFBD>ù<EFBFBD><C3B9><EFBFBD>ģʽ
{
GPIOx->OSPEEDR&=~(3<<(pinpos*2)); //<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
GPIOx->OSPEEDR|=(OSPEED<<(pinpos*2));//<2F><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD><C2B5>ٶ<EFBFBD>ֵ
GPIOx->OTYPER&=~(1<<pinpos) ; //<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
GPIOx->OTYPER|=OTYPE<<pinpos; //<2F><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD><C2B5><EFBFBD><EFBFBD><EFBFBD>ģʽ
}
GPIOx->PUPDR&=~(3<<(pinpos*2)); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
GPIOx->PUPDR|=PUPD<<(pinpos*2); //<2F><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD><C2B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
}
}
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//THUMBָ<42>֧<EEB2BB>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD>ʵ<EFBFBD><CAB5>ִ<EFBFBD>л<EFBFBD><D0BB><EFBFBD>ָ<EFBFBD><D6B8>WFI
void WFI_SET(void)
{
__ASM volatile("wfi");
}
//<2F>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>(<28><><EFBFBD>Dz<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD>fault<6C><74>NMI<4D>ж<EFBFBD>)
void INTX_DISABLE(void)
{
__ASM volatile("cpsid i");
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
void INTX_ENABLE(void)
{
__ASM volatile("cpsie i");
}
//<2F><><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD>ַ
//addr:ջ<><D5BB><EFBFBD><EFBFBD>ַ
__asm void MSR_MSP(u32 addr)
{
MSR MSP, r0 //set Main Stack value
BX r14
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
void Sys_Standby(void)
{
SCB->SCR|=1<<2; //ʹ<><CAB9>SLEEPDEEPλ (SYS->CTRL)
RCC->APB1ENR|=1<<28;//ʹ<>ܵ<EFBFBD>Դʱ<D4B4><CAB1>
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PWR->CSR|=1<<8; //<2F><><EFBFBD><EFBFBD>WKUP<55><50><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>
PWR->CR|=1<<2; //<2F><><EFBFBD><EFBFBD>Wake-up <20><>־
PWR->CR|=1<<1; //PDDS<44><53>λ
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WFI_SET(); //ִ<><D6B4>WFIָ<49><D6B8>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
}
//ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>λ
void Sys_Soft_Reset(void)
{
SCB->AIRCR =0X05FA0000|(u32)0x04;
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}
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//ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
//Fvco=Fs*(plln/pllm);
//Fsys=Fvco/pllp=Fs*(plln/(pllm*pllp));
//Fusb=Fvco/pllq=Fs*(plln/(pllm*pllq));
//Fvco:VCOƵ<4F><C6B5>
//Fsys:ϵͳʱ<CDB3><CAB1>Ƶ<EFBFBD><C6B5>
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//Fusb:USB,SDIO,RNG<4E>ȵ<EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD><C6B5>
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//Fs:PLL<4C><4C><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD><C6B5>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>HSI,HSE<53><45>.
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//plln:<3A><>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL<4C><4C>Ƶ),ȡֵ<C8A1><D6B5>Χ:64~432.
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//pllm:<3A><>PLL<4C><4C><EFBFBD><EFBFBD>ƵPLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮ǰ<D6AE>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~63.
//pllp:ϵͳʱ<CDB3>ӵ<EFBFBD><D3B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2,4,6,8.(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4<EFBFBD><34>ֵ!)
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//pllq:USB/SDIO/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~15.
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//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>Ϊ25M<35><4D>ʱ<EFBFBD><CAB1>,<2C>Ƽ<EFBFBD>ֵ:plln=360,pllm=25,pllp=2,pllq=8.
//<2F>õ<EFBFBD>:Fvco=25*(360/25)=360Mhz
// Fsys=360/2=180Mhz
// Fusb=360/8=45Mhz<68><7A>ʹ<EFBFBD><CAB9>USBʱ<42><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>plln=384<38><34><EFBFBD><EFBFBD><EFBFBD>ɵõ<C9B5>48MhzƵ<7A>ʣ<EFBFBD>
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//<2F><><EFBFBD><EFBFBD>ֵ:0,<2C>ɹ<EFBFBD>;1,ʧ<>ܡ<EFBFBD>
u8 Sys_Clock_Set(u32 plln,u32 pllm,u32 pllp,u32 pllq)
{
u16 retry=0;
u8 status=0;
RCC->CR|=1<<16; //HSE <20><><EFBFBD><EFBFBD>
while(((RCC->CR&(1<<17))==0)&&(retry<0X1FFF))retry++;//<2F>ȴ<EFBFBD>HSE RDY
if(retry==0X1FFF)status=1; //HSE<53>޷<EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD>
else
{
RCC->APB1ENR|=1<<28; //<2F><>Դ<EFBFBD>ӿ<EFBFBD>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9>
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PWR->CR|=3<<14; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ,ʱ<>ӿɵ<D3BF>180Mhz
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RCC->CFGR|=(0<<4)|(5<<10)|(4<<13);//HCLK <20><><EFBFBD><EFBFBD>Ƶ;APB1 4<><34>Ƶ;APB2 2<><32>Ƶ.
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RCC->CR&=~(1<<24); //<2F>ر<EFBFBD><D8B1><EFBFBD>PLL
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RCC->PLLCFGR=pllm|(plln<<6)|(((pllp>>1)-1)<<16)|(pllq<<24)|(1<<22);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PLL,PLLʱ<4C><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>HSE
RCC->CR|=1<<24; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PLL
while((RCC->CR&(1<<25))==0);//<2F>ȴ<EFBFBD>PLL׼<4C><D7BC><EFBFBD><EFBFBD>
FLASH->ACR|=1<<8; //ָ<><D6B8>Ԥȡʹ<C8A1><CAB9>.
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FLASH->ACR|=1<<9; //ָ<><D6B8>cacheʹ<65><CAB9>.
FLASH->ACR|=1<<10; //<2F><><EFBFBD><EFBFBD>cacheʹ<65><CAB9>.
FLASH->ACR|=5<<0; //5<><35>CPU<50>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>.
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RCC->CFGR&=~(3<<0); //<2F><><EFBFBD><EFBFBD>
RCC->CFGR|=2<<0; //ѡ<><D1A1><EFBFBD><EFBFBD>PLL<4C><4C>Ϊϵͳʱ<CDB3><CAB1>
while((RCC->CFGR&(3<<2))!=(2<<2));//<2F>ȴ<EFBFBD><C8B4><EFBFBD>PLL<4C><4C>Ϊϵͳʱ<CDB3>ӳɹ<D3B3>.
}
return status;
}
//ϵͳʱ<CDB3>ӳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//plln:<3A><>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL<4C><4C>Ƶ),ȡֵ<C8A1><D6B5>Χ:64~432.
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//pllm:<3A><>PLL<4C><4C><EFBFBD><EFBFBD>ƵPLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮ǰ<D6AE>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~63.
//pllp:ϵͳʱ<CDB3>ӵ<EFBFBD><D3B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2,4,6,8.(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4<EFBFBD><34>ֵ!)
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//pllq:USB/SDIO/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~15.
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void Stm32_Clock_Init(u32 plln,u32 pllm,u32 pllp,u32 pllq)
{
RCC->CR|=0x00000001; //<2F><><EFBFBD><EFBFBD>HISON,<2C><><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>RC<52><43><EFBFBD><EFBFBD>
RCC->CFGR=0x00000000; //CFGR<47><52><EFBFBD><EFBFBD>
RCC->CR&=0xFEF6FFFF; //HSEON,CSSON,PLLON<4F><4E><EFBFBD><EFBFBD>
RCC->PLLCFGR=0x24003010; //PLLCFGR<47>ָ<EFBFBD><D6B8><EFBFBD>λֵ
RCC->CR&=~(1<<18); //HSEBYP<59><50><EFBFBD><EFBFBD>,<2C>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
RCC->CIR=0x00000000; //<2F><>ֹRCCʱ<43><CAB1><EFBFBD>ж<EFBFBD>
Sys_Clock_Set(plln,pllm,pllp,pllq);//<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#ifdef VECT_TAB_RAM
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MY_NVIC_SetVectorTable(1<<29,0x0);
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#else
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MY_NVIC_SetVectorTable(0,0x0);
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#endif
}
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