mirror of
https://github.com/nodemcu/nodemcu-firmware.git
synced 2025-01-30 21:12:55 +08:00
526d21dab4
The PR removed the bulk of non-newlib headers from the NodeMCU source base. app/libc has now been cut down to the bare minimum overrides to shadow the corresponding functions in the SDK's libc. The old c_xyz.h headerfiles have been nuked in favour of the standard <xyz.h> headers, with a few exceptions over in sdk-overrides. Again, shipping a libc.a without headers is a terrible thing to do. We're still living on a prayer that libc was configured the same was as a default-configured xtensa gcc toolchain assumes it is. That part I cannot do anything about, unfortunately, but it's no worse than it has been before. This enables our source files to compile successfully using the standard header files, and use the typical malloc()/calloc()/realloc()/free(), the strwhatever()s and memwhatever()s. These end up, through macro and linker magic, mapped to the appropriate SDK or ROM functions.
130 lines
4.1 KiB
C
130 lines
4.1 KiB
C
// Do not use the code from ucg submodule and skip the complete source here
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// if the ucg module is not selected.
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// Reason: The whole ucg submodule code tree might not even exist in this case.
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#include "user_modules.h"
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#ifdef LUA_USE_MODULES_UCG
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#include <string.h>
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#include <stdlib.h>
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#include "platform.h"
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#define USE_PIN_LIST
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#include "ucg_nodemcu_hal.h"
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#define delayMicroseconds os_delay_us
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static spi_data_type cache;
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static uint8_t cached;
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#define CACHED_TRANSFER(dat, num) cache = cached = 0; \
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while( arg > 0 ) { \
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if (cached == 4) { \
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platform_spi_transaction( 1, 0, 0, 32, cache, 0, 0, 0 ); \
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cache = cached = 0; \
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} \
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cache = (cache << num*8) | dat; \
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cached += num; \
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arg--; \
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} \
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if (cached > 0) { \
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platform_spi_transaction( 1, 0, 0, cached * 8, cache, 0, 0, 0 ); \
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}
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int16_t ucg_com_nodemcu_hw_spi(ucg_t *ucg, int16_t msg, uint16_t arg, uint8_t *data)
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{
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switch(msg)
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{
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case UCG_COM_MSG_POWER_UP:
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/* "data" is a pointer to ucg_com_info_t structure with the following information: */
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/* ((ucg_com_info_t *)data)->serial_clk_speed value in nanoseconds */
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/* ((ucg_com_info_t *)data)->parallel_clk_speed value in nanoseconds */
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/* setup pins */
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// we assume that the SPI interface was already initialized
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// just care for the /CS and D/C pins
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//platform_gpio_write( ucg->pin_list[0], value );
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if ( ucg->pin_list[UCG_PIN_RST] != UCG_PIN_VAL_NONE )
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platform_gpio_mode( ucg->pin_list[UCG_PIN_RST], PLATFORM_GPIO_OUTPUT, PLATFORM_GPIO_FLOAT );
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platform_gpio_mode( ucg->pin_list[UCG_PIN_CD], PLATFORM_GPIO_OUTPUT, PLATFORM_GPIO_FLOAT );
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if ( ucg->pin_list[UCG_PIN_CS] != UCG_PIN_VAL_NONE )
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platform_gpio_mode( ucg->pin_list[UCG_PIN_CS], PLATFORM_GPIO_OUTPUT, PLATFORM_GPIO_FLOAT );
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break;
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case UCG_COM_MSG_POWER_DOWN:
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break;
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case UCG_COM_MSG_DELAY:
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delayMicroseconds(arg);
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break;
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case UCG_COM_MSG_CHANGE_RESET_LINE:
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if ( ucg->pin_list[UCG_PIN_RST] != UCG_PIN_VAL_NONE )
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platform_gpio_write( ucg->pin_list[UCG_PIN_RST], arg );
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break;
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case UCG_COM_MSG_CHANGE_CS_LINE:
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if ( ucg->pin_list[UCG_PIN_CS] != UCG_PIN_VAL_NONE )
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platform_gpio_write( ucg->pin_list[UCG_PIN_CS], arg );
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break;
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case UCG_COM_MSG_CHANGE_CD_LINE:
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platform_gpio_write( ucg->pin_list[UCG_PIN_CD], arg );
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break;
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case UCG_COM_MSG_SEND_BYTE:
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platform_spi_send( 1, 8, arg );
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break;
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case UCG_COM_MSG_REPEAT_1_BYTE:
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CACHED_TRANSFER(data[0], 1);
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break;
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case UCG_COM_MSG_REPEAT_2_BYTES:
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CACHED_TRANSFER((data[0] << 8) | data[1], 2);
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break;
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case UCG_COM_MSG_REPEAT_3_BYTES:
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while( arg > 0 ) {
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platform_spi_transaction( 1, 0, 0, 24, (data[0] << 16) | (data[1] << 8) | data[2], 0, 0, 0 );
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arg--;
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}
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break;
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case UCG_COM_MSG_SEND_STR:
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CACHED_TRANSFER(*data++, 1);
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break;
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case UCG_COM_MSG_SEND_CD_DATA_SEQUENCE:
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while(arg > 0)
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{
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if ( *data != 0 )
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{
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/* set the data line directly, ignore the setting from UCG_CFG_CD */
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if ( *data == 1 )
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{
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platform_gpio_write( ucg->pin_list[UCG_PIN_CD], 0 );
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}
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else
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{
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platform_gpio_write( ucg->pin_list[UCG_PIN_CD], 1 );
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}
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}
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data++;
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platform_spi_send( 1, 8, *data );
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data++;
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arg--;
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}
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break;
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}
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return 1;
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}
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#endif /* LUA_USE_MODULES_UCG */
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