diff --git a/3rd_party/CMSIS/Include/cmsis_armcc.h b/3rd_party/CMSIS/Include/cmsis_armcc.h index 3ddc308f..7b2a2847 100644 --- a/3rd_party/CMSIS/Include/cmsis_armcc.h +++ b/3rd_party/CMSIS/Include/cmsis_armcc.h @@ -1,8 +1,8 @@ /**************************************************************************//** * @file cmsis_armcc.h * @brief CMSIS compiler ARMCC (ARM compiler V5) header file - * @version V5.0.1 - * @date 03. February 2017 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* * Copyright (c) 2009-2017 ARM Limited. All rights reserved. @@ -50,34 +50,46 @@ /* CMSIS compiler specific defines */ #ifndef __ASM - #define __ASM __asm + #define __ASM __asm #endif #ifndef __INLINE - #define __INLINE __inline + #define __INLINE __inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static __inline + #define __STATIC_INLINE static __inline #endif #ifndef __NO_RETURN - #define __NO_RETURN __declspec(noreturn) + #define __NO_RETURN __declspec(noreturn) #endif #ifndef __USED - #define __USED __attribute__((used)) + #define __USED __attribute__((used)) #endif #ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __UNALIGNED_UINT32 - #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) + #define __WEAK __attribute__((weak)) #endif #ifndef __PACKED - #define __PACKED __attribute__((packed)) + #define __PACKED __attribute__((packed)) #endif #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT __packed struct + #define __PACKED_STRUCT __packed struct +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr))) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr))) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) #endif diff --git a/3rd_party/CMSIS/Include/cmsis_armclang.h b/3rd_party/CMSIS/Include/cmsis_armclang.h index be7d1f39..7c22d840 100644 --- a/3rd_party/CMSIS/Include/cmsis_armclang.h +++ b/3rd_party/CMSIS/Include/cmsis_armclang.h @@ -1,8 +1,8 @@ /**************************************************************************//** * @file cmsis_armclang.h * @brief CMSIS compiler ARMCLANG (ARM compiler V6) header file - * @version V5.0.1 - * @date 02. February 2017 + * @version V5.0.3 + * @date 27. March 2017 ******************************************************************************/ /* * Copyright (c) 2009-2017 ARM Limited. All rights reserved. @@ -22,6 +22,8 @@ * limitations under the License. */ +//lint -esym(9058, IRQn) disable MISRA 2012 Rule 2.4 for IRQn + #ifndef __CMSIS_ARMCLANG_H #define __CMSIS_ARMCLANG_H @@ -31,38 +33,70 @@ /* CMSIS compiler specific defines */ #ifndef __ASM - #define __ASM __asm + #define __ASM __asm #endif #ifndef __INLINE - #define __INLINE __inline + #define __INLINE __inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static __inline + #define __STATIC_INLINE static __inline #endif #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) + #define __NO_RETURN __attribute__((noreturn)) #endif #ifndef __USED - #define __USED __attribute__((used)) + #define __USED __attribute__((used)) #endif #ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __UNALIGNED_UINT32 - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wpacked" - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #pragma clang diagnostic pop - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) + #define __WEAK __attribute__((weak)) #endif #ifndef __PACKED - #define __PACKED __attribute__((packed, aligned(1))) + #define __PACKED __attribute__((packed, aligned(1))) #endif #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +//lint -esym(9058, T_UINT32) disable MISRA 2012 Rule 2.4 for T_UINT32 + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +//lint -esym(9058, T_UINT16_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +//lint -esym(9058, T_UINT16_READ) disable MISRA 2012 Rule 2.4 for T_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +//lint -esym(9058, T_UINT32_WRITE) disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) #endif @@ -292,6 +326,33 @@ __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t top #endif +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Stack Pointer (non-secure) + \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + \return SP Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + \param [in] topOfStack Stack Pointer value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack) +{ + __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); +} +#endif + + /** \brief Get Priority Mask \details Returns the current state of the priority mask bit from the Priority Mask Register. diff --git a/3rd_party/CMSIS/Include/cmsis_compiler.h b/3rd_party/CMSIS/Include/cmsis_compiler.h index 8b989f85..2ef183fb 100644 --- a/3rd_party/CMSIS/Include/cmsis_compiler.h +++ b/3rd_party/CMSIS/Include/cmsis_compiler.h @@ -1,8 +1,8 @@ /**************************************************************************//** * @file cmsis_compiler.h * @brief CMSIS compiler generic header file - * @version V5.0.1 - * @date 30. January 2017 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* * Copyright (c) 2009-2017 ARM Limited. All rights reserved. @@ -54,40 +54,56 @@ #elif defined ( __ICCARM__ ) #ifndef __ASM - #define __ASM __asm + #define __ASM __asm #endif #ifndef __INLINE - #define __INLINE inline + #define __INLINE inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline + #define __STATIC_INLINE static inline #endif #include #ifndef __NO_RETURN - #define __NO_RETURN __noreturn + #define __NO_RETURN __noreturn #endif #ifndef __USED - #define __USED __root + #define __USED __root #endif #ifndef __WEAK - #define __WEAK __weak + #define __WEAK __weak #endif - #ifndef __UNALIGNED_UINT32 + #ifndef __PACKED + #define __PACKED __packed + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT __packed struct + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ __packed struct T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) #endif #ifndef __ALIGNED #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. #define __ALIGNED(x) #endif - #ifndef __PACKED - #define __PACKED __packed - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT __packed struct - #endif /* @@ -97,35 +113,51 @@ #include #ifndef __ASM - #define __ASM __asm + #define __ASM __asm #endif #ifndef __INLINE - #define __INLINE inline + #define __INLINE inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline + #define __STATIC_INLINE static inline #endif #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) + #define __NO_RETURN __attribute__((noreturn)) #endif #ifndef __USED - #define __USED __attribute__((used)) + #define __USED __attribute__((used)) #endif #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - #ifndef __UNALIGNED_UINT32 - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) - #endif - #ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) + #define __WEAK __attribute__((weak)) #endif #ifndef __PACKED - #define __PACKED __attribute__((packed)) + #define __PACKED __attribute__((packed)) #endif #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed)) + #define __PACKED_STRUCT struct __attribute__((packed)) + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) #endif @@ -140,36 +172,52 @@ */ #ifndef __ASM - #define __ASM __asm + #define __ASM __asm #endif #ifndef __INLINE - #define __INLINE inline + #define __INLINE inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline + #define __STATIC_INLINE static inline #endif #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) + #define __NO_RETURN __attribute__((noreturn)) #endif #ifndef __USED - #define __USED __attribute__((used)) + #define __USED __attribute__((used)) #endif #ifndef __WEAK - #define __WEAK __attribute__((weak)) + #define __WEAK __attribute__((weak)) #endif - #ifndef __UNALIGNED_UINT32 + #ifndef __PACKED + #define __PACKED __packed__ + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __packed__ + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ struct __packed__ T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) #endif #ifndef __ALIGNED #define __ALIGNED(x) __align(x) #endif - #ifndef __PACKED - #define __PACKED __packed__ - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __packed__ - #endif /* @@ -179,13 +227,13 @@ #include #ifndef __ASM - #define __ASM _asm + #define __ASM _asm #endif #ifndef __INLINE - #define __INLINE inline + #define __INLINE inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline + #define __STATIC_INLINE static inline #endif #ifndef __NO_RETURN // NO RETURN is automatically detected hence no warning here @@ -196,22 +244,38 @@ #define __USED #endif #ifndef __WEAK - #define __WEAK __weak + #define __WEAK __weak #endif - #ifndef __UNALIGNED_UINT32 + #ifndef __PACKED + #define __PACKED @packed + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT @packed struct + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ @packed struct T_UINT32 { uint32_t v; }; - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) #endif #ifndef __ALIGNED #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. #define __ALIGNED(x) #endif - #ifndef __PACKED - #define __PACKED @packed - #endif - #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT @packed struct - #endif #else diff --git a/3rd_party/CMSIS/Include/cmsis_gcc.h b/3rd_party/CMSIS/Include/cmsis_gcc.h index 074cd7ab..f023d77b 100644 --- a/3rd_party/CMSIS/Include/cmsis_gcc.h +++ b/3rd_party/CMSIS/Include/cmsis_gcc.h @@ -1,8 +1,8 @@ /**************************************************************************//** * @file cmsis_gcc.h * @brief CMSIS compiler GCC header file - * @version V5.0.1 - * @date 02. February 2017 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* * Copyright (c) 2009-2017 ARM Limited. All rights reserved. @@ -33,39 +33,71 @@ /* CMSIS compiler specific defines */ #ifndef __ASM - #define __ASM __asm + #define __ASM __asm #endif #ifndef __INLINE - #define __INLINE inline + #define __INLINE inline #endif #ifndef __STATIC_INLINE - #define __STATIC_INLINE static inline + #define __STATIC_INLINE static inline #endif #ifndef __NO_RETURN - #define __NO_RETURN __attribute__((noreturn)) + #define __NO_RETURN __attribute__((noreturn)) #endif #ifndef __USED - #define __USED __attribute__((used)) + #define __USED __attribute__((used)) #endif #ifndef __WEAK - #define __WEAK __attribute__((weak)) -#endif -#ifndef __UNALIGNED_UINT32 -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wpacked" -#pragma GCC diagnostic ignored "-Wattributes" - struct __attribute__((packed)) T_UINT32 { uint32_t v; }; -#pragma GCC diagnostic pop - #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) -#endif -#ifndef __ALIGNED - #define __ALIGNED(x) __attribute__((aligned(x))) + #define __WEAK __attribute__((weak)) #endif #ifndef __PACKED - #define __PACKED __attribute__((packed, aligned(1))) + #define __PACKED __attribute__((packed, aligned(1))) #endif #ifndef __PACKED_STRUCT - #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) #endif @@ -301,6 +333,33 @@ __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t top #endif +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Stack Pointer (non-secure) + \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + \return SP Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + \param [in] topOfStack Stack Pointer value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack) +{ + __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); +} +#endif + + /** \brief Get Priority Mask \details Returns the current state of the priority mask bit from the Priority Mask Register. diff --git a/3rd_party/CMSIS/Include/core_armv8mbl.h b/3rd_party/CMSIS/Include/core_armv8mbl.h index 5ce9a521..d0393520 100644 --- a/3rd_party/CMSIS/Include/core_armv8mbl.h +++ b/3rd_party/CMSIS/Include/core_armv8mbl.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_armv8mbl.h * @brief CMSIS ARMv8MBL Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 25. November 2016 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -1224,7 +1224,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else /*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for ARMv8-M Baseline */ /*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for ARMv8-M Baseline */ #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -1236,9 +1241,15 @@ typedef struct #define NVIC_GetActive __NVIC_GetActive #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -1536,7 +1547,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/Include/core_armv8mml.h b/3rd_party/CMSIS/Include/core_armv8mml.h index c821f569..286322f7 100644 --- a/3rd_party/CMSIS/Include/core_armv8mml.h +++ b/3rd_party/CMSIS/Include/core_armv8mml.h @@ -2,10 +2,10 @@ * @file core_armv8mml.h * @brief CMSIS ARMv8MML Core Peripheral Access Layer Header File * @version V5.0.2 - * @date 07. December 2016 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -2050,7 +2050,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -2062,9 +2067,15 @@ typedef struct #define NVIC_GetActive __NVIC_GetActive #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -2431,7 +2442,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ @@ -2546,6 +2557,10 @@ __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) { return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); } + else + { + return(0U); + } } diff --git a/3rd_party/CMSIS/Include/core_cm0.h b/3rd_party/CMSIS/Include/core_cm0.h index 2fb5821b..f1fbbe9c 100644 --- a/3rd_party/CMSIS/Include/core_cm0.h +++ b/3rd_party/CMSIS/Include/core_cm0.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_cm0.h * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 25. November 2016 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -564,7 +564,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else /*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M0 */ /*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M0 */ #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -576,9 +581,15 @@ typedef struct /*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */ #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -779,7 +790,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/Include/core_cm0plus.h b/3rd_party/CMSIS/Include/core_cm0plus.h index 751384b3..2dca31a3 100644 --- a/3rd_party/CMSIS/Include/core_cm0plus.h +++ b/3rd_party/CMSIS/Include/core_cm0plus.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_cm0plus.h * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 25. November 2016 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -680,7 +680,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else /*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M0+ */ /*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M0+ */ #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -692,9 +697,15 @@ typedef struct /*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0+ */ #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -905,7 +916,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/Include/core_cm23.h b/3rd_party/CMSIS/Include/core_cm23.h index 83055ba3..378c69be 100644 --- a/3rd_party/CMSIS/Include/core_cm23.h +++ b/3rd_party/CMSIS/Include/core_cm23.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_cm23.h * @brief CMSIS Cortex-M23 Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 25. November 2016 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -1224,7 +1224,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else /*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M23 */ /*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M23 */ #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -1236,9 +1241,15 @@ typedef struct #define NVIC_GetActive __NVIC_GetActive #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -1536,7 +1547,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/Include/core_cm3.h b/3rd_party/CMSIS/Include/core_cm3.h index 499199ce..cfeb58be 100644 --- a/3rd_party/CMSIS/Include/core_cm3.h +++ b/3rd_party/CMSIS/Include/core_cm3.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_cm3.h * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 30. January 2017 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * diff --git a/3rd_party/CMSIS/Include/core_cm33.h b/3rd_party/CMSIS/Include/core_cm33.h index 65da8ef5..9e880ae7 100644 --- a/3rd_party/CMSIS/Include/core_cm33.h +++ b/3rd_party/CMSIS/Include/core_cm33.h @@ -2,10 +2,10 @@ * @file core_cm33.h * @brief CMSIS Cortex-M33 Core Peripheral Access Layer Header File * @version V5.0.2 - * @date 07. December 2016 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -2050,7 +2050,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -2062,9 +2067,15 @@ typedef struct #define NVIC_GetActive __NVIC_GetActive #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -2431,7 +2442,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/Include/core_cm4.h b/3rd_party/CMSIS/Include/core_cm4.h index 2da78d39..bdaedcf9 100644 --- a/3rd_party/CMSIS/Include/core_cm4.h +++ b/3rd_party/CMSIS/Include/core_cm4.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_cm4.h * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 30. January 2017 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * diff --git a/3rd_party/CMSIS/Include/core_cm7.h b/3rd_party/CMSIS/Include/core_cm7.h index 8bfbe940..fee3d0c9 100644 --- a/3rd_party/CMSIS/Include/core_cm7.h +++ b/3rd_party/CMSIS/Include/core_cm7.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_cm7.h * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 25. November 2016 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -1801,7 +1801,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -1813,9 +1818,15 @@ typedef struct #define NVIC_GetActive __NVIC_GetActive #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -2115,7 +2126,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/Include/core_sc000.h b/3rd_party/CMSIS/Include/core_sc000.h index 8305271f..53dfaadd 100644 --- a/3rd_party/CMSIS/Include/core_sc000.h +++ b/3rd_party/CMSIS/Include/core_sc000.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_sc000.h * @brief CMSIS SC000 Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 25. November 2016 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -692,7 +692,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else /*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for SC000 */ /*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for SC000 */ #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -704,9 +709,15 @@ typedef struct /*#define NVIC_GetActive __NVIC_GetActive not available for SC000 */ #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -907,7 +918,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/Include/core_sc300.h b/3rd_party/CMSIS/Include/core_sc300.h index 1b5041a7..78450e0f 100644 --- a/3rd_party/CMSIS/Include/core_sc300.h +++ b/3rd_party/CMSIS/Include/core_sc300.h @@ -1,11 +1,11 @@ /**************************************************************************//** * @file core_sc300.h * @brief CMSIS SC300 Core Peripheral Access Layer Header File - * @version V5.0.1 - * @date 25. November 2016 + * @version V5.0.2 + * @date 13. February 2017 ******************************************************************************/ /* - * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -1401,7 +1401,12 @@ typedef struct @{ */ -#ifndef CMSIS_NVIC_VIRTUAL +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping #define NVIC_EnableIRQ __NVIC_EnableIRQ @@ -1413,9 +1418,15 @@ typedef struct #define NVIC_GetActive __NVIC_GetActive #define NVIC_SetPriority __NVIC_SetPriority #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ -#ifndef CMSIS_VECTAB_VIRTUAL +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else #define NVIC_SetVector __NVIC_SetVector #define NVIC_GetVector __NVIC_GetVector #endif /* (CMSIS_VECTAB_VIRTUAL) */ @@ -1715,7 +1726,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) \brief System Reset \details Initiates a system reset request to reset the MCU. */ -__STATIC_INLINE void NVIC_SystemReset(void) +__STATIC_INLINE void __NVIC_SystemReset(void) { __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ diff --git a/3rd_party/CMSIS/README.txt b/3rd_party/CMSIS/README.txt index ed910157..9410a1b2 100644 --- a/3rd_party/CMSIS/README.txt +++ b/3rd_party/CMSIS/README.txt @@ -1,7 +1,7 @@ About CMSIS =========== This folder contains the Cortex Microcontroller Software Interface Standard -(CMSIS) V5.0.1, which provides a single standard across all Cortex-Mx +(CMSIS) V5.0.2, which provides a single standard across all Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects and reduces time-to-market for new embedded applications. diff --git a/3rd_party/at91sam7s-ek/iar/low_level_init.c b/3rd_party/at91sam7s-ek/iar/low_level_init.c index c543bfb8..b8accbae 100644 --- a/3rd_party/at91sam7s-ek/iar/low_level_init.c +++ b/3rd_party/at91sam7s-ek/iar/low_level_init.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include diff --git a/3rd_party/at91sam7s-ek/iar/startup_at91mc.s b/3rd_party/at91sam7s-ek/iar/startup_at91mc.s index 54aab79f..02ba7467 100644 --- a/3rd_party/at91sam7s-ek/iar/startup_at91mc.s +++ b/3rd_party/at91sam7s-ek/iar/startup_at91mc.s @@ -27,7 +27,7 @@ ; along with this program. If not, see . ; ; Contact information: -; Web: http://www.state-machine.com +; Web: https://state-machine.com ; Email: info@state-machine.com ;----------------------------------------------------------------------------- diff --git a/3rd_party/ek-lm3s6965/lwip_driver/netif/eth_driver.h b/3rd_party/ek-lm3s6965/lwip_driver/netif/eth_driver.h index 2a6a8d84..73ace0aa 100644 --- a/3rd_party/ek-lm3s6965/lwip_driver/netif/eth_driver.h +++ b/3rd_party/ek-lm3s6965/lwip_driver/netif/eth_driver.h @@ -29,7 +29,7 @@ * * Contact information: * Quantum Leaps Web sites: http://www.quantum-leaps.com -* http://www.state-machine.com +* https://state-machine.com * e-mail: info@quantum-leaps.com *****************************************************************************/ #ifndef eth_driver_h diff --git a/3rd_party/embOS/License.txt b/3rd_party/embOS/License.txt index 4c7b6d92..06e28f81 100644 --- a/3rd_party/embOS/License.txt +++ b/3rd_party/embOS/License.txt @@ -1,6 +1,6 @@ Important - Read carefully: -This license is a legal agreement between YOU (either an individual or a single entity) and SEGGER Microcontroller Systeme GmbH & Co. KG (called SEGGER). +This license is a legal agreement between YOU (either an individual or a single entity) and SEGGER Microcontroller GmbH & Co. KG (called SEGGER). By downloading and/or using the starterkit software, you agree to be bound by the terms of this agreement. 1. Content of contract @@ -53,4 +53,4 @@ The product is not fault-tolerant and is not designed, manufactured or intended (g) The relationship between Licensor and Licensee is that of independent contractors and neither Licensee nor its agents shall have any authority to bind Licensor in any way. (h) If any SEGGER Microcontroller Systeme GmbH & Co. KG professional services are being provided, then such professional services are provided pursuant to the terms of a separate professional services agreement between the parties. The parties acknowledge that such services are acquired independently of the product licensed hereunder, and that provision of such services is not essential to the functionality of such product. - 2004-2013 SEGGER Microcontroller GmbH & Co. KG + 2004-2017 SEGGER Microcontroller GmbH & Co. KG diff --git a/3rd_party/embOS/Release_embOS.html b/3rd_party/embOS/Release_embOS.html index 3a902f7d..aaba6c22 100644 --- a/3rd_party/embOS/Release_embOS.html +++ b/3rd_party/embOS/Release_embOS.html @@ -1,1101 +1,2666 @@ - - -Release notes - - - - - - -

Release notes for embOS Version 4.00 for Cortex-M and IAR compiler V6.x

- -
    -
  1. Tool chain used for build
    2. -
  2. New features
    3. -
  3. Improvements
    4. -
  4. Program corrections
    5. -
  5. Known problems/limitations
    6. -
  6. Release history
    7. -
  7. Miscellaneous
    8. -
- - - -

Tool chain used for build

-

The following tools have been used:

- 
-Compiler:  IAR ICCARM   6.50.5.4819
-Assembler: IAR IASMARM  6.50.5.4819
-Librarian: IAR IARCHIVE 9.13.10.84
-Workbench: IAR IARIDE   6.50.5.2674
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- - - -

New features

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Version 4.00

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    -
  1. Update to latest embOS generic sources V4.00.
    2. -
  2. New start project for ST STM32F072 added.
    3. -
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Version 3.90.1

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    -
  1. New project for Atmel SAMG53 added.
    - embOS for Cortex M and IAR compiler now comes with a start project for Atmel SAMG53 CPU.
    - The start project is prepared to run on the Atmel SAMG53 Xplained Pro starter board.
    - The start project can be downloaded into the internal flash of the CPU using the on-board CMSIS-DAP and CSpy.
    2. -
  2. New project for Atmel SAMG54 added.
    - embOS for Cortex M and IAR compiler now comes with a start project for Atmel SAMG53 CPU.
    - The start project is prepared to run on the Atmel SAMG53 Xplained Pro starter board.
    - The start project can be downloaded into the internal flash of the CPU using the on-board CMSIS-DAP and CSpy.
    3. -
-

Version 3.90

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    -
  1. Update to latest embOS generic sources V3.90.
    - All new features and modifications of the new embOS version are described in the generic release notes and manual. -
  2. Start projects and assembly files updated for EWARM 7.10
    - Start projects and assembly files can now be used with the new EWARM version 7.10. without errors or warnings.
    - All projects can still be used with the older IAR embedded workbench V6.
    3. -
-

Version 3.88g2

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    -
  1. New project for ST LIS331 CPU.
    - embOS for Cortex M and IAR compiler now comes with a start project for the ST LIS331 CPU.
    - The start project is prepared to be downloaded into the internal flash of the CPU using J-link or ST-LINK.
    - A support package for the IAR workbench is required. This can be received from ST on request.
    2. -
  2. New project for TI TM4C129.
    - embOS for Cortex M and IAR compiler now comes with a start project for the TI TM4C129 CPU.
    - The start project was built for the TI TM4C129 development kit and is prepared to be downloaded into the internal flash of the CPU.
    -
-

Version 3.88g1

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    -
  1. New project for ST STM32F429 discovery board added.
    2. -
  2. New project for IAR STM32F429_SK board added.
    3. -
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Version 3.88g

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    -
  1. Update to latest embOS generic sources V3.88g.
    2. -
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Version 3.88c

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    -
  1. Update to latest embOS generic sources V3.88c.
    2. -
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Version 3.88b

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    -
  1. Update to latest embOS generic sources V3.88b.
    2. -
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Version 3.86n

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    -
  1. Thread safe system library support with compiler 6.4 or newer described.
    - Activation of thread safe system library support with IAR compiler 6.4 or newer requires additional linker options which are now described in the compiler and CPU specific manual. -
    2. -
  2. New embOS sources V3.86n.
    - All new features and modifications of the new embOS version are described in the generic release notes and manual. -
    3. -
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Version 3.86l

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    -
  1. New embOS sources V3.86l.
    - All new features and modifications of the new embOS version are described in the generic release notes and manual. -
    2. -
  2. New start project for Atmel AT91SAM3X-EK added.
    3. -
  3. New start project for Freescale TWR-KL25 added.
    4. -
  4. New start project for Infineon XMC4500 Hexagon Application Kit added.
    5. -
  5. New start project for Infineon XMC4500 Relax Lite Kit added.
    6. -
  6. New start project for NXP LPC4088 Embedded Artists evalboard added.
    7. -
  7. New start project for Keil MCB4357 evalboard (NXP LPC4357) added.
    8. -
  8. New start project for IAR STM32F051R8-SK evalboard added.
    9. -
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Version 3.86g

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    -
  1. New embOS sources V3.86g.
    - All new features and modifications of the new embOS version are described in the generic release notes and manual. -
    2. -
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Version 3.86f

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    -
  1. New embOS sources V3.86f.
    - All new features and modifications of the new embOS version are described in the generic release notes and manual. -
    2. -
  2. Task events are 32bits wide
    - With embOS version 3.86f, the task events for 32bit CPUs are 32bit wide now, allowing more individual events sent to tasks. -
    3. -
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Version 3.86e

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    -
  1. New embOS sources V3.86e.
    - All new features and modifications of the new embOS version are described in the generic release notes and manual. -
    2. -
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Version 3.86d

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    -
  1. New embOS sources V3.86d.
    - All new features and modifications of the new embOS version are described in the generic release notes and manual. -
    2. -
-

Version 3.84c

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    -
  1. New start project for the Hitex NXP LPC1850 eval board added.
    2. -
  2. New start project for the IAR Fujitsu MB9BF618T SK eval board added.
    3. -
  3. New start project for the Freescale Tower K70 eval board added.
    4. -
  4. New start project for the Toshiba Topas TMPM369 eval board added.
    5. -
  5. Update to latest embOS generic sources V3.84c.
    6. -
-

Version 3.84.1

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    -
  1. embOS plugin for CSpy supports Cortex M4F
    - The new embOS IAR plugin version 6.0.6.7 delivered with embOS V3.84.1 now supports task sensitive call stack for Cortex M4 CPUs with floating point unit.
    - Previous versions of the plugin can be used, but did not show the task sensitive call stack. -
    2. -
-

Version 3.84

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    -
  1. Support for Cortex M4F with floating point unit added.
    2. -
  2. New start project for the Energy Micro EFM32-GG990-DK eval board.
    3. -
  3. New start project for the NXP LPC1788_EA eval board.
    4. -
  4. New start project for the NXP LPC1788_uEZGUI eval board.
    5. -
  5. New start project for the NXP LPC1788-SK eval board.
    6. -
  6. New start project for the IAR STM32F207-SK eval board.
    7. -
  7. New start project for the ST STM32F457IG-Eval eval board.
    8. -
  8. New start project for the ST STM32F457IG-Discovery eval board.
    9. -
  9. Update to latest embOS generic sources V3.84.
    - New generic features of the version 3.84 are described in the embOS generic release notes file Release_Generic.html -
    10. -
- -

Version 3.82u

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    -
  1. New start project for the IAR STM32L152VB-SK eval board.
    - The embOS version 3.82u for IAR compiler V6 and Cortex-M now comes with start projects for the IAR STM32L152VB-SK eval board.
    - The sample project can be downloaded into the CPUs Flash using J-Link.
    - The sample project was built with the latest IAR workbench V6.20 and uses CMSIS. -
    2. -
  2. Update to latest embOS generic sources V3.82u.
    - New features of the version 3.82u are described in the embOS generic release notes file Release_Generic.html -
    3. -
-

Version 3.82s

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    -
  1. Update to latest embOS generic sources V3.82s. -
    2. -
  2. New library mode DPL added. -
    3. -
  3. New start projects for STM32 devices added.
    - The embOS version 3.82s for IAR compiler V6 and Cortex-M now comes with start projects for STM32L cpu and STM32F100 cpu.
    - The sample projects run on ST STM32 MB819 and ST STM32 Discovery evalboard and can be downloaded into the CPUs Flash using J-Link.
    -
    4. -
  4. New start projects for EFM32 devices added.
    - The embOS version 3.82s for IAR compiler V6 and Cortex-M now comes with start projects for G2XX and G8XX cpu module for EnergyMicro EFM32-G2XX-DK evalboard.
    -
    5. -
  5. New start project for Fujitsu MB9BF506 SK FM3 100PMC evalboard.
    - The embOS version 3.82s for IAR compiler V6 and Cortex-M now comes with start project for Fujitsu MB9BF506 SK FM3 100PMC evalboard.
    - The sample projects can be downloaded into the CPUs Flash using J-Link.
    -
    6. -
-

Version 3.82m

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    -
  1. Support for Freescale Kinetis added.
    - The embOS version 3.82m for IAR compiler V6 and Cortex-M now comes with start projects for the Freescale Kinetis K40 and K60 CPUs.
    - The sample projects run on the Kinetis TWR starter kit boards and can be downloaded into the CPUs Flash using J-Link.
    -
    2. -
  2. Support for EnergyMicro CPU added.
    - The embOS version 3.82m for IAR and Cortex-M now comes with a start project for the EnergyMicro EFM32 CPU.
    - The sample project runs on the EFM32-G8XX-STK starter board and can be downloaded into the CPUs Flash using the onboard J-Link. -
    3. -
  3. Support for Cortex-M4 added.
    - Previous versions of embOS for Cortex-M could not be compiled when a Cortex-M4 CPUs was selected.
    - The embOS version 3.82m for IAR and Cortex-M now can be used with Cortex-M4 CPUs. -
    4. -
  4. Support for embOSView via J-Link for Cortex-M0 added.
    - Previous versions of embOS for Cortex-M could not use J-Link with embOSview for Cortex-M0 CPUs. - With embOS version 3.82m for IAR and Cortex-M J-Link can be used with embOSView on Cortex-M0 targets. -
    5. -
-

Version 3.82l

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    -
  1. Thread local storage supported.
    - embOS for Cortex-M and IAR compiler now supports the thread local storage implementation of the new IAR dlib V6. -
    2. -
  2. Update to IAR Compiler / workbench V6 -
    3. -
-

Version 3.82h1

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    -
  1. embOS Cortex-M3 and embOS Cortex-M0 are merged to embOS Cortex-M. -
    2. -
-

Version 3.82h

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    -
  1. Profiling with embOSView via J-Link
    - All embOS start projects and the embOS libraries were modified to allow communication with embOSView via J-Link.
    - The new embOSView version 3.82g allows selection of a communication to a Cortex M3 using J-Link with JTAG or SWD interface.
    - The communication to embOSView starts after the call of OS_Start() and can be used in parallel with a debugging session which uses J-Link as debugging probe. -
    2. -
  2. Fully CMSIS compliant projects
    - All start projects of embOS for Cortex-M3 are now fully CMSIS compliant.
    - The projects come with new startup code and vector tables which are fully CMSIS compliant.
    - When CMSIS shall be used for the application, the chip specific CMSIS startup code and vector tables can be used.
    - CMSIS libraries of the chip vendor are not required to run embOS, embOS can be used as is.
    -
    3. -
  3. Generic CMSIS project template
    - embOS for Cortex M3 now comes with a generic CMSIS compatible start project which runs on any Cortex M3 CPU.
    - To run the project on a specific chip, the startup code and the vector table may be replaced by the chip vendor specific versions of these files.
    - No modification on any embOS function or file is required. The vendor specific CMSIS files will guarantee that the embOS timer runs at expected rate of 1ms. -
    4. -
-

Version 3.82e2

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    -
  1. BSP for ATMEL AT91SAM3S added
    - embOS now comes with a start project for the AT91SAM3S which is prepared to run on the SAM3S-EK eval board.
    - The start project contains debug configurations for flash or RAM.
    - Both UART connectors of the board may be used for embOSView.
    - The project comes with new startup code and vector tables which are fully CMSIS compliant. -
    2. -
  2. CMSIS compliant scheduler call implemented
    - The embOS scheduler function was renamed to be fully CMSIS compliant.
    - Target CPU specific CMSIS libraries may be used together with embOS now.
    - There is no need to modify the vector tables which come with the CMSIS libraries. -
    3. -
-

Version 3.82e1

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    -
  1. Projects for LPC176x updated.
    - The debugger configuration settings of previous versions caused some trouble when the target should be accessed with J-Link.
    2. -
-

Version 3.82e

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    -
  1. CMSIS compliant project for STM32/MB672 added.
    2. -
-

Version 3.82c

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    -
  1. BSP for TMPM330 added
    2. -
  2. Profiling support added to STM32 MB784 eval bord BSP.
    3. -
  3. Update to latest embOS generic sources V3.82c
    4. -
  4. All projects have now remarks enabled
    5. -
-

Version 3.80g3

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    -
  1. Project for AT91SAM3U runs with IAR flashloader
    - The embOS start project for the AT91SAM3U CPU was modified to run with the Flasherloader which comes with the latest IAR workbench (EW-ARM 5.40.
    - The flashloader can be used with any J-link version, but the project requires version 5.40 or later of the IAR workbench.
    - EW-ARM 5.40 is the first version that supports the AT91SAM3U. -
    2. -
-

Version 3.80g1

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    -
  1. Support for ST STM32F107 added
    - embOS version 3.80g1 comes with a ready to go start project for the ST32MF107 CPU.
    - The start project is prepared to run on the ST MB 784 eval board and supports flash programming using C-Spy and J-Link. -
    2. -
  2. Support for IAR LPC1766-SK added
    - embOS version 3.80g1 comes with a ready to go start project for the IAR LPC1766-SK eval board.
    - The start project is prepared to run on the eval board and supports flash programming using C-Spy and J-Link.
    - The project is built for the workbench / compiler version 5.30 which delivers the flash loader for the LPC 1766. -
    3. -
-

Version 3.80g

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    -
  1. Scheduling optimized
    - Update to new embOS version 3.80 with optimized internal data structures to speed up scheduling and task switches.
    - The new embOS version requires the C-Spy plugin V3.80 or later. The plugin comes with embOS. -
    2. -
  2. New embOS plugin with task sensitivity
    - embOS version 3.80g for Cortex M3 now comes with the new embOS IAR plugin V3.80.1 for C-Spy which supports task sensitivity for Cortex M3.
    - Task sensitivity is supported since embOS version 3.62c.
    - Previous versions of embOS for Cortex M3 can be used with the new plugin, but do not support the task sensitivity. -
    3. -
  3. Support for ATMEL AT91SAM3U
    - embOS version 3.80g comes with a ready to go start project for the new ATMEL AT91SAM3U series.
    - Debugging and flash programming using C-Spy and J-Link is supported.
    - The latest version of J-Link software is required to allow programming of the AT91SAM3U. -
    4. -
  4. Support for NXP LPC176x series
    - embOS version 3.80g comes with a ready to go start project for the new NXP LPC176x series.
    - The start project is prepared to run on the KEIL eval board and supports flash programming using C-Spy and J-Link.
    - The project is built for the workbench / compiler version 5.30 which delivers the flash loader for the LPC 1766. -
    5. -
-

Version 3.62

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    -
  1. Update to embOS sources 3.62
    - embOS comes with new features which are explained in the generic release notes and manual. -
    2. -
  2. Update to new EWARM compiler version 5.20
    - embOS version 3.62 was built with the IAR compiler V5.20 and the start projects were updated to be used with the new workbench. -
    3. -
-

Version 3.60d

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    -
  1. Update to embOS sources 3.60d
    - embOS comes with several new features which are explained in the generic release notes and manual. -
    2. -
  2. OS_POWER module implemented.
    - The OS_POWER module may be used to control different power saving modes when entering idle state.
    - Individual flags for different peripherals may be set whenever a peripheral needs power or clock, and may be reset, when power is not needed.
    - The state of the power flags may be examined during OS_Idle by a call of OS_POWER_GetMask().
    - This allows to switch off all of those peripherals which are not needed during idle times. -
    3. -
  3. BSP for IAR STM-SK Eval board renamed to STM32F103_STM_SK.
    - BSP is now for IAR STM-SK only instead of IAR STM-SK and ST MB525. -
    4. -
  4. BSP for ST MB525 Eval board added.
    - Start project and board support package for STM32F103 CPU and ST MB525 eval board added. -
    5. -
  5. BSP for ST MB672 Eval board added.
    - Start project and board support package for STM32F103 CPU and ST MB672 eval board added. -
    6. -
-

Version 3.60a

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    -
  1. Update to embOS sources 3.60a
    - embOS comes with several new features which are explained in the generic release notes and manual. -
    2. -
-

Version 3.60

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    -
  1. IAR Embedded Workbench for ARM V5.11 compatibility
    - Source and project updates to be compatible with IAR Embedded Workbench for ARM V5.11. -
    2. -
-

Version 3.52c

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    -
  1. OS_SetTaskName() introduced
    - OS_SetTaskName() allows modification of task names on the fly.
    - This may be useful if the functionality of a task changes during runtime and the new state should be shown using embOSView or an other task visualisation tool. -
    2. -
-

Version 3.52a

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    -
  1. Luminary Micro LM3S1968 CPU support
    - Start project and board support package for LM3S1968 CPUs added. -
    2. -
  2. Luminary Micro LM3S8962 CPU support
    - Start project and board support package for LM3S8962 CPUs added. -
    3. -
  3. Task switch time can be measured by application
    - embOS now comes with sample applications which allow accurate measurement of task switch time in a running application.
    -
    4. -
-

Version 3.40c

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    -
  1. OS_Yield() may suspend a task unconditionally
    - When tasks are running on round robin with timeslice, the function OS_Yield() can be used to end the timeslice of the running task immediately and activate an other task with the same priority which is ready for execution. - The function has no effect on tasks that are not running on round robin. -
    2. -
  2. UART and PLL added
    - Uart and PLL initialization to BSP added. -
    3. -
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Version 3.40a

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    -
  1. New BSP for STM32F10 added.
    - embOS now comes with board support package for STM32F10. -
    2. -
-

Version 3.40

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    -
  1. Task switch time can be measured by application
    - embOS now comes with sample applications which allow accurate measurement of task switch time in a running application.
    -
    2. -
  2. Automatic call of OS_INIT_SYS_LOCKS() removed.
    - During initialization of embOS, OS_INIT_SYS_LOCK() is not called automatically.
    - As most of the applications do not need thread safe system libraries, an automatic activation of syslocks causes unwanted overhead.
    - If supported and required, the user may call OS_INIT_SYS_LOCKS() from his own application after normal initialization of embOS.
    -
    3. -
  3. OS_TimerEx, Extended timer implemented
    - Extended timers are software timers which call a user defined callback function when the timer expires.
    - In comparison to normal embOS timers, a parameter is passed to the timer callback function.
    - The parameter value is initialized during timer creation. -
    4. -
-

Version 3.32j

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    -
  1. - Initial version for Cortex M3 -
    2. -
- - - -

Improvements

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Version 3.86g

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    -
  1. Nested interrupt handling improved.
    - Unnecessary enabling and disabling of interrupts removed from OS_EnterNestableInterrupt() and OS_LeaveNestableInterrupt().
    - Thus, interrupthandling of nested interrupts runs faster. -
    2. -
-

Version 3.86e

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    -
  1. Modified Hardfault handler
    - The hardfault handler was modified and is now included in the RTOSInit files.
    - When semihosting for terminal outputs is activated in the project settings, printf outputs are controlled by break instructions in the code.
    - If the CPU is started in normal mode without debugger, the break instruction will force a hardfault exception.
    - The new hardfault handler in RTOSInit detects this state, resets the hardfault condition and continues execution of the application.
    - The previuos implementation did not handle the hardfault correctly. The application or the calling task ran in an endless loop. -
    2. -
-

Version 3.86d

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    -
  1. OS_EnterNestableInterrupt() improved
    - A needless call of enable interrupt function removed. Execution speed improved. -
    2. -
-

Version 3.84.1

-
    -
  1. Fully interruptible stack layout for OS_Idle()
    - The embOS stack management for Cortex M now uses the main stack as stack for OS_Idle which allows fully interruptible usage of the stack in OS_Idle(). - The previous versions of embOS for Cortex M did not allow usage of the stack in OS_Idle(). -
    2. -
-

Version 3.80g2

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    -
  1. Systick timer initialization modified
    - The SYSTICK timer is normally used as system timer for embOS. Previous versions of embOS for Cortex-M3 initialized the interrupt priority during the system initialization called from OS_InitKern().
    - Now the systick timer initialization is completely done during OS_InitHW() and can therefore be modified if required by the application.
    - By modification of OS_InitHW(), any peripheral timer may be used as system timer for embOS, leaving the systick timer untouched. -
    2. -
-

Version 3.80g1

-
    -
  1. Code modified to avoid warnings
    - Some compile time switches were not predefined in some projects and therefore produced a warning when remarks were enabled.
    - This did not cause any problem, but might have been confusing. -
    2. -
-

Version 3.60

-
    -
  1. IAR Embedded Workbench for ARM V5.11 compatibility
    - embOS for CM3 for IAR V511 is now compatible with IAR Embedded Workbench for ARM V5.11. -
    2. -
-

Version 3.52e

-
    -
  1. All embOS variables located in one module.
    - All embOS variables are located in one module now. In previous versions of embOS, some module specific embOS variables were located in the module they were used for. -
    2. -
-

Version 3.52a

-
    -
  1. Scheduler optimized
    - The embOS scheduler was optimized to reduce task switching time and interrupt latencies.
    -
    2. -
  2. OS_Yield() now writes an entry into the trace buffer
    - When using the debug library with trace capabilities, OS_Yield() writes an entry into the trace buffer which shows the function call and the calling task.
    - embOSView version 3.40d is required to show this entry. -
    3. -
  3. Task switch to OS_Idle() modified.
    - The call of OS_Idle() from OS_ChangeTask can be overwritten (inhibited) by defining the macro OS_IDLE() which is normally defined as OS_Idle().
    - This allows task switching via an exception for specific CPU/compiler versions. -
    4. -
  4. Pointer comparison improved for fixed size memory pools (OS_MEMF module).
    - Some compiler produced wrong pointer comparison code in far memory model.
    - For specific CPU/compiler versions, the new OS_POINTER_TO_VALUE() function was introduced to deliver correct results in pointer comparison. -
    5. -
-

Version 3.40b

-
    -
  1. Queue management improved.
    - For some CPUs, the buffer start address for Queues has to be aligned. - Now embOS automatically corrects the alignment, if required. -
    2. -
-

Version 3.40a

-
    -
  1. Counting semaphores improved.
    - Counting semaphores are now int values and an overflow will be caught, so that embOS runs into OS_Error(). -
    2. -
-

Version 3.40

-
    -
  1. Task switch time improved.
    - Scheduling optimized to improve task switch time. -
    2. -
  2. Task switch time improved for task events.
    - Task event handling modified to improve task switch time for tasks waiting on events. -
    3. -
  3. Interrupt latency improved.
    - During task switch, the time period when interrupts are disabled is reduced. -
    4. -
  4. embOS timer tick handler improved.
    - The standard timer tick handler run faster now. The embOS internal time variable is incremented by 1 on every timer tick.
    - When different increments are required, the new timer tick handler OS_HandleTick_Ex(), OS_TickHandler_Ex() or OS_HandleTickDI_Ex() have to be used by application.
    - Different increments may be configured by a call of OS_CONFIG(). -
    5. -
-

Version 3.32j

-
    -
  1. - NONE, initial version for Cortex M3. -
    2. -
- - - -

Program corrections

-

Version 3.88g2

-
    -
  1. Start projects for Cortex-M0 devices corrected.
    - The start projects for Cortex M0 devices had code for variable vector tables and programming the VTOR register implemented.
    - Cortex M0 devices don't support a variable vector table, the vector table has to be located at address 0x0.
    - Code for programming the VTOR register is removed from the RTOSInit files now.
    - This correction affects the start projects for the following CPUs:
    - Freescale KL25
    - Infineon UMF51x
    - NXP LPC 1000
    - NXP LPC 122x
    - ST STM32F05
    - The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 3.88g2. -
    2. -
-

Version 3.88c

-
    -
  1. OS_Start() fixed.
    - A problem with OS_Start() could cause that embOS did not start.
    - The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 3.88c. -
    2. -
-

Version 3.88b

-
    -
  1. Scheduling fixed.
    - A problem with the scheduler could cause that a task not in ready state was not suspended and continued running.
    - Higher priority tasks were blocked even when they were ready to execute.
    - The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 3.88b. -
    2. -
-

Version 3.86n

-
    -
  1. Thread safe system locking functions modified.
    - A problem was reported which occured when the application was ended without starting embOS.
    - When thread safe system locks were initialized during main(), the destroy function of the system locks might have crashed when the application run to exit without starting embOS before.
    - The modified destroy function of the embOS syslocks now is not called when embOS was not started before, because there is nor need to destroy the syslocks in this case. -
    2. -
-

Version 3.86d

-
    -
  1. OS_ExtendTaskContext_TLS_VFP() corrected.
    - The previous version of this function did not work correctly.
    - Saving the task context desroyed the task stack.
    - The problem existed on all previous versions of embOS for Cortex M4F and is fixed with version 3.86d of embOS. -
-

Version 3.84c1

-
    -
  1. Scheduling for Cortex M4 with VFP corrected.
    - The previous versions of embOS for Cortex M4 with VFP crashed when the VFP was activated and used by multiple tasks.
    - Initialization for VFP and scheduling was modified to fix the problem.
    - The problem existed on Cortex M4 applications with activated VFP only and is fixed with version 3.84c1 of embOS. -
-

Version 3.84c

-
    -
  1. OS_Start() corrected.
    - A hard fault exception could occur when an interrupt is executed after OS_Start() and before the scheduler runs for the first time.
    2. -
-

Version 3.82m

-
    -
  1. Queue management corrected.
    - Queue management failed when the Q-buffer was filled up to the end. This might have happened, when messages are produced faster then they were consumed.
    - The OS_Q_Purge() and OS_Q_Put() functions did not handle this case correctly and caused the queue to be corrupted.
    - OS_Error() might have been called with error number 143, or OS_Q_GetPtr() might have returned with a wrong message size or a message zize of 0.
    - The problem existed since version 3.82k of embOS and is fixed with version 3.82m. -
    2. -
-

Version 3.80h

-
    -
  1. BSP for AT91SAM3U corrected.
    - The previous versions of the initialization code for the AT91SAM3U did not initialize the second Flash memory controller for devices with 256KB Flash.
    - This resulted in Flash read errors when the Flash memory in the second Flash bank was accessed. -
    2. -
-

Version 3.80g3

-
    -
  1. Systick timer initialization corrected
    - The previous version V3.80g2 of embOS for Cortex-M3 still affected the SYSTICK timer settings during a call of OS_InitKern().
    - The Systick timer was disabled.
    - Now the systick timer initialization is completely done during OS_InitHW() and can therefore be modified if required by the application. -
    2. -
-

Version 3.52e1

-
    -
  1. OS_TaskEx corrected
    - Parameter passing to OS_TaskEx did not work. A task always received a NULL pointer. - The problem existed in all previous embOS versions for CM3 and is fixed with version 3.52e1. -
    2. -
-

Version 3.52e

-
    -
  1. Interrupt table in RAM corrected
    - Variable interrupt table in RAM did not work correct. -
    2. -
-

Version 3.52b

-
    -
  1. OS_SendString() corrected.
    - When sending an empty string, the calling task was suspended forever.
    - The problem existed in all previous embOS versions and is fixed with version 3.52b. -
    2. -
  2. embOSView corrected.
    - When the update interval of embOSView was set to 200ms or a longer value, the reaction of user input or mouse events was blocked for the same time.
    - The problem existed since version 3.32 of embOSView and is fixed with version 3.52b. -
    3. -
-

Version 3.52a

-
    -
  1. OS_Suspend() corrected
    - When using the debug library with trace capabilities, a call of OS_Suspend() wrote a wrong trace code into the trace buffer.
    - Instead of writing the code for task suspension, the code for task termination was written.
    - The function itself worked correctly, only the data written into the trace buffer was wrong.
    - The problem existed in all previous embOS versions and is fixed with version 3.40d. -
    2. -
-

Version 3.40

-
    -
  1. OS_Unuse() corrected
    - OS_Unuse() must not be called from a task that does not claim the resource semaphore.
    - According to the documentation, the debug build of embOS should generate a call to OS_Error() if this fault happens.
    - All previous versions of embOS did not call OS_Error(). - Now, OS_Error() will be called in that situation with error code 156: OS_ERR_RESOURCE_OWNER(). -
    2. -
  2. OS_EVENT_Delete() corrected
    - OS_EVENT_Delete() did not work correctly. OS_LeaveRegion() was called inside the function without calling OS_EnterRegion() bfore.
    - In debug builds of embOS, the error handler OS_Error() was called with error 151 (OS_ERR_LEAVEREGION_BEFORE_ENTERREGION).
    - In release builds the system was blocked because the underflow of region count inhibits all further task switches, or system crashes, because incrementing the region count the next time allows task switches instead of blocking them. - The problem existed in all previous versions and is fixed with version 3.32l. -
    3. -
  3. Round-robin task switching corrected.
    - Round robin task switching did not work correctly in previous version. A task which was blocked for some reason could be activated. The system crashed during task switch.
    - The problem existed since version 3.32j and is fixed with version 3.32l. -
    4. -
  4. Handler function _OS_OnTx() for serial communication to embOSView corrected.
    - The transmission handler for communication with embOSView might have sent incorrect data to embOSView, because internal control state was updated after sending the data.
    - The problem occurred on a new embOS port for a specific CPU only and is fixed with version 3.32k.
    -
    5. -
-

Version 3.32j

-
    -
  1. - NONE, initial version for Cortex M3. -
    2. -
- - - -

Known problems/limitations

-

Version 3.32j

-
    -
  1. - NONE. -
    2. -
- - - -

Release history

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
VersionRelease dateShort explanation
V4.0013. Jun 2014 - New embOS sources V4.00.
- Start project for ST STM32F072 added. -
V3.90.124. Mar 2014 - New start project for Atmel SAMG53.
- New start project for Atmel SAMG54. -
V3.9019. Jan 2014 - New embOS sources V3.90. -
V3.88g212. Jan 2014 - New startproject for ST LIS331 device.
- New start project for TI TM4C129.
- RTOSInit for Cortex M0 corrected. -
V3.88g117. Dec 2013 - New startprojects for ST devices. -
V3.88g05. Nov 2013 - New embOS sources V3.88g. -
V3.88c13. Aug 2013 - New embOS sources V3.88c.
- OS_Start() fixed. -
V3.88b29. May 2013 - New embOS sources V3.88b.
- Scheduling fixed. -
V3.86n10. Dec 2012 - New embOS sources V3.86n.
- embOS syslocks for IAR runtime environment modified. -
V3.86l26. Nov 2012 - New embOS sources V3.86l.
-
V3.86g06. Aug 2012 - New embOS sources V3.86g.
- Interrupt handling improved. -
V3.86f26. Jul 2012 - New embOS sources V3.86f.
- Task events are 32bit wide now. -
V3.86e08. Jun 2012 - New embOS sources V3.86e.
- HardFault_Handler() modified. -
V3.86d10. May 2012 - OS_ExtendTaskContext_TLS_VFP() corrected.
- OS_EnterNestableInterrupt() improved.
- New embOS sources V3.86d. -
V3.84d30. Apr 2012 - Queue management corrected. -
V3.84c103. Feb 2012 - Scheduling for Cortex M4 with VFP corrected. -
V3.84c18. Jan 2012 - New start projects added.
- Update to latest embOS generic sources V3.84c
- OS_Start() corrected. -
V3.84.104. Nov 2011 - Stack management improved, OS_Idle() may use stack.
- embOS plugin for Cortex M4 with VFP. -
V3.8427. Oct 2011 - Support for Cortex M4F with floating point unit added.
- New start projects for the EFM32 devices added.
- New start projects for the NXP devices added.
- New start projects for the STM32 devices added.
- Update to latest embOS generic sources V3.84
-
V3.82u05. July 2011 - Update to latest embOS generic sources V3.82u
- New start project for IAR STM32L152BV-SK board.
-
V3.82s23. Mar 2011 - Update to latest embOS generic sources V3.82s
- New library mode DPL added.
- New start projects for STM32 devices added.
- New start projects for EFM32 devices added.
- New start project for Fujitsu device added. -
V3.82m24. Nov 2010 - Freescale Kinetis supported.
- EnergyMicro supported.
- Queue handling corrected. -
V3.82l25. Oct 2010 - Update to IAR compiler V6. -
V3.82h121. July 2010 - embOS CM3 IAR now also supports Cortex M0. -
V3.82h31. Mai 2010 - embOSView runs via J-Link.
- Fully CMSIS compliant
-
V3.82e210. Feb 2010 - CMSIS compliant BSP for AT91SAM3S added. -
V3.82e129. Jan 2010 - Projects for LPC176x updated. -
V3.82e28. Jan 2010 - CMSIS compliant project for STM32/MB672 added. -
V3.82c10. Dec 2009 - BSP for TMPM330 added.
- Profiling support for MB784 added.
- Update to latest embOS generic sources V3.82c - Remarks enabled for all projects
-
V3.80h06. Aug 2009 - BSP for AT91SAM3U corrected. -
V3.80g314. Jul 2009 - Timer initialization modified. -
V3.80g209. Jul 2009 - Timer initialization modified. -
V3.80g109. Jul 2009 - ST STM32F107 supported.
- IAR LPC1766-SK supported. -
V3.80g05. Jun 2009 - New embOS plugin supported
- New optimized embOS sources. -
V3.6201. Oct 2008 - Update to new embOS sources 3.62.
- Update to IAR compiler V5.20. -
V3.60d05. Jun 2008 - Update to new embOS sources 3.60d.
- OS_POWER module implemented.
- BSP for IAR STM-SK split up into IAR STM-SK and ST MB525.
- BSP for ST MB672 eval board added. -
V3.60a12. Mar 2008 - Update to embOS version 3.60a. -
V3.6011. Jan 2008 - Update to IAR compiler V5.11. -
V3.52e121. Dec 2007 - OS_TaskEx corrected. -
V3.52e29. Nov 2007 - New generic embOS sources.
- Interrupt table in RAM corrected. -
V3.52a17. Sep 2007 - New BSPs for Luminary Micro LM3S1968 and LM3s8962 CPUs.
- Scheduler optimized.
- Task switch to OS_Idle() modified. -
V3.40c28. Jun 2007 - OS_Yield() implemented.
- Uart and PLL for BSP/STM32F10 added. -
V3.40a05. Jun 2007 - Counting semaphores improvement.
- BSP for STM32F10 added. -
V3.4024. May 2007 - New start projects for LM3S6965 and LM3S6965. - New embOS sources 3.40. -
V3.32j06. Jan 2007 - Initial version for Cortex M3 -
- - - -

Miscellaneous

-

This document was first released with version 3.32j of - the software.
- Software released earlier is documented internally. This information is - available at request. -

- -
-

-Copyright 2001-2014 SEGGER Microcontroller GmbH & Co. KG. All rights reserved.
-For more information, please visit our website www.segger.com or contact us at info@segger.com
-

- - + + +Release notes + + + + + + +

Release notes for embOS Version 4.34

+ +
    +
  1. New features
    2. +
  2. Improvements
    3. +
  3. Program corrections
    4. +
  4. Release history
    5. +
  5. Miscellaneous
    6. +
+ + + +

New features

+

Version 4.34

+
    +
  1. Event objects now support AND logic, therefore new API functions OS_EVENT_SetMaskMode() and OS_EVENT_GetMaskMode() have been added.
    2. +
+

Version 4.32

+
    +
  1. New API functions OS_EVENT_SetMask(), OS_EVENT_GetMask(), OS_EVENT_WaitMask() and OS_EVENT_WaitMaskTimed() added.
    2. +
  2. New API functions OS_PutMailTimed() and OS_PutMailTimed1() added.
    3. +
  3. New API functions OS_WD_Add(), OS_WD_Check(), OS_WD_Config(), OS_WD_Remove() and OS_WD_Trigger() added.
    4. +
+

Version 4.30

+
    +
  1. New API functions OS_GetMailTimed1(), OS_ClearSingleEvent(), OS_RemoveTerminateHook() and OS_MPU_SwitchToUnprivStateEx() added.
    2. +
+

Version 4.26

+
    +
  1. New API function OS_RemoveOnTerminateHooks() added.
    2. +
  2. embOS version mismatch check added.
    + embOS checks now at runtime in OS_Start() if the embOS library and the RTOS.h are from the same version.
    + This is a very common mistake. In case of a version mismatch OS_Error() is called. +
    3. +
+

Version 4.24

+
    +
  1. Spinlock API for multi-core support added.
    2. +
+

Version 4.22

+
    +
  1. New API functions OS_Q_PutEx(), OS_Q_PutBlockedEx(), and OS_Q_PutTimedEx() added.
    + The new functions can be used to store a message, of which the distinct parts are distributed in memory, into a queue. +
    2. +
+

Version 4.20

+
    +
  1. MPU support added.
    2. +
  2. OS_AddExtendTaskContext() added.
    + OS_AddExtendTaskContext() can be used to have unlimited task context extensions. +
    3. +
+

Version 4.16

+
    +
  1. MISRA-C:2012 compliance updated.
    + MISRA-C:2012 compliance is now checked with Gimpel Lint V9.0. +
    2. +
+

Version 4.14

+
    +
  1. New API function OS_SetDefaultTaskContextExtension() added.
    + OS_SetDefaultTaskContextExtension() can be used to set a default task context extension for newly created tasks. +
    2. +
  2. New API macros OS_INT_PRIO_PRESERVE() and OS_INT_PRIO_RESTORE() added.
    + OS_INT_PRIO_PRESERVE() / OS_INT_PRIO_RESTORE() can be used to preserve and restore the embOS interrupt status. +
    3. +
  3. New API functions OS_TriggerTimer() and OS_TriggerTimerEx() added.
    + OS_TriggerTimer() ends up a software timer at once and calls the software timer callback function. +
    4. +
+

Version 4.12

+
    +
  1. Support for SYSVIEW API trace added.
    2. +
  2. New mailbox API functions OS_Mail_GetPtr(), OS_Mail_GetPtrCond() and OS_Mail_Purge() added.
    3. +
+

Version 4.10

+
    +
  1. MISRA C:2012 compliance
    + embOS is fully MISRA C:2012 compliant. Compliance matrix and deviations are documented in a separate PDF document.
    2. +
+

Version 4.06

+
    +
  1. Support for Percepio embOS-Trace added.
    + embOS can now be used with the Percepio embOS-Trace application to trace the embOS API and embOS internals. +
    2. +
+

Version 4.04

+
    +
  1. Task priorities extended to 32bit on 32bit CPUs.
    2. +
+

Version 4.02

+
    +
  1. New functions OS_GetTime_us(), OS_GetTime_us64() and OS_Config_SysTimer() added.
    + OS_GetTime_us() returns the current system time in usec. +
    2. +
+

Version 4.00a

+
    +
  1. New tickless function OS_StopTicklessMode() added.
    2. +
  2. New const variable OS_DebugInfo added.
    + This structure includes the field offsets of struct OS_GLOBAL and OS_TASK required by remote debugger for thread-awareness. +
    3. +
  3. New profiling functions OS_STAT_Enable(), OS_STAT_Disable() and OS_STAT_GetTaskExecTime() added.
    + These function can be used to enable/disable the profiling and to get the total execution time of a task. +
    4. +
+

Version 4.00

+
    +
  1. Tickless support added.
    + embOS now supports tickless mode. This is useful for low power operations, e.g. battery powered devices. +
    2. +
+

Version 3.90

+
    +
  1. Functions to enable/disable global interrupts added.
    + embOS now offers the following functions to enable and disable all interrupts, including high priority interrupts:
    + OS_INTERRUPT_MaskGlobal() + OS_INTERRUPT_UnmaskGlobal()
    + Using the following functions allows nested calls, because the interrupt state can be saved and restored:
    + OS_INTERRUPT_PreserveGlobal() + OS_INTERRUPT_PreserveAndMaskGlobal() + OS_INTERRUPT_RestoreGlobal() +
    2. +
+

Version 3.88h

+
    +
  1. OS_GetNumIdleTicks() added.
    + Can be used to examine the number of ticks spent idle.
    + This is the number ticks until the next time scheduled action will be started.
    2. +
  2. OS_AdjustTime() added.
    + Can be used to add an amount of time to the embOS internal time variable.
    3. +
+

Version 3.88d

+
    +
  1. Compatibility macros to older versions added.
    + In version 3.88c, some compatibility macros to address internal variables were removed from RTOS.h.
    + With version 3.88d, the following macros are available again:
    + OS_pTask, OS_pCurrentTask, OS_pActiveTask, OS_pTimer, OS_pCurrentTimer, OS_Counters, OS_Pending, OS_TimeDex
    2. +
+

Version 3.88c

+
    +
  1. New API function OS_InInterrupt()
    + The new API function OS_InInterrupt() can be used to examine if the calling function is running in an embOS interrupt handler.
    + The function is available in all library modes.
    2. +
  2. New API function OS_Q_PutTimed()
    + The new function OS_Q_PutTimed() can be used to put data into a queue with a given timeout.
    + The function suspends the calling task for the given timeout if no space for the message is avaialable in the queue.
    3. +
  3. New profiling functions to measure CPU load at runtime
    + The new functions OS_AddLoadMeasurement(), OS_GetLoadMeasurement() and OS_INC_IDLE_CNT() can be used to examine the total CPU load at runtime.
    + The measurement period can be set by function, the global variable OC_CPU_Load can be read by debuggers with life watch capability. +
+

Version 3.88a

+
    +
  1. Reset behaviour of OS_EVENT objects can be controlled.
    + The new API function OS_EVENT_SetResetMode() allows setting of the reset behaviour of existing event objects.
    + The embOS functions for event objects unfortunately were inconsistent in respect of the reset behaviour of events.
    + Setting the reset mode with the new function OS_EVENT_SetResetMode() allows to set the reset behaviour to semiauto, manual, or automatic reset.
    + Manual reset guaranties that the event object remains set when waiting tasks are resumed. The event has to be reset manually by the task.
    + Automatic reset allways resets the event when waiting tasks are resumed. The task does not need to reset the event.
    + The semiauto mode is the mode used in previous versions of embOS as described in the manual.
    2. +
  2. New extended function for event object creation.
    + The new function OS_EVENT_CreateEx() allows to create an event object and set the reset behavior to semiauto, manual or automatic reset.
    3. +
  3. Type of reset behaviour of event objects can be retrieved.
    + The new function OS_EVENT_GetResetMode() retrieves the current setting of the reset behaviour of an event object.
    4. +
  4. Message size for mailboxes enlarged.
    + Previous version of embOS allowed message sizes of up to 127 bytes for mailboxes.
    + Now embOS allows messages sizes of up to 32767 bytes for mailboxes.
    + However, the total size of one mailbox buffer is still limited to 64KBytes on 16bit CPUs.
    + The debug builds of embOS now call OS_Error() with error code OS_ERR_MB_BUFFER_SIZE if the total size limit of one mailbox buffer is exceeded when calling OS_CreateMB().
    5. +
+

Version 3.88

+
    +
  1. Fully tested with Parasoft C/C++test MISRA check
    + MISRA violations suppressed in source code with Parasoft comments.
    2. +
+

Version 3.86l

+
    +
  1. MISRA rule compliance improved.
    + All violations of MISRA rule 10.1 fixed.
    + All violations of MISRA rule 12.7 fixed.
    + All violations of MISRA rule 14.9 fixed.
    + All violations of MISRA rule 16.4 fixed.
    + All violations of MISRA rule 16.8 fixed. +
    2. +
+

Version 3.86k

+
    +
  1. New embOS API functions OS_Q_GetMessageSize() and OS_Q_PeekPtr().
    + The new function OS_Q_GetMessageSize() reads the size of the first message in a queue.
    2. + The new function OS_Q_PeekPtr() reads a message from a queue without removing it. +
  2. embOS is now compliant to MISRA 2004 rules.
    3. +
+

Version 3.86f

+
    +
  1. Task events default to 32bit on 32bit CPUs.
    + The default for task events for 32bit CPUs was modified from unsigned char to unsigned long.
    + On 32bit CPUs, now the type OS_TASK_EVENT is defined as OS_U32 per default, allowing 32 different task events.
    + All previous versions limited the task events for all CPUs to 8bit per default. +
    2. +
  2. OS_ON_TERMINATE_HOOK added
    + embOS now supports a linked list of functions which are called when a task is terminated.
    + The new embOS function OS_AddOnTerminateHook() can be used to insert a callback function in the list of functions which are called when a task is terminated.
    + The callback function gets the task ID as paramter.
    + The callback function can be used to free or remove task specific objects which were created by the application. +
    3. +
+

Version 3.86b

+
    +
  1. New embOS API function OS_PeekMail().
    + The new function OS_PeekMail() reads a mail from a mailbox without removing it.
    2. +
+

Version 3.86

+
    +
  1. Timeout handling for "waitable" objects modified
    + Previous versions of timed wait functions for waitable objects might have returned with no timeout condition when the object became avaialble after the timeout time.
    + This happened when the waiting task was blocked by higher priority tasks and did not start after the timeout period.
    + When the object became availabel after expiration of the timeout time but before the waiting tasks started again, no timeout condition was signaled to the task.
    + This behaviour is changed with version 3.86 of embOS. When the object was not avaialble within the timeout time, a timeout is signaled to the waiting task, regardless the object may become avaialble until the task runs again.
    + Following functions were modified: +
      +
    • OS_EVENT_WaitTimed()
      • +
    • OS_GetMailTimed()
      • +
    • OS_MEMF_AllocTimed()
      • +
    • OS_Q_GetPtrTimed()
      • +
    • OS_UseTimed()
      • +
    • OS_WaitCSemaTimed()
      • +
    • OS_WaitMailTimed()
      • +
    +
    2. +
+

Version 3.84b

+
    +
  1. New embOS API function OS_Q_PutBlocked().
    + The new blocking function for Queues OS_Q_PutBlocked() suspends the task when the queue is full. +
    2. +
+

Version 3.84

+
    +
  1. New system stack check functions.
    + New functions to analyze the system stack load during runtime are available now:
    +
      +
    • OS_GetSysStackBase() delivers the base address of the system stack.
      • +
    • OS_GetSysStackSize() delivers the size of the system stack.
      • +
    • OS_GetSysStackSpace() delivers the free (unused) space on the system stack.
      • +
    • OS_GetSysStackUsed() delivers the maximum amount of stack space used on the system stack.
      • +
    +
    2. +
    +
  2. New interrupt stack check functions.
    + For CPUs which support a separate interrupt stack, new functions to analyze the interrupt stack load during runtime are available now:
    +
      +
    • OS_GetIntStackBase() delivers the base address of the interrupt stack.
      • +
    • OS_GetIntStackSize() delivers the size of the interrupt stack.
      • +
    • OS_GetIntStackSpace() delivers the free (unused) space on the interrupt stack.
      • +
    • OS_GetIntStackUsed() delivers the maximum amount of stack space used on the interrupt stack.
      • +
    +
    3. +
+

Version 3.82x

+
    +
  1. OS_RegionCnt overflow check added.
    + Overflow check is activated when OS_DEBUG_LEVEL >= 2.
    +
  2. Macro OS_EnterInterrupt() modified.
    + OS_ASSERT_CPU_IN_ISR_MODE() moved to first line in macro OS_EnterInterrupt().
    3. +
+

Version 3.82w

+
    +
  1. GCC compiler warning eliminated.
    + GCC compiler warning in OS_MEMF_Create.c eliminated.
    2. +
  2. Code modified for Lint.
    + All embOS generic sources are tested with Lint.
    3. +
+

Version 3.82u

+
    +
  1. Fixed size memory blocks may be larger than 64KB on 32bit CPUs.
    + The fixed size memory pool data types were modified to allow larger pools and block sizes on 32bit CPUs. The sizes may now be up to 2^31 bytes.
    + For 16bit CPUs the block and pool sizes remain unchanged to previous versions and may be 64KB. +
    2. +
  2. Software timer handling can be excluded.
    + The new compile-time switch OS_SUPPORT_TIMER may be used to exclude embOS software timer handling from build when compiling the sources.
    + If software timer are not needed by the application, excluding the software timer handling will decrease code and data size and speed up the scheduler. +
    3. +
+

Version 3.82t

+
    +
  1. Trial time limitation increased to 12 hours.
    + The trial time limitation is increased from 15 minutes to 12 hours. +
    2. +
+

Version 3.82s

+
    +
  1. New API function OS_UseTimed()
    + OS_UseTimed() may be used to request a resource semaphore with time out. The function blocks until the resource is available or the timeout expired. +
    2. +
+

Version 3.82o

+
    +
  1. New API function OS_WaitMailTimed()
    + OS_WaitMailTimed() may be used to suspend a task for a given timeout or until a message is available in a mailbox without retrieving the mail. +
    2. +
+

Version 3.82n

+
    +
  1. New API functions for task suspension and synchronization.
    + OS_SuspendAllTasks() may be used to suspend all task except the running task.
    + OS_SetInitialSuspendCnt() can be used to create tasks that are initially suspended and will not run until they are resumed.
    + OS_ResumAllSuspendedTasks() may be used to resume all suspended task at once without the need to address specific tasks. +
    2. +
+

Version 3.82l

+
    +
  1. Thread local storage supported.
    + For some ports, a thread local storage (TLS) may be used and can be initialized individually for every task by a call of OS_TLS_Init().
    + The new TLS implementation requires additional CPU specifc fucntions and support by the compiler specific runtime library, it may be available for some ports only. +
    2. +
+

Version 3.82k

+
    +
  1. New API function OS_Delayus().
    + The new function OS_Delayus() can be used to perform a delay with micro second resolution. The calling task will wait for the given delay time without suspension.
    + During the wait time, other tasks may be activated by interrupt, the embOS scheduling is not blocked.
    + The function works well when the embOS timer has a resolution of at least 1us or better. +
    2. +
  2. New API function OS_Q_Delete().
    + This new function deletes a queue. Queues can be fully dynamically created and deleted now. The resources of the queue may be re-used after deletion. +
    3. +
+

Version 3.82g

+
    +
  1. OS_Start() in assembly source replaced by OS_StartASM().
    + OS_Start() now is a generic function which sets OS_Running to 1 and then calls OS_StartASM().
    2. +
+

Version 3.82h

+
    +
  1. Internal data types modified.
    + A data type was defined for Ipl_EI and Ipl_DI. This allows variable size of integers which is supported by some tool chains. +
    2. +
  2. OS_Info module modifed.
    + The OS_Info module included the standard header stdio.h without any need. The include is removed now. +
    3. +
+

Version 3.82g

+
    +
  1. OS_Start() in assembly source replaced by OS_StartASM().
    + OS_Start() now is a generic function which sets OS_Running to 1 and then calls OS_StartASM().
    2. +
+

Version 3.82f

+
    +
  1. OS_IsRunning() implemented.
    + The new API function OS_IsRunning() can be used to examine whether the embOS scheduler was started by a call of OS_Start().
    + This may be helpful for some applications and functions to decide whether blocking function calls can be used. +
    2. +
+

Version 3.82a

+
    +
  1. Error handling for queues implemented.
    + embOS checks in debug version the correct queue handling. +
    2. +
  2. OS_Q_IsInUse() implemented.
    + New queue function which returns whether the queue is currently in use. +
    3. +
+

Version 3.82

+
    +
  1. Scheduling and task switch time optimized.
    + The internal scheduling functions OS_ChangeTask() and OS_Switch() were optimized to speed up context switching.
    + By recompiling the sources, the optimization may be enabled or disabled by the definition of OS_GLOBAL_IS_RETURNED and OS_GLOBAL_IS_PARA. +
    2. +
+

Version 3.80l

+
    +
  1. Macro OS_U32_TO_PTR_TYPE added.
    + The new macro OS_U32_TO_PTR_TYPE casts an OS_U32 to pointer type to avoid warnings on some tool chains with different memory models. +
    2. +
  2. New macro OS_EI_HP_ON_ENTRY()
    + OS_EI_HP_ON_ENTRY() enables high-prio interrupts if necessary: Some CPUs (such as M16C) disable all interrupts on ISR entry. +
    3. +
+

Version 3.80k

+
    +
  1. New fast tick handler.
    + embOS V3.80k comes with an alternate faster tick handler OS_TICK_HandleNoHook().
    + This tick handler does not support the tick hook function and therefore executes faster.
    + It may be used instead of the regular tick handler OS_TICK_Handle() which is used in the default start projects.
    + When using this new fast tick handler, it is the users responsibility, not to install any tick hook functions, as those will not be called by embOS. +
    2. +
  2. Task events modified.
    + The data type of task events may now be modified from unsigned char to unsigned short or unsigned int to allow more than 8 task events.
    + The modification is done be defining the type of task events via the OS_TASK_EVENT definition in RTOS.h
    + This type defaults to unsigned char to be compatible with previous versions of embOS. A modification requires recompilation of the embOS sources. +
    3. +
+

Version 3.80h

+
    +
  1. Interrupt entry functions modified, internal modification.
    + For some CPUs the CPU state can not be examined. A modification of the interrupt entry functions was required to inhibit an interrupt level assertion, introduced with version 3.80f, for those CPUs.
    + The performance is not affected by this modification. +
    2. +
+

Version 3.80f

+
    +
  1. Interrupt level assertions added
    + The debug version of embOS now comes with additional error handler functionality.
    + The error handler can detect illegal function calls under various conditions. OS_Error() will be called when one of the following conditions is detected:
    +
      +
    • OS_ERR_NOT_IN_ISR: *** OS_EnterInterrupt() has been called, but CPU is not in ISR state
      • +
    • OS_ERR_IN_ISR: *** OS_EnterInterrupt() has not been called, but CPU is in ISR state
      • +
    • OS_ERR_CPU_STATE_ISR_ILLEGAL: *** OS-function called from ISR with high priority
      • +
    • OS_ERR_CPU_STATE_ILLEGAL: *** CPU runs in illegal mode
      • +
    • OS_ERR_CPU_STATE_UNKNOWN: *** CPU runs in unknown mode or mode could not be read
      • +
    +
    2. +
+

Version 3.62a

+
    +
  1. OS_STACK_ALIGN implemented
    + OS_STACK_ALIGN may be defined to ensure a specific task stack alignment during task creation.
    + To ensure a stack alignment of 8 bytes, OS_STACK_ALIGN has to be defined to 8 in the CPU specific embOS internal header file OS_Priv.h.
    + Modification of this define requires recompilation of the embOS libraries. +
    2. +
+

Version 3.62

+
    +
  1. OS_TICK_Config() and OS_TICK_HandleEx() implemented
    + The extended embOS tick handler was modified to handle a runtime configurable tick increment and fractions.
    + These parameter are setup by the new OS_TICK_Config() function and may be re configured during runtime. +
    2. +
+

Version 3.60d

+
    +
  1. OS_POWER module implemented.
    + The OS_POWER module may be used to control different power saving modes when entering idle state.
    + Individual flags for different peripherals may be set whenever a peripheral needs power or clock, and may be reset, when power is not needed.
    + The state of the power flags may be examined during OS_Idle by a call of OS_POWER_GetMask().
    + This allows to switch off all of those peripherals which are not needed during idle times. +
    2. +
+

Version 3.60a

+
    +
  1. embOS trial versions may run an unlimited number of tasks.
    + The embOS trial versions run unlimited as long as only 3 tasks are created.
    + Since version 3.60a, a time limit is added to the trial version. During the first 15 minutes, an unlimited number of tasks can be created.
    + If more than three tasks were created during the time limit time, the system stops and calls OS_Error() when the time limit exceeded. +
    2. +
+

Version 3.60

+
    +
  1. OS_AddTickHook() and OS_RemoveTickHook() implemented.
    + These new functions allow the application to add and remove user function calls (hook functions) to the OS timer tick handler. +
    2. +
+

Version 3.52c

+
    +
  1. OS_SetTaskName() introduced
    + OS_SetTaskName() allows modification of task names on the fly.
    + This may be useful if the functionality of a task changes during runtime and the new state should be shown using embOSView or an other task visualization tool. +
    2. +
+

Version 3.52

+
    +
  1. OS_CallISR() and OS_CallNestableISR() introduced
    + These new functions are required for some specific CPUs, but may be used in general to call an interrupt handler function without the need of using OS_EnterInterrupt() / OS_LeaveInterrupt() in the handler function. +
    2. +
+

Version 3.50b

+
    +
  1. New library mode XR allows extremely compact applications
    + The new XR libraries may be used to build extremely compact applications to save space in RAM and ROM and speed up context switching time.
    + The XR embOS libraries are compiled with round robin scheduling disabled and task names disabled, which results in smaller data structures, smaller code size and faster context switching time. +
    2. +
+

Version 3.40c

+
    +
  1. OS_Yield() may suspend a task unconditionally
    + When tasks are running on round robin with timeslice, the function OS_Yield() can be used to end the timeslice of the running task immediately and activate an other task with the same priority which is ready for execution. + The function has no effect on tasks that are not running on round robin. +
    2. +
+

Version 3.40

+
    +
  1. Task switch time can be measured by application
    + embOS now comes with sample applications which allow accurate measurement of task switch time in a running application.
    +
    2. +
+

Version 3.32o

+
    +
  1. Automatic call of OS_INIT_SYS_LOCKS() removed.
    + During initialization of embOS, OS_INIT_SYS_LOCK() is not called automatically.
    + As most of the applications do not need thread safe system libraries, an automatic activation of syslocks causes unwanted overhead.
    + If supported and required, the user may call OS_INIT_SYS_LOCKS() from his own application after normal initialization of embOS.
    +
    2. +
+

Version 3.32m

+
    +
  1. OS_TimerEx, Extended timer implemented
    + Extended timers are software timers which call a user defined callback function when the timer expires.
    + In comparison to normal embOS timers, a parameter is passed to the timer callback function.
    + The parameter value is initialized during timer creation. +
    2. +
+

Version 3.32j

+
    +
  1. OS_CSemaRequest implemented
    + May be used to decrement a counting semaphore conditionally, if a signal is available.
    + The function never blocks the calling task and delivers a result which indicates whether the semaphore was available. +
    2. +
+

Version 3.32f

+
    +
  1. OS_INIT_SYS_LOCKS() implemented
    + May be used to include initialization code for thread safe system libraries.
    +
    2. +
+

Version 3.32d

+
    +
  1. OS_Q_GetPtrTimed() implemented
    + New queue retrieval function which waits for a message with specified timeout. +
    2. +
+

Version 3.32c

+
    +
  1. OS_EVENT_WaitTimed() implemented
    + New event object function to wait for an event with a timeout limit. +
    2. +
+

Version 3.32b

+
    +
  1. Task context modified for debug builds
    + The number of task activations is now part of the task context in debug builds.
    + The number of activations are therefore displayed in the task list window of embOS plugin, when an embOS debug library is used.
    + Previous versions of embOS showed this information in profiling builds only. +
    2. +
+

Version 3.32a

+
    +
  1. A parameter may be passed to a task function
    + Using the new embOS functions OS_CREATETASK_EX() or OS_CreateTaskEx() allows to pass a void pointer as parameter to a task. +
    2. +
+

Version 3.32

+
    +
  1. Event objects introduced
    + Event objects are standalone objects which are not assigned to a specific task.
    + Event objects may be used to synchronize one or multiple task to a specific event.
    + Events can be triggered from a task, a timer, or an interrupt handler. +
    2. +
+

Version 3.30a

+
    +
  1. embOS internal time handling modified to allow long delays
    + For 8- and 16-bit CPUs the maximum range for delays and timer periods is limited to 32767 embOS timer ticks, because time comparison ist done by integer calculation.
    + By recompiling sources with data type OS_TIME defined as signed long, longer delays and timer periods up to 2147483647 ticks can be realized.
    + The embOS libraries of object versions for 8- and 16-bit CPUs are still delivered with the limitation to 32767 timer ticks. +
    2. +
+

Version 3.28p

+
    +
  1. New error handling for version without round robin scheduling
    + In debug versions of embOS, OS_Error() is called with error code OS_ERR_TASK_PRIORITY, if a task is created with a priority which is already assigned to an other task.
    + OS_Error() is also called with the same error code, if a task priority is assigned by call of OS_SetPriority() and the new priority is already assigned to an other task.
    + Round robin switching can be disabled by recompiling sources with OS_RR_SUPPORTED defined as 0. +
    2. +
+

Version 3.28l

+
    +
  1. OS_SignalCSemaMax()
    + New counting semaphore handling function which specifies a maximum count value.
    + This allows counting semaphores used as binary semaphores. +
    2. +
+

Version 3.28i

+
    +
  1. OS_DeleteRSema()
    + New resource semaphore handling function allows to delete resource semaphores during runtime.
    +
    2. +
+

Version 3.28h

+
    +
  1. Additional error checks in debug builds of embOS
    + OS_CreateRSema() now generates an error, when the addressed resource semaphore was already created before.
    + OS_CreateCSema() now generates an error, when the addressed counting semaphore was already created before.
    + OS_CreateMB() now generates an error, when the mailbox was already created before.
    + OS_CreateTimer() now generates an error, when the software timer was already created before.
    + OS_MEMF_Create() now generates an error, when the addressed fixed size memory pool was already created before. +
    2. +
+

Version 3.28g

+
    +
  1. OS_GetSuspendCnt()
    + New info function to examine suspension state and count of a task. +
    2. +
+

Version 3.26

+
    +
  1. OS_Terminate() modified
    + Tasks may be terminated anytime, regardless of task state.
    + All resources claimed by the terminated task are automatically released. +
    2. +
+

Version 3.22a

+
    +
  1. OS_PutMailFront() / OS_PutMailFront1()
    + New mailbox functions to enable LIFO behavior of mailboxes. +

    2. +
  2. OS_PutMailFrontCond() / OS_PutMailFrontCond1()
    + New conditional mailbox functions to enable LIFO behavior of mailboxes. +
    3. +
+

Version 3.20

+
    +
  1. OS_Suspend() / OS_Resume() implemented +
    + New functions to suspend and resume tasks unconditionally.

    2. +
  2. Fixed size memory blocks implemented +
    + New functions to allocate fixed size memory blocks from embOS.

    3. +
  3. Dynamic memory allocation supported by embOS +
    + Thread safe dynamic memory allocation functions implemented.
    4. +
+

Version 3.10k

+
    +
  1. OS_GetMailTimed() +
    + New mailbox retrieving function with timeout.
    2. +
+

Version 3.10d

+
    +
  1. OS_GetpCurrentTimer() +
    + New info routine. May be used in timer callback routines to examine which + timer expired.

    2. +
  2. OS_GetpCurrentTask() +
    + New info routine. May be used to examine current running task.
    3. +
+

Version 3.10

+
    +
  1. Data format for communication with embOSView modified +
    + For terminal I/O in embOSView, the data format was changed. Therefore + embOSView V3.10 or later is required.

    2. +
  2. OS_WaitSingleEvent() +
    + Unmasked events remain unchanged when function returns.

    3. +
  3. OS_WaitSingleEventTimed() +
    + Unmasked events remain unchanged when function returns. Timeout for waiting + can be specified.
    4. +
+

Version 3.08a

+
    +
  1. Message Queue functionality enhanced +
    + OS_Q_GetPtrCond() function enables conditional request of data from Queue + without task suspension.
    + OS_Q_GetMessageCnt() functions delivers number of messages in the queue.
    2. +
+

Version 3.08

+
    +
  1. Message Queues +
    + Message queues enable intertask communication with messages of various + size.
    2. +
+

Version 3.06f

+
    +
  1. OS_Use now returns a value +
    + When using a resource semaphore with a call of OS_Use(), the actual usage + counter of the requested semaphore is returned as integer value. This + may be helpful for some applications and is a lot more efficient than + calling OS_Use() and then check the usage counter by calling OS_GetSemaValue().
    2. +
+

Version 3.06

+
    + All features of generic 3.06 kernel supported.

    +
+ + + +

Improvements

+

Version 4.30

+
    +
  1. OS_ResumeAllSuspendedTasks() renamed to OS_ResumeAllTasks().
    + OS_RemoveOnTerminateHooks() renamed to OS_RemoveAllTerminateHooks().
    + OS_AddOnTerminateHook() renamed to OS_AddTerminateHook().
    + The legacy function names can still be used for compatibility. +
    2. +
  2. Major embOS source code refactoring. +
    3. +
+

Version 4.26

+
    +
  1. embOS scheduler regarding priority inheritance improved.
    + The scheduler was improved regarding priority inheritance for better performance. +
    2. +
+

Version 4.24

+
    +
  1. Several SYSVIEW trace macros added to indicate task termination and execution end of API function.
    2. +
+

Version 4.14

+
    +
  1. SYSVIEW and Percepio trace macros to OS_Mail_GetPtr(), OS_Mail_GetPtrCond() and OS_Mail_Purge() added.
    2. +
+

Version 4.12b

+
    +
  1. SYSVIEW trace macros added.
    2. +
+

Version 4.12a

+
    +
  1. SYSVIEW trace macros added/modified.
    2. +
  2. OS_InInterrupt() modified.
    + OS_InInterrupt() does no longer return the value of OS_InInt which was set by OS_EnterInterrupt()/OS_EnterNestableInterrupt().
    + Now It rather returns the actual CPU interrupt state. This function is no longer available with every embOS port. +
+

Version 4.12

+
    +
  1. Percepio embOS-Trace macro in OS_CreateTimerEx() removed.
    2. +
+

Version 4.10b

+
    +
  1. OS_SendString() parameter declaration modified to avoid compiler warning.
    2. +
+

Version 4.10

+
    +
  1. Percepio embOS-Trace defines added.
    2. +
+

Version 4.06a

+
    +
  1. Percepio embOS-Trace macros added/modified.
    2. +
+

Version 3.88e

+
    +
  1. Assertion into OS_Delayus() added.
    + The assertion checks if interrupts are enabled before calling this function.
    2. +
+

Version 3.88b

+
    +
  1. Internal data structure changed to efficiently access embOS version.
    2. +
+

Version 3.86e

+
    +
  1. OS_malloc(), OS_free(), OS_realloc() modified.
    + To allow thread safe heap management, OS_malloc() creates or uses a semaphore when called.
    + The new versions of OS_malloc(), OS_free() and OS_realloc() use the semaphore when called from tasks only. The semaphore is not needed, before embOS is started.
    2. +
+

Version 3.86b

+
    +
  1. Several macro definitions in RTOS.h modified to be compliant to MISRA rules.
    2. +
+

Version 3.84a

+
    +
  1. OSInfo now checks if OS_CPU is defined.
    + When compiling sources, the value of OS_CPU is now checked and has to be defined, it should not be empty.
    + The value of OS_CPU reflects the CPU variant which was selected to build the embOS library and is shown in the sytem information window when using embOSView.
    + Previous versions of embOS did not check if this value was defined. +
    2. +
+

Version 3.82u

+
    +
  1. Software timer handling optimized.
    + The software timer handler was removed form the scheduler and put into a separate module.
    + If software timer are not used by the application, the software timer handler will not be linked in, thus reducing the required kernel code size. +
    2. +
  2. Generic timer tick handler modified.
    + The preprocessor conditional defines which guarantee safe code for processors which can not perform atomic 32bit calculations or pointer operations was modifed.
    + This is an internal modification which has no effect on any current embOS port. +
    3. +
+

Version 3.82s

+
    +
  1. Nestable interrupt handling improved.
    + Some embOS functions might have inhibited re-enabling of interrupts when a nestable interrupt was called during task suspension caused by the function.
    + The following API functions were affected and have been modified to correct this behavior:
    + OS_WaitEvent()
    + OS_WaitEventTimed()
    + OS_WaitSingleEvent()
    + OS_WaitSingelEventTimed()
    + OS_MEMF_AllocTimed()
    + OS_Yield()
    +
+

Version 3.82r

+
    +
  1. Thread local storage handling improved.
    + For embOS ports which support thread local storage, the task switch time was slightly increased, even for tasks which did not use thread local storage.
    + The implementation of thread local storage now is improved and does not affect the context switch time of tasks which do not use thread local storage. +
    2. +
  2. OS_TLS_Init() contains a new assertion.
    + OS_TLS_Init() must not be called multiple times from the same task.
    + In debug builds of embOS, the new implementation of OS_TLS_Int() now calls the OS_Error() function with error code OS_ERR_TLS_INIT when OS_TLS_Init() is called multiple times from the same task. +
    3. +
  3. OS_Terminate() contains a new assertion.
    + OS_Terminate() must not be called from an embOS software timer callback function.
    + In debug builds of embOS, the new implementation of OS_Terminate() now calls the OS_Error() function with error code OS_ERR_ILLEGAL_IN_TIMER when OS_Terminate() is called from an embOS timer. +
    4. +
  4. OS_ExtendTaskContext() contains a new assertion.
    + For every task, the context can be extended only once.
    + In debug builds of embOS, the new implementation of OS_ExtendTaskContext() now calls the OS_Error() function with the new error code OS_ERR_EXTEND_CONTEXT when OS_ExtendTaskContext() is called multiple times from the same task. +
    5. +
+

Version 3.82q

+
    +
  1. OS_EnterNestableInterrupt() optimized to reduce interrupt latency.
    + OS_EnterNestableInterrupt() caused some interrupt latency for zero latency interrupts when an embOS debug library was used.
    + Only CPUs which disable interrupts on interrupt entry were affected, for example Renesas M16C / M32C.
    + OS_EnterNestableInterrupt() for those CPUs was optimized to reduce the interrupt latency of high priority interrupts. +
    2. +
+

Version 3.82p

+
    +
  1. OS_Suspend() now contains an assertion
    + OS_Suspend() must not be called from an interrupt handler as it could cause a task switch immediately.
    + In debug versions of embOS, OS_Suspend() now runs into OS_Error() if called from an interrupt handler or timer. +
    2. +
  2. OS_PutMail functions parameter declaration changed.
    + The functions OS_Putmail(), OS_PutMailCond, OS_PutMailFront() and OS_PutMailFrontCond() now have a const pointer qualifier for the data that shall be put into the mailbox.
    + The const qualifier clarifies and ensures that the data is not modifed by the function. +
    3. +
+

Version 3.82k

+
    +
  1. Queue management optimized.
    + Previous versions of embOS needed 2 integer words of mamangement information stored into the queue buffer for every data item in the queue.
    + With verion 3.82k, the data management was optimized and only one additional integer word, the data size, is stored into the buffer together with the data. +
    2. +
+

Version 3.82i

+
    +
  1. OS_StartTimer() modified to avoid warnings under GCC when compiling sources.
    + When compiling sources with optimization under GCC, the code in OS_StartTimer() generated a "strict alias violation" warning.
    + Some casts were removed and one pointer type was modified to eliminate this warning. +
    2. +
+

Version 3.82e

+
    +
  1. Stack overflow check for system stack and interrupt stack added.
    + In stack check builds, embOS now checks the system stack and the interrupt stack (if present) during every call of the scheduler.
    + If a stack overflow is detected, the error handler OS_Error() is called with one of the new error codes OS_ERR_SYS_STACK or OS_ERR_INT_STACK. +
    2. +
+

Version 3.82d

+
    +
  1. Variable type changed to avoid GCC warnings
    2. +
  2. Changes in OS_Global initialization to avoid GCC warnings.
    3. +
+

Version 3.82c

+
    +
  1. Initialization of OS_Global in OSGlobal.c changed to avoid GCC warnings. +
    2. +
  2. The definition OS_MODEL was moved from OS_RAW.h to OSINFO.c because CPU name and library name will now be placed in OS_Priv.h. +
    3. +
+

Version 3.82b

+
    +
  1. Communication functions for embOSView may be used from tasks.
    + The embOS internal communication functions for embOSView, OS_OnRx() and OS_OnTx() may now be called from a task.
    + Previous versions of embOS did not allow calling these functions from outside an interrupt handler and called OS_Error() in debug builds.
    + Right now, theses functions and the communication protocol are not documented. The user should not call these functions.
    + The modification was done for future extensions. +
    2. +
+

Version 3.80i

+
    +
  1. Resource semaphore handling speed optimized.
    + OS_Use() and OS_Unuse() were optimized to allow faster locking and unlocking on rersource semaphores.
    + The embOS scheduler was optimized to allow faster activation of tasks waiting on resources semaphores. +

    2. +
  2. Support for CPUs with growing stack addresses supported.
    + To handle CPUs with growing stack addresses, OS_CreateTask() and OS_CreateTaskEx() were modified. + The compile time switch OS_STACK_AT_BOTTOM is now honored by these functions and stack is handled correctly for those CPUs.
    + Existing embOS version are not affected, this modification was made for newer versions for CPUs with growing stack addresses. +

    3. +
+

Version 3.80g

+
    +
  1. embOS internal semaphores can be shown with the embOS plugin for IAR C-Spy.
    + The embOS plugin for IAR did not show the system locking semaphores used for malloc and other non re-entrant system functions when no other resource semaphores were used in the application.
    + These semaphores can be now be seen in the Resource semaphore window of the embOS C-Spy plugin. +

    2. +
+

Version 3.80

+
    +
  1. OS_Suspend() / OS_Resume() optimized.
    + The OS_Suspend() and OS_Resume() functions were optimized to perform faster task switches on 32bit CPUs. +

    2. +
  2. Internal data structures and scheduler optimized.
    + Internal data structures were modified to allow more efficient access. Together with a modification of the scheduler, this results in faster task switches and interrupt handling. +

    3. +
  3. OS_InitKern() does not enable interrupts.
    + The previous OS_InitKern() function enabled interrupts by a call of OS_RestoreI(), thus enabling interrupts, as long as OS_IncDI() was not called before.
    + The new OS_InitKern() function does not automatically enable interrupts. The interrupt enable state remains unchanged. +

    4. +
+

Version 3.62c

+
    +
  1. New error code OS_ERR_IDLE_RETURNS
    + The debug version of embOS now checks whether OS_Idle() returns in which case OS_Error() is called with the new error code.
    + OS_Idle() has to be implemented as an endless loop and must never return. If OS_Idle() is modified and returns by accident, the behavior is unpredictable and this error might be difficult to find.
    + The new version of embOS now catches a return from OS_Idle() and calls OS_Error(). +
    2. +
+

Version 3.62b

+
    +
  1. New error code OS_ERR_ISR_NO_HANDLER
    + The new error code is generated and OS_Error() is called, if an un-initialized interrupt handler is called.
    + This error handling is available on some ports of embOS, especially those, where embOS initializes an interrupt vector table in RAM.
    + During initialization, a default dummy handler is installed for all interrupt sources. This handler should normally be replaced by installing application specific interrupt handlers.
    + Because the default dummy interrupt handler should never be called by an application, it calls OS_Error() with the new error code OS_ERR_ISR_NO_HANDLER to signal the setup error. +
    2. +
+

Version 3.62

+
    +
  1. Internal representation of scheduler states modified.
    + The states which control pending task switches and show the reason of the task switch are handled in compact structure now.
    + The previous version used bit fields and definitions which were difficult to understand and which were difficult to handle.
    + The new definition and structure is easier to handle which results in faster code execution. +
    2. +
+

Version 3.60e

+
    +
  1. OS_ERR_WRONG_STACK error code added.
    + Some ports of embOS for CPUs with different stack pointers require that the CPU enters main() with a specific stack selected.
    + These ports of embOS now contain code to examine the stack used in main and call OS_error() with the new error code OS_ERR_WRON_STACK, if the startup code entered main with the wrong stack-pointer selected. +
    2. +
+

Version 3.60c

+
    +
  1. OS_ASSERT_INIT_CALLED()
    + A new assertion is added which checks whether OS_InitKern() was called before tasks are created.
    + In debug builds, the OS_Error() function will be called, if tasks are created before calling OS_InitKern(). +

    2. +
  2. OS_GetTaskName() modified.
    + In previous versions, OS_GetTaskName() had to be called with a valid task ID. Now, the NULL pointer may be passed as argument to address the current task.
    + The function will always return a valid string.
    + The previous implementation might have returned a NULL pointer, which could cause problems, if the result was not evaluated be the calling function. +
    3. +
+

Version 3.60b

+
    +
  1. OS_ASSERT_ISR_LEVEL()
    + A new assertion was defined which will call OS_Error() if the CPU runs in interrupt mode but OS_EnterInterrupt() or OS_EnterNestableInterrupt() was not called.
    + With version 3.60b the assertion is not implemented, it is just defined and usage is prepared. The implementation will be made in future versions of embOS. +
    2. +
+

Version 3.60

+
    +
  1. OS_GetVersion() implemented as function
    + OS_GetVersion() may be used by the application to retrieve the embOS library version. The result may be used to verify whether the library version matches the embOS header file RTOS.h. +
    2. +
+

Version 3.52e

+
    +
  1. All embOS variables located in one module.
    + All embOS variables are located in one module now. In previous versions of embOS, some module specific embOS variables were located in the module they were used for. +
    2. +
+

Version 3.52

+
    +
  1. OS_TickHandler() and OS_TickHandler_Ex() removed.
    + These two functions are obsolete, because they can be replaced by OS_HandleTick() and OS_HandleTick_EX(), if OS_EnterInterrupt() / OS_LeaveInterrupt is used in the interrupt handler. +
    2. +
+

Version 3.50c

+
    +
  1. OS_GetTime32() optimized for 32bit CPUs
    + For 32bit CPUs, OS_GetTime32() is now automatically replaced by an efficient macro which delivers value of the embOS internal time variable.
    + In previous versions of embOS, a function was called, when it was not over-written in the CPU specific part of the OS header file. +
    2. +
+

Version 3.50b

+
    +
  1. Internal optimizations
    + Some internal optimizations were performed to optimize task switching time and interrupt latencies. +
    2. +
+

Version 3.50b

+
    +
  1. Internal optimizations
    + Some internal optimizations were performed to optimize task switching time and interrupt latencies. +
    2. +
+

Version 3.50

+
    +
  1. Scheduler optimized
    + The embOS scheduler was optimized to reduce task switching time and interrupt latencies.
    +
    2. +
+

Version 3.40d

+
    +
  1. OS_Yield() now writes an entry into the trace buffer
    + When using the debug library with trace capabilities, OS_Yield() writes an entry into the trace buffer which shows the function call and the calling task.
    + embOSView version 3.40d is required to show this entry. +
    2. +
+

Version 3.40b

+
    +
  1. Queue management improved.
    + For some CPUs, the buffer start address for Queues has to be aligned. + Now embOS automatically corrects the alignment, if required. +
    2. +
+

Version 3.40a

+
    +
  1. Counting semaphores improved.
    + The counters of counting semaphores are now integer values.
    + Error handling is also improved. When a counting semaphore overflows, the embOS error handler OS_Error() is called in debug builds. +
    2. +
+

Version 3.40

+
    +
  1. Task switch time improved.
    + Scheduling optimized to improve task switch time. +

    2. +
  2. Task switch time improved for task events.
    + Task event handling modified to improve task switch time for tasks waiting on events. +

    3. +
  3. Interrupt latency improved.
    + During task switch, the time period when interrupts are disabled is reduced. +

    4. +
  4. embOS timer tick handler improved.
    + The standard timer tick handler run faster now. The embOS internal time variable is incremented by 1 on every timer tick.
    + When different increments are required, the new timer tick handler OS_HandleTick_Ex(), OS_TickHandler_Ex() or OS_HandleTickDI_Ex() have to be used by application.
    + Different increments may be configured by a call of OS_CONFIG(). +
    5. +
+

Version 3.32i

+
    +
  1. Task switch to OS_Idle() modified.
    + The call of OS_Idle() from OS_ChangeTask can be overwritten (inhibited) by defining the macro OS_IDLE() which is normally defined as OS_Idle().
    + This allows task switching via an exception for specific CPU/compiler versions. +
    2. +
+

Version 3.32g

+
    +
  1. Pointer comparison improved for fixed size memory pools (OS_MEMF module).
    + Some compiler produced wrong pointer comparison code in far memory model.
    + For specific CPU/compiler versions, the new OS_POINTER_TO_VALUE() function was introduced to deliver correct results in pointer comparison. +
    2. +
+

Version 3.28n

+
    +
  1. embOS round-robin scheduling may be disabled.
    + Round-robin scheduling may be disabled by recompiling sources with OS_RR_SUPPORTED defined as 0.
    + This will save some bytes of RAM and ROM and may make sense for small CPUs. +
    2. +
+

Version 3.28g

+
    +
  1. embOS scheduling simplified
    + Task activation and deactivation on "waitable objects" as mailboxes, semaphores, events, fixed size memory blocks now all use the same scheduling method.
    + This modification saves ROM and RAM and makes scheduler easier to understand and to maintain.
    + Applications which accessed internal data structures of waitable objects directly have to be modified. +
    2. +
+

Version 3.24

+
    +
  1. Stack check performance increased
    + Stack check now runs much faster on 32- and 16-bit target CPUs. +
    2. +
+

Version 3.10q

+
    + OS_CreateTask now initializes profiling variables. (Required if TCB is used multiple times) +
+

Version 3.06

+
    + First version. None. +
+ + + +

Program corrections

+

Version 4.20

+
    +
  1. + OS_WaitMailTimed() corrected
    + OS_WaitMailTimed() returned with disabled interrupts when a message was already in the mailbox. + The problem existed in all previous embOS versions and is fixed with version 4.20. +
    2. +
+

Version 4.14a

+
    +
  1. + OS_Q_Create() corrected.
    + OS_Q_Create() did not work correctly when integer size is 16bit and pointer size is greater than 16bit.
    + The queue buffer address is not correctly calculated and stored in the queue control structure.
    + The problem existed in all previous embOS versions and is fixed with version 4.14a. +
    2. +
+

Version 4.14

+
    +
  1. + OS_StopTicklessMode() corrected.
    + OS_StopTicklessMode() did not check if any delay was expired and if it is necessary to call the scheduler for further actions.
    + This could cause that a task or software timer was activated with an one system tick delay.
    + The problem existed in all previous embOS versions and is fixed with version 4.14. +
    2. +
+

Version 4.12a

+
    +
  1. + OS_StartTimer() corrected.
    + When a task was interrupted in OS_StartTimer() by another task which also calls OS_StartTimer() for the same OS_TIMER, it could happen that the internal list of timers was corrupted.
    + The problem existed in all earlier embOS versions and is fixed with version 4.12a. +
    2. +
+

Version 4.12

+
    +
  1. + OS_Alloc() corrected.
    + OS_Alloc() could fail when calling for the first time from more than one task.
    + The 2nd task could try to initialize the resource semaphore which was already initialized by the first call of OS_Alloc().
    + The problem existed in all earlier embOS versions and is fixed with version 4.12. +
    2. +
+

Version 4.10b

+
    +
  1. + OS_TerminateTask() corrected.
    + This should already be corrected with V3.90a but was actually not.
    + Please find more details below in description of V3.90a. +
    2. +
  2. + OS_AdjustTime() corrected.
    + embOS usec precise system time could return wrong values when using with embOS tickless mode.
    + The problem existed since embOS versions 4.02 and is fixed with version 4.10b. +
    3. +
+

Version 4.10a

+
    +
  1. + OS_GetTime_us() / OS_GetTime_us64() corrected.
    + It could happen that OS_GetTime_us() / OS_GetTime_us64() return wrong results when the interrupt pending flag was set during function execution.
    + The problem existed since embOS versions 4.02 and is fixed with version 4.10a. +
    2. +
+

Version 4.10

+
    +
  1. + OS_GetNumIdleTicks() corrected.
    + It could happen that OS_GetNumIdleTicks() returns wrong results, e.g. when a software timer was stopped in OS_Idle() before calling OS_GetNumIdleTicks().
    + The problem existed since embOS versions 4.00 and is fixed with version 4.10. +
    2. +
+

Version 4.06b

+
    +
  1. + Percepio embOS-Trace macro in OS_TerminateTask() corrected.
    + OS_TerminateTask(NULL) reads from address 0x14 which might fail on some CPUs without memory at 0x00.
    + The problem existed since embOS versions 4.06 and is fixed with version 4.06b. +
    2. +
+

Version 4.06a

+
    +
  1. + Declaration of OS_Counters modified.
    + The Region counter is now declared as volatile. Otherwise some compilers with high optimization remove OS_EnterRegion().
    + The problem existed in all previous embOS versions and is fixed with version 4.06a. +
    2. +
+

Version 4.06

+
    +
  1. + OS_StopTicklessMode() corrected.
    + If an interruppt occurred while OS_StopTicklessMode() was executed a NULL function callback pointer could be called.
    + The problem existed since embOS versions 4.00a and is fixed with version 4.06. +
    2. +
+

Version 4.04a

+
    +
  1. + OS_Config_SysTimer(), OS_GetTime_us() and OS_GetTime_us64() were not included in the embOS built.
    + The problem existed since embOS versions 4.04 and is fixed with version 4.04a. +
    2. +
+

Version 4.04

+
    +
  1. OS_SendString() corrected.
    + When an interrupt activates another task which also calls OS_SendString() it could happen that a task was not resumed again after it was suspended by OS_SendString().
    + The problem existed in all previous embOS versions and is fixed with version 4.04. +
    2. +
  2. OS_GetTime_us() corrected.
    + An internal calculation overflow could cause that not the full 32bit return value range could be used.
    + The problem existed since embOS versions 4.02 and is fixed with version 4.04. +
    3. +
+

Version 4.02a

+
    +
  1. Compile error fixed when disabling embOS tickless feature.
    + A compile error occurred when disabling the embOS tickless feature with the compile-time switch OS_SUPPORT_TICKLESS.
    + The problem existed since version 4.00 of embOS and is fixed with version 4.02a. +
    2. +
+

Version 4.00a

+
    +
  1. OS_SendString() corrected.
    + When an interrupt activates a higher priority task which also calls OS_SendString() embOS could stop in an endless loop in OS_SendString().
    + The problem existed in all previous embOS versions and is fixed with version 4.00a. +
    2. +
+

Version 3.90a

+
    +
  1. OS_TerminateTask() corrected.
    + Terminating a task which was suspended by OS_SendString(), ended in a call of OS_Error() later on when the transmission interrupt of the embOSView communication tried to re-activate the non-existing task.
    + OS_TerminateTask() was modified to avoid this problem. When terminating such task, the control variables for embOSView communication are set to not activate that task.
    + The problem existed in all previous embOS versions and is fixed with version 3.90a. +
    2. +
+

Version 3.88g

+
    +
  1. OS_Q_Clear() corrected.
    + OS_Q_Clear() did not activate tasks which were waiting on the queue. +
    2. +
+

Version 3.88f

+
    +
  1. Internal const variable definition corrected.
    +
    2. +
+

Version 3.88e

+
    +
  1. Internal function prototype corrected.
    + Function prototype in trace modul corrected.
    + With the incorrect function prototype some embOS ports did not build without compiler error. +
    2. +
+

Version 3.88d

+
    +
  1. Compatibility macros to older versions added.
    + In version 3.88c, some compatibility macros to address internal veriables were removed from RTOS.h.
    + With version 3.88d, the following macros are available again:
    + OS_pTask, OS_pCurrentTask, OS_pActiveTask, OS_pTimer, OS_pCurrentTimer, OS_Counters, OS_Pending, OS_TimeDex
    2. +
+

Version 3.88a

+
    +
  1. embOS software timer handling corrected.
    + During software timer handling, a NULL-pointer might have been de-referenced.
    + On targets with MMU, this caused an exception when memory at address 0x0 was not enabled.
    + The problem existed since version 3.86g of embOS and is fixed with version 3.86n. +
    2. +
+

Version 3.86n

+
    +
  1. embOS heap management functions corrected.
    + Locking the heap by a resource semaphore must not be controlled by OS_IsRunning(). + The previous implementation did not use (and initialize) the semaphore as long as embOS was not started.
    + This caused a problem when data was allocated during main(), without semaphore, but released from a task, which then addressed the semaphore which did not exist.
    + When OS_malloc() was not called from main(), the problem did not occur.
    + The problem existed since version 3.86e of embOS and is fixed with version 3.86n. +
    2. +
+

Version 3.86m

+
    +
  1. embOS scheduler corrected.
    + The scheduler failed when a task which was suspended and on timeout reached its timeout and at the same moment during execution of the scheduler, + a higher priority task was activated by an interrupt.
    + The higher priority task was put in ready state, but was not started.
    + The problem existed in all previous embOS versions and is fixed with version 3.86m. +
    2. +
  2. OS_TerminateTask() corrected.
    + Setting OS_pActiveTask, the pointer to the task to activate next, has to be an atomic operation.
    + To ensure atomic operation, interrupts have to be disabled before setting OS_pActiveTask when OS_PTR_OP_IS_ATOMIC is defined to 0. + This was not handled correctly in previous versions of embOS and might have caused problems with CPUs which can not write pointer values as atomic operation. + Most likely, all 32bit CPUs can write a pointer value as an atomic operation. The problem might have occurred on those 16- or 8-bit CPUs which can not. + The problem is fixed with version 3.86m. +
    3. +
  3. Internal function OS_InsertTask() corrected. + Insertion of a task into the linked list of tasks has to use atomic operations, when the next pointer of the previous task is updated to point to the new task that shall be inserted.
    + The corrected version disables interrupts before the next pointer of the previous task is updated, when OS_PTR_OP_IS_ATOMIC is defined to 0.
    + This was not handled correctly in previous versions of embOS and might have caused problems with CPUs which can not write pointer values as atomic operation, + when tasks were created dynamically when embOS was already started, or OS_SetPriority() was called after starting embOS. + Most likely, all 32bit CPUs can write a pointer value as an atomic operation. The problem might have occurred on those 16- or 8-bit CPUs which can not. + The internal function OS_InsertTask() is called during task creation or OS_SetPriority().
    +
    4. +
  4. Definition of OS_VERSION corrected. + The definition of OS_VERSION was modified with version 3.86l of embOS to comply to MISRA rules.
    + As long as OS_VERSION was used internally in embOS, no problem occurred.
    + Unfortunately, when user software tried to evaluate OS_VERSION for comparison, the expression could not be evaluated, compilation stopped with errors. + The problem exsisted in version 3.86l of embOS only and is fixed with version 3.86m. +
    5. +
+

Version 3.86l

+
    +
  1. Assertions in OS_AddTickHook() corrected.
    + The function OS_AddTickHook() must not be called from interrupt handlers. It may be called from main() or tasks only.
    + Previuos versions of embOS did not detect when this function was called from an ISR.
    + With embOS version V3.86l, OS_Error() is called in debug builds when the function is called from an ISR handler. +
    2. +
+

Version 3.86i

+
    +
  1. OS_EnterNestableInterrupt() modified.
    + When embOS was compiled with optimization using IAR RX compiler the execution of the incrementation of region counter was delayed in OS_EnterNestableInterrupt().
    + The new macro OS_IntEnterRegion is now used in OS_EnterNestableInterrupt().
    + This macro can be overwritten in the cpu/compiler specific header file with OS_EnterRegionFunc() to avoid that interrupts are enabled before the region counter is incremented. +
    2. +
+

Version 3.86h

+
    +
  1. OS_EVENT handling with timeout corrected.
    + Previous versions of embOS lost an event when tasks were waiting on the event by a all of OS_EVENT_WaitTimed() and the event was signaled after the timeout expired.
    + When the waiting tasks were not activated by the scheduler when the timeout expired, which might have happened, when an other task ran in a critical region, a following call of OS_EVENT_Set() did not signal the event, so the event got lost.
    + The waiting tasks reported a timeout when they continued execution.
    + The problem existed in all revious versions of embOS and is fixed with version 3.86h. +
    2. +
+

Version 3.86f

+
    +
  1. OS_ERR_TIMESLICE removed
    + Previous versions of embOS called the error handler OS_Error() with error code OS_ERR_TIMESLICE, when a task with a timeslice value of 0 was created.
    + Now, a timeslice value of zero is legal. It allows pure cooperative scheduling between tasks with th esame priority as described in the generic manual, chapter 4.
    + The OS_ERR_TIMESLICE assertion was introduced with embOS version 3.82n and is removed with version 3.86f. +
    2. +
+

Version 3.86e

+
    +
  1. Stack info functions for release build corrected
    + The API function macros were not defined properly in the release build.
    + When used in an application with relase build, the following functions generated compiler errors and could not be used: +
    OS_GetSysStackBase() +
    OS_GetSysStackSize() +
    OS_GetSysStackSpace() +
    OS_GetSysStackUsed() +
    OS_GetIntStackBase() +
    OS_GetIntStackSize() +
    OS_GetIntStackSpace() +
    OS_GetIntStackUsed() +
    The problem existed since embOS version 3.84 and is fixed with version 3.86e +
    2. +
+

Version 3.86d

+
    +
  1. Timeout handling for waitable objects corrected
    + When the timeout had already expired when the wait function with timeout was called, the function came back with interrupts disabled. + This might have happened when other tasks with higher priority or interrupts blocked the calling task right after calling a wait functing. + The application might have been kept blocked for ever when the calling task did not call any other function which re-enabled interrupts by OS_RestoreI(). + The problem existed in embOS versions since version 3.86 and is fixed with version 3.86d. +
    2. +
+

Version 3.86c

+
    +
  1. Missing prototype for OS_EnterRegionFunc() added
    2. +
+

Version 3.86a

+
    +
  1. Queue handling corrected.
    + When OS_Q_PutBlocked() was used in an application, OS_Purge() called from a lower priority task might have ended in an endless loop.
    2. +
+

Version 3.86

+
    +
  1. Support for task events with timeout corrected
    + Previous versions of the functions OS_WaitEventTimed() and OS_WaitSingleEventTimed() limited the number of task events to 8, even when the definition of the type OS_TASK_EVENT was defined to a larger data type.
    + Because of an error in an internal function, task events were truncated to 8 bit, regardless the definition of OS_TASK_EVENT.
    + The problem existed in all previous versions of embOS and is fixed with version 3.86 +
    2. +
+

Version 3.84c

+
    +
  1. OS_Q_Put() corrected.
    + OS_Q_Put() existed twice in embOS generic sources V3.84b. +
    2. +
+

Version 3.82w

+
    +
  1. Resource semaphore handling corrected.
    + On 8 or 16 bit CPUs with high interrupt load, the scheduler might have failed when an interrupt occurred during a resource semaphore with waiting tasks was released by a call of OS_Unuse().
    + This happened on CPUs which could not perform atomic pointer or 32bit operations.
    + The system might have crashed, or might not have activated tasks with higher priority.
    + The problem existed in all embOS versions since version 3.80i and is corrected with version 3.82w.
    + Usage of OS_UseTimed() might have caused the same problems on all CPUs when the timeout expired during the resource semaphore was freed and waiting tasks were activated from another task by calling OS_Unuse(). +
    2. +
+

Version 3.82s

+
    +
  1. OS_WaitCSemaTimed() corrected
    + The function might have blocked a task longer than expected.
    + This happened when the task was restarted during the timeout by a semaphore signal and the semaphore was not available for the task, because it was claimed by a higher prioritized task during task activation.
    + In this case, the task was suspended again with the initial full timeout value.
    + The problem existed in all previous versions fo embOS and is corrected with version 3.82s. +
    2. +
+

Version 3.82m

+
    +
  1. Queue management corrected.
    + Queue management failed when the Q-buffer was filled up to the end. This might have happened, when messages are produced faster then they were consumed.
    + The OS_Q_Purge() and OS_Q_Put() functions did not handle this case correctly and caused the queue to be corrupted.
    + OS_Error() might have been called with error number 143, or OS_Q_GetPtr() might have returned with a wrong message size or a message size of 0.
    + The problem existed since version 3.82k of embOS and is fixed with version 3.82m. +
    2. +
+

Version 3.82k

+
    +
  1. Queue management corrected.
    + Queue mamagement failed when multiple producer put data into the same queue and one of the producer was an ISR handler.
    + When the ISR handler was called during a running transfer into the queue, the data in the queue could be corrupted.
    + The problem existed in all previous versions of embOS and is fixed with version 3.82k. +
    2. +
+

Version 3.80k

+
    +
  1. Trace functions corrected.
    + The previous version of embOS intoduced a bug in the trace module. Task names were not shown and the task sensitive filter did not work.
    + The problem existed in version 3.80i in trace libaries only and is corrected in version 3.80k. +
    2. +
+

Version 3.62c

+
    +
  1. OS_GetPriority() corrected.
    + In OS_GetPriority() was called with NULL as paramter, the debug version of embOS called OS_Error() with error code OS_TASK_INV.
    + The NULL pointer is allowed now and the function delivers the priority of the running task as described in the documentation.
    + This error existed in all previous versions of embOS and is fixed with version 3.62c. +
    2. +
+

Version 3.60e

+
    +
  1. OS_EVENT_Create() corrected.
    + OS_EVENT_Create() might have called the error-handler OS_Error() with errorcode OS_ERR_2USE_EVENTOBJ if an event-object was created dynamically or as a local object in a function.
    + This happened, if the un-initialized data area of the event object contained one specific byte (id code) of the event object.
    + The problem existed in all previous embOS versions and is fixed with version 3.60e. +

    2. +
  2. embOSView corrected.
    + When the update interval of embOSView was set to 200ms or a longer value, the reaction of user input or mouse events was blocked for the same time.
    + The problem existed since version 3.32 of embOSView and is fixed with version 3.52b. +
    3. +
+

Version 3.52b

+
    +
  1. OS_SendString() corrected.
    + When sending an empty string, the calling task was suspended forever.
    + The problem existed in all previous embOS versions and is fixed with version 3.52b. +

    2. +
  2. embOSView corrected.
    + When the update interval of embOSView was set to 200ms or a longer value, the reaction of user input or mouse events was blocked for the same time.
    + The problem existed since version 3.32 of embOSView and is fixed with version 3.52b. +
    3. +
+

Version 3.52a

+
    +
  1. OS_Terminate() for XR-build corrected.
    + OS_Terminate() in XR-builds might have failed and the system stuck in an endless loop.
    + All other library modes were not affected. +
    2. +
+

Version 3.50a

+
    +
  1. System stack check corrected
    + The system stack check failed in the case the system stack grows from lower addresses to higher addresses.
    + In this case, the system stack was not correctly filled with the stack check pattern.
    + The problem existed for embOS for PIC only and is fixed with version 3.50a. +
    2. +
+

Version 3.40d

+
    +
  1. OS_Suspend() corrected
    + When using the debug library with trace capabilities, a call of OS_Suspend() wrote a wrong trace code into the trace buffer.
    + Instead of writing the code for task suspension, the code for task termination was written.
    + The function itself worked correctly, only the data written into the trace buffer was wrong.
    + The problem existed in all previous embOS versions and is fixed with version 3.40d. +
    2. +
+

Version 3.32o

+
    +
  1. OS_Unuse() corrected
    + OS_Unuse() must not be called from a task that does not claim the resource semaphore.
    + According to the documentation, the debug build of embOS should generate a call to OS_Error() if this fault happens.
    + All previous versions of embOS did not call OS_Error(). + Now, OS_Error() will be called in that situation with error code 156: OS_ERR_RESOURCE_OWNER(). +
    2. +
+

Version 3.32l

+
    +
  1. OS_EVENT_Delete() corrected
    + OS_EVENT_Delete() did not work correctly. OS_LeaveRegion() was called inside the function without calling OS_EnterRegion() before.
    + In debug builds of embOS, the error-handler OS_Error() was called with error 151 (OS_ERR_LEAVEREGION_BEFORE_ENTERREGION).
    + In release builds the system was blocked because the underflow of region count inhibits all further task switches, or system crashes, because incrementing the region count the next time allows task switches instead of blocking them. + The problem existed in all previous versions and is fixed with version 3.32l. +

    2. +
  2. Round-robin task switching corrected.
    + Round robin task switching did not work correctly in previous version. A task which was blocked for some reason could be activated. The system crashed during task switch.
    + The problem existed since version 3.32j and is fixed with version 3.32l. +
    3. +
+

Version 3.32k

+
    +
  1. Handler function _OS_OnTx() for serial communication to embOSView corrected.
    + The transmission handler for communication with embOSView might have sent incorrect data to embOSView, because internal control state was updated after sending the data.
    + The problem occurred on a new embOS port for a specific CPU only and is fixed with version 3.32k.
    +
    2. +
+

Version 3.32h

+
    +
  1. OS_Error() was required in release build when resource semaphores were used.
    + When using release build libraries and resource semaphores, the embOS error handler OS_Error() was required and the file OS_Error.c had to be compiled and linked in a project.
    + The problem existed since version 3.28i of embOS and is fixed with version 3.32h. +
    2. +
+

Version 3.32e

+
    +
  1. OS_GetMessageCnt() corrected.
    + The type of the retun value of OS_GetMessageCnt() was an unsigned integer in release builds, but an integer in debubg builds.
    + This was corrected to return an unsigned integer in all builds.
    + The problem existed in all previous versions of embOS end is fixed with version 3.32e. +
    2. +
+

Version 3.32a

+
    +
  1. embOSView corrected.
    + embOSView sometimes showed wrong task state "Terminated" for tasks which were not terminated.
    + This bug existed in all previous versions of emBOSView and is fixed with version 3.32a. +
    2. +
+

Version 3.30d

+
    +
  1. OS_MEMF_Create() corrected.
    + Alignment check of buffers for fixed size memory blocks did not work correctly in debug libraries of embOS.
    + OS_Error() was called during OS_MEMF_Create(), even though the memory pool buffers start address was correctly aligned.
    + This problem existed since embOS version 3.28m in all debug build libraries and is fixed with version 3.30d. +
    2. +
+

Version 3.30b

+
    +
  1. OS_Suspend() corrected.
    + OS_Suspend() did not work correctly, when an activated task with higher priority than the running task was suspended.
    + When the task with highest priority was suspended during system initialization before embOS was started, + embOS crashed during the call of OS_Start(), + or called the embOS error handler OS_Error() with error code OS_ERR_INV_TASK (128).
    + The same crash occurred, when the application was running in a critical region and a task with higher priority was activated, + but not started because of the critical region, and was then suspended by a call of OS_Suspend().
    + This problem existed in all previous embOS versions and is fixed with version 3.30b. +
    2. +
+

Version 3.28q

+
    +
  1. Problem with suspended tasks which were on delay fixed.
    + If a task which was on delay was suspended, the delay timer for that task was not handled.
    + This might have resulted in additional longer delay when the task was resumed later.
    + This problem existed in all previous embOS versions and is fixed with version 3.28q. +
    2. +
+

Version 3.28p

+
    +
  1. OS_Suspend() corrected.
    + OS_Suspend() did not work correctly, when the current task was suspended from within an interrupt handler, or from a critical region.
    + The application crashed, or called the embOS error handler OS_Error() with error code OS_ERR_INV_TASK (128).
    + As OS_Suspend() automatically enters a critical region in debug-trace builds, OS_Suspend() also failed, when it was called to suspend the current task in debug-trace builds of embOS.
    + This problem existed in all previous embOS versions and is fixed with version 3.28p. +

    2. +
  2. Alignment problems fixed for fixed size memory blocks
    + Some CPUs, mainly the 32bit RISC types, require aligned buffer start addresses for fixed size memory pools.
    + The debug version of embOS now checks alignment of buffer start address and data blocks in the buffer. + If data blocks and buffer start address is not aligned, an error is generated and embOS error handler is called during creation of a fixed size memory pool.
    + This problem existed in all previous embOS versions and is fixed with version 3.28m. +
    3. +
+

Version 3.28l

+
    +
  1. OS_MEMF_Free() added
    + The function OS_MEMF_Free() was not included in embOS libraries, but was documented in embOS users manual and was also declared in RTOS.h.
    + This problem existed in all previous embOS versions and is fixed with version 3.28l. +
    2. +
+

Version 3.28k

+
    +
  1. OS_MEMF_IsInPool() corrected
    + OS_MEMF_IsInPool() failed, if a pointer was checked which pointed to the first address after the memory pool. + This pointer was reported as belonging to the pool.
    + This problem existed in all previous embOS versions and is fixed with + version 3.28g. +
    2. +
+

Version 3.28g

+
    +
  1. OS_WakeTask() for trace build corrected
    + OS_WakeTask() in trace build disabled task switches.
    + This problem existed since version 3.24 and is fixed with + version 3.28g. +

    2. +
  2. OS_GetMailTimed() / mailbox handling corrected
    + During call of OS_GetMailTimed, interrupts were re-enabled too early. If a mail was just put into a mailbox and the timeout occurred at the same time, a mailbox internal control variables which managed waiting tasks was set to a wrong value.
    + This resulted in wrong mailbox handling and caused task waiting for mail kept suspended, even though, mail was available. + This problem existed in all previous versions of embOS and is fixed with version 3.28g. +
    3. +
+

Version 3.26a

+
    +
  1. OS_MEMF_Release() corrected
    + OS_MEMF_Release() might have failed according to absolute address of memory block.
    + The problem occurred because address calculation was done with 16bit integer value.
    + Calculation was modified to use 32bit values to fix the problem. +
    2. +
+

Version 3.20c

+
    +
  1. OS_GetMailTimed() corrected
    + OS_GetMailTimed() did not retrieve a mail after 256 calls, the waiting + task remained suspended. Corrected with version 3.20c of embOS.
    + This problem exists in all previous embOS versions and is fixed with + version 3.20c.
    2. +
+

Version 3.10r

+
    +
  1. OS_TASK structure definition modified +
    + Previous definition of OS_Task structure may cause linker warnings [w6] + and [w35] even though everything was correct.
    + The problem was caused by unions defined inside a structure.
    + OS_TASK definition was modified to avoid those linker warnings.
    2. +
+

Version 3.10q

+
    +
  1. OS_GetMail +
    + OS_GetMail functions corrected (interrupts disabled before call of _GetMail).
    2. +
    +
  2. OS_Terminate problem with RR +
    + OS_Terminate problem with RR tasks corrected. TimerTick could set RR/PP + pending between UNMARKTASK and OS_Switch. OS_Switch will then call OS_DoRR, + which could append OS_pCurrentTask (the one you want to terminate if e.g. + OS_Terminate(NULL)).
    3. +
+

Version 3.10n

+
    +
  1. Sample interrupt handler +
    + For embOS it is not legal to call OS_EnterInterrupt again after final + call of OS_LeaveInterrupt has been made. In the sample OS_irq_handler + shipped with embOS, there was a possible call of OS_EnterInterrupt after + OS_LeaveInterrupt. The sample OS_irq_handler implementation has been corrected.
    2. +
+

Version 3.06h

+
    +
  1. OS_Unuse error code corrected +
    + When calling OS_Unuse() more often than OS_Use(), the debug version generated + an OS_ERR_TASKLIST_CORRUPT error instead of OS_ERR_UNUSE_BEFORE_USE.
    + This problem exists in all previous embOS versions and is fixed with version + 3.06h.
    2. +
+

Version 3.06f

+
    +
  1. Round Robin Task Problem corrected +
    + In very specific situation it was possible that a round robin task got + 100%
    + of CPU time for round robin tasks instead of sharing that time with other
    + round robin tasks.
    2. +
+ + + +

Release history

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
VersionRelease dateShort explanation
V4.3408. Mar 2017 + New API functions OS_EVENT_SetMaskMode() and OS_EVENT_GetMaskMode().
+
V4.3210. Jan 2017 + New API functions OS_EVENT_SetMask(), OS_EVENT_GetMask(), OS_EVENT_WaitMask() and OS_EVENT_WaitMaskTimed() added.
+ New API functions OS_PutMailTimed() and OS_PutMailTimed1() added.
+ New API functions OS_WD_Add(), OS_WD_Check(), OS_WD_Config(), OS_WD_Remove() and OS_WD_Trigger() added.
+
V4.3008. Dec 2016 + New API functions OS_GetMailTimed1(), OS_ClearSingleEvent(), OS_RemoveTerminateHook() and OS_MPU_SwitchToUnprivStateEx() added.
+ OS_ResumeAllSuspendedTasks() renamed to OS_ResumeAllTasks().
+ OS_RemoveOnTerminateHooks renamed to OS_RemoveAllTerminateHooks()
+ OS_AddOnTerminateHook() renamed to OS_AddTerminateHook().
+ Source code refactoring. +
V4.2607. Sep 2016 + New API function OS_RemoveOnTerminateHooks() added.
+ embOS version mismatch check added.
+ embOS scheduler improved. +
V4.2428. Jun 2016 + Spinlock API for multi-core support added.
+ Several SYSVIEW trace macros added to indicate task termination and execution end of API functions. +
V4.2225. May 2016 + OS_Q_PutEx(), OS_Q_PutBlockedEx(), and OS_Q_PutTimedEx() added. +
V4.2022. Apr 2016 + MPU support added.
+ OS_AddExtendTaskContext() added.
+ OS_WaitMailTimed() corrected. +
V4.1622. Jan 2016 + MISRA-C:2012 compliance updated. +
V4.14a15. Jan 2016 + OS_Q_Create() corrected. +
V4.1403. Nov 2015 + New API fucntion OS_SetDefaultTaskContextExtension() added.
+ New macros OS_INT_PRIO_PRESERVE() and OS_INT_PRIO_RESTORE() added.
+ New API functions OS_TriggerTimer() and OS_TriggerTimerEx() added.
+ SYSVIEW and Percepio trace macros added.
+ OS_StopTicklessMode() corrected. +
V4.12b22. Sep 2015 + SYSVIEW trace macros added.
+
V4.12a17. Sep 2015 + OS_StartTimer() corrected.
+ SYSVIEW trace macros added/modified.
+ OS_InInterrupt() modified. +
V4.1219. Aug 2015 + OS_Alloc() corrected.
+ Percepio embOS-Trace macro in OS_CreateTimerEx() removed.
+ New mailbox API functions OS_Mail_GetPtr(), OS_Mail_GetPtrCond() and OS_Mail_Purge() added.
+ Support for SYSVIEW API trace added. +
V4.10b29. May 2015 + OS_TerminateTask() corrected.
+ OS_AdjustTime() corrected
+ OS_SendString() parameter declaration modified to avoid compiler warning. +
V4.10a13. May 2015 + OS_GetTime_us() / OS_GetTime_us64() corrected. +
V4.1030. Apr 2015 + embOS is MISRA C:2012 compliant.
+ Percepio embOS-Trace defines added.
+ OS_GetNumIdleTicks() corrected. +
V4.06b24. Mar 2015 + Percepio embOS-Trace macro in OS_TerminateTask() corrected.
+
V4.06a16. Mar 2015 + Percepio embOS-Trace macros added/modified.
+ OS_Counters declaration modified.
+
V4.0612. Mar 2015 + Support for Percepio embOS-Trace added.
+ OS_StopTicklessMode() corrected. +
V4.04a01. Dec 2014 + OS_Config_SysTimer(), OS_GetTime_us() and OS_GetTime_us64() were not included in the embOS built.
+
V4.0412. Nov 2014 + Task priorities extended to 32bit.
+ OS_SendString() corrected.
+ OS_GetTime_us() corrected. +
V4.02a15. Sep 2014 + Compile error fixed when disabling embOS tickless feature with the compile-time switch OS_SUPPORT_TICKLESS. +
V4.0215. Aug 2014 + New functions OS_GetTime_us(), OS_GetTime_us64() and OS_Config_SysTimer() added. +
V4.00a21. Jul 2014 + New tickless function OS_StopTicklessMode() added.
+ New const variable OS_DebugInfo added.
+ New profiling functions OS_STAT_Enable(), OS_STAT_Disable() and OS_STAT_GetTaskExecTime() added.
+ OS_SendString() corrected. +
V4.0006. Jun 2014 + Tickless support added. +
V3.90a09. Apr 2014 + OS_TerminateTask() corrected. +
V3.9017. Feb 2014 + Functions to disable/enable global interrupts added. +
V3.88h20. Dec 2013OS_GetNumIdleTicks() added.
+ OS_AdjustTime() added. +
V3.88g30. Oct 2013OS_Q_Clear() corrected.
V3.88f22. Sep 2013Internal const variable definition corrected.
V3.88e06. Sep 2013Internal function prototype corrected.
+ Assertion into OS_Delayus() added. +
V3.88d04. Sep 2013Compatibility macros to older versions added.
+
V3.88c08. Aug 2013New API functions OS_InInterrupt(), OS_Q_PutTimed() added.
+ Additional new profiling functionality
V3.88b28. May 2013Internal data structure changed.
V3.88a02. May 2013 + Event object handling enhanced.
+ Mailbox message size enlarged.
+ Timer handling corrected.
+ Release notes corrected for V3.86m +
V3.8819. Feb 2013 + Fully tested with Parasoft C/C++test MISRA check.
+
V3.86n07. Dec 2012 + Problem with embOS heap management fixed.
+
V3.86m05. Dec 2012 + Scheduler corrected.
+ Definition of OS_VERSION corrected. +
V3.86l21. Nov 2012 + MISRA rule compliance improved.
+ OS_AddTickHook() corrected. +
V3.86k02. Oct 2012 + New embOS API functions OS_Q_GetMessageSize() and OS_Q_PeekPtr().
+ embOS is now compliant to MISRA 2004 rules. +
V3.86i26. Sep 2012 + OS_EnterNestableInterrupt() modified. +
V3.86h06. Sep 2012 + OS_EVENT handling with timeout corrected. +
V3.86g04. Aug 2012 + OS_RetriggerTimer() corrected. +
V3.86f25. Jul 2012 + Task events default to 32bit on 32bit CPUs.
+ New OS_AddOnTerminateHook() function.
+ OS_ERR_TIMESLICE removed. +
V3.86e29. May 2012 + OS_malloc(), OS_free(), OS_realloc() modified.
+ Stack info functions corrected. +
V3.86d9. May 2012 + Timeout handling for waitable objectes corrected. +
V3.86c8. May 2012 + Missing OS_EnterRegionFunc() prototype added. +
V3.86b2. May 2012 + New API function OS_PeekMail()
+ RTOS.h macro definitions modified. +
V3.86a30. Apr 2012 + Queue handling corrected.
+
V3.8622. Mar 2012 + New timeout handling for waitable objects.
+ OS task events corrected. +
V3.84c05. Jan 2012 + OS_Q_Put() removed from OSQ.c. +
V3.84b21. Dec 2011 + New embOS API function OS_Q_PutBlocked(). +
V3.84a22. Nov 2011 + New compile-time check ensures, OS_CPU is defined when compiling sources. +
V3.8427. Sep 2011 + New stack check functions for system and interrupt stack. +
V3.82x12. Sep 2011 + OS_RegionCnt overflow check added.
+ Macro OS_EnterInterrupt() modified. +
V3.82w10. Aug 2011 + GCC compiler warning eliminated.
+ Code modified for Lint.
+ Resource semaphore handling corrected. +
V3.82v15. Jul 2011 + OS_Terminate() renamed to OS_TerminateTask(). +
V3.82u25. May 2011 + Generic tick handler modified.
+ Software timer handling improved. +
V3.82t03. May 2011 + Trial time limitation increased to 12 hours. +
V3.82s18. Mar 2011 + OS_UseTimed() implemented.
+ Improvements
+ Corrections. +
V3.82r28. Jan 2011 + TLS support improved. +
V3.82q18. Jan 2011 + OS_EnterNestableInterrupt() optimized. +
V3.82p12. Jan 2011 + OS_PutMail functions parameter qualifier modified. +
V3.82o04. Jan 2011 + New API function OS_WaitMailTimed() +
V3.82n06. Dec 2010 + New API functions for task suspension and synchronization. +
V3.82m16. Nov 2010 + Queue handling corrected. +
V3.82l26. Oct 2010 + TLS support added +
V3.82k21. Sep 2010 + Queue handling corrected.
+ New API functions for queues and delay. +
V3.82i26. Jul 2010 + Warnings under GCC eliminated.
+
V3.82h28. May 2010 + Internal data types modified.
+
V3.82g12. May 2010 + OS_Start() modified.
+
V3.82f16. Apr 2010 + New function OS_IsRunning() implemented. +
V3.82e17. Dec 2009 + Stack check for system and interrupt stack added. +
V3.82d16. Dec 2009 + Variable type changed to avoid GCC warnings
+ Changes in OS_Global initialization to avoid GCC warnings. +
V3.82c18. Nov 2009 + Changes in OS_Global initialization to avoid GCC warnings.
+ Definition OS_MODEL moved from OS_RAW.h to OSINFO.c. +
V3.82b28. Oct 2009 + Communication to embOSView modified. +
V3.82a25. Sep 2009 + Error handling for queues implemented.
+ OS_Q_IsInUse() implemented. +
V3.8217. Sep 2009 + Scheduling optimized. +
V3.80l07. Sep 2009 + New Macros OS_U32_TO_PTR_TYPE() and OS_EI_HP_ON_ENTRY() added.
+
V3.80k02. Sep 2009 + Trace functions corrected.
+
V3.80i11. Aug 2009 + Optimized resource semaphore handling.
+
V3.80h27. Jul 2009 + Modified interrupt entry.
+
V3.80g05. Jun 2009 + Improved embOS plugin.
+
V3.80f03. Jun 2009 + Improved error handler.
+
V3.8014. Nov 2008 + Improved scheduler.
+
V3.62c24. Oct 2008 + OS_GetPriority() corrected.
+ Additional error handling. +
V3.62a06. Oct 2008 + OS_STACK_ALIGN implemented. +
V3.6201. Sep 2008 + Tick handler modified. +
V3.60e25. Aug 2008 + OS_EVENT_Create() corrected. +
V3.60d28. Mai 2008 + OS_POWER module implemented. +
V3.60c24. Apr 2008 + OS_GetTaskName() improved. + OS_ASSERT_INIT_CALLED() added. +
V3.60b25. Jan 2008 + OS_ASSERT_ISR_LEVEL() defined. +
V3.60a25. Jan 2008 + Time limit for trial version added. +
V3.6018. Nov 2007 + System tick hook functions introduced. +
V3.52e12. Nov 2007 + Location of embOS variables modified. +
V3.52c17. Oct 2007 + OS_SetTaskName() introduced.
+ OS_SendString() corrected.
+ embOSView corrected. +
V3.52a03. Sep 2007 + OS_Terminate() in XR-builds corrected. +
V3.5217. Aug 2007 + OS_CallISR(), OS_CallNestableISR() introduced.
+ OS_TickHandler(), OS_TickHandler_Ex() removed. +
V3.50c10. Aug 2007 + OS_GetTime32() optimized. +
V3.50b16. Jul 2007 + Task switching time and interrupt latencies improved. +
V3.50a12. Jul 2007 + System stack check for PIC corrected. +
V3.5010. Jul 2007 + embOS scheduler optimized. +
V3.40d05. Jul 2007 + OS_Suspend() corrected. +
V3.40c22. Jun 2007 + OS_Yield() implemented. +
V3.40b19. Jun 2007 + Queue handling improved. +
V3.40a05. Jun 2007 + Counting semaphores improved. +
V3.4008. May 2007 + Improvements. +
V3.32o19. Apr 2007 + OS_Unuse() error handling improved. +
V3.32n16. Apr 2007 + OS_SUSPEND_TASK_ON_TERMINATE implemented.
+ Fixes a Windows bug which caused emBOS Simulation to crash. +
V3.32m02. Apr 2007 + OS_TimerEx implemented. +
V3.32l28. Mar 2007 + Round robin switching corrected. +
V3.32k21. Mar 2007 + Communication to embOSView modified. +
V3.32j31. Jan 2007 + OS_CSemaRequest() implemented. +
V3.32i26. Jan 2007 + Switch to OS_Idle() modified. +
V3.32h15. Jan 2007 + Error handling for resource semaphores corrected. +
V3.32g30. Dec 2006 + OS_PTR_TO_VALUE() added. +
V3.32f07. Dec 2006 + OS_INIT_SYS_LOCKS() added. +
V3.32e07. Nov 2006 + OS_GetMessageCnt() corrected. +
V3.32d05. Nov 2006 + OS_Q_GetPtrTimed() added. +
V3.32c22. Sep 2006 + OS_EVENT_WaitTimed() added. +
V3.32b18. Sep 2006 + Enhanced debug information. +
V3.32a04. Aug 2006Extended task implemented +
V3.3218. Jul 2006Event objects implemented
V3.30d20. Jun 2006OS_MEMF_Create() corrected
V3.30b18. May 2006New sources version 3.30b, OS_Suspend() corrected
V3.28p16. Feb 2006New error handling for version without round robin scheduling
V3.28i14. Oct 2005New embOS sources 3.28i with new function OS_DeleteRSema()
V3.28h29. Aug 2005New embOS sources 3.28h, Enhanced error checks
V3.28g23. Aug 2005New embOS sources 3.28g
V3.2425. Nov 2004New embOS sources 3.24
V3.20d22. Jan 2004New embOS sources V3.20, OS_GetMailTimed corrected
V3.10k13. Jan 2003Upgrade to new generic source V3.10k
V3.06f24. Oct 2001Upgrade to new generic source V3.06f
V3.0623. Jul 2001First version with release history
+ +
+

+Copyright 2001-2017 SEGGER Microcontroller GmbH & Co. KG. All rights reserved.
+For more information, please visit our website www.segger.com or contact us at info@segger.com
+

+ + diff --git a/3rd_party/embOS/Release_embOS_CortexM_IAR_V8.html b/3rd_party/embOS/Release_embOS_CortexM_IAR_V8.html new file mode 100644 index 00000000..544b7eaa --- /dev/null +++ b/3rd_party/embOS/Release_embOS_CortexM_IAR_V8.html @@ -0,0 +1,1406 @@ + + +Release notes + + + + + + +

Release notes for embOS Version 4.34.1 for Cortex-M and IAR compiler V8.x

+ +
    +
  1. Tool chain used for build
    2. +
  2. New features
    3. +
  3. Improvements
    4. +
  4. Program corrections
    5. +
  5. Known problems/limitations
    6. +
  6. Release history
    7. +
  7. Miscellaneous
    8. +
+ + + +

Tool chain used for build

+

The following tools have been used:

+ 
+Compiler:  IAR ANSI C/C++ Compiler V8.11.1.13263/W32 for ARM
+Assembler: IAR Assembler V8.11.1.13263/W32 for ARM
+Librarian: IAR Archive Tool V10.1.4.185
+Workbench: IAR Embedded Workbench for ARM 8.11.1.13272
+
+ + + +

New features

+

Version 4.34.1

+
    +
  1. Update for IAR EWARM V8.11
    2. +
+

Version 4.34

+
    +
  1. Update to latest embOS generic sources V4.34.
    2. +
  2. Update for IAR EWARM V8.10
    3. +
+

Version 4.30

+
    +
  1. Update to latest embOS generic sources V4.30.
    2. +
  2. New start project for the NordicSemi nRF52 Preview Development Kit added.
    3. +
  3. New start project for the TI MSP432P401R LaunchPad Development Kit added.
    4. +
+

Version 4.26

+
    +
  1. Update to latest embOS generic sources V4.26.
    2. +
  2. New start project for the NXP LPC1549 Xpresso v2 eval board added.
    3. +
  3. New start project for the SiliconLabs EZR32 Leopard Gecko added.
    4. +
  4. New start project for the ST STM32F767 added.
    5. +
+

Version 4.22

+
    +
  1. Update to latest embOS generic sources V4.22.
    2. +
  2. VFP register handling is now automatically performed by embOS.
    + embOS API functions OS_ExtendTaskContext_VFP(), OS_VFP_Save(), OS_VFP_Restore(), and OS_ExtendTaskContext_TLS_VFP() are deprecated. Compatibility with older embOS versions is ensured through macro definitions.
    3. +
  3. New start project for the Atmel SAM4E-EK eval board added.
    4. +
  4. New start project for the ST STM32L152C Discovery board added.
    5. +
+

Version 4.16

+
    +
  1. Update to latest embOS generic sources V4.16.
    2. +
  2. New start project for the Freescale FRDM_K22F board added.
    3. +
  3. New start project for the Olimex STM32-P407 evalboard added.
    4. +
  4. New start project for the SEGGER emPower evalboard added.
    5. +
  5. New start project for the ST STM32L476 Discovery board added.
    6. +
  6. New start project for the TI TMS470M Development Kit added.
    7. +
+

Version 4.14

+
    +
  1. Update to latest embOS generic sources V4.14.
    2. +
  2. New start project for Freescale Kinetis K26 added.
    3. +
  3. New start project for ST STM32F746G-Discovery added.
    4. +
  4. + Added Segger SystemView to all projects.
    + The Segger SystemView User Guide is available at www.segger.com. +
    5. +
+

Version 4.12a

+
    +
  1. Update to latest embOS generic sources V4.12a.
    2. +
  2. New start project for ST STM32F401xC-Discovery eval board added.
    3. +
+

Version 4.10

+
    +
  1. Update to latest embOS generic sources V4.10.
    2. +
+

Version 4.06b

+
    +
  1. Update to latest embOS generic sources V4.06b.
    2. +
+

Version 4.06a

+
    +
  1. Update to latest embOS generic sources V4.06a.
    2. +
  2. New start project for Freescale TWR-VF6 added.
    3. +
+

Version 4.04a2

+
    +
  1. New start project for Atmel SAMV71 XPlainedUltra evalboard added.
    2. +
+

Version 4.04a1

+
    +
  1. New start project for ST STM32F756G-Eval added.
    2. +
+

Version 4.04a

+
    +
  1. Update to latest embOS generic sources V4.04a.
    2. +
+

Version 4.02a

+
    +
  1. Update to latest embOS generic sources V4.02a.
    2. +
+

Version 4.02

+
    +
  1. Update to latest embOS generic sources V4.02.
    2. +
+

Version 4.00

+
    +
  1. Update to latest embOS generic sources V4.00.
    2. +
  2. New start project for ST STM32F072 added.
    3. +
+

Version 3.90.1

+
    +
  1. New project for Atmel SAMG53 added.
    + embOS for Cortex M and IAR compiler now comes with a start project for Atmel SAMG53 CPU.
    + The start project is prepared to run on the Atmel SAMG53 Xplained Pro starter board.
    + The start project can be downloaded into the internal flash of the CPU using the on-board CMSIS-DAP and CSpy.
    2. +
  2. New project for Atmel SAMG54 added.
    + embOS for Cortex M and IAR compiler now comes with a start project for Atmel SAMG53 CPU.
    + The start project is prepared to run on the Atmel SAMG53 Xplained Pro starter board.
    + The start project can be downloaded into the internal flash of the CPU using the on-board CMSIS-DAP and CSpy.
    3. +
+

Version 3.90

+
    +
  1. Update to latest embOS generic sources V3.90.
    + All new features and modifications of the new embOS version are described in the generic release notes and manual. +
  2. Start projects and assembly files updated for EWARM 7.10
    + Start projects and assembly files can now be used with the new EWARM version 7.10. without errors or warnings.
    + All projects can still be used with the older IAR embedded workbench V6.
    3. +
+

Version 3.88g2

+
    +
  1. New project for ST LIS331 CPU.
    + embOS for Cortex M and IAR compiler now comes with a start project for the ST LIS331 CPU.
    + The start project is prepared to be downloaded into the internal flash of the CPU using J-link or ST-LINK.
    + A support package for the IAR workbench is required. This can be received from ST on request.
    2. +
  2. New project for TI TM4C129.
    + embOS for Cortex M and IAR compiler now comes with a start project for the TI TM4C129 CPU.
    + The start project was built for the TI TM4C129 development kit and is prepared to be downloaded into the internal flash of the CPU.
    +
+

Version 3.88g1

+
    +
  1. New project for ST STM32F429 discovery board added.
    2. +
  2. New project for IAR STM32F429_SK board added.
    3. +
+

Version 3.88g

+
    +
  1. Update to latest embOS generic sources V3.88g.
    2. +
+

Version 3.88c

+
    +
  1. Update to latest embOS generic sources V3.88c.
    2. +
+

Version 3.88b

+
    +
  1. Update to latest embOS generic sources V3.88b.
    2. +
+

Version 3.86n

+
    +
  1. Thread safe system library support with compiler 6.4 or newer described.
    + Activation of thread safe system library support with IAR compiler 6.4 or newer requires additional linker options which are now described in the compiler and CPU specific manual. +
    2. +
  2. New embOS sources V3.86n.
    + All new features and modifications of the new embOS version are described in the generic release notes and manual. +
    3. +
+

Version 3.86l

+
    +
  1. New embOS sources V3.86l.
    + All new features and modifications of the new embOS version are described in the generic release notes and manual. +
    2. +
  2. New start project for Atmel AT91SAM3X-EK added.
    3. +
  3. New start project for Freescale TWR-KL25 added.
    4. +
  4. New start project for Infineon XMC4500 Hexagon Application Kit added.
    5. +
  5. New start project for Infineon XMC4500 Relax Lite Kit added.
    6. +
  6. New start project for NXP LPC4088 Embedded Artists evalboard added.
    7. +
  7. New start project for Keil MCB4357 evalboard (NXP LPC4357) added.
    8. +
  8. New start project for IAR STM32F051R8-SK evalboard added.
    9. +
+

Version 3.86g

+
    +
  1. New embOS sources V3.86g.
    + All new features and modifications of the new embOS version are described in the generic release notes and manual. +
    2. +
+

Version 3.86f

+
    +
  1. New embOS sources V3.86f.
    + All new features and modifications of the new embOS version are described in the generic release notes and manual. +
    2. +
  2. Task events are 32bits wide
    + With embOS version 3.86f, the task events for 32bit CPUs are 32bit wide now, allowing more individual events sent to tasks. +
    3. +
+

Version 3.86e

+
    +
  1. New embOS sources V3.86e.
    + All new features and modifications of the new embOS version are described in the generic release notes and manual. +
    2. +
+

Version 3.86d

+
    +
  1. New embOS sources V3.86d.
    + All new features and modifications of the new embOS version are described in the generic release notes and manual. +
    2. +
+

Version 3.84c

+
    +
  1. New start project for the Hitex NXP LPC1850 eval board added.
    2. +
  2. New start project for the IAR Fujitsu MB9BF618T SK eval board added.
    3. +
  3. New start project for the Freescale Tower K70 eval board added.
    4. +
  4. New start project for the Toshiba Topas TMPM369 eval board added.
    5. +
  5. Update to latest embOS generic sources V3.84c.
    6. +
+

Version 3.84.1

+
    +
  1. embOS plugin for CSpy supports Cortex M4F
    + The new embOS IAR plugin version 6.0.6.7 delivered with embOS V3.84.1 now supports task sensitive call stack for Cortex M4 CPUs with floating point unit.
    + Previous versions of the plugin can be used, but did not show the task sensitive call stack. +
    2. +
+

Version 3.84

+
    +
  1. Support for Cortex M4F with floating point unit added.
    2. +
  2. New start project for the Energy Micro EFM32-GG990-DK eval board.
    3. +
  3. New start project for the NXP LPC1788_EA eval board.
    4. +
  4. New start project for the NXP LPC1788_uEZGUI eval board.
    5. +
  5. New start project for the NXP LPC1788-SK eval board.
    6. +
  6. New start project for the IAR STM32F207-SK eval board.
    7. +
  7. New start project for the ST STM32F457IG-Eval eval board.
    8. +
  8. New start project for the ST STM32F457IG-Discovery eval board.
    9. +
  9. Update to latest embOS generic sources V3.84.
    + New generic features of the version 3.84 are described in the embOS generic release notes file Release_Generic.html +
    10. +
+ +

Version 3.82u

+
    +
  1. New start project for the IAR STM32L152VB-SK eval board.
    + The embOS version 3.82u for IAR compiler V6 and Cortex-M now comes with start projects for the IAR STM32L152VB-SK eval board.
    + The sample project can be downloaded into the CPUs Flash using J-Link.
    + The sample project was built with the latest IAR workbench V6.20 and uses CMSIS. +
    2. +
  2. Update to latest embOS generic sources V3.82u.
    + New features of the version 3.82u are described in the embOS generic release notes file Release_Generic.html +
    3. +
+

Version 3.82s

+
    +
  1. Update to latest embOS generic sources V3.82s. +
    2. +
  2. New library mode DPL added. +
    3. +
  3. New start projects for STM32 devices added.
    + The embOS version 3.82s for IAR compiler V6 and Cortex-M now comes with start projects for STM32L cpu and STM32F100 cpu.
    + The sample projects run on ST STM32 MB819 and ST STM32 Discovery evalboard and can be downloaded into the CPUs Flash using J-Link.
    +
    4. +
  4. New start projects for EFM32 devices added.
    + The embOS version 3.82s for IAR compiler V6 and Cortex-M now comes with start projects for G2XX and G8XX cpu module for EnergyMicro EFM32-G2XX-DK evalboard.
    +
    5. +
  5. New start project for Fujitsu MB9BF506 SK FM3 100PMC evalboard.
    + The embOS version 3.82s for IAR compiler V6 and Cortex-M now comes with start project for Fujitsu MB9BF506 SK FM3 100PMC evalboard.
    + The sample projects can be downloaded into the CPUs Flash using J-Link.
    +
    6. +
+

Version 3.82m

+
    +
  1. Support for Freescale Kinetis added.
    + The embOS version 3.82m for IAR compiler V6 and Cortex-M now comes with start projects for the Freescale Kinetis K40 and K60 CPUs.
    + The sample projects run on the Kinetis TWR starter kit boards and can be downloaded into the CPUs Flash using J-Link.
    +
    2. +
  2. Support for EnergyMicro CPU added.
    + The embOS version 3.82m for IAR and Cortex-M now comes with a start project for the EnergyMicro EFM32 CPU.
    + The sample project runs on the EFM32-G8XX-STK starter board and can be downloaded into the CPUs Flash using the onboard J-Link. +
    3. +
  3. Support for Cortex-M4 added.
    + Previous versions of embOS for Cortex-M could not be compiled when a Cortex-M4 CPUs was selected.
    + The embOS version 3.82m for IAR and Cortex-M now can be used with Cortex-M4 CPUs. +
    4. +
  4. Support for embOSView via J-Link for Cortex-M0 added.
    + Previous versions of embOS for Cortex-M could not use J-Link with embOSview for Cortex-M0 CPUs. + With embOS version 3.82m for IAR and Cortex-M J-Link can be used with embOSView on Cortex-M0 targets. +
    5. +
+

Version 3.82l

+
    +
  1. Thread local storage supported.
    + embOS for Cortex-M and IAR compiler now supports the thread local storage implementation of the new IAR dlib V6. +
    2. +
  2. Update to IAR Compiler / workbench V6 +
    3. +
+

Version 3.82h1

+
    +
  1. embOS Cortex-M3 and embOS Cortex-M0 are merged to embOS Cortex-M. +
    2. +
+

Version 3.82h

+
    +
  1. Profiling with embOSView via J-Link
    + All embOS start projects and the embOS libraries were modified to allow communication with embOSView via J-Link.
    + The new embOSView version 3.82g allows selection of a communication to a Cortex M3 using J-Link with JTAG or SWD interface.
    + The communication to embOSView starts after the call of OS_Start() and can be used in parallel with a debugging session which uses J-Link as debugging probe. +
    2. +
  2. Fully CMSIS compliant projects
    + All start projects of embOS for Cortex-M3 are now fully CMSIS compliant.
    + The projects come with new startup code and vector tables which are fully CMSIS compliant.
    + When CMSIS shall be used for the application, the chip specific CMSIS startup code and vector tables can be used.
    + CMSIS libraries of the chip vendor are not required to run embOS, embOS can be used as is.
    +
    3. +
  3. Generic CMSIS project template
    + embOS for Cortex M3 now comes with a generic CMSIS compatible start project which runs on any Cortex M3 CPU.
    + To run the project on a specific chip, the startup code and the vector table may be replaced by the chip vendor specific versions of these files.
    + No modification on any embOS function or file is required. The vendor specific CMSIS files will guarantee that the embOS timer runs at expected rate of 1ms. +
    4. +
+

Version 3.82e2

+
    +
  1. BSP for ATMEL AT91SAM3S added
    + embOS now comes with a start project for the AT91SAM3S which is prepared to run on the SAM3S-EK eval board.
    + The start project contains debug configurations for flash or RAM.
    + Both UART connectors of the board may be used for embOSView.
    + The project comes with new startup code and vector tables which are fully CMSIS compliant. +
    2. +
  2. CMSIS compliant scheduler call implemented
    + The embOS scheduler function was renamed to be fully CMSIS compliant.
    + Target CPU specific CMSIS libraries may be used together with embOS now.
    + There is no need to modify the vector tables which come with the CMSIS libraries. +
    3. +
+

Version 3.82e1

+
    +
  1. Projects for LPC176x updated.
    + The debugger configuration settings of previous versions caused some trouble when the target should be accessed with J-Link.
    2. +
+

Version 3.82e

+
    +
  1. CMSIS compliant project for STM32/MB672 added.
    2. +
+

Version 3.82c

+
    +
  1. BSP for TMPM330 added
    2. +
  2. Profiling support added to STM32 MB784 eval bord BSP.
    3. +
  3. Update to latest embOS generic sources V3.82c
    4. +
  4. All projects have now remarks enabled
    5. +
+

Version 3.80g3

+
    +
  1. Project for AT91SAM3U runs with IAR flashloader
    + The embOS start project for the AT91SAM3U CPU was modified to run with the Flasherloader which comes with the latest IAR workbench (EW-ARM 5.40.
    + The flashloader can be used with any J-link version, but the project requires version 5.40 or later of the IAR workbench.
    + EW-ARM 5.40 is the first version that supports the AT91SAM3U. +
    2. +
+

Version 3.80g1

+
    +
  1. Support for ST STM32F107 added
    + embOS version 3.80g1 comes with a ready to go start project for the ST32MF107 CPU.
    + The start project is prepared to run on the ST MB 784 eval board and supports flash programming using C-Spy and J-Link. +
    2. +
  2. Support for IAR LPC1766-SK added
    + embOS version 3.80g1 comes with a ready to go start project for the IAR LPC1766-SK eval board.
    + The start project is prepared to run on the eval board and supports flash programming using C-Spy and J-Link.
    + The project is built for the workbench / compiler version 5.30 which delivers the flash loader for the LPC 1766. +
    3. +
+

Version 3.80g

+
    +
  1. Scheduling optimized
    + Update to new embOS version 3.80 with optimized internal data structures to speed up scheduling and task switches.
    + The new embOS version requires the C-Spy plugin V3.80 or later. The plugin comes with embOS. +
    2. +
  2. New embOS plugin with task sensitivity
    + embOS version 3.80g for Cortex M3 now comes with the new embOS IAR plugin V3.80.1 for C-Spy which supports task sensitivity for Cortex M3.
    + Task sensitivity is supported since embOS version 3.62c.
    + Previous versions of embOS for Cortex M3 can be used with the new plugin, but do not support the task sensitivity. +
    3. +
  3. Support for ATMEL AT91SAM3U
    + embOS version 3.80g comes with a ready to go start project for the new ATMEL AT91SAM3U series.
    + Debugging and flash programming using C-Spy and J-Link is supported.
    + The latest version of J-Link software is required to allow programming of the AT91SAM3U. +
    4. +
  4. Support for NXP LPC176x series
    + embOS version 3.80g comes with a ready to go start project for the new NXP LPC176x series.
    + The start project is prepared to run on the KEIL eval board and supports flash programming using C-Spy and J-Link.
    + The project is built for the workbench / compiler version 5.30 which delivers the flash loader for the LPC 1766. +
    5. +
+

Version 3.62

+
    +
  1. Update to embOS sources 3.62
    + embOS comes with new features which are explained in the generic release notes and manual. +
    2. +
  2. Update to new EWARM compiler version 5.20
    + embOS version 3.62 was built with the IAR compiler V5.20 and the start projects were updated to be used with the new workbench. +
    3. +
+

Version 3.60d

+
    +
  1. Update to embOS sources 3.60d
    + embOS comes with several new features which are explained in the generic release notes and manual. +
    2. +
  2. OS_POWER module implemented.
    + The OS_POWER module may be used to control different power saving modes when entering idle state.
    + Individual flags for different peripherals may be set whenever a peripheral needs power or clock, and may be reset, when power is not needed.
    + The state of the power flags may be examined during OS_Idle by a call of OS_POWER_GetMask().
    + This allows to switch off all of those peripherals which are not needed during idle times. +
    3. +
  3. BSP for IAR STM-SK Eval board renamed to STM32F103_STM_SK.
    + BSP is now for IAR STM-SK only instead of IAR STM-SK and ST MB525. +
    4. +
  4. BSP for ST MB525 Eval board added.
    + Start project and board support package for STM32F103 CPU and ST MB525 eval board added. +
    5. +
  5. BSP for ST MB672 Eval board added.
    + Start project and board support package for STM32F103 CPU and ST MB672 eval board added. +
    6. +
+

Version 3.60a

+
    +
  1. Update to embOS sources 3.60a
    + embOS comes with several new features which are explained in the generic release notes and manual. +
    2. +
+

Version 3.60

+
    +
  1. IAR Embedded Workbench for ARM V5.11 compatibility
    + Source and project updates to be compatible with IAR Embedded Workbench for ARM V5.11. +
    2. +
+

Version 3.52c

+
    +
  1. OS_SetTaskName() introduced
    + OS_SetTaskName() allows modification of task names on the fly.
    + This may be useful if the functionality of a task changes during runtime and the new state should be shown using embOSView or an other task visualisation tool. +
    2. +
+

Version 3.52a

+
    +
  1. Luminary Micro LM3S1968 CPU support
    + Start project and board support package for LM3S1968 CPUs added. +
    2. +
  2. Luminary Micro LM3S8962 CPU support
    + Start project and board support package for LM3S8962 CPUs added. +
    3. +
  3. Task switch time can be measured by application
    + embOS now comes with sample applications which allow accurate measurement of task switch time in a running application.
    +
    4. +
+

Version 3.40c

+
    +
  1. OS_Yield() may suspend a task unconditionally
    + When tasks are running on round robin with timeslice, the function OS_Yield() can be used to end the timeslice of the running task immediately and activate an other task with the same priority which is ready for execution. + The function has no effect on tasks that are not running on round robin. +
    2. +
  2. UART and PLL added
    + Uart and PLL initialization to BSP added. +
    3. +
+

Version 3.40a

+
    +
  1. New BSP for STM32F10 added.
    + embOS now comes with board support package for STM32F10. +
    2. +
+

Version 3.40

+
    +
  1. Task switch time can be measured by application
    + embOS now comes with sample applications which allow accurate measurement of task switch time in a running application.
    +
    2. +
  2. Automatic call of OS_INIT_SYS_LOCKS() removed.
    + During initialization of embOS, OS_INIT_SYS_LOCK() is not called automatically.
    + As most of the applications do not need thread safe system libraries, an automatic activation of syslocks causes unwanted overhead.
    + If supported and required, the user may call OS_INIT_SYS_LOCKS() from his own application after normal initialization of embOS.
    +
    3. +
  3. OS_TimerEx, Extended timer implemented
    + Extended timers are software timers which call a user defined callback function when the timer expires.
    + In comparison to normal embOS timers, a parameter is passed to the timer callback function.
    + The parameter value is initialized during timer creation. +
    4. +
+

Version 3.32j

+
    +
  1. + Initial version for Cortex M3 +
    2. +
+ + + +

Improvements

+

Version 4.26.1

+
    +
  1. Ensured suitability of SEGGER SystemView and SEGGER HardFault Handler for C++ compilers. +
    2. +
+

Version 4.26

+
    +
  1. Modified workaround for Cortex-M7 r0p1 (Erratum 837070, ARM-EPM-064408) to be user-configurable at compile time.
    2. +
+

Version 4.22

+
    +
  1. Additional debug check for task termination added.
    2. +
+

Version 4.16

+
    +
  1. Advanced Hard Fault Handler added to all projects.
    2. +
+

Version 3.86g

+
    +
  1. Nested interrupt handling improved.
    + Unnecessary enabling and disabling of interrupts removed from OS_EnterNestableInterrupt() and OS_LeaveNestableInterrupt().
    + Thus, interrupthandling of nested interrupts runs faster. +
    2. +
+

Version 3.86e

+
    +
  1. Modified Hardfault handler
    + The hardfault handler was modified and is now included in the RTOSInit files.
    + When semihosting for terminal outputs is activated in the project settings, printf outputs are controlled by break instructions in the code.
    + If the CPU is started in normal mode without debugger, the break instruction will force a hardfault exception.
    + The new hardfault handler in RTOSInit detects this state, resets the hardfault condition and continues execution of the application.
    + The previuos implementation did not handle the hardfault correctly. The application or the calling task ran in an endless loop. +
    2. +
+

Version 3.86d

+
    +
  1. OS_EnterNestableInterrupt() improved
    + A needless call of enable interrupt function removed. Execution speed improved. +
    2. +
+

Version 3.84.1

+
    +
  1. Fully interruptible stack layout for OS_Idle()
    + The embOS stack management for Cortex M now uses the main stack as stack for OS_Idle which allows fully interruptible usage of the stack in OS_Idle(). + The previous versions of embOS for Cortex M did not allow usage of the stack in OS_Idle(). +
    2. +
+

Version 3.80g2

+
    +
  1. Systick timer initialization modified
    + The SYSTICK timer is normally used as system timer for embOS. Previous versions of embOS for Cortex-M3 initialized the interrupt priority during the system initialization called from OS_InitKern().
    + Now the systick timer initialization is completely done during OS_InitHW() and can therefore be modified if required by the application.
    + By modification of OS_InitHW(), any peripheral timer may be used as system timer for embOS, leaving the systick timer untouched. +
    2. +
+

Version 3.80g1

+
    +
  1. Code modified to avoid warnings
    + Some compile time switches were not predefined in some projects and therefore produced a warning when remarks were enabled.
    + This did not cause any problem, but might have been confusing. +
    2. +
+

Version 3.60

+
    +
  1. IAR Embedded Workbench for ARM V5.11 compatibility
    + embOS for CM3 for IAR V511 is now compatible with IAR Embedded Workbench for ARM V5.11. +
    2. +
+

Version 3.52e

+
    +
  1. All embOS variables located in one module.
    + All embOS variables are located in one module now. In previous versions of embOS, some module specific embOS variables were located in the module they were used for. +
    2. +
+

Version 3.52a

+
    +
  1. Scheduler optimized
    + The embOS scheduler was optimized to reduce task switching time and interrupt latencies.
    +
    2. +
  2. OS_Yield() now writes an entry into the trace buffer
    + When using the debug library with trace capabilities, OS_Yield() writes an entry into the trace buffer which shows the function call and the calling task.
    + embOSView version 3.40d is required to show this entry. +
    3. +
  3. Task switch to OS_Idle() modified.
    + The call of OS_Idle() from OS_ChangeTask can be overwritten (inhibited) by defining the macro OS_IDLE() which is normally defined as OS_Idle().
    + This allows task switching via an exception for specific CPU/compiler versions. +
    4. +
  4. Pointer comparison improved for fixed size memory pools (OS_MEMF module).
    + Some compiler produced wrong pointer comparison code in far memory model.
    + For specific CPU/compiler versions, the new OS_POINTER_TO_VALUE() function was introduced to deliver correct results in pointer comparison. +
    5. +
+

Version 3.40b

+
    +
  1. Queue management improved.
    + For some CPUs, the buffer start address for Queues has to be aligned. + Now embOS automatically corrects the alignment, if required. +
    2. +
+

Version 3.40a

+
    +
  1. Counting semaphores improved.
    + Counting semaphores are now int values and an overflow will be caught, so that embOS runs into OS_Error(). +
    2. +
+

Version 3.40

+
    +
  1. Task switch time improved.
    + Scheduling optimized to improve task switch time. +
    2. +
  2. Task switch time improved for task events.
    + Task event handling modified to improve task switch time for tasks waiting on events. +
    3. +
  3. Interrupt latency improved.
    + During task switch, the time period when interrupts are disabled is reduced. +
    4. +
  4. embOS timer tick handler improved.
    + The standard timer tick handler run faster now. The embOS internal time variable is incremented by 1 on every timer tick.
    + When different increments are required, the new timer tick handler OS_HandleTick_Ex(), OS_TickHandler_Ex() or OS_HandleTickDI_Ex() have to be used by application.
    + Different increments may be configured by a call of OS_CONFIG(). +
    5. +
+

Version 3.32j

+
    +
  1. + NONE, initial version for Cortex M3. +
    2. +
+ + + +

Program corrections

+

Version 4.26

+
    +
  1. Corrected automatic state preservation during OS_Idle() with Cortex M4F/M7.
    + Under certain circumstances, automatic state preservation and restauration could erroneously be enabled during OS_Idle(). + The problem existed in version 4.22 of embOS Cortex M IAR and is fixed with version 4.26. +
    2. +
+

Version 4.22

+
    +
  1. Applied workaround for interrupt handling with Cortex-M7 r0p1.
    + Erratum 837070, ARM-EPM-064408: Increasing priority using a write to BASEPRI does not take effect immediately. Appropiate workaround was applied. + The problem, which is exclusive for Cortex-M7 r0p1, existed on all previous versions of embOS Cortex M IAR and is fixed with version 4.22. +
    2. +
+

Version 4.16

+
    +
  1. Big-endian libraries fixed.
    + Big-endian libraries contained little-endian code by mistake.
    + The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 4.16. +
    2. +
  2. + Task switch fixed.
    + The task switch fix introduced in V4.04a2 could fail under unsual circumstances on Cortex-M3/M4 targets.
    + A task which was suspended by a cooperative task switch was not activated at once but with the next system tick at the latest. +
    3. +
+

Version 4.06a

+
    +
  1. OS_EnterRegion() fixed.
    + Under specific circumstances IAR could remove OS_EnterRegion() when compiling with high optimization.
    + This could cause that the preemptive task switch was not disabled even when OS_EnterRegion() was called.
    + The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 4.06a. +
    2. +
+

Version 4.04a2

+
    +
  1. Task switch fixed.
    + A problem with the task switch could cause that a task was not activated at once when it was triggered by an interrupt.
    + The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 4.04a2. +
    2. +
+

Version 4.04a1

+
    +
  1. embOS libraries fixed.
    + The embOS libraries were built with a 256 kByte code size limitation by mistake.
    + The problem existed since embOS Cortex M IAR version V4.04a and is fixed with version 4.04a1. +
    2. +
+

Version 4.02.1

+
    +
  1. OS_LeaveNestableInterrupt() fixed.
    + A problem with OS_LeaveNestableInterrupt() could cause that a task switch which was triggered by an interrupt routine which + interrupted another interrupt routine was not executed.
    + The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 4.02.1. +
    2. +
+

Version 3.88g2

+
    +
  1. Start projects for Cortex-M0 devices corrected.
    + The start projects for Cortex M0 devices had code for variable vector tables and programming the VTOR register implemented.
    + Cortex M0 devices don't support a variable vector table, the vector table has to be located at address 0x0.
    + Code for programming the VTOR register is removed from the RTOSInit files now.
    + This correction affects the start projects for the following CPUs:
    + Freescale KL25
    + Infineon UMF51x
    + NXP LPC 1000
    + NXP LPC 122x
    + ST STM32F05
    + The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 3.88g2. +
    2. +
+

Version 3.88c

+
    +
  1. OS_Start() fixed.
    + A problem with OS_Start() could cause that embOS did not start.
    + The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 3.88c. +
    2. +
+

Version 3.88b

+
    +
  1. Scheduling fixed.
    + A problem with the scheduler could cause that a task not in ready state was not suspended and continued running.
    + Higher priority tasks were blocked even when they were ready to execute.
    + The problem existed on all previous versions of embOS Cortex M IAR and is fixed with version 3.88b. +
    2. +
+

Version 3.86n

+
    +
  1. Thread safe system locking functions modified.
    + A problem was reported which occured when the application was ended without starting embOS.
    + When thread safe system locks were initialized during main(), the destroy function of the system locks might have crashed when the application run to exit without starting embOS before.
    + The modified destroy function of the embOS syslocks now is not called when embOS was not started before, because there is nor need to destroy the syslocks in this case. +
    2. +
+

Version 3.86d

+
    +
  1. OS_ExtendTaskContext_TLS_VFP() corrected.
    + The previous version of this function did not work correctly.
    + Saving the task context desroyed the task stack.
    + The problem existed on all previous versions of embOS for Cortex M4F and is fixed with version 3.86d of embOS. +
+

Version 3.84c1

+
    +
  1. Scheduling for Cortex M4 with VFP corrected.
    + The previous versions of embOS for Cortex M4 with VFP crashed when the VFP was activated and used by multiple tasks.
    + Initialization for VFP and scheduling was modified to fix the problem.
    + The problem existed on Cortex M4 applications with activated VFP only and is fixed with version 3.84c1 of embOS. +
+

Version 3.84c

+
    +
  1. OS_Start() corrected.
    + A hard fault exception could occur when an interrupt is executed after OS_Start() and before the scheduler runs for the first time.
    2. +
+

Version 3.82m

+
    +
  1. Queue management corrected.
    + Queue management failed when the Q-buffer was filled up to the end. This might have happened, when messages are produced faster then they were consumed.
    + The OS_Q_Purge() and OS_Q_Put() functions did not handle this case correctly and caused the queue to be corrupted.
    + OS_Error() might have been called with error number 143, or OS_Q_GetPtr() might have returned with a wrong message size or a message zize of 0.
    + The problem existed since version 3.82k of embOS and is fixed with version 3.82m. +
    2. +
+

Version 3.80h

+
    +
  1. BSP for AT91SAM3U corrected.
    + The previous versions of the initialization code for the AT91SAM3U did not initialize the second Flash memory controller for devices with 256KB Flash.
    + This resulted in Flash read errors when the Flash memory in the second Flash bank was accessed. +
    2. +
+

Version 3.80g3

+
    +
  1. Systick timer initialization corrected
    + The previous version V3.80g2 of embOS for Cortex-M3 still affected the SYSTICK timer settings during a call of OS_InitKern().
    + The Systick timer was disabled.
    + Now the systick timer initialization is completely done during OS_InitHW() and can therefore be modified if required by the application. +
    2. +
+

Version 3.52e1

+
    +
  1. OS_TaskEx corrected
    + Parameter passing to OS_TaskEx did not work. A task always received a NULL pointer. + The problem existed in all previous embOS versions for CM3 and is fixed with version 3.52e1. +
    2. +
+

Version 3.52e

+
    +
  1. Interrupt table in RAM corrected
    + Variable interrupt table in RAM did not work correct. +
    2. +
+

Version 3.52b

+
    +
  1. OS_SendString() corrected.
    + When sending an empty string, the calling task was suspended forever.
    + The problem existed in all previous embOS versions and is fixed with version 3.52b. +
    2. +
  2. embOSView corrected.
    + When the update interval of embOSView was set to 200ms or a longer value, the reaction of user input or mouse events was blocked for the same time.
    + The problem existed since version 3.32 of embOSView and is fixed with version 3.52b. +
    3. +
+

Version 3.52a

+
    +
  1. OS_Suspend() corrected
    + When using the debug library with trace capabilities, a call of OS_Suspend() wrote a wrong trace code into the trace buffer.
    + Instead of writing the code for task suspension, the code for task termination was written.
    + The function itself worked correctly, only the data written into the trace buffer was wrong.
    + The problem existed in all previous embOS versions and is fixed with version 3.40d. +
    2. +
+

Version 3.40

+
    +
  1. OS_Unuse() corrected
    + OS_Unuse() must not be called from a task that does not claim the resource semaphore.
    + According to the documentation, the debug build of embOS should generate a call to OS_Error() if this fault happens.
    + All previous versions of embOS did not call OS_Error(). + Now, OS_Error() will be called in that situation with error code 156: OS_ERR_RESOURCE_OWNER(). +
    2. +
  2. OS_EVENT_Delete() corrected
    + OS_EVENT_Delete() did not work correctly. OS_LeaveRegion() was called inside the function without calling OS_EnterRegion() bfore.
    + In debug builds of embOS, the error handler OS_Error() was called with error 151 (OS_ERR_LEAVEREGION_BEFORE_ENTERREGION).
    + In release builds the system was blocked because the underflow of region count inhibits all further task switches, or system crashes, because incrementing the region count the next time allows task switches instead of blocking them. + The problem existed in all previous versions and is fixed with version 3.32l. +
    3. +
  3. Round-robin task switching corrected.
    + Round robin task switching did not work correctly in previous version. A task which was blocked for some reason could be activated. The system crashed during task switch.
    + The problem existed since version 3.32j and is fixed with version 3.32l. +
    4. +
  4. Handler function _OS_OnTx() for serial communication to embOSView corrected.
    + The transmission handler for communication with embOSView might have sent incorrect data to embOSView, because internal control state was updated after sending the data.
    + The problem occurred on a new embOS port for a specific CPU only and is fixed with version 3.32k.
    +
    5. +
+

Version 3.32j

+
    +
  1. + NONE, initial version for Cortex M3. +
    2. +
+ + + +

Known problems/limitations

+

Version 3.32j

+
    +
  1. + NONE. +
    2. +
+ + + +

Release history

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
VersionRelease dateShort explanation
V4.34.113. Apr 2017 + Update for IAR EWARM V8.11. +
V4.3427. Mar 2017 + Update to latest embOS generic sources V4.34.
+ Update for IAR EWARM V8.10. +
V4.3013. Dec 2016 + Update to latest embOS generic sources V4.30.
+ New start project for the NordicSemi nRF52 Preview Development Kit added.
+ New start project for the TI MSP432P401R LaunchPad Development Kit added. +
V4.26.117. Nov 2016 + Ensured suitability of SEGGER SystemView and SEGGER HardFault Handler for C++ compilers. + +
V4.2627. Oct 2016 + Update to latest embOS generic sources V4.26.
+ New start project for the NXP LPC1549 Xpresso v2 eval board added.
+ New start project for the SiliconLabs EZR32 Leopard Gecko added.
+ New start project for the ST STM32F767 added.
+ Modified workaround for Cortex-M7 r0p1 to be user-configurable at compile time.
+ Corrected automatic state preservation during OS_Idle() with Cortex M4F/M7. +
V4.2231. May 2016 + Update to latest embOS generic sources V4.22.
+ VFP register handling is now automatically performed by embOS.
+ New start project for the Atmel SAM4E-EK eval board added.
+ New start project for the ST STM32L152C Discovery board added.
+ Applied workaround for interrupt handling with Cortex-M7 r0p1.
+ Additional debug check for task termination added. +
V4.1624. Mar 2016 + Update to latest embOS generic sources V4.16.
+ New start project for the Freescale FRDM_K22F board added.
+ New start project for the Olimex STM32-P407 evalboard added.
+ New start project for the SEGGER emPower evalboard added.
+ New start project for the ST STM32L476 Discovery board added.
+ New start project for the TI TMS470M Development Kit added.
+ Advanced Hard Fault Handler added to all projects.
+ Task switch fixed.
+ Big-endian libraries fixed.
+
V4.1422. Dec 2015 + Update to latest embOS generic sources V4.14.
+ New start project for Freescale Kinetis K26 added.
+ New start project for ST STM32F746G-Discovery added.
+ Added Segger SystemView to all projects. +
V4.12a17. Sep 2015 + Update to latest embOS generic sources V4.12a.
+ Start project for ST STM32F401xC-Discovery eval board added. +
V4.1004. May 2015 + Update to latest embOS generic sources V4.10.
+
V4.06b31. Mar 2015 + Update to latest embOS generic sources V4.06b.
+
V4.06a18. Mar 2015 + Update to latest embOS generic sources V4.06a.
+ Sstart project for Freescale TWR-VF6 added.
+ OS_EnterRegion() fixed. +
V4.04a204. Mar 2015 + Task switch fixed.
+ Start project for Atmel SAMV71 XPlainedUltra added. +
V4.04a103. Feb 2015 + embOS library code size limitation fixed.
+ Start project for ST STM32F756G-Eval added. +
V4.04a09. Jan 2015 + New embOS sources V4.04a.
+
V4.02a18. Sep 2014 + New embOS sources V4.02a.
+
V4.02.115. Sep 2014 + OS_LeaveNestableInterrupt() fixed.
+
V4.0219. Aug 2014 + New embOS sources V4.02.
+
V4.0013. Jun 2014 + New embOS sources V4.00.
+ Start project for ST STM32F072 added. +
V3.90.124. Mar 2014 + New start project for Atmel SAMG53.
+ New start project for Atmel SAMG54. +
V3.9019. Jan 2014 + New embOS sources V3.90. +
V3.88g212. Jan 2014 + New startproject for ST LIS331 device.
+ New start project for TI TM4C129.
+ RTOSInit for Cortex M0 corrected. +
V3.88g117. Dec 2013 + New startprojects for ST devices. +
V3.88g05. Nov 2013 + New embOS sources V3.88g. +
V3.88c13. Aug 2013 + New embOS sources V3.88c.
+ OS_Start() fixed. +
V3.88b29. May 2013 + New embOS sources V3.88b.
+ Scheduling fixed. +
V3.86n10. Dec 2012 + New embOS sources V3.86n.
+ embOS syslocks for IAR runtime environment modified. +
V3.86l26. Nov 2012 + New embOS sources V3.86l.
+
V3.86g06. Aug 2012 + New embOS sources V3.86g.
+ Interrupt handling improved. +
V3.86f26. Jul 2012 + New embOS sources V3.86f.
+ Task events are 32bit wide now. +
V3.86e08. Jun 2012 + New embOS sources V3.86e.
+ HardFault_Handler() modified. +
V3.86d10. May 2012 + OS_ExtendTaskContext_TLS_VFP() corrected.
+ OS_EnterNestableInterrupt() improved.
+ New embOS sources V3.86d. +
V3.84d30. Apr 2012 + Queue management corrected. +
V3.84c103. Feb 2012 + Scheduling for Cortex M4 with VFP corrected. +
V3.84c18. Jan 2012 + New start projects added.
+ Update to latest embOS generic sources V3.84c
+ OS_Start() corrected. +
V3.84.104. Nov 2011 + Stack management improved, OS_Idle() may use stack.
+ embOS plugin for Cortex M4 with VFP. +
V3.8427. Oct 2011 + Support for Cortex M4F with floating point unit added.
+ New start projects for the EFM32 devices added.
+ New start projects for the NXP devices added.
+ New start projects for the STM32 devices added.
+ Update to latest embOS generic sources V3.84
+
V3.82u05. July 2011 + Update to latest embOS generic sources V3.82u
+ New start project for IAR STM32L152BV-SK board.
+
V3.82s23. Mar 2011 + Update to latest embOS generic sources V3.82s
+ New library mode DPL added.
+ New start projects for STM32 devices added.
+ New start projects for EFM32 devices added.
+ New start project for Fujitsu device added. +
V3.82m24. Nov 2010 + Freescale Kinetis supported.
+ EnergyMicro supported.
+ Queue handling corrected. +
V3.82l25. Oct 2010 + Update to IAR compiler V6. +
V3.82h121. July 2010 + embOS CM3 IAR now also supports Cortex M0. +
V3.82h31. Mai 2010 + embOSView runs via J-Link.
+ Fully CMSIS compliant
+
V3.82e210. Feb 2010 + CMSIS compliant BSP for AT91SAM3S added. +
V3.82e129. Jan 2010 + Projects for LPC176x updated. +
V3.82e28. Jan 2010 + CMSIS compliant project for STM32/MB672 added. +
V3.82c10. Dec 2009 + BSP for TMPM330 added.
+ Profiling support for MB784 added.
+ Update to latest embOS generic sources V3.82c + Remarks enabled for all projects
+
V3.80h06. Aug 2009 + BSP for AT91SAM3U corrected. +
V3.80g314. Jul 2009 + Timer initialization modified. +
V3.80g209. Jul 2009 + Timer initialization modified. +
V3.80g109. Jul 2009 + ST STM32F107 supported.
+ IAR LPC1766-SK supported. +
V3.80g05. Jun 2009 + New embOS plugin supported
+ New optimized embOS sources. +
V3.6201. Oct 2008 + Update to new embOS sources 3.62.
+ Update to IAR compiler V5.20. +
V3.60d05. Jun 2008 + Update to new embOS sources 3.60d.
+ OS_POWER module implemented.
+ BSP for IAR STM-SK split up into IAR STM-SK and ST MB525.
+ BSP for ST MB672 eval board added. +
V3.60a12. Mar 2008 + Update to embOS version 3.60a. +
V3.6011. Jan 2008 + Update to IAR compiler V5.11. +
V3.52e121. Dec 2007 + OS_TaskEx corrected. +
V3.52e29. Nov 2007 + New generic embOS sources.
+ Interrupt table in RAM corrected. +
V3.52a17. Sep 2007 + New BSPs for Luminary Micro LM3S1968 and LM3s8962 CPUs.
+ Scheduler optimized.
+ Task switch to OS_Idle() modified. +
V3.40c28. Jun 2007 + OS_Yield() implemented.
+ Uart and PLL for BSP/STM32F10 added. +
V3.40a05. Jun 2007 + Counting semaphores improvement.
+ BSP for STM32F10 added. +
V3.4024. May 2007 + New start projects for LM3S6965 and LM3S6965. + New embOS sources 3.40. +
V3.32j06. Jan 2007 + Initial version for Cortex M3 +
+ +
+

+Copyright 2001-2017 SEGGER Microcontroller GmbH & Co. KG. All rights reserved.
+For more information, please visit our website www.segger.com or contact us at info@segger.com
+

+ + diff --git a/3rd_party/embOS/Release_embOS_Generic.html b/3rd_party/embOS/Release_embOS_Generic.html deleted file mode 100644 index 670decdd..00000000 --- a/3rd_party/embOS/Release_embOS_Generic.html +++ /dev/null @@ -1,2204 +0,0 @@ - - -Release notes - - - - - - -

Release notes for embOS Version 4.00

- -
    -
  1. New features
    2. -
  2. Improvements
    3. -
  3. Program corrections
    4. -
  4. Release history
    5. -
  5. Miscellaneous
    6. -
- - - -

New features

-

Version 4.00

-
    -
  1. Tickless support added.
    - embOS now supports tickless mode. This is useful for low power operations, e.g. battery powered devices. -
    2. -
-

Version 3.90

-
    -
  1. Functions to enable/disable global interrupts added.
    - embOS now offers the following functions to enable and disable all interrupts, including high priority interrupts:
    - OS_INTERRUPT_MaskGlobal() - OS_INTERRUPT_UnmaskGlobal()
    - Using the following functions allows nested calls, because the interrupt state can be saved and restored:
    - OS_INTERRUPT_PreserveGlobal() - OS_INTERRUPT_PreserveAndMaskGlobal() - OS_INTERRUPT_RestoreGlobal() -
    2. -
-

Version 3.88h

-
    -
  1. OS_GetNumIdleTicks() added.
    - Can be used to examine the number of ticks spent idle.
    - This is the number ticks until the next time scheduled action will be started.
    2. -
  2. OS_AdjustTime() added.
    - Can be used to add an amount of time to the embOS internal time variable.
    3. -
-

Version 3.88d

-
    -
  1. Compatibility macros to older versions added.
    - In version 3.88c, some compatibility macros to address internal variables were removed from RTOS.h.
    - With version 3.88d, the following macros are available again:
    - OS_pTask, OS_pCurrentTask, OS_pActiveTask, OS_pTimer, OS_pCurrentTimer, OS_Counters, OS_Pending, OS_TimeDex
    2. -
-

Version 3.88c

-
    -
  1. New API function OS_InInterrupt()
    - The new API function OS_InInterrupt() can be used to examine if the calling function is running in an embOS interrupt handler.
    - The function is available in all library modes.
    2. -
  2. New API function OS_Q_PutTimed()
    - The new function OS_Q_PutTimed() can be used to put data into a queue with a given timeout.
    - The function suspends the calling task for the given timeout if no space for the message is avaialable in the queue.
    3. -
  3. New profiling functions to measure CPU load at runtime
    - The new functions OS_AddLoadMeasurement(), OS_GetLoadMeasurement() and OS_INC_IDLE_CNT() can be used to examine the total CPU load at runtime.
    - The measurement period can be set by function, the global variable OC_CPU_Load can be read by debuggers with life watch capability. -
-

Version 3.88a

-
    -
  1. Reset behaviour of OS_EVENT objects can be controlled.
    - The new API function OS_EVENT_SetResetMode() allows setting of the reset behaviour of existing event objects.
    - The embOS functions for event objects unfortunately were inconsistent in respect of the reset behaviour of events.
    - Setting the reset mode with the new function OS_EVENT_SetResetMode() allows to set the reset behaviour to semiauto, manual, or automatic reset.
    - Manual reset guaranties that the event object remains set when waiting tasks are resumed. The event has to be reset manually by the task.
    - Automatic reset allways resets the event when waiting tasks are resumed. The task does not need to reset the event.
    - The semiauto mode is the mode used in previous versions of embOS as described in the manual.
    2. -
  2. New extended function for event object creation.
    - The new function OS_EVENT_CreateEx() allows to create an event object and set the reset behavior to semiauto, manual or automatic reset.
    3. -
  3. Type of reset behaviour of event objects can be retrieved.
    - The new function OS_EVENT_GetResetMode() retrieves the current setting of the reset behaviour of an event object.
    4. -
  4. Message size for mailboxes enlarged.
    - Previous version of embOS allowed message sizes of up to 127 bytes for mailboxes.
    - Now embOS allows messages sizes of up to 32767 bytes for mailboxes.
    - However, the total size of one mailbox buffer is still limited to 64KBytes on 16bit CPUs.
    - The debug builds of embOS now call OS_Error() with error code OS_ERR_MB_BUFFER_SIZE if the total size limit of one mailbox buffer is exceeded when calling OS_CreateMB().
    5. -
-

Version 3.88

-
    -
  1. Fully tested with Parasoft C/C++test MISRA check
    - MISRA violations suppressed in source code with Parasoft comments.
    2. -
-

Version 3.86l

-
    -
  1. MISRA rule compliance improved.
    - All violations of MISRA rule 10.1 fixed.
    - All violations of MISRA rule 12.7 fixed.
    - All violations of MISRA rule 14.9 fixed.
    - All violations of MISRA rule 16.4 fixed.
    - All violations of MISRA rule 16.8 fixed. -
    2. -
-

Version 3.86k

-
    -
  1. New embOS API functions OS_Q_GetMessageSize() and OS_Q_PeekPtr().
    - The new function OS_Q_GetMessageSize() reads the size of the first message in a queue.
    2. - The new function OS_Q_PeekPtr() reads a message from a queue without removing it. -
  2. embOS is now compliant to MISRA 2004 rules.
    3. -
-

Version 3.86f

-
    -
  1. Task events default to 32bit on 32bit CPUs.
    - The default for task events for 32bit CPUs was modified from unsigned char to unsigned long.
    - On 32bit CPUs, now the type OS_TASK_EVENT is defined as OS_U32 per default, allowing 32 different task events.
    - All previous versions limited the task events for all CPUs to 8bit per default. -
    2. -
  2. OS_ON_TERMINATE_HOOK added
    - embOS now supports a linked list of functions which are called when a task is terminated.
    - The new embOS function OS_AddOnTerminateHook() can be used to insert a callback function in the list of functions which are called when a task is terminated.
    - The callback function gets the task ID as paramter.
    - The callback function can be used to free or remove task specific objects which were created by the application. -
    3. -
-

Version 3.86b

-
    -
  1. New embOS API function OS_PeekMail().
    - The new function OS_PeekMail() reads a mail from a mailbox without removing it.
    2. -
-

Version 3.86

-
    -
  1. Timeout handling for "waitable" objects modified
    - Previous versions of timed wait functions for waitable objects might have returned with no timeout condition when the object became avaialble after the timeout time.
    - This happened when the waiting task was blocked by higher priority tasks and did not start after the timeout period.
    - When the object became availabel after expiration of the timeout time but before the waiting tasks started again, no timeout condition was signaled to the task.
    - This behaviour is changed with version 3.86 of embOS. When the object was not avaialble within the timeout time, a timeout is signaled to the waiting task, regardless the object may become avaialble until the task runs again.
    - Following functions were modified: -
      -
    • OS_EVENT_WaitTimed()
      • -
    • OS_GetMailTimed()
      • -
    • OS_MEMF_AllocTimed()
      • -
    • OS_Q_GetPtrTimed()
      • -
    • OS_UseTimed()
      • -
    • OS_WaitCSemaTimed()
      • -
    • OS_WaitMailTimed()
      • -
    -
    2. -
-

Version 3.84b

-
    -
  1. New embOS API function OS_Q_PutBlocked().
    - The new blocking function for Queues OS_Q_PutBlocked() suspends the task when the queue is full. -
    2. -
-

Version 3.84

-
    -
  1. New system stack check functions.
    - New functions to analyze the system stack load during runtime are available now:
    -
      -
    • OS_GetSysStackBase() delivers the base address of the system stack.
      • -
    • OS_GetSysStackSize() delivers the size of the system stack.
      • -
    • OS_GetSysStackSpace() delivers the free (unused) space on the system stack.
      • -
    • OS_GetSysStackUsed() delivers the maximum amount of stack space used on the system stack.
      • -
    -
    2. -
    -
  2. New interrupt stack check functions.
    - For CPUs which support a separate interrupt stack, new functions to analyze the interrupt stack load during runtime are available now:
    -
      -
    • OS_GetIntStackBase() delivers the base address of the interrupt stack.
      • -
    • OS_GetIntStackSize() delivers the size of the interrupt stack.
      • -
    • OS_GetIntStackSpace() delivers the free (unused) space on the interrupt stack.
      • -
    • OS_GetIntStackUsed() delivers the maximum amount of stack space used on the interrupt stack.
      • -
    -
    3. -
-

Version 3.82x

-
    -
  1. OS_RegionCnt overflow check added.
    - Overflow check is activated when OS_DEBUG_LEVEL >= 2.
    -
  2. Macro OS_EnterInterrupt() modified.
    - OS_ASSERT_CPU_IN_ISR_MODE() moved to first line in macro OS_EnterInterrupt().
    3. -
-

Version 3.82w

-
    -
  1. GCC compiler warning eliminated.
    - GCC compiler warning in OS_MEMF_Create.c eliminated.
    2. -
  2. Code modified for Lint.
    - All embOS generic sources are tested with Lint.
    3. -
-

Version 3.82u

-
    -
  1. Fixed size memory blocks may be larger than 64KB on 32bit CPUs.
    - The fixed size memory pool data types were modified to allow larger pools and block sizes on 32bit CPUs. The sizes may now be up to 2^31 bytes.
    - For 16bit CPUs the block and pool sizes remain unchanged to previous versions and may be 64KB. -
    2. -
  2. Software timer handling can be excluded.
    - The new compile-time switch OS_SUPPORT_TIMER may be used to exclude embOS software timer handling from build when compiling the sources.
    - If software timer are not needed by the application, excluding the software timer handling will decrease code and data size and speed up the scheduler. -
    3. -
-

Version 3.82t

-
    -
  1. Trial time limitation increased to 12 hours.
    - The trial time limitation is increased from 15 minutes to 12 hours. -
    2. -
-

Version 3.82s

-
    -
  1. New API function OS_UseTimed()
    - OS_UseTimed() may be used to request a resource semaphore with time out. The function blocks until the resource is available or the timeout expired. -
    2. -
-

Version 3.82o

-
    -
  1. New API function OS_WaitMailTimed()
    - OS_WaitMailTimed() may be used to suspend a task for a given timeout or until a message is available in a mailbox without retrieving the mail. -
    2. -
-

Version 3.82n

-
    -
  1. New API functions for task suspension and synchronization.
    - OS_SuspendAllTasks() may be used to suspend all task except the running task.
    - OS_SetInitialSuspendCnt() can be used to create tasks that are initially suspended and will not run until they are resumed.
    - OS_ResumAllSuspendedTasks() may be used to resume all suspended task at once without the need to address specific tasks. -
    2. -
-

Version 3.82l

-
    -
  1. Thread local storage supported.
    - For some ports, a thread local storage (TLS) may be used and can be initialized individually for every task by a call of OS_TLS_Init().
    - The new TLS implementation requires additional CPU specifc fucntions and support by the compiler specific runtime library, it may be available for some ports only. -
    2. -
-

Version 3.82k

-
    -
  1. New API function OS_Delayus().
    - The new function OS_Delayus() can be used to perform a delay with micro second resolution. The calling task will wait for the given delay time without suspension.
    - During the wait time, other tasks may be activated by interrupt, the embOS scheduling is not blocked.
    - The function works well when the embOS timer has a resolution of at least 1us or better. -
    2. -
  2. New API function OS_Q_Delete().
    - This new function deletes a queue. Queues can be fully dynamically created and deleted now. The resources of the queue may be re-used after deletion. -
    3. -
-

Version 3.82g

-
    -
  1. OS_Start() in assembly source replaced by OS_StartASM().
    - OS_Start() now is a generic function which sets OS_Running to 1 and then calls OS_StartASM().
    2. -
-

Version 3.82h

-
    -
  1. Internal data types modified.
    - A data type was defined for Ipl_EI and Ipl_DI. This allows variable size of integers which is supported by some tool chains. -
    2. -
  2. OS_Info module modifed.
    - The OS_Info module included the standard header stdio.h without any need. The include is removed now. -
    3. -
-

Version 3.82g

-
    -
  1. OS_Start() in assembly source replaced by OS_StartASM().
    - OS_Start() now is a generic function which sets OS_Running to 1 and then calls OS_StartASM().
    2. -
-

Version 3.82f

-
    -
  1. OS_IsRunning() implemented.
    - The new API function OS_IsRunning() can be used to examine whether the embOS scheduler was started by a call of OS_Start().
    - This may be helpful for some applications and functions to decide whether blocking function calls can be used. -
    2. -
-

Version 3.82a

-
    -
  1. Error handling for queues implemented.
    - embOS checks in debug version the correct queue handling. -
    2. -
  2. OS_Q_IsInUse() implemented.
    - New queue function which returns whether the queue is currently in use. -
    3. -
-

Version 3.82

-
    -
  1. Scheduling and task switch time optimized.
    - The internal scheduling functions OS_ChangeTask() and OS_Switch() were optimized to speed up context switching.
    - By recompiling the sources, the optimization may be enabled or disabled by the definition of OS_GLOBAL_IS_RETURNED and OS_GLOBAL_IS_PARA. -
    2. -
-

Version 3.80l

-
    -
  1. Macro OS_U32_TO_PTR_TYPE added.
    - The new macro OS_U32_TO_PTR_TYPE casts an OS_U32 to pointer type to avoid warnings on some tool chains with different memory models. -
    2. -
  2. New macro OS_EI_HP_ON_ENTRY()
    - OS_EI_HP_ON_ENTRY() enables high-prio interrupts if necessary: Some CPUs (such as M16C) disable all interrupts on ISR entry. -
    3. -
-

Version 3.80k

-
    -
  1. New fast tick handler.
    - embOS V3.80k comes with an alternate faster tick handler OS_TICK_HandleNoHook().
    - This tick handler does not support the tick hook function and therefore executes faster.
    - It may be used instead of the regular tick handler OS_TICK_Handle() which is used in the default start projects.
    - When using this new fast tick handler, it is the users responsibility, not to install any tick hook functions, as those will not be called by embOS. -
    2. -
  2. Task events modified.
    - The data type of task events may now be modified from unsigned char to unsigned short or unsigned int to allow more than 8 task events.
    - The modification is done be defining the type of task events via the OS_TASK_EVENT definition in RTOS.h
    - This type defaults to unsigned char to be compatible with previous versions of embOS. A modification requires recompilation of the embOS sources. -
    3. -
-

Version 3.80h

-
    -
  1. Interrupt entry functions modified, internal modification.
    - For some CPUs the CPU state can not be examined. A modification of the interrupt entry functions was required to inhibit an interrupt level assertion, introduced with version 3.80f, for those CPUs.
    - The performance is not affected by this modification. -
    2. -
-

Version 3.80f

-
    -
  1. Interrupt level assertions added
    - The debug version of embOS now comes with additional error handler functionality.
    - The error handler can detect illegal function calls under various conditions. OS_Error() will be called when one of the following conditions is detected:
    -
      -
    • OS_ERR_NOT_IN_ISR: *** OS_EnterInterrupt() has been called, but CPU is not in ISR state
      • -
    • OS_ERR_IN_ISR: *** OS_EnterInterrupt() has not been called, but CPU is in ISR state
      • -
    • OS_ERR_CPU_STATE_ISR_ILLEGAL: *** OS-function called from ISR with high priority
      • -
    • OS_ERR_CPU_STATE_ILLEGAL: *** CPU runs in illegal mode
      • -
    • OS_ERR_CPU_STATE_UNKNOWN: *** CPU runs in unknown mode or mode could not be read
      • -
    -
    2. -
-

Version 3.62a

-
    -
  1. OS_STACK_ALIGN implemented
    - OS_STACK_ALIGN may be defined to ensure a specific task stack alignment during task creation.
    - To ensure a stack alignment of 8 bytes, OS_STACK_ALIGN has to be defined to 8 in the CPU specific embOS internal header file OS_Priv.h.
    - Modification of this define requires recompilation of the embOS libraries. -
    2. -
-

Version 3.62

-
    -
  1. OS_TICK_Config() and OS_TICK_HandleEx() implemented
    - The extended embOS tick handler was modified to handle a runtime configurable tick increment and fractions.
    - These parameter are setup by the new OS_TICK_Config() function and may be re configured during runtime. -
    2. -
-

Version 3.60d

-
    -
  1. OS_POWER module implemented.
    - The OS_POWER module may be used to control different power saving modes when entering idle state.
    - Individual flags for different peripherals may be set whenever a peripheral needs power or clock, and may be reset, when power is not needed.
    - The state of the power flags may be examined during OS_Idle by a call of OS_POWER_GetMask().
    - This allows to switch off all of those peripherals which are not needed during idle times. -
    2. -
-

Version 3.60a

-
    -
  1. embOS trial versions may run an unlimited number of tasks.
    - The embOS trial versions run unlimited as long as only 3 tasks are created.
    - Since version 3.60a, a time limit is added to the trial version. During the first 15 minutes, an unlimited number of tasks can be created.
    - If more than three tasks were created during the time limit time, the system stops and calls OS_Error() when the time limit exceeded. -
    2. -
-

Version 3.60

-
    -
  1. OS_AddTickHook() and OS_RemoveTickHook() implemented.
    - These new functions allow the application to add and remove user function calls (hook functions) to the OS timer tick handler. -
    2. -
-

Version 3.52c

-
    -
  1. OS_SetTaskName() introduced
    - OS_SetTaskName() allows modification of task names on the fly.
    - This may be useful if the functionality of a task changes during runtime and the new state should be shown using embOSView or an other task visualization tool. -
    2. -
-

Version 3.52

-
    -
  1. OS_CallISR() and OS_CallNestableISR() introduced
    - These new functions are required for some specific CPUs, but may be used in general to call an interrupt handler function without the need of using OS_EnterInterrupt() / OS_LeaveInterrupt() in the handler function. -
    2. -
-

Version 3.50b

-
    -
  1. New library mode XR allows extremely compact applications
    - The new XR libraries may be used to build extremely compact applications to save space in RAM and ROM and speed up context switching time.
    - The XR embOS libraries are compiled with round robin scheduling disabled and task names disabled, which results in smaller data structures, smaller code size and faster context switching time. -
    2. -
-

Version 3.40c

-
    -
  1. OS_Yield() may suspend a task unconditionally
    - When tasks are running on round robin with timeslice, the function OS_Yield() can be used to end the timeslice of the running task immediately and activate an other task with the same priority which is ready for execution. - The function has no effect on tasks that are not running on round robin. -
    2. -
-

Version 3.40

-
    -
  1. Task switch time can be measured by application
    - embOS now comes with sample applications which allow accurate measurement of task switch time in a running application.
    -
    2. -
-

Version 3.32o

-
    -
  1. Automatic call of OS_INIT_SYS_LOCKS() removed.
    - During initialization of embOS, OS_INIT_SYS_LOCK() is not called automatically.
    - As most of the applications do not need thread safe system libraries, an automatic activation of syslocks causes unwanted overhead.
    - If supported and required, the user may call OS_INIT_SYS_LOCKS() from his own application after normal initialization of embOS.
    -
    2. -
-

Version 3.32m

-
    -
  1. OS_TimerEx, Extended timer implemented
    - Extended timers are software timers which call a user defined callback function when the timer expires.
    - In comparison to normal embOS timers, a parameter is passed to the timer callback function.
    - The parameter value is initialized during timer creation. -
    2. -
-

Version 3.32j

-
    -
  1. OS_CSemaRequest implemented
    - May be used to decrement a counting semaphore conditionally, if a signal is available.
    - The function never blocks the calling task and delivers a result which indicates whether the semaphore was available. -
    2. -
-

Version 3.32f

-
    -
  1. OS_INIT_SYS_LOCKS() implemented
    - May be used to include initialization code for thread safe system libraries.
    -
    2. -
-

Version 3.32d

-
    -
  1. OS_Q_GetPtrTimed() implemented
    - New queue retrieval function which waits for a message with specified timeout. -
    2. -
-

Version 3.32c

-
    -
  1. OS_EVENT_WaitTimed() implemented
    - New event object function to wait for an event with a timeout limit. -
    2. -
-

Version 3.32b

-
    -
  1. Task context modified for debug builds
    - The number of task activations is now part of the task context in debug builds.
    - The number of activations are therefore displayed in the task list window of embOS plugin, when an embOS debug library is used.
    - Previous versions of embOS showed this information in profiling builds only. -
    2. -
-

Version 3.32a

-
    -
  1. A parameter may be passed to a task function
    - Using the new embOS functions OS_CREATETASK_EX() or OS_CreateTaskEx() allows to pass a void pointer as parameter to a task. -
    2. -
-

Version 3.32

-
    -
  1. Event objects introduced
    - Event objects are standalone objects which are not assigned to a specific task.
    - Event objects may be used to synchronize one or multiple task to a specific event.
    - Events can be triggered from a task, a timer, or an interrupt handler. -
    2. -
-

Version 3.30a

-
    -
  1. embOS internal time handling modified to allow long delays
    - For 8- and 16-bit CPUs the maximum range for delays and timer periods is limited to 32767 embOS timer ticks, because time comparison ist done by integer calculation.
    - By recompiling sources with data type OS_TIME defined as signed long, longer delays and timer periods up to 2147483647 ticks can be realized.
    - The embOS libraries of object versions for 8- and 16-bit CPUs are still delivered with the limitation to 32767 timer ticks. -
    2. -
-

Version 3.28p

-
    -
  1. New error handling for version without round robin scheduling
    - In debug versions of embOS, OS_Error() is called with error code OS_ERR_TASK_PRIORITY, if a task is created with a priority which is already assigned to an other task.
    - OS_Error() is also called with the same error code, if a task priority is assigned by call of OS_SetPriority() and the new priority is already assigned to an other task.
    - Round robin switching can be disabled by recompiling sources with OS_RR_SUPPORTED defined as 0. -
    2. -
-

Version 3.28l

-
    -
  1. OS_SignalCSemaMax()
    - New counting semaphore handling function which specifies a maximum count value.
    - This allows counting semaphores used as binary semaphores. -
    2. -
-

Version 3.28i

-
    -
  1. OS_DeleteRSema()
    - New resource semaphore handling function allows to delete resource semaphores during runtime.
    -
    2. -
-

Version 3.28h

-
    -
  1. Additional error checks in debug builds of embOS
    - OS_CreateRSema() now generates an error, when the addressed resource semaphore was already created before.
    - OS_CreateCSema() now generates an error, when the addressed counting semaphore was already created before.
    - OS_CreateMB() now generates an error, when the mailbox was already created before.
    - OS_CreateTimer() now generates an error, when the software timer was already created before.
    - OS_MEMF_Create() now generates an error, when the addressed fixed size memory pool was already created before. -
    2. -
-

Version 3.28g

-
    -
  1. OS_GetSuspendCnt()
    - New info function to examine suspension state and count of a task. -
    2. -
-

Version 3.26

-
    -
  1. OS_Terminate() modified
    - Tasks may be terminated anytime, regardless of task state.
    - All resources claimed by the terminated task are automatically released. -
    2. -
-

Version 3.22a

-
    -
  1. OS_PutMailFront() / OS_PutMailFront1()
    - New mailbox functions to enable LIFO behavior of mailboxes. -

    2. -
  2. OS_PutMailFrontCond() / OS_PutMailFrontCond1()
    - New conditional mailbox functions to enable LIFO behavior of mailboxes. -
    3. -
-

Version 3.20

-
    -
  1. OS_Suspend() / OS_Resume() implemented -
    - New functions to suspend and resume tasks unconditionally.

    2. -
  2. Fixed size memory blocks implemented -
    - New functions to allocate fixed size memory blocks from embOS.

    3. -
  3. Dynamic memory allocation supported by embOS -
    - Thread safe dynamic memory allocation functions implemented.
    4. -
-

Version 3.10k

-
    -
  1. OS_GetMailTimed() -
    - New mailbox retrieving function with timeout.
    2. -
-

Version 3.10d

-
    -
  1. OS_GetpCurrentTimer() -
    - New info routine. May be used in timer callback routines to examine which - timer expired.

    2. -
  2. OS_GetpCurrentTask() -
    - New info routine. May be used to examine current running task.
    3. -
-

Version 3.10

-
    -
  1. Data format for communication with embOSView modified -
    - For terminal I/O in embOSView, the data format was changed. Therefore - embOSView V3.10 or later is required.

    2. -
  2. OS_WaitSingleEvent() -
    - Unmasked events remain unchanged when function returns.

    3. -
  3. OS_WaitSingleEventTimed() -
    - Unmasked events remain unchanged when function returns. Timeout for waiting - can be specified.
    4. -
-

Version 3.08a

-
    -
  1. Message Queue functionality enhanced -
    - OS_Q_GetPtrCond() function enables conditional request of data from Queue - without task suspension.
    - OS_Q_GetMessageCnt() functions delivers number of messages in the queue.
    2. -
-

Version 3.08

-
    -
  1. Message Queues -
    - Message queues enable intertask communication with messages of various - size.
    2. -
-

Version 3.06f

-
    -
  1. OS_Use now returns a value -
    - When using a resource semaphore with a call of OS_Use(), the actual usage - counter of the requested semaphore is returned as integer value. This - may be helpful for some applications and is a lot more efficient than - calling OS_Use() and then check the usage counter by calling OS_GetSemaValue().
    2. -
-

Version 3.06

-
    - All features of generic 3.06 kernel supported.

    -
- - - -

Improvements

-

Version 3.88e

-
    -
  1. Assertion into OS_Delayus() added.
    - The assertion checks if interrupts are enabled before calling this function.
    2. -
-

Version 3.88b

-
    -
  1. Internal data structure changed to efficiently access embOS version.
    2. -
-

Version 3.86e

-
    -
  1. OS_malloc(), OS_free(), OS_realloc() modified.
    - To allow thread safe heap management, OS_malloc() creates or uses a semaphore when called.
    - The new versions of OS_malloc(), OS_free() and OS_realloc() use the semaphore when called from tasks only. The semaphore is not needed, before embOS is started.
    2. -
-

Version 3.86b

-
    -
  1. Several macro definitions in RTOS.h modified to be compliant to MISRA rules.
    2. -
-

Version 3.84a

-
    -
  1. OSInfo now checks if OS_CPU is defined.
    - When compiling sources, the value of OS_CPU is now checked and has to be defined, it should not be empty.
    - The value of OS_CPU reflects the CPU variant which was selected to build the embOS library and is shown in the sytem information window when using embOSView.
    - Previous versions of embOS did not check if this value was defined. -
    2. -
-

Version 3.82u

-
    -
  1. Software timer handling optimized.
    - The software timer handler was removed form the scheduler and put into a separate module.
    - If software timer are not used by the application, the software timer handler will not be linked in, thus reducing the required kernel code size. -
    2. -
  2. Generic timer tick handler modified.
    - The preprocessor conditional defines which guarantee safe code for processors which can not perform atomic 32bit calculations or pointer operations was modifed.
    - This is an internal modification which has no effect on any current embOS port. -
    3. -
-

Version 3.82s

-
    -
  1. Nestable interrupt handling improved.
    - Some embOS functions might have inhibited re-enabling of interrupts when a nestable interrupt was called during task suspension caused by the function.
    - The following API functions were affected and have been modified to correct this behavior:
    - OS_WaitEvent()
    - OS_WaitEventTimed()
    - OS_WaitSingleEvent()
    - OS_WaitSingelEventTimed()
    - OS_MEMF_AllocTimed()
    - OS_Yield()
    -
-

Version 3.82r

-
    -
  1. Thread local storage handling improved.
    - For embOS ports which support thread local storage, the task switch time was slightly increased, even for tasks which did not use thread local storage.
    - The implementation of thread local storage now is improved and does not affect the context switch time of tasks which do not use thread local storage. -
    2. -
  2. OS_TLS_Init() contains a new assertion.
    - OS_TLS_Init() must not be called multiple times from the same task.
    - In debug builds of embOS, the new implementation of OS_TLS_Int() now calls the OS_Error() function with error code OS_ERR_TLS_INIT when OS_TLS_Init() is called multiple times from the same task. -
    3. -
  3. OS_Terminate() contains a new assertion.
    - OS_Terminate() must not be called from an embOS software timer callback function.
    - In debug builds of embOS, the new implementation of OS_Terminate() now calls the OS_Error() function with error code OS_ERR_ILLEGAL_IN_TIMER when OS_Terminate() is called from an embOS timer. -
    4. -
  4. OS_ExtendTaskContext() contains a new assertion.
    - For every task, the context can be extended only once.
    - In debug builds of embOS, the new implementation of OS_ExtendTaskContext() now calls the OS_Error() function with the new error code OS_ERR_EXTEND_CONTEXT when OS_ExtendTaskContext() is called multiple times from the same task. -
    5. -
-

Version 3.82q

-
    -
  1. OS_EnterNestableInterrupt() optimized to reduce interrupt latency.
    - OS_EnterNestableInterrupt() caused some interrupt latency for zero latency interrupts when an embOS debug library was used.
    - Only CPUs which disable interrupts on interrupt entry were affected, for example Renesas M16C / M32C.
    - OS_EnterNestableInterrupt() for those CPUs was optimized to reduce the interrupt latency of high priority interrupts. -
    2. -
-

Version 3.82p

-
    -
  1. OS_Suspend() now contains an assertion
    - OS_Suspend() must not be called from an interrupt handler as it could cause a task switch immediately.
    - In debug versions of embOS, OS_Suspend() now runs into OS_Error() if called from an interrupt handler or timer. -
    2. -
  2. OS_PutMail functions parameter declaration changed.
    - The functions OS_Putmail(), OS_PutMailCond, OS_PutMailFront() and OS_PutMailFrontCond() now have a const pointer qualifier for the data that shall be put into the mailbox.
    - The const qualifier clarifies and ensures that the data is not modifed by the function. -
    3. -
-

Version 3.82k

-
    -
  1. Queue management optimized.
    - Previous versions of embOS needed 2 integer words of mamangement information stored into the queue buffer for every data item in the queue.
    - With verion 3.82k, the data management was optimized and only one additional integer word, the data size, is stored into the buffer together with the data. -
    2. -
-

Version 3.82i

-
    -
  1. OS_StartTimer() modified to avoid warnings under GCC when compiling sources.
    - When compiling sources with optimization under GCC, the code in OS_StartTimer() generated a "strict alias violation" warning.
    - Some casts were removed and one pointer type was modified to eliminate this warning. -
    2. -
-

Version 3.82e

-
    -
  1. Stack overflow check for system stack and interrupt stack added.
    - In stack check builds, embOS now checks the system stack and the interrupt stack (if present) during every call of the scheduler.
    - If a stack overflow is detected, the error handler OS_Error() is called with one of the new error codes OS_ERR_SYS_STACK or OS_ERR_INT_STACK. -
    2. -
-

Version 3.82d

-
    -
  1. Variable type changed to avoid GCC warnings
    2. -
  2. Changes in OS_Global initialization to avoid GCC warnings.
    3. -
-

Version 3.82c

-
    -
  1. Initialization of OS_Global in OSGlobal.c changed to avoid GCC warnings. -
    2. -
  2. The definition OS_MODEL was moved from OS_RAW.h to OSINFO.c because CPU name and library name will now be placed in OS_Priv.h. -
    3. -
-

Version 3.82b

-
    -
  1. Communication functions for embOSView may be used from tasks.
    - The embOS internal communication functions for embOSView, OS_OnRx() and OS_OnTx() may now be called from a task.
    - Previous versions of embOS did not allow calling these functions from outside an interrupt handler and called OS_Error() in debug builds.
    - Right now, theses functions and the communication protocol are not documented. The user should not call these functions.
    - The modification was done for future extensions. -
    2. -
-

Version 3.80i

-
    -
  1. Resource semaphore handling speed optimized.
    - OS_Use() and OS_Unuse() were optimized to allow faster locking and unlocking on rersource semaphores.
    - The embOS scheduler was optimized to allow faster activation of tasks waiting on resources semaphores. -

    2. -
  2. Support for CPUs with growing stack addresses supported.
    - To handle CPUs with growing stack addresses, OS_CreateTask() and OS_CreateTaskEx() were modified. - The compile time switch OS_STACK_AT_BOTTOM is now honored by these functions and stack is handled correctly for those CPUs.
    - Existing embOS version are not affected, this modification was made for newer versions for CPUs with growing stack addresses. -

    3. -
-

Version 3.80g

-
    -
  1. embOS internal semaphores can be shown with the embOS plugin for IAR C-Spy.
    - The embOS plugin for IAR did not show the system locking semaphores used for malloc and other non re-entrant system functions when no other resource semaphores were used in the application.
    - These semaphores can be now be seen in the Resource semaphore window of the embOS C-Spy plugin. -

    2. -
-

Version 3.80

-
    -
  1. OS_Suspend() / OS_Resume() optimized.
    - The OS_Suspend() and OS_Resume() functions were optimized to perform faster task switches on 32bit CPUs. -

    2. -
  2. Internal data structures and scheduler optimized.
    - Internal data structures were modified to allow more efficient access. Together with a modification of the scheduler, this results in faster task switches and interrupt handling. -

    3. -
  3. OS_InitKern() does not enable interrupts.
    - The previous OS_InitKern() function enabled interrupts by a call of OS_RestoreI(), thus enabling interrupts, as long as OS_IncDI() was not called before.
    - The new OS_InitKern() function does not automatically enable interrupts. The interrupt enable state remains unchanged. -

    4. -
-

Version 3.62c

-
    -
  1. New error code OS_ERR_IDLE_RETURNS
    - The debug version of embOS now checks whether OS_Idle() returns in which case OS_Error() is called with the new error code.
    - OS_Idle() has to be implemented as an endless loop and must never return. If OS_Idle() is modified and returns by accident, the behavior is unpredictable and this error might be difficult to find.
    - The new version of embOS now catches a return from OS_Idle() and calls OS_Error(). -
    2. -
-

Version 3.62b

-
    -
  1. New error code OS_ERR_ISR_NO_HANDLER
    - The new error code is generated and OS_Error() is called, if an un-initialized interrupt handler is called.
    - This error handling is available on some ports of embOS, especially those, where embOS initializes an interrupt vector table in RAM.
    - During initialization, a default dummy handler is installed for all interrupt sources. This handler should normally be replaced by installing application specific interrupt handlers.
    - Because the default dummy interrupt handler should never be called by an application, it calls OS_Error() with the new error code OS_ERR_ISR_NO_HANDLER to signal the setup error. -
    2. -
-

Version 3.62

-
    -
  1. Internal representation of scheduler states modified.
    - The states which control pending task switches and show the reason of the task switch are handled in compact structure now.
    - The previous version used bit fields and definitions which were difficult to understand and which were difficult to handle.
    - The new definition and structure is easier to handle which results in faster code execution. -
    2. -
-

Version 3.60e

-
    -
  1. OS_ERR_WRONG_STACK error code added.
    - Some ports of embOS for CPUs with different stack pointers require that the CPU enters main() with a specific stack selected.
    - These ports of embOS now contain code to examine the stack used in main and call OS_error() with the new error code OS_ERR_WRON_STACK, if the startup code entered main with the wrong stack-pointer selected. -
    2. -
-

Version 3.60c

-
    -
  1. OS_ASSERT_INIT_CALLED()
    - A new assertion is added which checks whether OS_InitKern() was called before tasks are created.
    - In debug builds, the OS_Error() function will be called, if tasks are created before calling OS_InitKern(). -

    2. -
  2. OS_GetTaskName() modified.
    - In previous versions, OS_GetTaskName() had to be called with a valid task ID. Now, the NULL pointer may be passed as argument to address the current task.
    - The function will always return a valid string.
    - The previous implementation might have returned a NULL pointer, which could cause problems, if the result was not evaluated be the calling function. -
    3. -
-

Version 3.60b

-
    -
  1. OS_ASSERT_ISR_LEVEL()
    - A new assertion was defined which will call OS_Error() if the CPU runs in interrupt mode but OS_EnterInterrupt() or OS_EnterNestableInterrupt() was not called.
    - With version 3.60b the assertion is not implemented, it is just defined and usage is prepared. The implementation will be made in future versions of embOS. -
    2. -
-

Version 3.60

-
    -
  1. OS_GetVersion() implemented as function
    - OS_GetVersion() may be used by the application to retrieve the embOS library version. The result may be used to verify whether the library version matches the embOS header file RTOS.h. -
    2. -
-

Version 3.52e

-
    -
  1. All embOS variables located in one module.
    - All embOS variables are located in one module now. In previous versions of embOS, some module specific embOS variables were located in the module they were used for. -
    2. -
-

Version 3.52

-
    -
  1. OS_TickHandler() and OS_TickHandler_Ex() removed.
    - These two functions are obsolete, because they can be replaced by OS_HandleTick() and OS_HandleTick_EX(), if OS_EnterInterrupt() / OS_LeaveInterrupt is used in the interrupt handler. -
    2. -
-

Version 3.50c

-
    -
  1. OS_GetTime32() optimized for 32bit CPUs
    - For 32bit CPUs, OS_GetTime32() is now automatically replaced by an efficient macro which delivers value of the embOS internal time variable.
    - In previous versions of embOS, a function was called, when it was not over-written in the CPU specific part of the OS header file. -
    2. -
-

Version 3.50b

-
    -
  1. Internal optimizations
    - Some internal optimizations were performed to optimize task switching time and interrupt latencies. -
    2. -
-

Version 3.50b

-
    -
  1. Internal optimizations
    - Some internal optimizations were performed to optimize task switching time and interrupt latencies. -
    2. -
-

Version 3.50

-
    -
  1. Scheduler optimized
    - The embOS scheduler was optimized to reduce task switching time and interrupt latencies.
    -
    2. -
-

Version 3.40d

-
    -
  1. OS_Yield() now writes an entry into the trace buffer
    - When using the debug library with trace capabilities, OS_Yield() writes an entry into the trace buffer which shows the function call and the calling task.
    - embOSView version 3.40d is required to show this entry. -
    2. -
-

Version 3.40b

-
    -
  1. Queue management improved.
    - For some CPUs, the buffer start address for Queues has to be aligned. - Now embOS automatically corrects the alignment, if required. -
    2. -
-

Version 3.40a

-
    -
  1. Counting semaphores improved.
    - The counters of counting semaphores are now integer values.
    - Error handling is also improved. When a counting semaphore overflows, the embOS error handler OS_Error() is called in debug builds. -
    2. -
-

Version 3.40

-
    -
  1. Task switch time improved.
    - Scheduling optimized to improve task switch time. -

    2. -
  2. Task switch time improved for task events.
    - Task event handling modified to improve task switch time for tasks waiting on events. -

    3. -
  3. Interrupt latency improved.
    - During task switch, the time period when interrupts are disabled is reduced. -

    4. -
  4. embOS timer tick handler improved.
    - The standard timer tick handler run faster now. The embOS internal time variable is incremented by 1 on every timer tick.
    - When different increments are required, the new timer tick handler OS_HandleTick_Ex(), OS_TickHandler_Ex() or OS_HandleTickDI_Ex() have to be used by application.
    - Different increments may be configured by a call of OS_CONFIG(). -
    5. -
-

Version 3.32i

-
    -
  1. Task switch to OS_Idle() modified.
    - The call of OS_Idle() from OS_ChangeTask can be overwritten (inhibited) by defining the macro OS_IDLE() which is normally defined as OS_Idle().
    - This allows task switching via an exception for specific CPU/compiler versions. -
    2. -
-

Version 3.32g

-
    -
  1. Pointer comparison improved for fixed size memory pools (OS_MEMF module).
    - Some compiler produced wrong pointer comparison code in far memory model.
    - For specific CPU/compiler versions, the new OS_POINTER_TO_VALUE() function was introduced to deliver correct results in pointer comparison. -
    2. -
-

Version 3.28n

-
    -
  1. embOS round-robin scheduling may be disabled.
    - Round-robin scheduling may be disabled by recompiling sources with OS_RR_SUPPORTED defined as 0.
    - This will save some bytes of RAM and ROM and may make sense for small CPUs. -
    2. -
-

Version 3.28g

-
    -
  1. embOS scheduling simplified
    - Task activation and deactivation on "waitable objects" as mailboxes, semaphores, events, fixed size memory blocks now all use the same scheduling method.
    - This modification saves ROM and RAM and makes scheduler easier to understand and to maintain.
    - Applications which accessed internal data structures of waitable objects directly have to be modified. -
    2. -
-

Version 3.24

-
    -
  1. Stack check performance increased
    - Stack check now runs much faster on 32- and 16-bit target CPUs. -
    2. -
-

Version 3.10q

-
    - OS_CreateTask now initializes profiling variables. (Required if TCB is used multiple times) -
-

Version 3.06

-
    - First version. None. -
- - - -

Program corrections

-

Version 3.90a

-
    -
  1. OS_TerminateTask() corrected.
    - Terminating a task which was suspended by OS_SendString(), ended in a call of OS_Error() later on when the transmission interrupt of the embOSView communication tried to re-activate the non-existing task.
    - OS_TerminateTask() was modified to avoid this problem. When terminating such task, the control variables for embOSView communication are set to not activate that task.
    - The problem existed in all previous embOS versions and is fixed with version 3.90a. -
    2. -
-

Version 3.88g

-
    -
  1. OS_Q_Clear() corrected.
    - OS_Q_Clear() did not activate tasks which were waiting on the queue. -
    2. -
-

Version 3.88f

-
    -
  1. Internal const variable definition corrected.
    -
    2. -
-

Version 3.88e

-
    -
  1. Internal function prototype corrected.
    - Function prototype in trace modul corrected.
    - With the incorrect function prototype some embOS ports did not build without compiler error. -
    2. -
-

Version 3.88d

-
    -
  1. Compatibility macros to older versions added.
    - In version 3.88c, some compatibility macros to address internal veriables were removed from RTOS.h.
    - With version 3.88d, the following macros are available again:
    - OS_pTask, OS_pCurrentTask, OS_pActiveTask, OS_pTimer, OS_pCurrentTimer, OS_Counters, OS_Pending, OS_TimeDex
    2. -
-

Version 3.88a

-
    -
  1. embOS software timer handling corrected.
    - During software timer handling, a NULL-pointer might have been de-referenced.
    - On targets with MMU, this caused an exception when memory at address 0x0 was not enabled.
    - The problem existed since version 3.86g of embOS and is fixed with version 3.86n. -
    2. -
-

Version 3.86n

-
    -
  1. embOS heap management functions corrected.
    - Locking the heap by a resource semaphore must not be controlled by OS_IsRunning(). - The previous implementation did not use (and initialize) the semaphore as long as embOS was not started.
    - This caused a problem when data was allocated during main(), without semaphore, but released from a task, which then addressed the semaphore which did not exist.
    - When OS_malloc() was not called from main(), the problem did not occur.
    - The problem existed since version 3.86e of embOS and is fixed with version 3.86n. -
    2. -
-

Version 3.86m

-
    -
  1. embOS scheduler corrected.
    - The scheduler failed when a task which was suspended and on timeout reached its timeout and at the same moment during execution of the scheduler, - a higher priority task was activated by an interrupt.
    - The higher priority task was put in ready state, but was not started.
    - The problem existed in all previous embOS versions and is fixed with version 3.86m. -
    2. -
  2. OS_TerminateTask() corrected.
    - Setting OS_pActiveTask, the pointer to the task to activate next, has to be an atomic operation.
    - To ensure atomic operation, interrupts have to be disabled before setting OS_pActiveTask when OS_PTR_OP_IS_ATOMIC is defined to 0. - This was not handled correctly in previous versions of embOS and might have caused problems with CPUs which can not write pointer values as atomic operation. - Most likely, all 32bit CPUs can write a pointer value as an atomic operation. The problem might have occured on those 16- or 8-bit CPUs which can not. - The problem is fixed with version 3.86m. -
    3. -
  3. Internal function OS_InsertTask() corrected. - Insertion of a task into the linked list of tasks has to use atomic operations, when the next pointer of the previous task is updated to point to the new task that shall be inserted.
    - The corrected version disables interrupts before the next pointer of the previous task is updated, when OS_PTR_OP_IS_ATOMIC is defined to 0.
    - This was not handled correctly in previous versions of embOS and might have caused problems with CPUs which can not write pointer values as atomic operation, - when tasks were created dynamically when embOS was already started, or OS_SetPriority() was called after starting embOS. - Most likely, all 32bit CPUs can write a pointer value as an atomic operation. The problem might have occured on those 16- or 8-bit CPUs which can not. - The internal function OS_InsertTask() is called during task creation or OS_SetPriority().
    -
    4. -
  4. Definition of OS_VERSION corrected. - The definition of OS_VERSION was modified with version 3.86l of embOS to comply to MISRA rules.
    - As long as OS_VERSION was used internally in embOS, no problem occured.
    - Unfortunately, when user software tried to evaluate OS_VERSION for comparison, the expression could not be evaluated, compilation stopped with errors. - The problem exsisted in version 3.86l of embOS only and is fixed with version 3.86m. -
    5. -
-

Version 3.86l

-
    -
  1. Assertions in OS_AddTickHook() corrected.
    - The function OS_AddTickHook() must not be called from interrupt handlers. It may be called from main() or tasks only.
    - Previuos versions of embOS did not detect when this function was called from an ISR.
    - With embOS version V3.86l, OS_Error() is called in debug builds when the function is called from an ISR handler. -
    2. -
-

Version 3.86i

-
    -
  1. OS_EnterNestableInterrupt() modified.
    - When embOS was compiled with optimization using IAR RX compiler the execution of the incrementation of region counter was delayed in OS_EnterNestableInterrupt().
    - The new macro OS_IntEnterRegion is now used in OS_EnterNestableInterrupt().
    - This macro can be overwritten in the cpu/compiler specific header file with OS_EnterRegionFunc() to avoid that interrupts are enabled before the region counter is incremented. -
    2. -
-

Version 3.86h

-
    -
  1. OS_EVENT handling with timeout corrected.
    - Previous versions of embOS lost an event when tasks were waiting on the event by a all of OS_EVENT_WaitTimed() and the event was signaled after the timeout expired.
    - When the waiting tasks were not activated by the scheduler when the timeout expired, which might have happened, when an other task ran in a critical region, a following call of OS_EVENT_Set() did not signal the event, so the event got lost.
    - The waiting tasks reported a timeout when they continued execution.
    - The problem existed in all revious versions of embOS and is fixed with version 3.86h. -
    2. -
-

Version 3.86f

-
    -
  1. OS_ERR_TIMESLICE removed
    - Previous versions of embOS called the error handler OS_Error() with error code OS_ERR_TIMESLICE, when a task with a timeslice value of 0 was created.
    - Now, a timeslice value of zero is legal. It allows pure cooperative scheduling between tasks with th esame priority as described in the generic manual, chapter 4.
    - The OS_ERR_TIMESLICE assertion was introduced with embOS version 3.82n and is removed with version 3.86f. -
    2. -
-

Version 3.86e

-
    -
  1. Stack info functions for release build corrected
    - The API function macros were not defined properly in the release build.
    - When used in an application with relase build, the following functions generated compiler errors and could not be used: -
    OS_GetSysStackBase() -
    OS_GetSysStackSize() -
    OS_GetSysStackSpace() -
    OS_GetSysStackUsed() -
    OS_GetIntStackBase() -
    OS_GetIntStackSize() -
    OS_GetIntStackSpace() -
    OS_GetIntStackUsed() -
    The problem existed since embOS version 3.84 and is fixed with version 3.86e -
    2. -
-

Version 3.86d

-
    -
  1. Timeout handling for waitable objects corrected
    - When the timeout had already expired when the wait function with timeout was called, the function came back with interrupts disabled. - This might have happened when other tasks with higher priority or interrupts blocked the calling task right after calling a wait functing. - The application might have been kept blocked for ever when the calling task did not call any other function which re-enabled interrupts by OS_RestoreI(). - The problem existed in embOS versions since version 3.86 and is fixed with version 3.86d. -
    2. -
-

Version 3.86c

-
    -
  1. Missing prototype for OS_EnterRegionFunc() added
    2. -
-

Version 3.86a

-
    -
  1. Queue handling corrected.
    - When OS_Q_PutBlocked() was used in an application, OS_Purge() called from a lower priority task might have ended in an endless loop.
    2. -
-

Version 3.86

-
    -
  1. Support for task events with timeout corrected
    - Previous versions of the functions OS_WaitEventTimed() and OS_WaitSingleEventTimed() limited the number of task events to 8, even when the definition of the type OS_TASK_EVENT was defined to a larger data type.
    - Because of an error in an internal function, task events were truncated to 8 bit, regardless the definition of OS_TASK_EVENT.
    - The problem existed in all previous versions of embOS and is fixed with version 3.86 -
    2. -
-

Version 3.84c

-
    -
  1. OS_Q_Put() corrected.
    - OS_Q_Put() existed twice in embOS generic sources V3.84b. -
    2. -
-

Version 3.82w

-
    -
  1. Resource semaphore handling corrected.
    - On 8 or 16 bit CPUs with high interrupt load, the scheduler might have failed when an interrupt occured during a resource semaphore with waiting tasks was released by a call of OS_Unuse().
    - This happened on CPUs which could not perform atomic pointer or 32bit operations.
    - The system might have crashed, or might not have activated tasks with higher priority.
    - The problem existed in all embOS versions since version 3.80i and is corrected with version 3.82w.
    - Usage of OS_UseTimed() might have caused the same problems on all CPUs when the timeout expired during the resource semaphore was freed and waiting tasks were activated from another task by calling OS_Unuse(). -
    2. -
-

Version 3.82s

-
    -
  1. OS_WaitCSemaTimed() corrected
    - The function might have blocked a task longer than expected.
    - This happened when the task was restarted during the timeout by a semaphore signal and the semaphore was not available for the task, because it was claimed by a higher prioritized task during task activation.
    - In this case, the task was suspended again with the initial full timeout value.
    - The problem existed in all previous versions fo embOS and is corrected with version 3.82s. -
    2. -
-

Version 3.82m

-
    -
  1. Queue management corrected.
    - Queue management failed when the Q-buffer was filled up to the end. This might have happened, when messages are produced faster then they were consumed.
    - The OS_Q_Purge() and OS_Q_Put() functions did not handle this case correctly and caused the queue to be corrupted.
    - OS_Error() might have been called with error number 143, or OS_Q_GetPtr() might have returned with a wrong message size or a message size of 0.
    - The problem existed since version 3.82k of embOS and is fixed with version 3.82m. -
    2. -
-

Version 3.82k

-
    -
  1. Queue management corrected.
    - Queue mamagement failed when multiple producer put data into the same queue and one of the producer was an ISR handler.
    - When the ISR handler was called during a running transfer into the queue, the data in the queue could be corrupted.
    - The problem existed in all previous versions of embOS and is fixed with version 3.82k. -
    2. -
-

Version 3.80k

-
    -
  1. Trace functions corrected.
    - The previous version of embOS intoduced a bug in the trace module. Task names were not shown and the task sensitive filter did not work.
    - The problem existed in version 3.80i in trace libaries only and is corrected in version 3.80k. -
    2. -
-

Version 3.62c

-
    -
  1. OS_GetPriority() corrected.
    - In OS_GetPriority() was called with NULL as paramter, the debug version of embOS called OS_Error() with error code OS_TASK_INV.
    - The NULL pointer is allowed now and the function delivers the priority of the running task as described in the documentation.
    - This error existed in all previous versions of embOS and is fixed with version 3.62c. -
    2. -
-

Version 3.60e

-
    -
  1. OS_EVENT_Create() corrected.
    - OS_EVENT_Create() might have called the error-handler OS_Error() with errorcode OS_ERR_2USE_EVENTOBJ if an event-object was created dynamically or as a local object in a function.
    - This happened, if the un-initialized data area of the event object contained one specific byte (id code) of the event object.
    - The problem existed in all previous embOS versions and is fixed with version 3.60e. -

    2. -
  2. embOSView corrected.
    - When the update interval of embOSView was set to 200ms or a longer value, the reaction of user input or mouse events was blocked for the same time.
    - The problem existed since version 3.32 of embOSView and is fixed with version 3.52b. -
    3. -
-

Version 3.52b

-
    -
  1. OS_SendString() corrected.
    - When sending an empty string, the calling task was suspended forever.
    - The problem existed in all previous embOS versions and is fixed with version 3.52b. -

    2. -
  2. embOSView corrected.
    - When the update interval of embOSView was set to 200ms or a longer value, the reaction of user input or mouse events was blocked for the same time.
    - The problem existed since version 3.32 of embOSView and is fixed with version 3.52b. -
    3. -
-

Version 3.52a

-
    -
  1. OS_Terminate() for XR-build corrected.
    - OS_Terminate() in XR-builds might have failed and the system stuck in an endless loop.
    - All other library modes were not affected. -
    2. -
-

Version 3.50a

-
    -
  1. System stack check corrected
    - The system stack check failed in the case the system stack grows from lower addresses to higher addresses.
    - In this case, the system stack was not correctly filled with the stack check pattern.
    - The problem existed for embOS for PIC only and is fixed with version 3.50a. -
    2. -
-

Version 3.40d

-
    -
  1. OS_Suspend() corrected
    - When using the debug library with trace capabilities, a call of OS_Suspend() wrote a wrong trace code into the trace buffer.
    - Instead of writing the code for task suspension, the code for task termination was written.
    - The function itself worked correctly, only the data written into the trace buffer was wrong.
    - The problem existed in all previous embOS versions and is fixed with version 3.40d. -
    2. -
-

Version 3.32o

-
    -
  1. OS_Unuse() corrected
    - OS_Unuse() must not be called from a task that does not claim the resource semaphore.
    - According to the documentation, the debug build of embOS should generate a call to OS_Error() if this fault happens.
    - All previous versions of embOS did not call OS_Error(). - Now, OS_Error() will be called in that situation with error code 156: OS_ERR_RESOURCE_OWNER(). -
    2. -
-

Version 3.32l

-
    -
  1. OS_EVENT_Delete() corrected
    - OS_EVENT_Delete() did not work correctly. OS_LeaveRegion() was called inside the function without calling OS_EnterRegion() before.
    - In debug builds of embOS, the error-handler OS_Error() was called with error 151 (OS_ERR_LEAVEREGION_BEFORE_ENTERREGION).
    - In release builds the system was blocked because the underflow of region count inhibits all further task switches, or system crashes, because incrementing the region count the next time allows task switches instead of blocking them. - The problem existed in all previous versions and is fixed with version 3.32l. -

    2. -
  2. Round-robin task switching corrected.
    - Round robin task switching did not work correctly in previous version. A task which was blocked for some reason could be activated. The system crashed during task switch.
    - The problem existed since version 3.32j and is fixed with version 3.32l. -
    3. -
-

Version 3.32k

-
    -
  1. Handler function _OS_OnTx() for serial communication to embOSView corrected.
    - The transmission handler for communication with embOSView might have sent incorrect data to embOSView, because internal control state was updated after sending the data.
    - The problem occurred on a new embOS port for a specific CPU only and is fixed with version 3.32k.
    -
    2. -
-

Version 3.32h

-
    -
  1. OS_Error() was required in release build when resource semaphores were used.
    - When using release build libraries and resource semaphores, the embOS error handler OS_Error() was required and the file OS_Error.c had to be compiled and linked in a project.
    - The problem existed since version 3.28i of embOS and is fixed with version 3.32h. -
    2. -
-

Version 3.32e

-
    -
  1. OS_GetMessageCnt() corrected.
    - The type of the retun value of OS_GetMessageCnt() was an unsigned integer in release builds, but an integer in debubg builds.
    - This was corrected to return an unsigned integer in all builds.
    - The problem existed in all previous versions of embOS end is fixed with version 3.32e. -
    2. -
-

Version 3.32a

-
    -
  1. embOSView corrected.
    - embOSView sometimes showed wrong task state "Terminated" for tasks which were not terminated.
    - This bug existed in all previous versions of emBOSView and is fixed with version 3.32a. -
    2. -
-

Version 3.30d

-
    -
  1. OS_MEMF_Create() corrected.
    - Alignment check of buffers for fixed size memory blocks did not work correctly in debug libraries of embOS.
    - OS_Error() was called during OS_MEMF_Create(), even though the memory pool buffers start address was correctly aligned.
    - This problem existed since embOS version 3.28m in all debug build libraries and is fixed with version 3.30d. -
    2. -
-

Version 3.30b

-
    -
  1. OS_Suspend() corrected.
    - OS_Suspend() did not work correctly, when an activated task with higher priority than the running task was suspended.
    - When the task with highest priority was suspended during system initialization before embOS was started, - embOS crashed during the call of OS_Start(), - or called the embOS error handler OS_Error() with error code OS_ERR_INV_TASK (128).
    - The same crash occurred, when the application was running in a critical region and a task with higher priority was activated, - but not started because of the critical region, and was then suspended by a call of OS_Suspend().
    - This problem existed in all previous embOS versions and is fixed with version 3.30b. -
    2. -
-

Version 3.28q

-
    -
  1. Problem with suspended tasks which were on delay fixed.
    - If a task which was on delay was suspended, the delay timer for that task was not handled.
    - This might have resulted in additional longer delay when the task was resumed later.
    - This problem existed in all previous embOS versions and is fixed with version 3.28q. -
    2. -
-

Version 3.28p

-
    -
  1. OS_Suspend() corrected.
    - OS_Suspend() did not work correctly, when the current task was suspended from within an interrupt handler, or from a critical region.
    - The application crashed, or called the embOS error handler OS_Error() with error code OS_ERR_INV_TASK (128).
    - As OS_Suspend() automatically enters a critical region in debug-trace builds, OS_Suspend() also failed, when it was called to suspend the current task in debug-trace builds of embOS.
    - This problem existed in all previous embOS versions and is fixed with version 3.28p. -

    2. -
  2. Alignment problems fixed for fixed size memory blocks
    - Some CPUs, mainly the 32bit RISC types, require aligned buffer start addresses for fixed size memory pools.
    - The debug version of embOS now checks alignment of buffer start address and data blocks in the buffer. - If data blocks and buffer start address is not aligned, an error is generated and embOS error handler is called during creation of a fixed size memory pool.
    - This problem existed in all previous embOS versions and is fixed with version 3.28m. -
    3. -
-

Version 3.28l

-
    -
  1. OS_MEMF_Free() added
    - The function OS_MEMF_Free() was not included in embOS libraries, but was documented in embOS users manual and was also declared in RTOS.h.
    - This problem existed in all previous embOS versions and is fixed with version 3.28l. -
    2. -
-

Version 3.28k

-
    -
  1. OS_MEMF_IsInPool() corrected
    - OS_MEMF_IsInPool() failed, if a pointer was checked which pointed to the first address after the memory pool. - This pointer was reported as belonging to the pool.
    - This problem existed in all previous embOS versions and is fixed with - version 3.28g. -
    2. -
-

Version 3.28g

-
    -
  1. OS_WakeTask() for trace build corrected
    - OS_WakeTask() in trace build disabled task switches.
    - This problem existed since version 3.24 and is fixed with - version 3.28g. -

    2. -
  2. OS_GetMailTimed() / mailbox handling corrected
    - During call of OS_GetMailTimed, interrupts were re-enabled too early. If a mail was just put into a mailbox and the timeout occurred at the same time, a mailbox internal control variables which managed waiting tasks was set to a wrong value.
    - This resulted in wrong mailbox handling and caused task waiting for mail kept suspended, even though, mail was available. - This problem existed in all previous versions of embOS and is fixed with version 3.28g. -
    3. -
-

Version 3.26a

-
    -
  1. OS_MEMF_Release() corrected
    - OS_MEMF_Release() might have failed according to absolute address of memory block.
    - The problem occurred because address calculation was done with 16bit integer value.
    - Calculation was modified to use 32bit values to fix the problem. -
    2. -
-

Version 3.20c

-
    -
  1. OS_GetMailTimed() corrected
    - OS_GetMailTimed() did not retrieve a mail after 256 calls, the waiting - task remained suspended. Corrected with version 3.20c of embOS.
    - This problem exists in all previous embOS versions and is fixed with - version 3.20c.
    2. -
-

Version 3.10r

-
    -
  1. OS_TASK structure definition modified -
    - Previous definition of OS_Task structure may cause linker warnings [w6] - and [w35] even though everything was correct.
    - The problem was caused by unions defined inside a structure.
    - OS_TASK definition was modified to avoid those linker warnings.
    2. -
-

Version 3.10q

-
    -
  1. OS_GetMail -
    - OS_GetMail functions corrected (interrupts disabled before call of _GetMail).
    2. -
    -
  2. OS_Terminate problem with RR -
    - OS_Terminate problem with RR tasks corrected. TimerTick could set RR/PP - pending between UNMARKTASK and OS_Switch. OS_Switch will then call OS_DoRR, - which could append OS_pCurrentTask (the one you want to terminate if e.g. - OS_Terminate(NULL)).
    3. -
-

Version 3.10n

-
    -
  1. Sample interrupt handler -
    - For embOS it is not legal to call OS_EnterInterrupt again after final - call of OS_LeaveInterrupt has been made. In the sample OS_irq_handler - shipped with embOS, there was a possible call of OS_EnterInterrupt after - OS_LeaveInterrupt. The sample OS_irq_handler implementation has been corrected.
    2. -
-

Version 3.06h

-
    -
  1. OS_Unuse error code corrected -
    - When calling OS_Unuse() more often than OS_Use(), the debug version generated - an OS_ERR_TASKLIST_CORRUPT error instead of OS_ERR_UNUSE_BEFORE_USE.
    - This problem exists in all previous embOS versions and is fixed with version - 3.06h.
    2. -
-

Version 3.06f

-
    -
  1. Round Robin Task Problem corrected -
    - In very specific situation it was possible that a round robin task got - 100%
    - of CPU time for round robin tasks instead of sharing that time with other
    - round robin tasks.
    2. -
- - - -

Release history

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
VersionRelease dateShort explanation
V4.0006. Jun 2014 - Tickless support added. -
V3.90a09. Apr 2014 - OS_TerminateTask() corrected. -
V3.9017. Feb 2014 - Functions to disable/enable global interrupts added. -
V3.88h20. Dec 2013OS_GetNumIdleTicks() added.
- OS_AdjustTime() added. -
V3.88g30. Oct 2013OS_Q_Clear() corrected.
V3.88f22. Sep 2013Internal const variable definition corrected.
V3.88e06. Sep 2013Internal function prototype corrected.
- Assertion into OS_Delayus() added. -
V3.88d04. Sep 2013Compatibility macros to older versions added.
-
V3.88c08. Aug 2013New API functions OS_InInterrupt(), OS_Q_PutTimed() added.
- Additional new profiling functionality
V3.88b28. May 2013Internal data structure changed.
V3.88a02. May 2013 - Event object handling enhanced.
- Mailbox message size enlarged.
- Timer handling corrected.
- Release notes corrected for V3.86m -
V3.8819. Feb 2013 - Fully tested with Parasoft C/C++test MISRA check.
-
V3.86n07. Dec 2012 - Problem with embOS heap management fixed.
-
V3.86m05. Dec 2012 - Scheduler corrected.
- Definition of OS_VERSION corrected. -
V3.86l21. Nov 2012 - MISRA rule compliance improved.
- OS_AddTickHook() corrected. -
V3.86k02. Oct 2012 - New embOS API functions OS_Q_GetMessageSize() and OS_Q_PeekPtr().
- embOS is now compliant to MISRA 2004 rules. -
V3.86i26. Sep 2012 - OS_EnterNestableInterrupt() modified. -
V3.86h06. Sep 2012 - OS_EVENT handling with timeout corrected. -
V3.86g04. Aug 2012 - OS_RetriggerTimer() corrected. -
V3.86f25. Jul 2012 - Task events default to 32bit on 32bit CPUs.
- New OS_AddOnTerminateHook() function.
- OS_ERR_TIMESLICE removed. -
V3.86e29. May 2012 - OS_malloc(), OS_free(), OS_realloc() modified.
- Stack info functions corrected. -
V3.86d9. May 2012 - Timeout handling for waitable objectes corrected. -
V3.86c8. May 2012 - Missing OS_EnterRegionFunc() prototype added. -
V3.86b2. May 2012 - New API function OS_PeekMail()
- RTOS.h macro definitions modified. -
V3.86a30. Apr 2012 - Queue handling corrected.
-
V3.8622. Mar 2012 - New timeout handling for waitable objects.
- OS task events corrected. -
V3.84c05. Jan 2012 - OS_Q_Put() removed from OSQ.c. -
V3.84b21. Dec 2011 - New embOS API function OS_Q_PutBlocked(). -
V3.84a22. Nov 2011 - New compile-time check ensures, OS_CPU is defined when compiling sources. -
V3.8427. Sep 2011 - New stack check functions for system and interrupt stack. -
V3.82x12. Sep 2011 - OS_RegionCnt overflow check added.
- Macro OS_EnterInterrupt() modified. -
V3.82w10. Aug 2011 - GCC compiler warning eliminated.
- Code modified for Lint.
- Resource semaphore handling corrected. -
V3.82v15. Jul 2011 - OS_Terminate() renamed to OS_TerminateTask(). -
V3.82u25. May 2011 - Generic tick handler modified.
- Software timer handling improved. -
V3.82t03. May 2011 - Trial time limitation increased to 12 hours. -
V3.82s18. Mar 2011 - OS_UseTimed() implemented.
- Improvements
- Corrections. -
V3.82r28. Jan 2011 - TLS support improved. -
V3.82q18. Jan 2011 - OS_EnterNestableInterrupt() optimized. -
V3.82p12. Jan 2011 - OS_PutMail functions parameter qualifier modified. -
V3.82o04. Jan 2011 - New API function OS_WaitMailTimed() -
V3.82n06. Dec 2010 - New API functions for task suspension and synchronization. -
V3.82m16. Nov 2010 - Queue handling corrected. -
V3.82l26. Oct 2010 - TLS support added -
V3.82k21. Sep 2010 - Queue handling corrected.
- New API functions for queues and delay. -
V3.82i26. Jul 2010 - Warnings under GCC eliminated.
-
V3.82h28. May 2010 - Internal data types modified.
-
V3.82g12. May 2010 - OS_Start() modified.
-
V3.82f16. Apr 2010 - New function OS_IsRunning() implemented. -
V3.82e17. Dec 2009 - Stack check for system and interrupt stack added. -
V3.82d16. Dec 2009 - Variable type changed to avoid GCC warnings
- Changes in OS_Global initialization to avoid GCC warnings. -
V3.82c18. Nov 2009 - Changes in OS_Global initialization to avoid GCC warnings.
- Definition OS_MODEL moved from OS_RAW.h to OSINFO.c. -
V3.82b28. Oct 2009 - Communication to embOSView modified. -
V3.82a25. Sep 2009 - Error handling for queues implemented.
- OS_Q_IsInUse() implemented. -
V3.8217. Sep 2009 - Scheduling optimized. -
V3.80l07. Sep 2009 - New Macros OS_U32_TO_PTR_TYPE() and OS_EI_HP_ON_ENTRY() added.
-
V3.80k02. Sep 2009 - Trace functions corrected.
-
V3.80i11. Aug 2009 - Optimized resource semaphore handling.
-
V3.80h27. Jul 2009 - Modified interrupt entry.
-
V3.80g05. Jun 2009 - Improved embOS plugin.
-
V3.80f03. Jun 2009 - Improved error handler.
-
V3.8014. Nov 2008 - Improved scheduler.
-
V3.62c24. Oct 2008 - OS_GetPriority() corrected.
- Additional error handling. -
V3.62a06. Oct 2008 - OS_STACK_ALIGN implemented. -
V3.6201. Sep 2008 - Tick handler modified. -
V3.60e25. Aug 2008 - OS_EVENT_Create() corrected. -
V3.60d28. Mai 2008 - OS_POWER module implemented. -
V3.60c24. Apr 2008 - OS_GetTaskName() improved. - OS_ASSERT_INIT_CALLED() added. -
V3.60b25. Jan 2008 - OS_ASSERT_ISR_LEVEL() defined. -
V3.60a25. Jan 2008 - Time limit for trial version added. -
V3.6018. Nov 2007 - System tick hook functions introduced. -
V3.52e12. Nov 2007 - Location of embOS variables modified. -
V3.52c17. Oct 2007 - OS_SetTaskName() introduced.
- OS_SendString() corrected.
- embOSView corrected. -
V3.52a03. Sep 2007 - OS_Terminate() in XR-builds corrected. -
V3.5217. Aug 2007 - OS_CallISR(), OS_CallNestableISR() introduced.
- OS_TickHandler(), OS_TickHandler_Ex() removed. -
V3.50c10. Aug 2007 - OS_GetTime32() optimized. -
V3.50b16. Jul 2007 - Task switching time and interrupt latencies improved. -
V3.50a12. Jul 2007 - System stack check for PIC corrected. -
V3.5010. Jul 2007 - embOS scheduler optimized. -
V3.40d05. Jul 2007 - OS_Suspend() corrected. -
V3.40c22. Jun 2007 - OS_Yield() implemented. -
V3.40b19. Jun 2007 - Queue handling improved. -
V3.40a05. Jun 2007 - Counting semaphores improved. -
V3.4008. May 2007 - Improvements. -
V3.32o19. Apr 2007 - OS_Unuse() error handling improved. -
V3.32n16. Apr 2007 - OS_SUSPEND_TASK_ON_TERMINATE implemented.
- Fixes a Windows bug which caused emBOS Simulation to crash. -
V3.32m02. Apr 2007 - OS_TimerEx implemented. -
V3.32l28. Mar 2007 - Round robin switching corrected. -
V3.32k21. Mar 2007 - Communication to embOSView modified. -
V3.32j31. Jan 2007 - OS_CSemaRequest() implemented. -
V3.32i26. Jan 2007 - Switch to OS_Idle() modified. -
V3.32h15. Jan 2007 - Error handling for resource semaphores corrected. -
V3.32g30. Dec 2006 - OS_PTR_TO_VALUE() added. -
V3.32f07. Dec 2006 - OS_INIT_SYS_LOCKS() added. -
V3.32e07. Nov 2006 - OS_GetMessageCnt() corrected. -
V3.32d05. Nov 2006 - OS_Q_GetPtrTimed() added. -
V3.32c22. Sep 2006 - OS_EVENT_WaitTimed() added. -
V3.32b18. Sep 2006 - Enhanced debug information. -
V3.32a04. Aug 2006Extended task implemented -
V3.3218. Jul 2006Event objects implemented
V3.30d20. Jun 2006OS_MEMF_Create() corrected
V3.30b18. May 2006New sources version 3.30b, OS_Suspend() corrected
V3.28p16. Feb 2006New error handling for version without round robin scheduling
V3.28i14. Oct 2005New embOS sources 3.28i with new function OS_DeleteRSema()
V3.28h29. Aug 2005New embOS sources 3.28h, Enhanced error checks
V3.28g23. Aug 2005New embOS sources 3.28g
V3.2425. Nov 2004New embOS sources 3.24
V3.20d22. Jan 2004New embOS sources V3.20, OS_GetMailTimed corrected
V3.10k13. Jan 2003Upgrade to new generic source V3.10k
V3.06f24. Oct 2001Upgrade to new generic source V3.06f
V3.0623. Jul 2001First version with release history
- - - -

Miscellaneous

-

This document was first released with version 3.06 of - the software.
- Software released earlier is documented internally. This information is - available at request. -

- -
-

-Copyright 2001-2014 SEGGER Microcontroller GmbH & Co. KG. All rights reserved.
-For more information, please visit our website www.segger.com or contact us at info@segger.com
-

- - diff --git a/3rd_party/embOS/Start/Inc/BSP.h b/3rd_party/embOS/Start/Inc/BSP.h index c72b9f61..15464ed0 100644 --- a/3rd_party/embOS/Start/Inc/BSP.h +++ b/3rd_party/embOS/Start/Inc/BSP.h @@ -1,17 +1,16 @@ /********************************************************************* -* SEGGER MICROCONTROLLER GmbH & Co KG * -* Solutions for real time microcontroller applications * +* SEGGER Microcontroller GmbH & Co. KG * +* The Embedded Experts * ********************************************************************** * * -* (c) 1995 - 2014 SEGGER Microcontroller GmbH & Co KG * +* (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG * * * -* www.segger.com Support: support@segger.com * +* Internet: segger.com Support: support_embos@segger.com * * * ********************************************************************** * * * embOS * Real time operating system for microcontrollers * * * -* * * Please note: * * * * Knowledge of this file may under no circumstances * @@ -22,7 +21,7 @@ * * ********************************************************************** * * -* OS version: 4.00 * +* OS version: 4.34.1 * * * ********************************************************************** @@ -32,7 +31,7 @@ Purpose : BSP (Board support package) -------- END-OF-HEADER --------------------------------------------- */ -#ifndef BSP_H /* avoid multiple inclusion */ +#ifndef BSP_H /* Avoid multiple inclusion */ #define BSP_H /********************************************************************* @@ -41,12 +40,6 @@ Purpose : BSP (Board support package) * ********************************************************************** */ -#define KEY_STAT_UP (1 << 0) -#define KEY_STAT_DOWN (1 << 1) -#define KEY_STAT_LEFT (1 << 2) -#define KEY_STAT_RIGHT (1 << 3) -#define KEY_STAT_BUTTON1 (1 << 4) -#define KEY_STAT_BUTTON2 (1 << 5) /* In order to avoid warnings for undefined parameters */ #ifndef BSP_USE_PARA @@ -59,7 +52,7 @@ Purpose : BSP (Board support package) /********************************************************************* * -* Functions +* Prototypes * ********************************************************************** */ @@ -72,61 +65,15 @@ extern "C" { * * General */ -void BSP_Init (void); -void BSP_SetLED (int Index); -void BSP_ClrLED (int Index); -void BSP_ToggleLED (int Index); -unsigned BSP_GetKeyStat (void); - -/********************************************************************* -* -* GUI -*/ -void BSP_GUI_Init(void); - -/********************************************************************* -* -* USB -*/ -void BSP_USB_Attach (void); -void BSP_USB_InstallISR (void (*pfISR)(void)); -void BSP_USB_InstallISR_Ex (int ISRIndex, void (*pfISR)(void), int Prio); -void BSP_USB_ISR_Handler (void); - -/********************************************************************* -* -* USBH -*/ -void BSP_USBH_InstallISR (void (*pfISR)(void)); -void BSP_USBH_Init (void); - -/********************************************************************* -* -* ETH -* -* Functions for ethernet controllers (as far as present) -*/ -void BSP_ETH_Init (unsigned Unit); -void BSP_ETH_InstallISR (void (*pfISR)(void)); -void BSP_ETH_InstallISR_Ex (int ISRIndex, void (*pfISR)(void), int Prio); -void BSP_ETH_ISR_Handler (void); - -/********************************************************************* -* -* CACHE -*/ -void BSP_CACHE_CleanInvalidateRange (void * p, unsigned NumBytes); -void BSP_CACHE_CleanRange (void * p, unsigned NumBytes); -void BSP_CACHE_InvalidateRange (void * p, unsigned NumBytes); - -/********************************************************************/ +void BSP_Init (void); +void BSP_SetLED (int Index); +void BSP_ClrLED (int Index); +void BSP_ToggleLED(int Index); #ifdef __cplusplus } #endif -/********************************************************************/ - #endif /* avoid multiple inclusion */ /****** End Of File *************************************************/ diff --git a/3rd_party/embOS/Start/Inc/JLINKMEM.h b/3rd_party/embOS/Start/Inc/JLINKMEM.h index 85f5459f..096bfc6a 100644 --- a/3rd_party/embOS/Start/Inc/JLINKMEM.h +++ b/3rd_party/embOS/Start/Inc/JLINKMEM.h @@ -1,17 +1,16 @@ /********************************************************************* -* SEGGER MICROCONTROLLER GmbH & Co KG * -* Solutions for real time microcontroller applications * +* SEGGER Microcontroller GmbH & Co. KG * +* The Embedded Experts * ********************************************************************** * * -* (c) 1995 - 2014 SEGGER Microcontroller GmbH & Co KG * +* (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG * * * -* www.segger.com Support: support@segger.com * +* Internet: segger.com Support: support_embos@segger.com * * * ********************************************************************** * * * embOS * Real time operating system for microcontrollers * * * -* * * Please note: * * * * Knowledge of this file may under no circumstances * @@ -22,7 +21,7 @@ * * ********************************************************************** * * -* OS version: 4.00 * +* OS version: 4.34.1 * * * ********************************************************************** @@ -35,12 +34,20 @@ Purpose : Header file for J-Link ARM communication using memory #ifndef JLINKMEM_H #define JLINKMEM_H // Avoid multiple inclusion +#ifdef __cplusplus +extern "C" { +#endif + void JLINKMEM_Process(void); void JLINKMEM_SetpfOnRx(void (* pf)(unsigned char Data)); void JLINKMEM_SetpfOnTx(void (* pf)(void)); void JLINKMEM_SetpfGetNextChar(OS_INT (* pf)(void)); void JLINKMEM_SendChar(unsigned char Data); +#ifdef __cplusplus +} +#endif + #endif // Avoid multiple inclusion /*************************** end of file ****************************/ diff --git a/3rd_party/embOS/Start/Inc/OS_Config.h b/3rd_party/embOS/Start/Inc/OS_Config.h index 056de18d..3710380e 100644 --- a/3rd_party/embOS/Start/Inc/OS_Config.h +++ b/3rd_party/embOS/Start/Inc/OS_Config.h @@ -1,17 +1,16 @@ /********************************************************************* -* SEGGER MICROCONTROLLER GmbH & Co KG * -* Solutions for real time microcontroller applications * +* SEGGER Microcontroller GmbH & Co. KG * +* The Embedded Experts * ********************************************************************** * * -* (c) 1995 - 2014 SEGGER Microcontroller GmbH & Co KG * +* (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG * * * -* www.segger.com Support: support@segger.com * +* Internet: segger.com Support: support_embos@segger.com * * * ********************************************************************** * * * embOS * Real time operating system for microcontrollers * * * -* * * Please note: * * * * Knowledge of this file may under no circumstances * @@ -22,13 +21,13 @@ * * ********************************************************************** * * -* OS version: 4.00 * +* OS version: 4.34.1 * * * ********************************************************************** ---------------------------------------------------------------------- File : OS_Config.h -Purpose : Configuration settings for the OS build and OS_VIEW +Purpose : Configuration settings for the OS build and embOSView -------- END-OF-HEADER --------------------------------------------- */ @@ -43,14 +42,14 @@ Purpose : Configuration settings for the OS build and OS_VIEW */ #ifndef DEBUG // Should be overwritten by project settings - #define DEBUG (0) // in debug builds + #define DEBUG (0) // in debug configurations #endif /********************************************************************* * -* Configuration for RTOS build and UART +* Configuration for RTOS build and embOSView communication * -* One of the following builds needs to be selected for both DEBUG and Release builds: +* One of the following builds needs to be selected for both Debug and Release configuration: * * OS_LIBMODE_XR Extremely small release build without Round robin * OS_LIBMODE_R Release build @@ -65,7 +64,7 @@ Purpose : Configuration settings for the OS build and OS_VIEW #define OS_LIBMODE_DP #else #define OS_LIBMODE_R - #define OS_VIEW_ENABLE (0) + #define OS_VIEW_IFSELECT OS_VIEW_DISABLED // embOSView communication is disabled per default in release configuration #endif /********************************************************************/ diff --git a/3rd_party/embOS/Start/Inc/RTOS.h b/3rd_party/embOS/Start/Inc/RTOS.h index ab0838a1..685c9f6b 100644 --- a/3rd_party/embOS/Start/Inc/RTOS.h +++ b/3rd_party/embOS/Start/Inc/RTOS.h @@ -1,17 +1,16 @@ /********************************************************************* -* SEGGER MICROCONTROLLER GmbH & Co KG * -* Solutions for real time microcontroller applications * +* SEGGER Microcontroller GmbH & Co. KG * +* The Embedded Experts * ********************************************************************** * * -* (c) 1995 - 2014 SEGGER Microcontroller GmbH & Co KG * +* (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG * * * -* www.segger.com Support: support@segger.com * +* Internet: segger.com Support: support_embos@segger.com * * * ********************************************************************** * * * embOS * Real time operating system for microcontrollers * * * -* * * Please note: * * * * Knowledge of this file may under no circumstances * @@ -22,7 +21,7 @@ * * ********************************************************************** * * -* OS version: 4.00 * +* OS version: 4.34.1 * * * ********************************************************************** @@ -30,6 +29,8 @@ File : RTOS.h Purpose : Include file for the OS, to be included in every C-module accessing OS-routines +Literature: + [1] ARM Processor Cortex-M7 (AT610) and Cortex-M7 with FPU (AT611) Software Developers Errata Notice (\\fileserver\Techinfo\Company\ARM\CPU\Cortex-M7 (Pelican)\cortex_m7_software_developers_errata_notice_r0_v4.pdf) NOTE : NONE OF THE DEFINITIONS IN THIS FILE MAY BE MODIFIED as long as embOS libraries are used. @@ -47,8 +48,8 @@ NOTE : NONE OF THE DEFINITIONS IN THIS FILE MAY BE MODIFIED * * Includes */ -#include // required for memset() etc. -#include // required for __disable_interrupt() etc. +#include // Required for memset() etc. +#include // Required for __disable_interrupt() etc. /********************************************************************* * @@ -61,18 +62,16 @@ NOTE : NONE OF THE DEFINITIONS IN THIS FILE MAY BE MODIFIED * * Configuration */ -#define OS_PORT_REVISION (0u) // Port specific revision +#define OS_PORT_REVISION (1u) // Port specific revision #define OS_PTR_OP_IS_ATOMIC (1) #define OS_U32_OP_IS_ATOMIC (1) -#define OS_GetTime() (OS_Time) -#define OS_GetTime32() (OS_Time) -#define OS_I32 int +#define OS_GetTime() (OS_Global.Time) +#define OS_GetTime32() (OS_Global.Time) +#define OS_I64 long long #define OS_SIZEOF_INT (4) // Size of integer in bytes -#define OS_BIG_ENDIAN (1 - __LITTLE_ENDIAN__) -#define OS_SUPPORT_SYSSTACK_INFO (1) // Option to supply more info to viewer +#define OS_SUPPORT_SYSSTACK_INFO (1) // Option to supply more info to viewer #define OS_SUPPORT_INTSTACK_INFO (0) // Not used #define OS_SUPPORT_OS_ALLOC (1) // Define whether OS_Alloc is supported -#define OS_STACKFILL_CHAR (0xcd) // To be compatible with IAR stack check plugin #define OS_SP_ADJUST (0) #define OS_EnterIntStack() // No special stack switching required #define OS_LeaveIntStack() // No special stack switching required @@ -87,25 +86,82 @@ NOTE : NONE OF THE DEFINITIONS IN THIS FILE MAY BE MODIFIED #define OS_SCHEDULER_ACTIVATED_BY_EXCEPTION (1) #define OS_SUPPORT_INT_PRIORITY (0) // Variable interrupt priorities for OS not supported by now -/***** End of configuration settings *******************************/ +// +// Erratum 837070, ARM-EPM-064408 v4.0 [1]: With Cortex-M7 r0p1, increasing priority +// using a write to BASEPRI does not take effect immediately. Hence, we globally +// disable interrupts while accessing BASEPRI. Since other CPUs and revisions are +// not affected, this define may be used to switch off this workaround. +// When modifiying this define, the according define in RTOS_CM4F.s should be changed as well. +// +#ifndef USE_ERRATUM_837070 + #define USE_ERRATUM_837070 (1) // 1: use workaround (default), 0: do not use workaround +#endif -#if defined (__ARM7M__) && (__CORE__ == __ARM7M__) // Cortex-M3 - #define OS_DI() OS_DisableInt() - #define OS_EI() OS_EnableInt() -#elif defined (__ARM6M__) && (__CORE__ == __ARM6M__) // Cortex-M0 - #define OS_DI() __disable_interrupt(); // Use IAR Intrinsic functions +// +// With the above workaround, zero-latency ISRs will be enabled after each call to +// OS_DI() or OS_INT_PRIO_RESTORE(). If this is not desired, this define may be used +// to preserve and restore the state of PRIMASK with these calls. +// When modifiying this define, the according define in RTOS_CM4F.s should be changed as well. +// +#if (USE_ERRATUM_837070 == 1) + #ifndef OS_PRESERVE_PRIMASK + #define OS_PRESERVE_PRIMASK (0) // 0: PRIMASK is not preserved (default), 1: PRIMASK is preserved + #endif +#endif + +/***** End of configuration settings *******************************/ +#if defined (__ARM6M__) && (__CORE__ == __ARM6M__) // Cortex-M0 + // + // Use IAR Intrinsic functions. + // + #define OS_DI() __disable_interrupt(); #define OS_EI() __enable_interrupt(); -#elif defined (__ARM7EM__) && (__CORE__ == __ARM7EM__) // Cortex-M4/M4F - #define OS_DI() OS_DisableInt() - #define OS_EI() OS_EnableInt() +#elif ((defined(__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) && (USE_ERRATUM_837070 == 0))) // Cortex-M3, Cortex-M4/M4F/M7 w/o workaround + // + // Use IAR Intrinsic functions. + // The NOPs should flush the pipeline to ensure that interrupts + // are disabled before the next instruction is executed. + // + #define OS_DI() { \ + __set_BASEPRI(OS_IPL_DI_DEFAULT); \ + __no_operation(); \ + __no_operation(); \ + } + #define OS_EI() __set_BASEPRI(OS_IPL_EI_DEFAULT) +#elif (defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) && (USE_ERRATUM_837070 == 1)) // Cortex-M4/M4F/M7 with workaround + // + // Use IAR Intrinsic functions. + // The NOPs should flush the pipeline to ensure that interrupts + // are disabled before the next instruction is executed. + // + #if (OS_PRESERVE_PRIMASK == 1) + #define OS_DI() { \ + OS_U32 primask; \ + primask = (OS_U32) __get_PRIMASK(); \ + __disable_interrupt(); \ + __set_BASEPRI(OS_IPL_DI_DEFAULT); \ + __set_PRIMASK(primask); \ + __no_operation(); \ + __no_operation(); \ + } + #else + #define OS_DI() { \ + __disable_interrupt(); \ + __set_BASEPRI(OS_IPL_DI_DEFAULT); \ + __enable_interrupt(); \ + __no_operation(); \ + __no_operation(); \ + } + #endif + #define OS_EI() __set_BASEPRI(OS_IPL_EI_DEFAULT) #else #error "Please check that __ARM7M__ or __ARM7EM__or __ARM6M__ is defined!" #endif -#define OS_IPL_EI_DEFAULT 0 // Modification requires -#define OS_IPL_DI_DEFAULT 128 // modification in RTOS*.s assembly files ! +#define OS_IPL_EI_DEFAULT 0 // Modification requires +#define OS_IPL_DI_DEFAULT 128 // modification in RTOS*.s assembly files ! -#define OS_U32 unsigned +#define OS_U32 unsigned long #if defined (__ARM7EM__) && (__CORE__ == __ARM7EM__) && defined (__ARMVFP__) #define OS_CPU_HAS_VFP (1) @@ -119,90 +175,31 @@ NOTE : NONE OF THE DEFINITIONS IN THIS FILE MAY BE MODIFIED * * Register structure on stack. Not required by application, just a debugging help. */ -#if (OS_CPU_HAS_VFP) - // Cortex M4 / M4F with floating point unit. - // The link register is part of the task context, because it contains information - // whether extended stack frame is used or not. - // It also fills up the stack frame to be 8 byte aligned. typedef struct { - OS_U32 Counters; - OS_U32 OS_REG_R4; - OS_U32 OS_REG_R5; - OS_U32 OS_REG_R6; - OS_U32 OS_REG_R7; - OS_U32 OS_REG_R8; - OS_U32 OS_REG_R9; - OS_U32 OS_REG_R10; - OS_U32 OS_REG_R11; - OS_U32 OS_REG_LR; - OS_U32 OS_REG_R0; - OS_U32 OS_REG_R1; - OS_U32 OS_REG_R2; - OS_U32 OS_REG_R3; - OS_U32 OS_REG_R12; - OS_U32 OS_REG_R14; - OS_U32 OS_REG_PC; - OS_U32 OS_REG_XPSR; -} OS_REGS_BASE; - -// The extended stack frame may be stored on exception entry. -// The FP registers are saved when extended task context is used -// for the specific task. -typedef struct { - OS_U32 OS_REG_S0; - OS_U32 OS_REG_S1; - OS_U32 OS_REG_S2; - OS_U32 OS_REG_S3; - OS_U32 OS_REG_S4; - OS_U32 OS_REG_S5; - OS_U32 OS_REG_S6; - OS_U32 OS_REG_S7; - OS_U32 OS_REG_S8; - OS_U32 OS_REG_S9; - OS_U32 OS_REG_S10; - OS_U32 OS_REG_S11; - OS_U32 OS_REG_S12; - OS_U32 OS_REG_S13; - OS_U32 OS_REG_S14; - OS_U32 OS_REG_S15; - OS_U32 OS_REG_FPSCR; - OS_U32 OS_REG_RES; -} OS_REGS_INT; - -typedef struct { - OS_REGS_BASE Base; - OS_REGS_INT Int; -} OS_REGS; - -#else - // Cortex M0 / M3 /M4 without floating point unit -typedef struct { - OS_U32 Counters; - OS_U32 OS_REG_R4; - OS_U32 OS_REG_R5; - OS_U32 OS_REG_R6; - OS_U32 OS_REG_R7; - OS_U32 OS_REG_R8; - OS_U32 OS_REG_R9; - OS_U32 OS_REG_R10; - OS_U32 OS_REG_R11; - OS_U32 OS_REG_LR; - OS_U32 OS_REG_R0; - OS_U32 OS_REG_R1; - OS_U32 OS_REG_R2; - OS_U32 OS_REG_R3; - OS_U32 OS_REG_R12; - OS_U32 OS_REG_R14; - OS_U32 OS_REG_PC; - OS_U32 OS_REG_XPSR; + OS_U32 Counters; + OS_U32 OS_REG_R4; + OS_U32 OS_REG_R5; + OS_U32 OS_REG_R6; + OS_U32 OS_REG_R7; + OS_U32 OS_REG_R8; + OS_U32 OS_REG_R9; + OS_U32 OS_REG_R10; + OS_U32 OS_REG_R11; + OS_U32 OS_REG_LR; + OS_U32 OS_REG_R0; + OS_U32 OS_REG_R1; + OS_U32 OS_REG_R2; + OS_U32 OS_REG_R3; + OS_U32 OS_REG_R12; + OS_U32 OS_REG_R14; + OS_U32 OS_REG_PC; + OS_U32 OS_REG_XPSR; } OS_REGS_BASE; typedef struct { OS_REGS_BASE Base; } OS_REGS; -#endif - /********************************************************************* * * Port specific (non OS generic) functions @@ -227,99 +224,135 @@ OS_ISR_HANDLER* OS_ARM_InstallISRHandler (int ISRIndex, OS_ISR_HANDLER* pISRHa void OS_ARM_EnableISR (int ISRIndex); void OS_ARM_DisableISR (int ISRIndex); int OS_ARM_ISRSetPrio (int ISRIndex, int Prio); -void OS_ARM_AssignISRSource (int ISRIndex, int Source); -void OS_ARM_EnableISRSource (int SourceIndex); -void OS_ARM_DisableISRSource (int SourceIndex); -void OS_DisableInt (void); -void OS_EnableInt (void); #if defined (__ARM6M__) && (__CORE__ == __ARM6M__) // Cortex-M0 void OS_memcpy (void * pDest, const void * pSrc, int NumBytes); #endif #define OS_IDLE() // Overrides call of OS_Idle() #define OS_EI_ON_LEAVE() OS_EI() // Required for CPUs which do not restore DI-flag by RETI. -#define OS_DI_ON_LEAVE_NESTABLE() // With Cortex M it is not required to disable Ints in OS_LeaveNestableInterrupt() -#define OS_EI_ON_LEAVE_NESTABLE() // With Cortex M it is not required to enable Ints in OS_LeaveNestableInterrupt() #define OS_ENABLE_INTS_SAVE_IPL() // Not required with Cortex-M, avoid call of OS_EI() /***** Declare functions used in the interrupt vector table in ROM */ -void __program_start (void); // Program entry -void OS_Systick (void); // In RTOSInit w/o CMSIS -void OS_COM_IsrHandler(void); // In RTOSInit w/o CMSIS +void __program_start (void); // Program entry +void OS_Systick (void); // In RTOSInit w/o CMSIS +void OS_COM_IsrHandler(void); // In RTOSInit w/o CMSIS -void HardFault_Handler(void); // May be implemented in In RTOSInit, allows capture of HardFault exceptions -void OS_HardFaultHandler(void); // In embOS libraries for Cortex M3/M4/M4F +void HardFault_Handler (void); // Implemented in separate assembler module. +void SEGGER_HardFaultHandler(unsigned int* pStack); // Implemented in separate "C" module. /********************************************************************* * * Thread locking, thread safe system libraries */ #if ((__VER__ >= 441) && (__VER__ < 6000000)) - void OS_InitSysLocks(void); - #define OS_INIT_SYS_LOCKS() OS_InitSysLocks() -#elif (__VER__ > 6000000) + void OS_InitSysLocks (void); + #define OS_INIT_SYS_LOCKS() OS_InitSysLocks() +#elif ((__VER__ > 6000000) && (__VER__ < 8000000)) #define OS_INIT_SYS_LOCKS() /* embOS specific system locking functions called from the IAR hook functions */ - void OS__iar_system_Mtxinit(__iar_Rmtx *m); - void OS__iar_system_Mtxdst(__iar_Rmtx *m); - void OS__iar_system_Mtxlock(__iar_Rmtx *m); + void OS__iar_system_Mtxinit (__iar_Rmtx *m); + void OS__iar_system_Mtxdst (__iar_Rmtx *m); + void OS__iar_system_Mtxlock (__iar_Rmtx *m); void OS__iar_system_Mtxunlock(__iar_Rmtx *m); -#endif /* (__VER__ >= 441) && (__VER__ < 6000000) */ +#elif (__VER__ >= 800) + #include + #define OS_INIT_SYS_LOCKS() __iar_Initlocks() + /* embOS specific system locking functions called from the IAR hook functions */ + void OS__iar_system_Mtxinit (__iar_Rmtx *m); + void OS__iar_system_Mtxdst (__iar_Rmtx *m); + void OS__iar_system_Mtxlock (__iar_Rmtx *m); + void OS__iar_system_Mtxunlock(__iar_Rmtx *m); +#endif /********************************************************************* * * Thread local storage */ -#if (__VER__ >= 6000000) +#define OS_SUPPORT_TLS (1) +#define OS_TASK_HAS_PTLS (1) // pTLS always in task structure to get compatible TCBs for all versions +#define OS_ExtendTaskContext_TLS_VFP OS_ExtendTaskContext_TLS // OS_ExtendTaskContext_TLS_VFP is no longer necessary because VFP is now automatically handled by embOS + +void OS_ExtendTaskContext_TLS(void); // Initialize Thread Local Storage, OS_TLS.c, CPU specific + +#if (__VER__ >= 6000000 && __VER__ < 8000000) #define OS_TLS_PTR void _DLIB_TLS_MEMORY* - #define OS_SUPPORT_TLS (1) - void OS_TLS_Init(void); // Initialize Thread Local Storage, OS_TLS.c, CPU specific - #define OS_ExtendTaskContext_TLS OS_TLS_Init - - #if defined (__ARM7EM__) && (__CORE__ == __ARM7EM__) && defined (__ARMVFP__) - - typedef struct { - unsigned int aVfpRegs[16]; - unsigned int VfpStatus; - } OS_VFP_REGS_TEMP; - - void OS_ExtendTaskContext_VFP (void); - void OS_ExtendTaskContext_TLS_VFP (void); - void OS_VFP_SaveRegsTemp (OS_VFP_REGS_TEMP* pVfpRegs); - void OS_VFP_RestoreRegsTemp (const OS_VFP_REGS_TEMP* pVfpRegs); - - /* Helper for ISR-handler: Store temporary VFP registers onto stack */ - #define OS_VFP_Save() { \ - OS_VFP_REGS_TEMP VfpRegsTemp; \ - OS_VFP_SaveRegsTemp(&VfpRegsTemp) - - /* Helper for ISR-handler: Restore temporary VFP registers from stack */ - #define OS_VFP_Restore() \ - OS_VFP_RestoreRegsTemp(&VfpRegsTemp); \ - } - - #endif #endif -#define OS_TASK_HAS_PTLS (1) // pTLS always in task structure to get compatible TCBs for all versions +/********************************************************************* +* +* Support for ARM VFP +*/ +#if (OS_CPU_HAS_VFP == 1) +// +// Defines for compatibility with older embOS versions +// Not longer necessary because VFP is now automatically handled by embOS +// +#define OS_ExtendTaskContext_VFP() +#define OS_VFP_Save() +#define OS_VFP_Restore() + +#endif /********************************************************************* * * Global interrupt disable/enable support -* Implemented here, using intrinsics (works for M0/M3/M4 and M4F) */ -#define OS_INTERRUPT_MaskGlobal() __disable_interrupt() -#define OS_INTERRUPT_UnmaskGlobal() __enable_interrupt() - -#define OS_INTERRUPT_PreserveGlobal(p) (*(p) = (OS_U32) __get_PRIMASK()) - -#define OS_INTERRUPT_RestoreGlobal(p) __set_PRIMASK(*(p)) - -#define OS_INTERRUPT_PreserveAndMaskGlobal(p) { \ - (*(p) = (OS_U32) __get_PRIMASK()); \ - __disable_interrupt(); \ +#define OS_INTERRUPT_MaskGlobal() __disable_interrupt() +#define OS_INTERRUPT_UnmaskGlobal() __enable_interrupt() +#define OS_INTERRUPT_PreserveGlobal(p) (*(p) = (OS_U32) __get_PRIMASK()) +#define OS_INTERRUPT_RestoreGlobal(p) __set_PRIMASK(*(p)) +#define OS_INTERRUPT_PreserveAndMaskGlobal(p) { \ + (*(p) = (OS_U32) __get_PRIMASK()); \ + __disable_interrupt(); \ } +/********************************************************************* +* +* embOS interrupt preserve/restore support +*/ +#if defined (__ARM6M__) && (__CORE__ == __ARM6M__) + #define OS_INT_PRIO_PRESERVE(p) (*(p) = (OS_U32) __get_PRIMASK()) // Cortex-M0/M0+/M1 + #define OS_INT_PRIO_RESTORE(p) __set_PRIMASK(*(p)) +#elif ((defined(__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) && (USE_ERRATUM_837070 == 0))) // Cortex-M3, Cortex-M4/M4F/M7 w/o workaround + #define OS_INT_PRIO_PRESERVE(p) (*(p) = (OS_U32) __get_BASEPRI()) + #define OS_INT_PRIO_RESTORE(p) { \ + __set_BASEPRI(*(p)); \ + __no_operation(); \ + __no_operation(); \ + } +#elif (defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) && (USE_ERRATUM_837070 == 1)) // Cortex-M4/M4F/M7 with workaround + #define OS_INT_PRIO_PRESERVE(p) (*(p) = (OS_U32) __get_BASEPRI()) + #if (OS_PRESERVE_PRIMASK == 1) + // + // The NOPs should flush the pipeline to ensure that interrupts + // are disabled before the next instruction is executed. + // + #define OS_INT_PRIO_RESTORE(p) { \ + OS_U32 primask; \ + primask = (OS_U32) __get_PRIMASK(); \ + __disable_interrupt(); \ + __set_BASEPRI(*(p)); \ + __set_PRIMASK(primask); \ + __no_operation(); \ + __no_operation(); \ + } + #else + #define OS_INT_PRIO_RESTORE(p) { \ + __disable_interrupt(); \ + __set_BASEPRI(*(p)); \ + __enable_interrupt(); \ + __no_operation(); \ + __no_operation(); \ + } + #endif +#endif + +/********************************************************************* +* +* DMB (Data Memory Barrier support) +*/ +#define OS_DATA_MEMORY_BARRIER() __DMB(); // IAR intrinsic to issue a full memory barrier + /********************************************************************* * * Remap identifiers @@ -352,7 +385,7 @@ data model is used in a project * Generic portion of the OS starts here * ********************************************************************** -This file (original name OS_RAW.h) is part of RTOS.h, the include +This file (original name OS_Raw.h) is part of RTOS.h, the include file for the OS. */ @@ -360,40 +393,43 @@ file for the OS. !defined(OS_LIBMODE_S) && !defined(OS_LIBMODE_SP) && \ !defined(OS_LIBMODE_D) && !defined(OS_LIBMODE_DP) && \ !defined(OS_LIBMODE_DT)) -#include "OS_Config.h" + #include "OS_Config.h" #endif -#define OS_VERSION_GENERIC (40000u) /* Generic version 4.00 */ +#define OS_VERSION_GENERIC (43400u) // Generic version 4.34 #ifndef OS_PORT_REVISION - #define OS_PORT_REVISION 0u + #define OS_PORT_REVISION 0u #endif #define OS_VERSION (OS_VERSION_GENERIC + (OS_PORT_REVISION * 25u)) - -/****** Thread local storage, may be enabled in CPU specific part ***/ - +// +// Thread local storage, may be enabled in CPU specific part +// #ifndef OS_SUPPORT_TLS - #define OS_SUPPORT_TLS 0 + #define OS_SUPPORT_TLS 0 #endif -/****** embOS software timer may be excluded when compiling sources */ - +// +// embOS software timer may be excluded when compiling sources +// #ifndef OS_SUPPORT_TIMER - #define OS_SUPPORT_TIMER 1 + #define OS_SUPPORT_TIMER 1 #endif -/****** embOS tickless support may be excluded when compiling sources */ - +// +// embOS tickless support may be excluded when compiling sources +// #ifndef OS_SUPPORT_TICKLESS #define OS_SUPPORT_TICKLESS 1 #endif -/****** embOS default debug level is 1, may be overwritten in project settings */ - +// +// embOS default debug level is 1, may be overwritten in project settings +// #ifndef OS_DEBUG_LEVEL - #define OS_DEBUG_LEVEL 1 + #define OS_DEBUG_LEVEL 1 #endif /********************************************************************* @@ -403,114 +439,155 @@ file for the OS. ********************************************************************** */ -/* If library type is not selected yet (on project level, - for example), then select DP by default -*/ +// +// If library type is not selected yet (on project level, for example), then select DP by default +// #if (!defined(OS_LIBMODE_XR) && !defined(OS_LIBMODE_R) && \ !defined(OS_LIBMODE_S) && !defined(OS_LIBMODE_SP) && \ !defined(OS_LIBMODE_D) && !defined(OS_LIBMODE_DP) && \ !defined(OS_LIBMODE_DT)) -#define OS_LIBMODE_DP + #define OS_LIBMODE_DP #endif -#if defined(OS_LIBMODE_XR) // Extremely small release - without Round robin support - #define OS_CHECKSTACK 0 - #define OS_DEBUG 0 - #define OS_PROFILE 0u - #define OS_SUPPORT_TICKSTEP 0 - #define OS_TRACE 0u - #define OS_RR_SUPPORTED 0 - #define OS_TRACKNAME 0 - #define OS_SUPPORT_SAVE_RESTORE_HOOK 0 - #define OS_CreateTask OS_CreateTask_XR - #define OS_CreateTaskEx OS_CreateTaskEx_XR - #define OS_LIBMODE "XR" - #ifndef OS_SUPPORT_STAT - #define OS_SUPPORT_STAT 0 - #endif - #define OS_SUPPORT_PTLS 0 -#elif defined(OS_LIBMODE_R) // Release build - #define OS_CHECKSTACK 0 - #define OS_DEBUG 0 - #define OS_PROFILE 0u - #define OS_SUPPORT_TICKSTEP 0 - #define OS_TRACE 0u - #define OS_CreateTask OS_CreateTask_R - #define OS_CreateTaskEx OS_CreateTaskEx_R - #define OS_LIBMODE "R" - #ifndef OS_SUPPORT_STAT - #define OS_SUPPORT_STAT 0 - #endif - #define OS_SUPPORT_PTLS OS_SUPPORT_TLS -#elif defined(OS_LIBMODE_S) // Release build with stack check - #define OS_CHECKSTACK 1 - #define OS_DEBUG 0 - #define OS_PROFILE 0u - #define OS_SUPPORT_TICKSTEP 0 - #define OS_TRACE 0u - #define OS_CreateTask OS_CreateTask_S - #define OS_CreateTaskEx OS_CreateTaskEx_S - #define OS_LIBMODE "S" - #ifndef OS_SUPPORT_STAT - #define OS_SUPPORT_STAT 0 - #endif - #define OS_SUPPORT_PTLS OS_SUPPORT_TLS -#elif defined(OS_LIBMODE_SP) // Release build with stack check and profiling - #define OS_CHECKSTACK 1 - #define OS_DEBUG 0 - #define OS_PROFILE 1u - #define OS_SUPPORT_TICKSTEP 1 - #define OS_TRACE 0u - #define OS_CreateTask OS_CreateTask_SP - #define OS_CreateTaskEx OS_CreateTaskEx_SP - #define OS_LIBMODE "SP" - #ifndef OS_SUPPORT_STAT - #define OS_SUPPORT_STAT 1 - #endif - #define OS_SUPPORT_PTLS OS_SUPPORT_TLS +#if defined(OS_LIBMODE_XR) // Extremely small release - without Round robin support + #define OS_CHECKSTACK_DEFAULT 0 + #define OS_DEBUG_DEFAULT 0 + #define OS_PROFILE_DEFAULT 0 + #define OS_SUPPORT_TICKSTEP_DEFAULT 0 + #define OS_TRACE_DEFAULT 0 + #define OS_RR_SUPPORTED_DEFAULT 0 + #define OS_TRACKNAME_DEFAULT 0 + #define OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT 0 + #define OS_CreateTask OS_CreateTask_XR + #define OS_CreateTaskEx OS_CreateTaskEx_XR + #define OS_LIBMODE "XR" + #define OS_SUPPORT_STAT_DEFAULT 0 + #define OS_SUPPORT_PTLS_DEFAULT 0 +#elif defined(OS_LIBMODE_R) // Release build + #define OS_CHECKSTACK_DEFAULT 0 + #define OS_DEBUG_DEFAULT 0 + #define OS_PROFILE_DEFAULT 0 + #define OS_SUPPORT_TICKSTEP_DEFAULT 0 + #define OS_TRACE_DEFAULT 0 + #define OS_RR_SUPPORTED_DEFAULT 1 + #define OS_TRACKNAME_DEFAULT 1 + #define OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT 1 + #define OS_CreateTask OS_CreateTask_R + #define OS_CreateTaskEx OS_CreateTaskEx_R + #define OS_LIBMODE "R" + #define OS_SUPPORT_STAT_DEFAULT 0 + #define OS_SUPPORT_PTLS_DEFAULT OS_SUPPORT_TLS +#elif defined(OS_LIBMODE_S) // Release build with stack check + #define OS_CHECKSTACK_DEFAULT 1 + #define OS_DEBUG_DEFAULT 0 + #define OS_PROFILE_DEFAULT 0 + #define OS_SUPPORT_TICKSTEP_DEFAULT 0 + #define OS_TRACE_DEFAULT 0 + #define OS_RR_SUPPORTED_DEFAULT 1 + #define OS_TRACKNAME_DEFAULT 1 + #define OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT 1 + #define OS_CreateTask OS_CreateTask_S + #define OS_CreateTaskEx OS_CreateTaskEx_S + #define OS_LIBMODE "S" + #define OS_SUPPORT_STAT_DEFAULT 0 + #define OS_SUPPORT_PTLS_DEFAULT OS_SUPPORT_TLS +#elif defined(OS_LIBMODE_SP) // Release build with stack check and profiling + #define OS_CHECKSTACK_DEFAULT 1 + #define OS_DEBUG_DEFAULT 0 + #define OS_PROFILE_DEFAULT 1 + #define OS_SUPPORT_TICKSTEP_DEFAULT 1 + #define OS_TRACE_DEFAULT 0 + #define OS_RR_SUPPORTED_DEFAULT 1 + #define OS_TRACKNAME_DEFAULT 1 + #define OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT 1 + #define OS_CreateTask OS_CreateTask_SP + #define OS_CreateTaskEx OS_CreateTaskEx_SP + #define OS_LIBMODE "SP" + #define OS_SUPPORT_STAT_DEFAULT 1 + #define OS_SUPPORT_PTLS_DEFAULT OS_SUPPORT_TLS #elif defined(OS_LIBMODE_D) // Debug build - #define OS_CHECKSTACK 1 - #define OS_DEBUG OS_DEBUG_LEVEL - #define OS_PROFILE 0u - #define OS_SUPPORT_TICKSTEP 1 - #define OS_TRACE 0u - #define OS_CreateTask OS_CreateTask_D - #define OS_CreateTaskEx OS_CreateTaskEx_D - #define OS_LIBMODE "D" - #ifndef OS_SUPPORT_STAT - #define OS_SUPPORT_STAT 1 - #endif - #define OS_SUPPORT_PTLS OS_SUPPORT_TLS -#elif defined(OS_LIBMODE_DP) // Debug build with profiling - #define OS_CHECKSTACK 1 - #define OS_PROFILE 1u - #define OS_DEBUG OS_DEBUG_LEVEL - #define OS_SUPPORT_TICKSTEP 1 - #define OS_TRACE 0u - #define OS_CreateTask OS_CreateTask_DP - #define OS_CreateTaskEx OS_CreateTaskEx_DP - #define OS_LIBMODE "DP" - #ifndef OS_SUPPORT_STAT - #define OS_SUPPORT_STAT 1 - #endif - #define OS_SUPPORT_PTLS OS_SUPPORT_TLS -#elif defined(OS_LIBMODE_DT) // Debug build with profiling and trace - #define OS_CHECKSTACK 1 - #define OS_DEBUG OS_DEBUG_LEVEL - #define OS_PROFILE 1u - #define OS_SUPPORT_TICKSTEP 1 - #define OS_TRACE 1u - #define OS_CreateTask OS_CreateTask_DT - #define OS_CreateTaskEx OS_CreateTaskEx_DT - #define OS_LIBMODE "DT" - #ifndef OS_SUPPORT_STAT - #define OS_SUPPORT_STAT 1 - #endif - #define OS_SUPPORT_PTLS OS_SUPPORT_TLS + #define OS_CHECKSTACK_DEFAULT 1 + #define OS_DEBUG_DEFAULT OS_DEBUG_LEVEL + #define OS_PROFILE_DEFAULT 0 + #define OS_SUPPORT_TICKSTEP_DEFAULT 1 + #define OS_TRACE_DEFAULT 0 + #define OS_RR_SUPPORTED_DEFAULT 1 + #define OS_TRACKNAME_DEFAULT 1 + #define OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT 1 + #define OS_CreateTask OS_CreateTask_D + #define OS_CreateTaskEx OS_CreateTaskEx_D + #define OS_LIBMODE "D" + #define OS_SUPPORT_STAT_DEFAULT 1 + #define OS_SUPPORT_PTLS_DEFAULT OS_SUPPORT_TLS +#elif defined(OS_LIBMODE_DP) // Debug build with profiling + #define OS_CHECKSTACK_DEFAULT 1 + #define OS_DEBUG_DEFAULT OS_DEBUG_LEVEL + #define OS_PROFILE_DEFAULT 1 + #define OS_SUPPORT_TICKSTEP_DEFAULT 1 + #define OS_TRACE_DEFAULT 0 + #define OS_RR_SUPPORTED_DEFAULT 1 + #define OS_TRACKNAME_DEFAULT 1 + #define OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT 1 + #define OS_CreateTask OS_CreateTask_DP + #define OS_CreateTaskEx OS_CreateTaskEx_DP + #define OS_LIBMODE "DP" + #define OS_SUPPORT_STAT_DEFAULT 1 + #define OS_SUPPORT_PTLS_DEFAULT OS_SUPPORT_TLS +#elif defined(OS_LIBMODE_DT) // Debug build with profiling and trace + #define OS_CHECKSTACK_DEFAULT 1 + #define OS_DEBUG_DEFAULT OS_DEBUG_LEVEL + #define OS_PROFILE_DEFAULT 1 + #define OS_SUPPORT_TICKSTEP_DEFAULT 1 + #define OS_TRACE_DEFAULT 1 + #define OS_RR_SUPPORTED_DEFAULT 1 + #define OS_TRACKNAME_DEFAULT 1 + #define OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT 1 + #define OS_CreateTask OS_CreateTask_DT + #define OS_CreateTaskEx OS_CreateTaskEx_DT + #define OS_LIBMODE "DT" + #define OS_SUPPORT_STAT_DEFAULT 1 + #define OS_SUPPORT_PTLS_DEFAULT OS_SUPPORT_TLS #else #error Please define library type used ! #endif +// +// If defines are not set use defaults from the according library mode +// +#ifndef OS_CHECKSTACK + #define OS_CHECKSTACK OS_CHECKSTACK_DEFAULT +#endif +#ifndef OS_DEBUG + #define OS_DEBUG OS_DEBUG_DEFAULT +#endif +#ifndef OS_PROFILE + #define OS_PROFILE OS_PROFILE_DEFAULT +#endif +#ifndef OS_SUPPORT_TICKSTEP + #define OS_SUPPORT_TICKSTEP OS_SUPPORT_TICKSTEP_DEFAULT +#endif +#ifndef OS_TRACE + #define OS_TRACE OS_TRACE_DEFAULT +#endif +#ifndef OS_TRACE_RECORD_API_END + #define OS_TRACE_RECORD_API_END OS_PROFILE_DEFAULT +#endif +#ifndef OS_RR_SUPPORTED + #define OS_RR_SUPPORTED OS_RR_SUPPORTED_DEFAULT +#endif +#ifndef OS_TRACKNAME + #define OS_TRACKNAME OS_TRACKNAME_DEFAULT +#endif +#ifndef OS_SUPPORT_SAVE_RESTORE_HOOK + #define OS_SUPPORT_SAVE_RESTORE_HOOK OS_SUPPORT_SAVE_RESTORE_HOOK_DEFAULT +#endif +#ifndef OS_SUPPORT_STAT + #define OS_SUPPORT_STAT OS_SUPPORT_STAT_DEFAULT +#endif +#ifndef OS_SUPPORT_PTLS + #define OS_SUPPORT_PTLS OS_SUPPORT_PTLS_DEFAULT +#endif + /********************************************************************* * * OS compile time switches @@ -519,38 +596,39 @@ file for the OS. These compile time switches can be modified when recompiling the library. Usually, the values are defined in OSCHIP.h, which is then -merged with OS_RAW.h to form RTOS.h. +merged with OS_Raw.h to form RTOS.h. If the values are not defined in OSCHIP.h, the default values below are used. */ -/* Make it possible to place const data in RAM via - define and therefore via command line. This is required - for some smaller CPUs in small memory models - It is defined to be "const" by default, but can be defined to nothing - by simply adding a -DOS_CONST_DATA on the commandline -*/ +// +// Make it possible to place const data in RAM via +// define and therefore via command line. This is required +// for some smaller CPUs in small memory models +// It is defined to be "const" by default, but can be defined to nothing +// by simply adding a -DOS_CONST_DATA on the commandline +// #ifndef OS_CONST_DATA - #define OS_CONST_DATA const /* Default */ + #define OS_CONST_DATA const #else #undef OS_CONST_DATA - #define OS_CONST_DATA /* define blank */ + #define OS_CONST_DATA #endif #ifndef OS_CONST_PTR - #define OS_CONST_PTR const /* Default: const pointer declared as const */ + #define OS_CONST_PTR const // Default: const pointer declared as const #else - #undef OS_CONST_PTR /* May have been overwritten for CPUs where "const" memory addresses ROM instead of RAM */ - #define OS_CONST_PTR /* define blank */ + #undef OS_CONST_PTR // May have been overwritten for CPUs where "const" memory addresses ROM instead of RAM + #define OS_CONST_PTR #endif #ifndef OS_ROM_DATA #define OS_ROM_DATA #endif -#ifndef OS_COPYSTRING /* Used in OSCom.c */ - #define OS_COPYSTRING OS_MEMCPY +#ifndef OS_COPYSTRING + #define OS_COPYSTRING OS_MEMCPY #endif #ifndef OS_INTERWORK @@ -562,15 +640,15 @@ below are used. #endif #ifndef OS_STACK_ADR - #define OS_STACK_ADR OS_U32 + #define OS_STACK_ADR OS_U32 #endif #ifndef OS_MEMSET - #define OS_MEMSET(a,v,s) memset((a),((int) (v)),(s)) + #define OS_MEMSET(a,v,s) memset((a),((int) (v)),(size_t)(s)) #endif #ifndef OS_MEMCPY - #define OS_MEMCPY(dest,src,cnt) memcpy((dest),(src),(cnt)) + #define OS_MEMCPY(dest,src,cnt) memcpy((dest),(src),(size_t)(cnt)) #endif #ifndef OS_STRLEN @@ -585,39 +663,20 @@ below are used. #define OS_USEPARA(para) (para)=(para) #endif -#ifndef OS_SUPPORT_TICKSTEP - #define OS_SUPPORT_TICKSTEP 0 -#endif - -#ifndef OS_TRACKNAME - #define OS_TRACKNAME (1) -#endif - -#ifndef OS_TRACE - #define OS_TRACE (0u) -#endif - -#ifndef OS_SUPPORT_SAVE_RESTORE_HOOK - #define OS_SUPPORT_SAVE_RESTORE_HOOK (1) -#endif - -#ifndef OS_RR_SUPPORTED - #define OS_RR_SUPPORTED (1) -#endif - #ifndef OS_STACK_AT_BOTTOM - #define OS_STACK_AT_BOTTOM (0) + #define OS_STACK_AT_BOTTOM (0) #endif -/* Settings for NON-ANSI compiler syntax - The default behaviour complies with IAR. -*/ +// +// Settings for NON-ANSI compiler syntax +// The default behavior complies with IAR. +// #ifndef OS_COMPILER_LOCATION_LEFT - #define OS_COMPILER_LOCATION_LEFT 1 /* (req. for IAR) */ + #define OS_COMPILER_LOCATION_LEFT 1 // Required for IAR #endif #ifndef OS_COMPILER_STORAGE_MODIFIER_LEFT - #define OS_COMPILER_STORAGE_MODIFIER_LEFT 1 /* default for all except KEIL */ + #define OS_COMPILER_STORAGE_MODIFIER_LEFT 1 // Default for all except KEIL #endif #define OS_LINK_MAILBOXES (OS_DEBUG) @@ -639,40 +698,44 @@ below are used. #endif #ifndef OS_IDLE - #define OS_IDLE() OS_Idle(); \ - OS_ERROR(OS_ERR_IDLE_RETURNS); /* We should never arrive here, since the Idle loop should not return */ + #if (OS_DEBUG != 0) + #define OS_IDLE() OS_Idle(); \ + OS_Error(OS_ERR_IDLE_RETURNS); // We should never arrive here, since the Idle loop should not return + #else + #define OS_IDLE() OS_Idle(); + #endif #endif -#ifndef OS_SUSPEND_TASK_ON_TERMINATE // Sets the task state of a terminated task to "suspended". Primarily used in the OS simulation, because the windows scheduler might re-activate a suspended task +#ifndef OS_SUSPEND_TASK_ON_TERMINATE // Sets the task state of a terminated task to "suspended". Primarily used in the OS simulation, because the windows scheduler might re-activate a suspended task #define OS_SUSPEND_TASK_ON_TERMINATE (0) #endif -#ifndef OS_INIT_EXPLICITLY - #define OS_INIT_EXPLICITLY (0) // If enabled, OS_InitKern() initializes Non-Zero globals. Required only for faulty compiler (or startup-code) which do not perform proper init of globals during startup. +#ifndef OS_INIT_EXPLICITLY // If enabled, OS_InitKern() initializes Non-Zero globals. Required only for faulty compiler (or startup-code) which do not perform proper init of globals during startup. + #define OS_INIT_EXPLICITLY (0) #endif #ifndef OS_TASK_LIST_HAS_PPREV - #define OS_TASK_LIST_HAS_PPREV OS_RR_SUPPORTED + #define OS_TASK_LIST_HAS_PPREV OS_RR_SUPPORTED #else - #if (OS_TASK_LIST_HAS_PPREV == 0) && OS_RR_SUPPORTED + #if (OS_TASK_LIST_HAS_PPREV == 0) && (OS_RR_SUPPORTED != 0) #error "Invalid combination of config switches" #endif #endif #ifndef OS_SUPPORT_CALL_ISR - #define OS_SUPPORT_CALL_ISR (1) + #define OS_SUPPORT_CALL_ISR (1) #endif -#ifndef OS_SUPPORT_POWER - #define OS_SUPPORT_POWER (1) +#ifndef OS_SUPPORT_PERIPHERAL_POWER_CTRL + #define OS_SUPPORT_PERIPHERAL_POWER_CTRL (1) #endif #ifndef OS_SUPPORT_TICK_HOOK - #define OS_SUPPORT_TICK_HOOK (1) + #define OS_SUPPORT_TICK_HOOK (1) #endif #ifndef OS_POWER_NUM_COUNTERS - #define OS_POWER_NUM_COUNTERS (5u) + #define OS_POWER_NUM_COUNTERS (5u) #endif #ifndef OS_SUPPORT_INT_PRIORITY @@ -691,16 +754,40 @@ below are used. #define OS_SUPPORT_ENTER_INTERRUPT (1) // When Set to 0, OS_EnterInterrupt() is not defined, the generic version of OS_CallISR is also not defined then #endif +#ifndef OS_DISALLOW_EI_IN_CHANGETASK + #define OS_DISALLOW_EI_IN_CHANGETASK (0) // Used for embOS ports (like embOS Xtensa GCC) where nested interrupts are not possible +#endif + #ifndef OS_TASK_HAS_PTLS // May be defined in OSChip.h to generate equal task structure for different embOS versions, even when TLS is not supported #define OS_TASK_HAS_PTLS OS_SUPPORT_PTLS #endif #ifndef OS_TLS_PTR - #define OS_TLS_PTR void* + #define OS_TLS_PTR void* #endif -#ifndef OS_USE_IN_INTERRUPT_FUNCTION // OS_InInterrupt() normally is a macro, but may be defined as function if necessary - #define OS_USE_IN_INTERRUPT_FUNCTION (0) +#ifndef OS_SUPPORT_SYSSTACK_INFO + #define OS_SUPPORT_SYSSTACK_INFO (0) +#endif + +#ifndef OS_SUPPORT_INTSTACK_INFO + #define OS_SUPPORT_INTSTACK_INFO (0) +#endif + +#ifndef OS_SUPPORT_MPU + #define OS_SUPPORT_MPU (0) +#endif + +#ifndef OS_SECTION_ATTRIBUTE + #define OS_SECTION_ATTRIBUTE +#endif + +#ifndef OS_SECURE_ATTRIBUTE + #define OS_SECURE_ATTRIBUTE +#endif + +#ifndef OS_DATA_MEMORY_BARRIER + #define OS_DATA_MEMORY_BARRIER() #endif /********************************************************************* @@ -713,12 +800,12 @@ below are used. * * In case of doubt, set to 0 which is the safe, but maybe not optimum value. */ -#ifndef OS_PTR_OP_IS_ATOMIC - #error "OS_PTR_OP_IS_ATOMIC should be defined in OSChip.h" +#ifndef OS_PTR_OP_IS_ATOMIC + #error "OS_PTR_OP_IS_ATOMIC should be defined in OSCHIP.h" #endif -#ifndef OS_U32_OP_IS_ATOMIC - #error "OS_U32_OP_IS_ATOMIC should be defined in OSChip.h" +#ifndef OS_U32_OP_IS_ATOMIC + #error "OS_U32_OP_IS_ATOMIC should be defined in OSCHIP.h" #endif /********************************************************************* @@ -727,26 +814,22 @@ below are used. * ********************************************************************** */ - #ifndef OS_SIZEOF_INT #error "Please define OS_SIZEOF_INT (OSChip.h)" #endif -#ifndef OS_BIG_ENDIAN - #error "Please define OS_BIG_ENDIAN (OSChip.h)" -#endif #if (OS_STACK_AT_BOTTOM != 0) && (OS_STACK_AT_BOTTOM != 1) - /* - * Only 0 or 1 is allowed, because OS_STACK_AT_BOTTOM is used for calculations! - */ + // + // Only 0 or 1 is allowed, because OS_STACK_AT_BOTTOM is used for calculations! + // #error "OS_STACK_AT_BOTTOM has to be defined to 0 or 1" #endif -#if OS_SUPPORT_INT_PRIORITY - #ifndef OS_IPL_EI_DEFAULT +#if (OS_SUPPORT_INT_PRIORITY != 0) + #ifndef OS_IPL_EI_DEFAULT #error "Please define OS_IPL_EI_DEFAULT (OSChip.h)" #endif - #ifndef OS_IPL_DI_DEFAULT + #ifndef OS_IPL_DI_DEFAULT #error "Please define OS_IPL_DI_DEFAULT (OSChip.h)" #endif #endif @@ -761,7 +844,21 @@ below are used. #define OS_INTPRIO_GET_DISABLE(v) { OS_INTPRIO_GET(v); OS_INTPRIO_DISABLE(); } #endif #ifndef OS_INTPRIO - #define OS_INTPRIO unsigned int + #define OS_INTPRIO unsigned int +#endif + +/********************************************************************* +* +* Memory attributes +* +********************************************************************** +*/ +#ifndef OS_STACKPTR + #define OS_STACKPTR +#endif + +#ifndef OS_SADDR + #define OS_SADDR #endif /********************************************************************* @@ -770,7 +867,6 @@ below are used. * ********************************************************************** */ - #ifndef OS_I8 #define OS_I8 signed char #endif @@ -795,37 +891,33 @@ below are used. #define OS_U32 unsigned OS_I32 #endif -/* Defines a true integer. This type is guaranteed - a) to have at least 8 bits, - b) to compile and execute best on the target CPU - It will normally be the same as an int, but on most - 8-bit CPUs it will be replaced by a character because - the CPU can deal with 8 bits more efficient than with - 16 bit integers. - Use with care ! -*/ +#ifdef OS_I64 + #ifndef OS_U64 + #define OS_U64 unsigned OS_I64 + #endif +#endif + +// +// Defines an integer. This type is guaranteed to have at least 16 bits. +// #ifndef OS_INT - #define OS_INT int + #define OS_INT int #endif #ifndef OS_UINT - #define OS_UINT unsigned OS_INT + #define OS_UINT unsigned OS_INT #endif #ifndef OS_TIME - #define OS_TIME int + #define OS_TIME int #endif #ifndef OS_STAT - #define OS_STAT OS_U8 -#endif - -#ifndef OS_PRIO - #define OS_PRIO OS_U8 + #define OS_STAT OS_U8 #endif #ifndef OS_BOOL - #define OS_BOOL OS_U8 + #define OS_BOOL OS_U8 #endif // @@ -842,6 +934,19 @@ below are used. #endif #endif +// +// Since version 4.04, the size of task priority may be modified up to unsigned (which is 16bit or 32bit, depending on the CPU) +// If not defined in OSCHIP.h OS_PRIO is set to OS_U32 when the size of an int is 32bit and is set to OS_U8 +// when the size of an int is 16bit. +// +#ifndef OS_PRIO + #if (OS_SIZEOF_INT >= 4) + #define OS_PRIO OS_U32 + #else + #define OS_PRIO OS_U8 + #endif +#endif + /********************************************************************* * * Error codes @@ -849,63 +954,67 @@ below are used. ********************************************************************** */ -/* User 0..99 ***********************************/ +// User 0..99 *********************************** -/* Port 100..109 *********************************/ +// Port 100..109 ********************************* #define OS_ERR_ISR_INDEX (100) #define OS_ERR_ISR_VECTOR (101) #define OS_ERR_ISR_PRIO (102) #define OS_ERR_WRONG_STACK (103) -#define OS_ERR_ISR_NO_HANDLER (104) /* No interrupt handler was defined for this interrupt */ -#define OS_ERR_TLS_INIT (105) /* OS_TLS_Init() called multiple times from one task */ -#define OS_ERR_MB_BUFFER_SIZE (106) /* For 16bit CPUs, the maximum buffer size for a mailbox (64KB) exceeded */ +#define OS_ERR_ISR_NO_HANDLER (104) // No interrupt handler was defined for this interrupt +#define OS_ERR_TLS_INIT (105) // OS_TLS_Init() called multiple times from one task +#define OS_ERR_MB_BUFFER_SIZE (106) // For 16bit CPUs, the maximum buffer size for a mailbox (64KB) exceeded -/* OS generic ************************************/ +// OS generic ************************************ #define OS_ERR_EXTEND_CONTEXT (116) // OS_ExtendTaskContext called multiple times from one task #define OS_ERR_TIMESLICE (117) // A timeslice value of 0 (illegal) was set. (Legal since embOS version 3.86f) #define OS_ERR_INTERNAL (118) // OS_ChangeTask called without RegionCnt set (or other internal error) #define OS_ERR_IDLE_RETURNS (119) // Idle loop should not return #define OS_ERR_STACK (120) // Stack overflow or invalid stack -/* Counting semaphore overflow */ +// Counting semaphore overflow #define OS_ERR_CSEMA_OVERFLOW (121) -/* Power management module */ +// Peripheral Power management module #define OS_ERR_POWER_OVER (122) #define OS_ERR_POWER_UNDER (123) #define OS_ERR_POWER_INDEX (124) -/* System/interrupt stack */ +// System/interrupt stack #define OS_ERR_SYS_STACK (125) // embOS system stack overflow #define OS_ERR_INT_STACK (126) // Interrupt stack overflow -/* invalid or non-initialized data structures */ +// invalid or non-initialized data structures #define OS_ERR_INV_TASK (128) #define OS_ERR_INV_TIMER (129) #define OS_ERR_INV_MAILBOX (130) #define OS_ERR_INV_CSEMA (132) #define OS_ERR_INV_RSEMA (133) -/* Using GetMail1 or PutMail1 or GetMailCond1 or PutMailCond1 on - a non-1 byte mailbox */ +// Using GetMail1 or PutMail1 or GetMailCond1 or PutMailCond1 on +// a non-1 byte mailbox #define OS_ERR_MAILBOX_NOT1 (135) -/* Waitable objects deleted with waiting tasks or occupied by task */ +// Waitable objects deleted with waiting tasks or occupied by task #define OS_ERR_MAILBOX_DELETE (136) #define OS_ERR_CSEMA_DELETE (137) #define OS_ERR_RSEMA_DELETE (138) -/* internal errors, please contact SEGGER Microcontrollersysteme */ +// internal errors, please contact SEGGER Microcontroller Systems #define OS_ERR_MAILBOX_NOT_IN_LIST (140) #define OS_ERR_TASKLIST_CORRUPT (142) -/* Queue errors */ +// Queue errors #define OS_ERR_QUEUE_INUSE (143) #define OS_ERR_QUEUE_NOT_INUSE (144) #define OS_ERR_QUEUE_INVALID (145) #define OS_ERR_QUEUE_DELETE (146) -/* not matching routine calls or macro usage */ +// Mailbox errors +#define OS_ERR_MB_INUSE (147) +#define OS_ERR_MB_NOT_INUSE (148) + +// Not matching routine calls or macro usage #define OS_ERR_UNUSE_BEFORE_USE (150) #define OS_ERR_LEAVEREGION_BEFORE_ENTERREGION (151) #define OS_ERR_LEAVEINT (152) @@ -915,19 +1024,19 @@ below are used. #define OS_ERR_RESOURCE_OWNER (156) #define OS_ERR_REGIONCNT (157) -#define OS_ERR_ILLEGAL_IN_ISR (160) /* Not a legal system call during interrupt */ -#define OS_ERR_ILLEGAL_IN_TIMER (161) /* Not a legal system call during timer */ -#define OS_ERR_ILLEGAL_OUT_ISR (162) /* Not a legal system call outside interrupt */ -#define OS_ERR_NOT_IN_ISR (163) /* OS_EnterInterrupt() has been called, but CPU is not in ISR state */ -#define OS_ERR_IN_ISR (164) /* OS_EnterInterrupt() has not been called, but CPU is in ISR state */ +#define OS_ERR_ILLEGAL_IN_ISR (160) // Not a legal system call during interrupt +#define OS_ERR_ILLEGAL_IN_TIMER (161) // Not a legal system call during timer +#define OS_ERR_ILLEGAL_OUT_ISR (162) // Not a legal system call outside interrupt +#define OS_ERR_NOT_IN_ISR (163) // OS_EnterInterrupt() has been called, but CPU is not in ISR state +#define OS_ERR_IN_ISR (164) // OS_EnterInterrupt() has not been called, but CPU is in ISR state -#define OS_ERR_INIT_NOT_CALLED (165) /* OS_InitKern() was not called */ +#define OS_ERR_INIT_NOT_CALLED (165) // OS_InitKern() was not called #define OS_ERR_CPU_STATE_ISR_ILLEGAL (166) #define OS_ERR_CPU_STATE_ILLEGAL (167) #define OS_ERR_CPU_STATE_UNKNOWN (168) -/* Double used data structures */ +// Double used data structures #define OS_ERR_2USE_TASK (170) #define OS_ERR_2USE_TIMER (171) #define OS_ERR_2USE_MAILBOX (172) @@ -936,10 +1045,13 @@ below are used. #define OS_ERR_2USE_RSEMA (175) #define OS_ERR_2USE_MEMF (176) -/* Communication errors (OSCOM) */ +// Communication errors #define OS_ERR_NESTED_RX_INT (180) -/* Fixed block memory pool */ +// Spinlock +#define OS_ERR_SPINLOCK_INV_CORE (185) + +// Fixed block memory pool #define OS_ERR_MEMF_INV (190) #define OS_ERR_MEMF_INV_PTR (191) #define OS_ERR_MEMF_PTR_FREE (192) @@ -947,132 +1059,310 @@ below are used. #define OS_ERR_MEMF_POOLADDR (194) #define OS_ERR_MEMF_BLOCKSIZE (195) -/* Task suspend / resume errors */ +// Task suspend / resume errors #define OS_ERR_SUSPEND_TOO_OFTEN (200) #define OS_ERR_RESUME_BEFORE_SUSPEND (201) -/* Other task related errors */ +// Other task related errors #define OS_ERR_TASK_PRIORITY (202) +#define OS_ERR_TASK_PRIORITY_INVALID (203) -/* Event object */ +// Event object #define OS_ERR_EVENT_INVALID (210) #define OS_ERR_EVENT_DELETE (212) -/* Waitlist (checked build) */ +// Waitlist (checked build) #define OS_ERR_WAITLIST_RING (220) #define OS_ERR_WAITLIST_PREV (221) #define OS_ERR_WAITLIST_NEXT (222) -/* Tick Hook */ +// Tick Hook #define OS_ERR_TICKHOOK_INVALID (223) #define OS_ERR_TICKHOOK_FUNC_INVALID (224) -/* Other potential problems discovered in checked build */ +// Other potential problems discovered in checked build #define OS_ERR_NOT_IN_REGION (225) -/* Cache related */ +// Cache related #define OS_ERR_NON_ALIGNED_INVALIDATE (230) -/* OS special build, or internal */ +// System timer config related +#define OS_ERR_NON_TIMERCYCLES_FUNC (235) +#define OS_ERR_NON_TIMERINTPENDING_FUNC (236) + +// embOS MPU related +#define OS_ERR_MPU_NOT_PRESENT (240) +#define OS_ERR_MPU_INVALID_REGION (241) +#define OS_ERR_MPU_INVALID_SIZE (242) +#define OS_ERR_MPU_INVALID_PERMISSION (243) +#define OS_ERR_MPU_INVALID_ALIGNMENT (244) +#define OS_ERR_MPU_INVALID_OBJECT (245) + +// OS version mismatch between library and RTOS.h +#define OS_ERR_VERSION_MISMATCH (253) + +// OS special build, or internal #define OS_ERR_TRIAL_LIMIT (254) /********************************************************************* * -* Trace identifier +* Trace identifiers for embOSView and SystemView * ********************************************************************** - -Identifier from 0 to 99 are reserved for the OS -Even when not all of those are currently used, -they may be defined in the future - */ +// +// Identifier from 0 to 99 and 128 to 255 are reserved for the OS. +// Identifier from 100 to 127 are reserved for the application. +// Even when not all of those are currently used, they may be defined in the future +// +#define OS_TRACE_ID_DEACTIVATE (1u) +#define OS_TRACE_ID_ACTIVATE (2u) +#define OS_TRACE_ID_TIMERCALLBACK (3u) +#define OS_TRACE_ID_DELAY (10u) +#define OS_TRACE_ID_DELAYUNTIL (11u) +#define OS_TRACE_ID_SETPRIORITY (12u) +#define OS_TRACE_ID_WAKETASK (13u) +#define OS_TRACE_ID_CREATETASK (14u) +#define OS_TRACE_ID_TERMINATETASK (15u) +#define OS_TRACE_ID_SUSPENDTASK (16u) +#define OS_TRACE_ID_RESUMETASK (17u) +#define OS_TRACE_ID_CREATETASK_EX (18u) +#define OS_TRACE_ID_YIELD (19u) +#define OS_TRACE_ID_WAITEVENT (20u) +#define OS_TRACE_ID_WAITEVENT_TIMED (21u) +#define OS_TRACE_ID_SIGNALEVENT (22u) +#define OS_TRACE_ID_CLEAREVENTS (23u) +#define OS_TRACE_ID_CREATEMB (30u) +#define OS_TRACE_ID_CLEARMB (31u) +#define OS_TRACE_ID_DELETEMB (32u) +#define OS_TRACE_ID_PUTMAIL (33u) +#define OS_TRACE_ID_GETMAIL (34u) +#define OS_TRACE_ID_PUTMAILCOND (35u) +#define OS_TRACE_ID_GETMAILCOND (36u) +#define OS_TRACE_ID_PUTMAIL_TIMED (37u) +#define OS_TRACE_ID_GETMAIL_TIMED (38u) +#define OS_TRACE_ID_WAITMAIL (39u) +#define OS_TRACE_ID_PUTMAIL1 (40u) +#define OS_TRACE_ID_GETMAIL1 (41u) +#define OS_TRACE_ID_PUTMAILCOND1 (42u) +#define OS_TRACE_ID_GETMAILCOND1 (43u) +#define OS_TRACE_ID_PUTMAIL_TIMED1 (44u) +#define OS_TRACE_ID_GETMAIL_TIMED1 (45u) +#define OS_TRACE_ID_PUTMAIL_F (46u) +#define OS_TRACE_ID_PUTMAIL_F1 (47u) +#define OS_TRACE_ID_PUTMAIL_FCOND (48u) +#define OS_TRACE_ID_PUTMAIL_FCOND1 (49u) +#define OS_TRACE_ID_CREATERSEMA (50u) +#define OS_TRACE_ID_USE (51u) +#define OS_TRACE_ID_UNUSE (52u) +#define OS_TRACE_ID_REQUEST (53u) +#define OS_TRACE_ID_GETSEMAVALUE (54u) +#define OS_TRACE_ID_DELETE_RSEMA (55u) +#define OS_TRACE_ID_WAITMAIL_TIMED (59u) +#define OS_TRACE_ID_CREATECSEMA (60u) +#define OS_TRACE_ID_DELETECSEMA (61u) +#define OS_TRACE_ID_SIGNALCSEMA (62u) +#define OS_TRACE_ID_WAITCSEMA (63u) +#define OS_TRACE_ID_WAITCSEMATIMED (64u) +#define OS_TRACE_ID_SIGNALCSEMA_MAX (65u) +#define OS_TRACE_ID_SET_CSEMAVALUE (66u) +#define OS_TRACE_ID_CSEMAREQUEST (67u) +#define OS_TRACE_ID_CREATETIMER (70u) +#define OS_TRACE_ID_DELETETIMER (71u) +#define OS_TRACE_ID_STARTTIMER (72u) +#define OS_TRACE_ID_STOPTIMER (73u) +#define OS_TRACE_ID_RETRIGGERTIMER (74u) +#define OS_TRACE_ID_SETTIMERPERIOD (75u) +#define OS_TRACE_ID_CREATETIMER_EX (76u) +#define OS_TRACE_ID_MALLOC (80u) +#define OS_TRACE_ID_FREE (81u) +#define OS_TRACE_ID_REALLOC (82u) +#define OS_TRACE_ID_MEMF_CREATE (90u) +#define OS_TRACE_ID_MEMF_DELETE (91u) +#define OS_TRACE_ID_MEMF_ALLOC (92u) +#define OS_TRACE_ID_PREEMPT (128u) +#define OS_TRACE_ID_TASK_READY (129u) +#define OS_TRACE_ID_TICK (130u) +#define OS_TRACE_ID_DELAYUS (131u) +#define OS_TRACE_ID_SUSPENDALL (132u) +#define OS_TRACE_ID_RESUMEALL (133u) +#define OS_TRACE_ID_WAITSEVENT (134u) +#define OS_TRACE_ID_WAITSEVENT_TIMED (135u) +#define OS_TRACE_ID_EVENTPULSE (136u) +#define OS_TRACE_ID_EVENTRESET (137u) +#define OS_TRACE_ID_EVENTSET (138u) +#define OS_TRACE_ID_EVENTWAIT (139u) +#define OS_TRACE_ID_EVENTWAIT_TIMED (140u) +#define OS_TRACE_ID_CREATE_EVENT (141u) +#define OS_TRACE_ID_CREATE_EVENT_EX (142u) +#define OS_TRACE_ID_DELETE_EVENT (143u) +#define OS_TRACE_ID_PEEKMAIL (144u) +#define OS_TRACE_ID_CREATE_Q (145u) +#define OS_TRACE_ID_DELETE_Q (146u) +#define OS_TRACE_ID_Q_CLEAR (147u) +#define OS_TRACE_ID_Q_PUT (148u) +#define OS_TRACE_ID_Q_PUT_COND (149u) +#define OS_TRACE_ID_Q_PUT_TIMED (150u) +#define OS_TRACE_ID_Q_GET (151u) +#define OS_TRACE_ID_Q_GET_COND (152u) +#define OS_TRACE_ID_Q_GET_TIMED (153u) +#define OS_TRACE_ID_Q_PEEK (154u) +#define OS_TRACE_ID_Q_PURGE (155u) +#define OS_TRACE_ID_MEMF_ALLOCTIMED (156u) +#define OS_TRACE_ID_MEMF_FREE (157u) +#define OS_TRACE_ID_MEMF_RELEASE (158u) +#define OS_TRACE_ID_MEMF_REQUEST (159u) +#define OS_TRACE_ID_TS_CFG (160u) +#define OS_TRACE_ID_START_TRACE (161u) +#define OS_TRACE_ID_OBJECTNAME (162u) +#define OS_TRACE_ID_USE_TIMED (163u) +#define OS_TRACE_ID_DEFINE_ISR (164u) +#define OS_TRACE_ID_ISR_BEGIN (165u) +#define OS_TRACE_ID_ISR_RESUME (166u) +#define OS_TRACE_ID_SETTASKNAME (167u) +#define OS_TRACE_ID_ADJUSTTIME (168u) +#define OS_TRACE_ID_EVENTGET (169u) +#define OS_TRACE_ID_GETRESETMODE (170u) +#define OS_TRACE_ID_SETRESETMODE (171u) +#define OS_TRACE_ID_GETNUMIDLETICKS (172u) +#define OS_TRACE_ID_GETNUMTASKS (173u) +#define OS_TRACE_ID_GETTASKPRIO (174u) +#define OS_TRACE_ID_GETSUSPENDCNT (175u) +#define OS_TRACE_ID_MAIL_GETPTR (176u) +#define OS_TRACE_ID_POWER_USAGEINC (177u) +#define OS_TRACE_ID_POWER_USAGEDEC (178u) +#define OS_TRACE_ID_POWER_GETMASK (179u) +#define OS_TRACE_ID_SETINIT_SUSPENDCNT (180u) +#define OS_TRACE_ID_GETTIME_US (181u) +#define OS_TRACE_ID_GETTIME_US64 (182u) +#define OS_TRACE_ID_TICK_HANDLE_EX (183u) +#define OS_TRACE_ID_TICK_HANDLE_NOHOOK (184u) +#define OS_TRACE_ID_TICK_ADDHOOK (185u) +#define OS_TRACE_ID_TICK_REMOVEHOOK (186u) +#define OS_TRACE_ID_START_TICKLESS (187u) +#define OS_TRACE_ID_STOP_TICKLESS (188u) +#define OS_TRACE_ID_GETCSEMA_VALUE (189u) +#define OS_TRACE_ID_GETEVENTS_OCCURRED (190u) +#define OS_TRACE_ID_ISTASK (191u) +#define OS_TRACE_ID_Q_GETMSGCNT (192u) +#define OS_TRACE_ID_Q_GETMSGSIZE (193u) +#define OS_TRACE_ID_Q_ISUNUSE (194u) +#define OS_TRACE_ID_SET_TIMESLICE (195u) +#define OS_TRACE_ID_GET_RESOURCEOWNER (196u) +#define OS_TRACE_ID_GET_TIMERPERIOD (197u) +#define OS_TRACE_ID_GET_TIMERSTATUS (198u) +#define OS_TRACE_ID_GET_TIMERVALUE (199u) +#define OS_TRACE_ID_TIMING_START (200u) +#define OS_TRACE_ID_TIMING_END (201u) +#define OS_TRACE_ID_TIMING_GETUS (202u) +#define OS_TRACE_ID_MAIL_GETPTRCOND (203u) +#define OS_TRACE_ID_MAIL_PURGE (204u) +#define OS_TRACE_ID_Q_PUT_EX (205u) +#define OS_TRACE_ID_Q_PUT_COND_EX (206u) +#define OS_TRACE_ID_Q_PUT_TIMED_EX (207u) +#define OS_TRACE_ID_SPINLOCK_CREATE (208u) +#define OS_TRACE_ID_SPINLOCK_SW_CREATE (209u) +#define OS_TRACE_ID_SPINLOCK_LOCK (210u) +#define OS_TRACE_ID_SPINLOCK_SW_LOCK (211u) +#define OS_TRACE_ID_SPINLOCK_UNLOCK (212u) +#define OS_TRACE_ID_SPINLOCK_SW_UNLOCK (213u) +#define OS_TRACE_ID_TRIGGERTIMER (214u) +#define OS_TRACE_ID_ADDTERMINATEHOOK (215u) +#define OS_TRACE_ID_REMOVEALLTERMINATEHOOKS (216u) +#define OS_TRACE_ID_REMOVETERMINATEHOOK (217u) +#define OS_TRACE_ID_CLEAREVENTS_EX (218u) +#define OS_TRACE_ID_EVENTGETMASK (219u) +#define OS_TRACE_ID_EVENTSETMASK (220u) +#define OS_TRACE_ID_EVENTWAITMASK (221u) +#define OS_TRACE_ID_EVENTWAITMASKTIMED (222u) +#define OS_TRACE_ID_WD_ADD (223u) +#define OS_TRACE_ID_WD_CHECK (224u) +#define OS_TRACE_ID_WD_CONFIG (225u) +#define OS_TRACE_ID_WD_REMOVE (226u) +#define OS_TRACE_ID_WD_TRIGGER (227u) +#define OS_TRACE_ID_EVENTSETMASKMODE (228u) +#define OS_TRACE_ID_EVENTGETMASKMODE (229u) -#define OS_TRACE_ID_DEACTIVATE (1u) -#define OS_TRACE_ID_ACTIVATE (2u) -#define OS_TRACE_ID_TIMERCALLBACK (3u) +// +// SystemView API IDs start at offset 32 whereas embOSView IDs starts at offset 0. +// This offset is added for SystemView in order to maintain compatibility with embOSView. +// +#define OS_TRACE_API_OFFSET (32u) -/* Task group */ -#define OS_TRACE_ID_DELAY (10u) -#define OS_TRACE_ID_DELAYUNTIL (11u) -#define OS_TRACE_ID_SETPRIORITY (12u) -#define OS_TRACE_ID_WAKETASK (13u) -#define OS_TRACE_ID_CREATETASK (14u) -#define OS_TRACE_ID_TERMINATETASK (15u) -#define OS_TRACE_ID_SUSPENDTASK (16u) -#define OS_TRACE_ID_RESUMETASK (17u) -#define OS_TRACE_ID_CREATETASK_EX (18u) -#define OS_TRACE_ID_YIELD (19u) +// +// SystemView trace macros (could also be used for any other trace tool) +// +#if (OS_PROFILE != 0) + #define TRACE_RECORD_TASK_INFO(pTask) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordTaskInfo((pTask)); } + #define TRACE_RECORD_API_VOID(Id) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordVoid ((Id) + OS_TRACE_API_OFFSET); } + #define TRACE_RECORD_API_U32(Id, Para0) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32 ((Id) + OS_TRACE_API_OFFSET, (OS_U32)(Para0)); } + #define TRACE_RECORD_API_PTR(Id, Para0) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32 ((Id) + OS_TRACE_API_OFFSET, OS_Global.pTrace->pfPtrToId((OS_U32)(Para0))); } + #define TRACE_RECORD_API_U32X2(Id, Para0, Para1) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32x2((Id) + OS_TRACE_API_OFFSET, (OS_U32)(Para0), (OS_U32)(Para1)); } + #define TRACE_RECORD_API_PTR_U32(Id, Para0, Para1) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32x2((Id) + OS_TRACE_API_OFFSET, OS_Global.pTrace->pfPtrToId((OS_U32)(Para0)), (OS_U32)(Para1)); } + #define TRACE_RECORD_API_U32X3(Id, Para0, Para1, Para2) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32x3((Id) + OS_TRACE_API_OFFSET, (OS_U32)(Para0), (OS_U32)(Para1), (OS_U32)(Para2)); } + #define TRACE_RECORD_API_PTR_U32X2(Id, Para0, Para1, Para2) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32x3((Id) + OS_TRACE_API_OFFSET, OS_Global.pTrace->pfPtrToId((OS_U32)(Para0)), (OS_U32)(Para1), (OS_U32)(Para2)); } + #define TRACE_RECORD_API_U32X4(Id, Para0, Para1, Para2, Para3) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32x4((Id) + OS_TRACE_API_OFFSET, (OS_U32)(Para0), (OS_U32)(Para1), (OS_U32)(Para2), (OS_U32)(Para3)); } + #define TRACE_RECORD_API_PTR_U32X3(Id, Para0, Para1, Para2, Para3) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32x4((Id) + OS_TRACE_API_OFFSET, OS_Global.pTrace->pfPtrToId((OS_U32)(Para0)), (OS_U32)(Para1), (OS_U32)(Para2), (OS_U32)(Para3)); } + #define TRACE_ON_ISR_ENTER() if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordEnterISR(); } + #define TRACE_ON_ISR_EXIT() if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordExitISR(); } + #define TRACE_ON_ISR_EXIT_TO_SCHEDULER() if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordExitISRToScheduler(); } + #define TRACE_ON_TASK_START_EXEC(TaskId) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordTaskStartExec((OS_U32)(TaskId)); } + #define TRACE_ON_TASK_STOP_EXEC() if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordTaskStopExec(); } + #define TRACE_ON_TASK_START_READY(TaskId) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordTaskStartReady((OS_U32)(TaskId)); } + #define TRACE_ON_TASK_STOP_READY(TaskId, Para0) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordTaskStopReady((OS_U32)(TaskId), (unsigned int)(Para0)); } + #define TRACE_ON_TASK_CREATE(TaskId) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordTaskCreate((OS_U32)(TaskId)); } + #define TRACE_ON_IDLE() if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordIdle(); } + #define TRACE_ON_TIMER_ENTER(TimerId) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordEnterTimer((OS_U32)(TimerId)); } + #define TRACE_ON_TIMER_EXIT() if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordExitTimer(); } +#if (OS_TRACE_RECORD_API_END != 0) + #define TRACE_RECORD_API_END(Id) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordEndCall((Id) + OS_TRACE_API_OFFSET); } + #define TRACE_RECORD_API_END_U32(Id, Para0) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordEndCallU32((Id) + OS_TRACE_API_OFFSET, (OS_U32)(Para0)); } +#else + #define TRACE_RECORD_API_END(Id) + #define TRACE_RECORD_API_END_U32(Id, Para0) +#endif + #define TRACE_ON_TASK_TERMINATED(TaskId) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordTaskTerminate((OS_U32)(TaskId)); } + #define TRACE_RECORD_API_PTR_U32X4(Id, Para0, Para1, Para2, Para3, Para4) if (OS_Global.pTrace != NULL) {OS_Global.pTrace->pfRecordU32x5((Id) + OS_TRACE_API_OFFSET, OS_Global.pTrace->pfPtrToId((OS_U32)(Para0)), (OS_U32)(Para1), (OS_U32)(Para2), (OS_U32)(Para3), (OS_U32)(Para4)); } +#else + #define TRACE_RECORD_TASK_INFO(pTask) + #define TRACE_RECORD_API_VOID(Id) + #define TRACE_RECORD_API_U32(Id, Para0) + #define TRACE_RECORD_API_PTR(Id, Para0) + #define TRACE_RECORD_API_U32X2(Id, Para0, Para1) + #define TRACE_RECORD_API_PTR_U32(Id, Para0, Para1) + #define TRACE_RECORD_API_U32X3(Id, Para0, Para1, Para2) + #define TRACE_RECORD_API_PTR_U32X2(Id, Para0, Para1, Para2) + #define TRACE_RECORD_API_U32X4(Id, Para0, Para1, Para2, Para3) + #define TRACE_RECORD_API_PTR_U32X3(Id, Para0, Para1, Para2, Para3) + #define TRACE_ON_ISR_ENTER() + #define TRACE_ON_ISR_EXIT() + #define TRACE_ON_ISR_EXIT_TO_SCHEDULER() + #define TRACE_ON_TASK_START_EXEC(TaskId) + #define TRACE_ON_TASK_STOP_EXEC() + #define TRACE_ON_TASK_START_READY(TaskId) + #define TRACE_ON_TASK_STOP_READY(TaskId, Para0) + #define TRACE_ON_TASK_CREATE(TaskId) + #define TRACE_ON_IDLE() + #define TRACE_ON_TIMER_ENTER(TimerId) + #define TRACE_ON_TIMER_EXIT() + #define TRACE_RECORD_API_END(Id) + #define TRACE_RECORD_API_END_U32(Id, Para0) + #define TRACE_ON_TASK_TERMINATED(TaskId) + #define TRACE_RECORD_API_PTR_U32X4(Id, Para0, Para1, Para2, Para3, Para4) +#endif -/* Event group */ -#define OS_TRACE_ID_WAITEVENT (20u) -#define OS_TRACE_ID_WAITEVENT_TIMED (21u) -#define OS_TRACE_ID_SIGNALEVENT (22u) -#define OS_TRACE_ID_CLEAREVENTS (23u) +#define OS_TRACE_API_VOID(Id) { OS_TRACE_VOID(Id); \ + TRACE_RECORD_API_VOID(Id); \ + } -/* Mailbox group */ -#define OS_TRACE_ID_CREATEMB (30u) -#define OS_TRACE_ID_CLEARMB (31u) -#define OS_TRACE_ID_DELETEMB (32u) -#define OS_TRACE_ID_PUTMAIL (33u) -#define OS_TRACE_ID_GETMAIL (34u) -#define OS_TRACE_ID_PUTMAILCOND (35u) -#define OS_TRACE_ID_GETMAILCOND (36u) -#define OS_TRACE_ID_PUTMAIL_TIMED (37u) -#define OS_TRACE_ID_GETMAIL_TIMED (38u) -#define OS_TRACE_ID_WAITMAIL (39u) +#define OS_TRACE_API_U32(Id, Para0) { OS_TRACE_DATA(Id, Para0); \ + TRACE_RECORD_API_U32(Id, Para0); \ + } -#define OS_TRACE_ID_PUTMAIL1 (40u) -#define OS_TRACE_ID_GETMAIL1 (41u) -#define OS_TRACE_ID_PUTMAILCOND1 (42u) -#define OS_TRACE_ID_GETMAILCOND1 (43u) -#define OS_TRACE_ID_PUTMAIL_TIMED1 (44u) -#define OS_TRACE_ID_GETMAIL_TIMED1 (45u) - -#define OS_TRACE_ID_PUTMAIL_F (46u) -#define OS_TRACE_ID_PUTMAIL_F1 (47u) -#define OS_TRACE_ID_PUTMAIL_FCOND (48u) -#define OS_TRACE_ID_PUTMAIL_FCOND1 (49u) - -/* Resource group */ -#define OS_TRACE_ID_CREATERSEMA (50u) -#define OS_TRACE_ID_USE (51u) -#define OS_TRACE_ID_UNUSE (52u) -#define OS_TRACE_ID_REQUEST (53u) -#define OS_TRACE_ID_GETSEMAVALUE (54u) -#define OS_TRACE_ID_DELETE_RSEMA (55u) - -#define OS_TRACE_ID_WAITMAIL_TIMED (59u) - -/* Counting Semaphore group */ -#define OS_TRACE_ID_CREATECSEMA (60u) -#define OS_TRACE_ID_DELETECSEMA (61u) -#define OS_TRACE_ID_SIGNALCSEMA (62u) -#define OS_TRACE_ID_WAITCSEMA (63u) -#define OS_TRACE_ID_WAITCSEMATIMED (64u) -#define OS_TRACE_ID_SIGNALCSEMA_MAX (65u) -#define OS_TRACE_ID_SET_CSEMAVALUE (66u) -#define OS_TRACE_ID_CSEMAREQUEST (67u) - -/* Timer group */ -#define OS_TRACE_ID_CREATETIMER (70u) -#define OS_TRACE_ID_DELETETIMER (71u) -#define OS_TRACE_ID_STARTTIMER (72u) -#define OS_TRACE_ID_STOPTIMER (73u) -#define OS_TRACE_ID_RETRIGGERTIMER (74u) -#define OS_TRACE_ID_SETTIMERPERIOD (75u) -#define OS_TRACE_ID_CREATETIMER_EX (76u) - -/* Heap type memory management */ -#define OS_TRACE_ID_MALLOC (80u) -#define OS_TRACE_ID_FREE (81u) -#define OS_TRACE_ID_REALLOC (82u) - -/* Fixed block type memory management */ -#define OS_TRACE_ID_MEMF_CREATE (90u) -#define OS_TRACE_ID_MEMF_DELETE (91u) -#define OS_TRACE_ID_MEMF_ALLOC (92u) +#define OS_TRACE_API_PTR(Id, Para0) { OS_TRACE_PTR(Id, Para0); \ + TRACE_RECORD_API_PTR(Id, Para0); \ + } /********************************************************************* * @@ -1085,20 +1375,20 @@ they may be defined in the future bad pointers or uninitialized data structures */ -#if OS_DEBUG +#if (OS_DEBUG != 0) #define OS_ASSERT(Exp, ErrCode) { if (!(Exp)) {OS_Error(ErrCode); }} #else #define OS_ASSERT(Exp, ErrCode) #endif -#define OS_ASSERT_INT() OS_ASSERT((OS_InInt != 0u), OS_ERR_ILLEGAL_OUT_ISR) -#define OS_ASSERT_NOINT() OS_ASSERT((OS_InInt == 0u), OS_ERR_ILLEGAL_IN_ISR) -#define OS_ASSERT_NOTIMER() OS_ASSERT((OS_InTimer == 0u), OS_ERR_ILLEGAL_IN_TIMER) -#define OS_ASSERT_DICnt() OS_ASSERT(((OS_DICnt & 0xf0u) == 0u), OS_ERR_DICNT) +#define OS_ASSERT_INT() OS_ASSERT((OS_Global.InInt != 0u), OS_ERR_ILLEGAL_OUT_ISR) +#define OS_ASSERT_NOINT() OS_ASSERT((OS_Global.InInt == 0u), OS_ERR_ILLEGAL_IN_ISR) +#define OS_ASSERT_NOTIMER() OS_ASSERT((OS_InTimer == 0u), OS_ERR_ILLEGAL_IN_TIMER) +#define OS_ASSERT_DICnt() OS_ASSERT(((OS_DICnt & 0xF0u) == 0u), OS_ERR_DICNT) -#define OS_ASSERT_INIT_CALLED() OS_ASSERT((OS_InitCalled != 0u), OS_ERR_INIT_NOT_CALLED) +#define OS_ASSERT_INIT_CALLED() OS_ASSERT((OS_InitCalled != 0u), OS_ERR_INIT_NOT_CALLED) -#if OS_DEBUG +#if (OS_DEBUG != 0) // // OS_ASSERT_CPU_IN_ISR_MODE is typically called from OS_EnterInterrupt() and checks the hardware sate of the CPU // @@ -1107,56 +1397,6 @@ they may be defined in the future #define OS_ASSERT_CPU_IN_ISR_MODE() #endif -#if OS_DEBUG - #define OS_ERROR(ErrCode) OS_Error(ErrCode) -#else - #define OS_ERROR(ErrCode) -#endif - -/********************************************************************* -* -* Memory attributes -* -********************************************************************** -*/ - -#ifndef OS_STACKPTR - #define OS_STACKPTR -#endif - -#ifndef OS_SADDR - #ifdef SADDR - #define OS_SADDR SADDR - #else - #define OS_SADDR - #endif -#endif - -/* pointer modifier for data items */ -#ifndef OS_DATAPTR - #define OS_DATAPTR -#endif - -#ifndef OS_RSEMAPTR - #define OS_RSEMAPTR -#endif - -#ifndef OS_CSEMAPTR - #define OS_CSEMAPTR -#endif - -#ifndef OS_MBPTR - #define OS_MBPTR -#endif - -#ifndef OS_TCBPTR - #define OS_TCBPTR -#endif - -#ifndef OS_TIMERPTR - #define OS_TIMERPTR -#endif - #ifdef __cplusplus extern "C" { #endif @@ -1167,48 +1407,171 @@ they may be defined in the future * ********************************************************************** */ - +typedef struct OS_GLOBAL_STRUCT OS_GLOBAL; typedef struct OS_TASK_STRUCT OS_TASK; typedef struct OS_WAIT_LIST_STRUCT OS_WAIT_LIST; typedef struct OS_WAIT_OBJ_STRUCT OS_WAIT_OBJ; -typedef struct OS_WAIT_OBJ_EX_STRUCT OS_WAIT_OBJ_EX; - -typedef void voidRoutine(void); -typedef void OS_RX_CALLBACK(OS_U8 Data); -typedef void OS_ON_TERMINATE_FUNC(OS_CONST_PTR OS_TASK * pTask); +typedef void voidRoutine (void); +typedef void OS_RX_CALLBACK (OS_U8 Data); +typedef void OS_ON_TERMINATE_FUNC(OS_CONST_PTR OS_TASK* pTask); typedef void OS_TICK_HOOK_ROUTINE(void); - -typedef struct OS_GLOBAL_STRUCT OS_GLOBAL; - -#if OS_SUPPORT_TIMER -typedef void OS_TIMERROUTINE(void); -typedef void OS_TIMER_EX_ROUTINE(void * pVoid); -typedef void OS_TIMER_HANDLER (OS_GLOBAL* pGlobal); +#if (OS_SUPPORT_TIMER != 0) +typedef void OS_TIMERROUTINE (void); +typedef void OS_TIMER_EX_ROUTINE (void* pVoid); +typedef void OS_TIMER_HANDLER (OS_GLOBAL* pGlobal); #endif /********************************************************************** * * OS_WAIT_OBJ * OS_WAIT_LIST -* OS_WAIT_OBJ_EX */ struct OS_WAIT_OBJ_STRUCT { - OS_WAIT_LIST * pWaitList; -}; - -struct OS_WAIT_OBJ_EX_STRUCT { - OS_WAIT_OBJ WaitObj; - int v; + OS_WAIT_LIST* pWaitList; }; struct OS_WAIT_LIST_STRUCT { - OS_WAIT_LIST * pNext; /* Needs to be first element ! */ - OS_WAIT_LIST * pPrev; - OS_WAIT_OBJ * pWaitObj; - OS_TASK * pTask; + OS_WAIT_LIST* pNext; // Needs to be first element! + OS_WAIT_LIST* pPrev; + OS_WAIT_OBJ* pWaitObj; + OS_TASK* pTask; }; +/********************************************************************* +* +* Memory protection unit support +* +********************************************************************** +*/ +typedef enum { + OS_MPU_OBJTYPE_INVALID, + OS_MPU_OBJTYPE_TASK, + OS_MPU_OBJTYPE_RSEMA, + OS_MPU_OBJTYPE_CSEMA, + OS_MPU_OBJTYPE_EVENT, + OS_MPU_OBJTYPE_QUEUE, + OS_MPU_OBJTYPE_MAILBOX, + OS_MPU_OBJTYPE_SWTIMER, + OS_MPU_OBJTYPE_MEMF, + OS_MPU_OBJTYPE_TIMING +} OS_MPU_OBJTYPE; + +#if (OS_SUPPORT_MPU != 0) + +// +// embOS MPU macros and typedefs +// +#ifndef MAX_MPU_REGIONS + #define MAX_MPU_REGIONS 16u +#endif + +typedef enum { + OS_MPU_INVALID, // 0x00 + OS_MPU_NOACCESS, // 0x01 + OS_MPU_READONLY, // 0x02 + OS_MPU_READWRITE // 0x03 +} OS_MPU_DATA_PERMISSION; + +typedef enum { + OS_MPU_EXECUTION_ALLOWED, // 0x00 + OS_MPU_EXECUTION_DISALLOWED = 4 // 0x04 +} OS_MPU_CODE_PERMISSION; + +#define OS_MPU_DATA_PERMISSION_MASK 0x03u + +typedef enum { + OS_MPU_THREAD_STATE_PRIVILEGED, + OS_MPU_THREAD_STATE_UNPRIVILEGED +} OS_MPU_THREAD_STATE; + +typedef enum { + OS_MPU_ERROR_INVALID_REGION, + OS_MPU_ERROR_INVALID_OBJECT, + OS_MPU_ERROR_INVALID_API, + OS_MPU_ERROR_HARDFAULT, + OS_MPU_ERROR_MEMFAULT, + OS_MPU_ERROR_BUSFAULT, + OS_MPU_ERROR_USAGEFAULT, + OS_MPU_ERROR_SVC +} OS_MPU_ERRORCODE; + +typedef enum { + OS_MPU_SVC_OS_CALL, + OS_MPU_SVC_DEVICE_DRIVER +} OS_MPU_SVC_NUMBER; + +typedef struct OS_MPU_DEBUG_STRUCT { + OS_MPU_ERRORCODE Error; + OS_U32 pTask; + OS_U32 PC; + OS_U32 SP; + OS_U32 r0; + OS_U32 r1; + OS_U32 r2; + OS_U32 r3; + OS_U32 r12; +} OS_MPU_DEBUG; + +typedef struct OS_MPU_REGION_STRUCT { + OS_U32 BaseAddr; + OS_U32 Size; + OS_U32 Permissions; + OS_U32 Attributes; +} OS_MPU_REGION; + +typedef struct OS_MPU_OBJ_STRUCT { + OS_U32 BaseAddr; + OS_MPU_OBJTYPE Type; +} OS_MPU_OBJ; + +typedef struct OS_MPU_MEM_CONFIG_STRUCT { + OS_U32 ROM_BaseAddr; + OS_U32 ROM_Size; + OS_U32 RAM_BaseAddr; + OS_U32 RAM_Size; + OS_U32 OS_BaseAddr; + OS_U32 OS_Size; +} OS_MPU_MEM_CONFIG; + +typedef struct OS_MPU_STRUCT { + const OS_MPU_OBJ* pAllowedObjects; // Objects to which the task has access + OS_MPU_REGION Regions[MAX_MPU_REGIONS]; // Regions to have the task access + OS_MPU_THREAD_STATE ThreadState; // Current task privileged state +} OS_MPU; + +typedef struct OS_MPU_API_LIST_STRUCT { + void (*pfEnable) (void); + void (*pfSwitchToUnprivState) (voidRoutine* pRoutine); + void (*pfEnterPrivilegedState)(void); + void (*pfLeavePrivilegedState)(void); + OS_U32 (*pfGetPrivilegedState) (void); + void (*pfCallDeviceDriver) (OS_U32 Id, void* Param); + void* (*pfSaveAll) (void* pStack); + void* (*pfRestoreAll) (const void* pStack); +} OS_MPU_API_LIST; + +typedef void (*OS_MPU_DEVICE_DRIVER_FUNC) (void* p); +typedef void (*OS_MPU_ERROR_CALLBACK) (OS_TASK* pTask, OS_MPU_ERRORCODE ErrorCode); + +// +// Generic embOS-MPU API +// +void OS_MPU_Enable (void) OS_SECTION_ATTRIBUTE; +void OS_MPU_EnableEx (const OS_MPU_API_LIST* pAPIList) OS_SECTION_ATTRIBUTE; +void OS_MPU_ConfigMem (OS_U32 ROM_BaseAddr, OS_U32 ROM_Size, OS_U32 RAM_BaseAddr, OS_U32 RAM_Size, OS_U32 Unsecure_BaseAddr, OS_U32 Unsecure_Size) OS_SECTION_ATTRIBUTE; +void OS_MPU_SetDeviceDriverList (const OS_MPU_DEVICE_DRIVER_FUNC* p) OS_SECTION_ATTRIBUTE; +void OS_MPU_SetAllowedObjects (OS_TASK* pTask, const OS_MPU_OBJ* pObjList) OS_SECTION_ATTRIBUTE; +void OS_MPU_AddRegion (OS_TASK* pTask, OS_U32 BaseAddr, OS_U32 Size, OS_U32 Permissions, OS_U32 Attributes) OS_SECTION_ATTRIBUTE; +void OS_MPU_SetErrorCallback (OS_MPU_ERROR_CALLBACK pFunc) OS_SECTION_ATTRIBUTE; +void OS_MPU_SwitchToUnprivState (void) OS_SECTION_ATTRIBUTE; +void OS_MPU_SwitchToUnprivStateEx(voidRoutine* pRoutine, void OS_STACKPTR* pStack, OS_UINT StackSize) OS_SECTION_ATTRIBUTE; +void OS_MPU_CallDeviceDriver (OS_U32 Index, void* Param) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_MPU_THREAD_STATE OS_MPU_GetThreadState (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_MPU_ExtendTaskContext (void) OS_SECTION_ATTRIBUTE; +void OS_MPU_Error (OS_TASK* pTask, OS_MPU_ERRORCODE ErrorCode) OS_SECTION_ATTRIBUTE; + +#endif // OS_SUPPORT_MPU /********************************************************************** * @@ -1218,12 +1581,21 @@ struct OS_WAIT_LIST_STRUCT { * extension of the task context. * A pointer to this structure is part of the task control block * It is initialized by OS_ExtendTaskContext(); +* +* OS_EXTEND_TASK_CONTEXT_LINK +* +* This structure is used to have unlimited task context extensions as +* linked list. The last pNext item points to NULL. */ typedef struct OS_EXTEND_TASK_CONTEXT_STRUCT { - void (*pfSave) ( void OS_STACKPTR * pStack); - void (*pfRestore)(const void OS_STACKPTR * pStack); + void OS_STACKPTR* (*pfSave) ( void OS_STACKPTR* pStack); + void OS_STACKPTR* (*pfRestore)(const void OS_STACKPTR* pStack); } OS_EXTEND_TASK_CONTEXT; +typedef struct OS_EXTEND_TASK_CONTEXT_LINK_STRUCT { + const OS_EXTEND_TASK_CONTEXT* pTaskContext; + struct OS_EXTEND_TASK_CONTEXT_LINK_STRUCT* pNext; +} OS_EXTEND_TASK_CONTEXT_LINK; /********************************************************************** * @@ -1238,100 +1610,108 @@ struct OS_TASK_STRUCT { // Elements required for all builds // // Start of assembly relevant section. Do not move these elements - OS_TASK * pNext; // Points to the TCB of the next task in the list (with equal or lower priority). Needs to be first element ! - OS_REGS OS_STACKPTR * pStack; // Typically contains the stack pointer if the task is suspended. Needs to be second element ! + OS_TASK* pNext; // Points to the TCB of the next task in the list (with equal or lower priority). Needs to be first element ! + OS_REGS OS_STACKPTR* pStack; // Typically contains the stack pointer if the task is suspended. Needs to be second element ! // End of assembly relevant section - OS_WAIT_LIST * pWaitList; // Points to a waitable object if task is suspended. - OS_TIME Timeout; - OS_STAT Stat; - OS_PRIO Priority; - OS_TASK_EVENT Events; // Event storage - OS_TASK_EVENT EventMask; // Event mask + OS_WAIT_LIST* pWaitList; // Points to a waitable object if task is suspended. + OS_TIME Timeout; + OS_STAT Stat; + OS_PRIO Priority; + OS_PRIO BasePrio; + OS_TASK_EVENT Events; // Event storage + OS_TASK_EVENT EventMask; // Event mask // - // PPrev is required only in builds with doubly-linked task lists + // pPrev is required only in builds with doubly-linked task lists (Round Robin) // - #if OS_TASK_LIST_HAS_PPREV - OS_TASK * pPrev; // - #endif +#if (OS_TASK_LIST_HAS_PPREV != 0) + OS_TASK* pPrev; +#endif // // Elements required with "Track-name" functionality only. Typically available in all builds, but can be disabled at compile time // - #if OS_TRACKNAME - OS_ROM_DATA const char * Name; - #endif +#if (OS_TRACKNAME != 0) + OS_ROM_DATA const char* Name; +#endif // // Elements required with "Stack-check" functionality only. Available in stack-check and debug builds. // - #if OS_CHECKSTACK - OS_UINT StackSize; // Stack size in bytes. Not required for functionality, just for analysis - OS_U8 OS_STACKPTR* pStackBot; // First byte of stack. Not required for functionality, just for analysis - #endif +#if ((OS_CHECKSTACK != 0) || (OS_SUPPORT_MPU != 0)) + OS_UINT StackSize; // Stack size in bytes. Not required for functionality, just for analysis + OS_U8 OS_STACKPTR* pStackBot; // First byte of stack. Not required for functionality, just for analysis +#endif // // Elements required with profiling or debug builds // - #if (OS_SUPPORT_STAT) - OS_U32 NumActivations; // Counts how many times task has been activated - OS_U32 NumPreemptions; // Counts how many times task has been preempted - #endif +#if (OS_SUPPORT_STAT != 0) + OS_U32 NumActivations; // Counts how many times task has been activated + OS_U32 NumPreemptions; // Counts how many times task has been preempted +#endif // // Elements required with profiling builds // - #if OS_PROFILE - OS_U32 ExecTotal; // Time spent executing - OS_U32 ExecLast; // Time spent executing (Reference) - OS_U32 Load; // Profiling builds only: - #endif +#if (OS_PROFILE != 0) + OS_U32 ExecTotal; // Time spent executing + OS_U32 ExecLast; // Time spent executing (Reference) + OS_U32 Load; // Profiling builds only: +#endif // // Elements required with Round-robin functionality only. Typically available in all builds, but can be disabled at compile time // - #if OS_RR_SUPPORTED - OS_U8 TimeSliceRem; - OS_U8 TimeSliceReload; - #endif +#if (OS_RR_SUPPORTED != 0) + OS_U8 TimeSliceRem; + OS_U8 TimeSliceReload; +#endif // // Optional Save & Restore hook support (usually only for bigger CPUs) // - #if OS_SUPPORT_SAVE_RESTORE_HOOK - const OS_EXTEND_TASK_CONTEXT * pExtendContext; - #endif +#if (OS_SUPPORT_SAVE_RESTORE_HOOK != 0) + OS_EXTEND_TASK_CONTEXT_LINK pExtendContext; +#endif // // Optional thread local storage pointer // - #if OS_TASK_HAS_PTLS - #if (defined(OS_LIBMODE_XR) && (OS_SUPPORT_PTLS == 0)) - // XR-Build may not support TLS - #else - OS_TLS_PTR pTLS; - #endif - #endif +#if (OS_TASK_HAS_PTLS != 0) + #if (defined(OS_LIBMODE_XR) && (OS_SUPPORT_PTLS == 0)) + // XR-Build may not support TLS + #else + OS_TLS_PTR pTLS; + #endif +#endif + // + // Optional embOS MPU + // +#if OS_SUPPORT_MPU + OS_MPU MPU_Config; +#endif // // Elements required with debug builds // - #if OS_DEBUG - OS_U8 Id; // Debug builds only: Id of this control block. - #endif +#if (OS_DEBUG != 0) + OS_U8 Id; // Debug builds only: Id of this control block. +#endif // - // Allow port specific extension to the task control block. Not used in most ports + // Allow port specific extension to the task control block. Not used in most ports. // - #ifdef OS_TCB_CPU_EX - OS_TCB_CPU_EX - #endif +#ifdef OS_TCB_CPU_EX + OS_TCB_CPU_EX +#endif }; -#if OS_SUPPORT_TIMER +#if (OS_SUPPORT_TIMER != 0) + /********************************************************************** * * OS_TIMER */ -typedef struct OS_timer OS_TIMER; -struct OS_timer { - OS_TIMER * pNext; - voidRoutine* Hook; - OS_TIME Time; - OS_TIME Period; - char Active; -#if OS_DEBUG - char Id; +typedef struct OS_TIMER_STRUCT OS_TIMER; +struct OS_TIMER_STRUCT { + OS_TIMER* pNext; + OS_TIMERROUTINE* Hook; + OS_TIME Time; + OS_TIME Period; + char Active; +#if (OS_DEBUG != 0) + OS_U8 Id; #endif }; @@ -1340,9 +1720,9 @@ struct OS_timer { * OS_TIMER_EX */ typedef struct { - OS_TIMER Timer; - OS_TIMER_EX_ROUTINE * pfUser; - void * pData; + OS_TIMER Timer; + OS_TIMER_EX_ROUTINE* pfUser; + void* pData; } OS_TIMER_EX; #endif // OS_SUPPORT_TIMER @@ -1353,8 +1733,8 @@ typedef struct { */ typedef struct OS_TICK_HOOK_STRUCT OS_TICK_HOOK; struct OS_TICK_HOOK_STRUCT { - OS_TICK_HOOK* pNext; - OS_TICK_HOOK_ROUTINE * pfUser; + OS_TICK_HOOK* pNext; + OS_TICK_HOOK_ROUTINE* pfUser; }; /********************************************************************** @@ -1363,8 +1743,8 @@ struct OS_TICK_HOOK_STRUCT { */ typedef struct OS_ON_TERMINATE_HOOK_STRUCT OS_ON_TERMINATE_HOOK; struct OS_ON_TERMINATE_HOOK_STRUCT { - OS_ON_TERMINATE_HOOK * pNext; - OS_ON_TERMINATE_FUNC * pfUser; + OS_ON_TERMINATE_HOOK* pNext; + OS_ON_TERMINATE_FUNC* pfUser; }; /********************************************************************** @@ -1374,11 +1754,11 @@ struct OS_ON_TERMINATE_HOOK_STRUCT { typedef struct OS_RSEMA_STRUCT OS_RSEMA; struct OS_RSEMA_STRUCT { OS_WAIT_OBJ WaitObj; - OS_TASK * pTask; /* Owner */ - OS_U8 UseCnt; - OS_RSEMA * pNext; -#if OS_DEBUG - char Id; + OS_TASK* pTask; // Owner + OS_U8 UseCnt; + OS_RSEMA* pNext; +#if (OS_DEBUG != 0) + OS_U8 Id; #endif }; @@ -1389,10 +1769,10 @@ struct OS_RSEMA_STRUCT { typedef struct OS_CSEMA_STRUCT OS_CSEMA; struct OS_CSEMA_STRUCT { OS_WAIT_OBJ WaitObj; - OS_UINT Cnt; -#if OS_DEBUG - OS_CSEMA * pNext; - char Id; + OS_UINT Cnt; +#if (OS_DEBUG != 0) + OS_CSEMA* pNext; + OS_U8 Id; #endif }; @@ -1402,17 +1782,18 @@ struct OS_CSEMA_STRUCT { */ typedef struct OS_MAILBOX_STRUCT OS_MAILBOX; struct OS_MAILBOX_STRUCT { - OS_WAIT_OBJ WaitObj; -#if OS_LINK_MAILBOXES - OS_MAILBOX * pNext; + OS_WAIT_OBJ WaitObj; +#if (OS_LINK_MAILBOXES != 0) + OS_MAILBOX* pNext; #endif - char *pData; - OS_UINT nofMsg; - OS_UINT maxMsg; - OS_UINT iRd; - OS_U16 sizeofMsg; -#if OS_DEBUG - char Id; + char* pData; + volatile OS_UINT nofMsg; + OS_UINT maxMsg; + OS_UINT iRd; + OS_U16 sizeofMsg; + OS_BOOL InUse; +#if (OS_DEBUG != 0) + OS_U8 Id; #endif }; @@ -1423,81 +1804,134 @@ struct OS_MAILBOX_STRUCT { typedef struct OS_Q_STRUCT OS_Q; struct OS_Q_STRUCT { OS_WAIT_OBJ WaitObj; - OS_Q* pNext; /* ptr to next queue (for debugging / monitoring) */ - OS_U8* pData; - OS_UINT Size; - OS_UINT MsgCnt; - OS_UINT offFirst; - OS_UINT offLast; - OS_BOOL InUse; - OS_UINT InProgressCnt; -#if OS_DEBUG - char Id; + OS_Q* pNext; // Ptr to next queue (for debugging / monitoring) + OS_U8* pData; + OS_UINT Size; + OS_UINT MsgCnt; + OS_UINT offFirst; + OS_UINT offLast; + OS_BOOL InUse; + OS_UINT InProgressCnt; +#if (OS_DEBUG != 0) + OS_U8 Id; #endif }; +/********************************************************************** +* +* OS_Q_SRCLIST +*/ +typedef struct { + OS_CONST_PTR void* pSrc; + OS_UINT Size; +} OS_Q_SRCLIST; + /********************************************************************** * * OS_MEMF */ #ifndef OS_MEMF_MAX_ITEMS - #define OS_MEMF_MAX_ITEMS 20 + #define OS_MEMF_MAX_ITEMS 20 #endif -#define OS_MEMF_SIZEOF_BLOCKCONTROL 0 /* sizeof(int) in future version for debugging */ +#define OS_MEMF_SIZEOF_BLOCKCONTROL 0 // sizeof(int) in future version for debugging typedef struct OS_MEMF_STRUCT OS_MEMF; struct OS_MEMF_STRUCT { OS_WAIT_OBJ WaitObj; - OS_MEMF* pNext; /* ptr to next memory pool */ - void* pPool; - OS_UINT NumBlocks; - OS_UINT BlockSize; - OS_UINT NumFreeBlocks; - OS_UINT MaxUsed; - void* pFree; - #if OS_DEBUG - int aiPurpose[OS_MEMF_MAX_ITEMS]; - char Id; - #endif + OS_MEMF* pNext; // Ptr to next memory pool + void* pPool; + OS_UINT NumBlocks; + OS_UINT BlockSize; + OS_UINT NumFreeBlocks; + OS_UINT MaxUsed; + void* pFree; +#if (OS_DEBUG != 0) + int aiPurpose[OS_MEMF_MAX_ITEMS]; + OS_U8 Id; +#endif }; /********************************************************************** * * OS_EVENT */ -typedef struct OS_EVENT_STRUCT OS_EVENT; +typedef struct OS_EVENT_STRUCT OS_EVENT; /****** Reset modes for OS_EVENT objects *****************************/ typedef enum { - OS_EVENT_RESET_MODE_SEMIAUTO = 0 , // Same as previous mode, mix from automatic an manual reset - OS_EVENT_RESET_MODE_MANUAL, // Manual reset, event remains set when waiting task is resumed, has to be reset by task - OS_EVENT_RESET_MODE_AUTO, // automatic reset, event is automatically cleared when waiting task is resumed - OS_EVENT_RESET_MODE_COUNT // Number of modes + OS_EVENT_RESET_MODE_SEMIAUTO = 0, // Same as previous mode, mix from automatic an manual reset + OS_EVENT_RESET_MODE_MANUAL, // Manual reset, event remains set when waiting task is resumed, has to be reset by task + OS_EVENT_RESET_MODE_AUTO // automatic reset, event is automatically cleared when waiting task is resumed } OS_EVENT_RESET_MODE; +typedef enum { + OS_EVENT_MASK_MODE_OR_LOGIC = 0, // OR logic is used for event mask bits (default) + OS_EVENT_MASK_MODE_AND_LOGIC = 4 // AND logic is used for event mask bits +} OS_EVENT_MASK_MODE; + struct OS_EVENT_STRUCT { OS_WAIT_OBJ WaitObj; - OS_U8 Signaled; + OS_TASK_EVENT Signaled; OS_EVENT_RESET_MODE ResetMode; -#if OS_DEBUG - char Id; + OS_EVENT_MASK_MODE MaskMode; +#if (OS_DEBUG != 0) + OS_U8 Id; #endif }; +/********************************************************************** +* +* OS_SPINLOCK / OS_SPINLOCK_SW +*/ +#define OS_SPINLOCK volatile OS_UINT + +#ifndef OS_SPINLOCK_MAX_CORES + #define OS_SPINLOCK_MAX_CORES 4u +#endif + +typedef struct { + volatile OS_U32 Entering[OS_SPINLOCK_MAX_CORES]; + volatile OS_U32 Number[OS_SPINLOCK_MAX_CORES]; +} OS_SPINLOCK_SW; + +/********************************************************************** +* +* OS_WD - Watchdog support +*/ +typedef struct OS_WD_STRUCT OS_WD; +struct OS_WD_STRUCT { + OS_WD* pNext; + OS_TIME Reload; + OS_TIME Timedex; +}; + /********************************************************************** * * OS_TRACE_ENTRY */ typedef struct { OS_U32 Time; - void *pCurrentTask; - void *p; + void* pCurrentTask; + void* p; OS_U32 v; OS_U8 iRout; } OS_TRACE_ENTRY; +/********************************************************************* +* +* SysTimer Config +* +********************************************************************** +*/ +typedef struct { + OS_U32 TimerFreq; // e.g. 48000000 for 48MHz + OS_U32 TickFreq; // typ. 1000 for 1 KHz system tick + OS_BOOL IsUpCounter; // 0: Down counter. Interrupt on underflow. 1: Up counter, interrupt on compare + unsigned int (*pfGetTimerCycles) (void); // Callback function for reading HW timer value + unsigned int (*pfGetTimerIntPending)(void); // Callback function for reading timer interrupt pending state +} OS_SYSTIMER_CONFIG; /********************************************************************* * @@ -1506,16 +1940,14 @@ typedef struct { ********************************************************************** */ -/* - Handle DEFinition (storage is actually allocted) versus DEClaration - (reference) of RTOS variables depending upon who includes this header file. -*/ +// +// Handle DEFinition (storage is actually allocted) versus DEClaration +// (reference) of RTOS variables depending upon who includes this header file. +// #ifdef OSGLOBAL_C - #define OS_EXTERN /* Declare variables if included by RTOSKERN.C */ - #define OS_EXTERN_INIT(Var, Val) (Var)=(Val) + #define OS_EXTERN // Define variables if included by OS_Kern.c #else - #define OS_EXTERN extern /* Define variables if included by anyone else */ - #define OS_EXTERN_INIT(Var, Val) (Var) + #define OS_EXTERN extern // Declare variables if included by anyone else #endif /***** Mark start of memory pragma area ****************************/ @@ -1527,11 +1959,11 @@ typedef struct { /********************************************************************/ -typedef union { // Violates MISRA rule 18.4. We need a union for efficient scheduling +typedef union { int Dummy; // Make sure a full integer (32 bit on 32 bit CPUs) is used. struct { - OS_U8 Region; - OS_U8 DI; + volatile OS_U8 Region; + volatile OS_U8 DI; } Cnt; } OS_COUNTERS; @@ -1539,7 +1971,7 @@ typedef union { // Violates MISRA rule 18.4. We need a union for effici #define PENDING_DUMMY_BYTES OS_U8 aDummy[2]; #endif -typedef union { // Violates MISRA rule 18.4. We need a union for efficient scheduling +typedef union { OS_U32 All; // Make sure a full integer (32 bit on 32 bit CPUs) is used. struct { OS_U8 RoundRobin; @@ -1548,148 +1980,199 @@ typedef union { // Violates MISRA rule 18.4. We need a union for effici } Flag; } OS_PENDING; +typedef struct { + // + // Specific Trace Events + // + void (*pfRecordEnterISR) (void); + void (*pfRecordExitISR) (void); + void (*pfRecordExitISRToScheduler)(void); + void (*pfRecordTaskInfo) (const OS_TASK* pTask); + void (*pfRecordTaskCreate) (OS_U32 TaskId); + void (*pfRecordTaskStartExec) (OS_U32 TaskId); + void (*pfRecordTaskStopExec) (void); + void (*pfRecordTaskStartReady) (OS_U32 TaskId); + void (*pfRecordTaskStopReady) (OS_U32 TaskId, unsigned int Reason); + void (*pfRecordIdle) (void); + // + // Generic Trace Event logging + // + void (*pfRecordVoid) (unsigned int Id); + void (*pfRecordU32) (unsigned int Id, OS_U32 Para0); + void (*pfRecordU32x2) (unsigned int Id, OS_U32 Para0, OS_U32 Para1); + void (*pfRecordU32x3) (unsigned int Id, OS_U32 Para0, OS_U32 Para1, OS_U32 Para2); + void (*pfRecordU32x4) (unsigned int Id, OS_U32 Para0, OS_U32 Para1, OS_U32 Para2, OS_U32 Para3); + OS_U32(*pfPtrToId) (OS_U32 Ptr); + void (*pfRecordEnterTimer) (OS_U32 TimerID); + void (*pfRecordExitTimer) (void); + void (*pfRecordEndCall) (unsigned int Id); + void (*pfRecordEndCallU32) (unsigned int Id, OS_U32 Para0); + void (*pfRecordTaskTerminate) (OS_U32 TaskId); + void (*pfRecordU32x5) (unsigned int Id, OS_U32 Para0, OS_U32 Para1, OS_U32 Para2, OS_U32 Para3, OS_U32 Para4); +} OS_TRACE_API; + +void OS_SetTraceAPI(const OS_TRACE_API* pTraceAPI) OS_SECTION_ATTRIBUTE; + struct OS_GLOBAL_STRUCT { - OS_COUNTERS Counters; - OS_PENDING Pending; - OS_TASK * pCurrentTask; // Pointer to current Task -#if OS_SUPPORT_INT_PRIORITY - OS_IPL_DI_TYPE Ipl_DI; - OS_IPL_EI_TYPE Ipl_EI; + OS_COUNTERS Counters; + OS_PENDING Pending; + OS_TASK* pCurrentTask; // Pointer to current Task +#if (OS_SUPPORT_INT_PRIORITY != 0) + OS_IPL_DI_TYPE Ipl_DI; + OS_IPL_EI_TYPE Ipl_EI; #endif - OS_TASK * pTask; // Linked list of all Tasks - OS_TASK volatile * volatile pActiveTask; -#if OS_SUPPORT_TIMER - OS_TIMER * pTimer; // Linked list of all active Timers - OS_TIMER * pCurrentTimer; // Actual expired timer which called callback - OS_TIMER_HANDLER* pfCheckTimer; // Timer handler function, set when OS_StartTimer() is called + OS_TASK* pTask; // Linked list of all Tasks + OS_TASK volatile* volatile pActiveTask; +#if (OS_SUPPORT_TIMER != 0) + OS_TIMER* pTimer; // Linked list of all active Timers + OS_TIMER* pCurrentTimer; // Actual expired timer which called callback + OS_TIMER_HANDLER* pfCheckTimer; // Timer handler function, set when OS_StartTimer() is called #endif // OS_SUPPORT_TIMER - volatile OS_I32 Time; - OS_TIME TimeDex; -#if OS_RR_SUPPORTED - OS_U8 TimeSlice; - OS_U8 TimeSliceAtStart; + volatile OS_I32 Time; + OS_TIME TimeDex; +#ifdef OS_U64 + OS_U64 TickCnt; +#endif +#if (OS_RR_SUPPORTED != 0) + OS_U8 TimeSlice; + OS_U8 TimeSliceAtStart; +#endif +#if (OS_SUPPORT_TICKLESS != 0) + OS_TIME TicklessFactor; + OS_BOOL TicklessExpired; + voidRoutine* pfEndTicklessMode; +#endif +#if (OS_PROFILE != 0) + const OS_TRACE_API* pTrace; + OS_U8 ProfilingOn; +#endif +#if ((OS_DEBUG != 0) || (OS_TRACE != 0)) + OS_U8 InInt; // Used in Debug builds of embOS only +#endif +#if OS_SUPPORT_MPU + OS_MPU_MEM_CONFIG MemConfig; // RAM/ROM memory settings +#if (OS_DEBUG != 0) + OS_MPU_DEBUG MPUDebug; #endif -#if OS_SUPPORT_TICKLESS - OS_TIME TicklessFactor; - OS_BOOL TicklessExpired; - voidRoutine *pfEndTicklessMode; #endif }; -/* Translation macros for compatibility with older versions */ -#define OS_pTask OS_Global.pTask -#define OS_pCurrentTask OS_Global.pCurrentTask -#define OS_pActiveTask OS_Global.pActiveTask -#define OS_pTimer OS_Global.pTimer -#define OS_pCurrentTimer OS_Global.pCurrentTimer -#define OS_Counters OS_Global.Counters -#define OS_Pending OS_Global.Pending -#define OS_Ipl_DI OS_Global.Ipl_DI -#define OS_Ipl_EI OS_Global.Ipl_EI -#define OS_Time OS_Global.Time -#define OS_TimeDex OS_Global.TimeDex -#if OS_RR_SUPPORTED - #define OS_TimeSlice OS_Global.TimeSlice - #define OS_TimeSliceAtStart OS_Global.TimeSliceAtStart +// +// Translation macros for compatibility with older versions +// +#define OS_pTask OS_Global.pTask +#define OS_pCurrentTask OS_Global.pCurrentTask +#define OS_pActiveTask OS_Global.pActiveTask +#define OS_pTimer OS_Global.pTimer +#define OS_pCurrentTimer OS_Global.pCurrentTimer +#define OS_Counters OS_Global.Counters +#define OS_Pending OS_Global.Pending +#define OS_Ipl_DI OS_Global.Ipl_DI +#define OS_Ipl_EI OS_Global.Ipl_EI +#define OS_Time OS_Global.Time +#define OS_TimeDex OS_Global.TimeDex +#if (OS_RR_SUPPORTED != 0) + #define OS_TimeSlice OS_Global.TimeSlice + #define OS_TimeSliceAtStart OS_Global.TimeSliceAtStart #endif -#if OS_COMPILER_STORAGE_MODIFIER_LEFT /* default */ +#if (OS_COMPILER_STORAGE_MODIFIER_LEFT != 0) // default - OS_EXTERN OS_SADDR OS_U8 OS_EXTERN_INIT(OS_IntMSInc, 1u); - OS_EXTERN OS_SADDR volatile OS_U8 OS_Status; - OS_EXTERN OS_SADDR OS_BOOL OS_Running; - OS_EXTERN OS_SADDR OS_U8 OS_InitialSuspendCnt; - OS_EXTERN OS_SADDR OS_U8 OS_InInt; + OS_EXTERN OS_SADDR volatile OS_U8 OS_Status; //lint !e9075 MISRA C:2012 Rule 8.4, required + OS_EXTERN OS_SADDR OS_BOOL OS_Running; //lint !e9075 MISRA C:2012 Rule 8.4, required + OS_EXTERN OS_SADDR OS_U8 OS_InitialSuspendCnt; //lint !e9075 MISRA C:2012 Rule 8.4, required - #if OS_SUPPORT_TICKSTEP - OS_EXTERN OS_SADDR volatile OS_U8 OS_TickStep; - OS_EXTERN OS_SADDR volatile int OS_TickStepTime; + #if (OS_SUPPORT_TICKSTEP != 0) + OS_EXTERN OS_SADDR volatile OS_U8 OS_TickStep; //lint !e9075 MISRA C:2012 Rule 8.4, required + OS_EXTERN OS_SADDR volatile int OS_TickStepTime; //lint !e9075 MISRA C:2012 Rule 8.4, required #endif - OS_EXTERN OS_SADDR OS_UINT OS_TicksPerMS; - OS_EXTERN OS_SADDR int OS_IntTicksInc; - #if OS_PROFILE - OS_EXTERN OS_SADDR OS_U32 OS_TS_ExecStart; - OS_EXTERN OS_SADDR OS_U8 ProfilingOn; + OS_EXTERN OS_SADDR OS_UINT OS_TicksPerMS; //lint !e9075 MISRA C:2012 Rule 8.4, required + OS_EXTERN OS_SADDR int OS_IntTicksInc; //lint !e9075 MISRA C:2012 Rule 8.4, required + #if (OS_PROFILE != 0) + OS_EXTERN OS_SADDR OS_U32 OS_TS_ExecStart; //lint !e9075 MISRA C:2012 Rule 8.4, required #endif - #if OS_DEBUG - OS_EXTERN OS_SADDR OS_U8 OS_InTimer; - OS_EXTERN OS_SADDR OS_U8 OS_InitCalled; + #if (OS_DEBUG != 0) + OS_EXTERN OS_SADDR OS_U8 OS_InTimer; //lint !e9075 MISRA C:2012 Rule 8.4, required + OS_EXTERN OS_SADDR OS_U8 OS_InitCalled; //lint !e9075 MISRA C:2012 Rule 8.4, required #endif - #if OS_SUPPORT_POWER - OS_EXTERN OS_SADDR OS_U8 OS_POWER_Levels[OS_POWER_NUM_COUNTERS]; - #endif + //***** Variables for CPU load measurement are declared global. This allows showing them in a debugger + OS_EXTERN OS_SADDR volatile OS_INT OS_CPU_Load; //lint !e9075 MISRA C:2012 Rule 8.4, required + OS_EXTERN OS_SADDR volatile OS_I32 OS_IdleCnt; //lint !e9075 MISRA C:2012 Rule 8.4, required - /****** Variables for CPU load measurement are declared global. This allows showing them in a debugger ****/ - OS_EXTERN OS_SADDR volatile OS_INT OS_CPU_Load; - OS_EXTERN OS_SADDR volatile OS_I32 OS_IdleCnt; + // + // Pointers *** + // Unfortunately there is no real standard on how to define/declare + // pointers properly with extended memory attributes. There are + // currently 2 different standards, which we both support. + // - /*** Pointers *** - Unfortunately there is no real standard on how to define/declare - pointers properly with extended memory attributes. There are - currently 2 different standards, which we both support. - */ - - #if OS_COMPILER_LOCATION_LEFT - extern OS_SADDR OS_GLOBAL OS_Global; /* Major OS variables, initialized in OSGlobal.c */ - OS_EXTERN OS_SADDR OS_RSEMA * OS_pRSema; - OS_EXTERN OS_SADDR OS_Q * OS_pQHead; - #if OS_LINK_MAILBOXES - OS_EXTERN OS_SADDR OS_MAILBOX * OS_pMailbox; + #if (OS_COMPILER_LOCATION_LEFT != 0) + extern OS_SADDR OS_GLOBAL OS_Global; // Major OS variables + OS_EXTERN OS_SADDR OS_RSEMA* OS_pRSema; //lint !e9075 MISRA C:2012 Rule 8.4, required + OS_EXTERN OS_SADDR OS_Q* OS_pQHead; //lint !e9075 MISRA C:2012 Rule 8.4, required + #if (OS_LINK_MAILBOXES != 0) + OS_EXTERN OS_SADDR OS_MAILBOX* OS_pMailbox; //lint !e9075 MISRA C:2012 Rule 8.4, required #endif - #if OS_DEBUG - OS_EXTERN OS_SADDR OS_CSEMA * OS_pCSema; + #if (OS_DEBUG != 0) + OS_EXTERN OS_SADDR OS_CSEMA* OS_pCSema; //lint !e9075 MISRA C:2012 Rule 8.4, required #endif - OS_EXTERN OS_SADDR OS_MEMF * OS_pMEMF; /* linked list of all fixed size memory pools */ - OS_EXTERN OS_SADDR OS_TICK_HOOK * OS_pTickHook; /* linked list of all tick hook functions */ - #if OS_SUPPORT_PTLS - OS_EXTERN OS_SADDR OS_TLS_PTR OS_pTLS; /* Global pointer to thread local storage */ + OS_EXTERN OS_SADDR OS_MEMF* OS_pMEMF; /* linked list of all fixed size memory pools */ /*lint !e9075 MISRA C:2012 Rule 8.4, required */ + OS_EXTERN OS_SADDR OS_TICK_HOOK* OS_pTickHook; /* linked list of all tick hook functions */ /*lint !e9075 MISRA C:2012 Rule 8.4, required */ + #if (OS_SUPPORT_PTLS != 0) + OS_EXTERN OS_SADDR OS_TLS_PTR OS_pTLS; // Global pointer to thread local storage + #endif + #if (OS_SUPPORT_SAVE_RESTORE_HOOK != 0) + OS_EXTERN OS_SADDR OS_EXTEND_TASK_CONTEXT* OS_pDefaultTaskContextExtension; //lint !e9075 MISRA C:2012 Rule 8.4, required #endif #else - extern OS_GLOBAL OS_SADDR OS_Global; /* Major OS variables, initialized in OSGlobal.c */ - OS_EXTERN OS_RSEMA * OS_SADDR OS_pRSema; - OS_EXTERN OS_Q * OS_SADDR OS_pQHead; + extern OS_GLOBAL OS_SADDR OS_Global; // Major OS variables + OS_EXTERN OS_RSEMA* OS_SADDR OS_pRSema; + OS_EXTERN OS_Q* OS_SADDR OS_pQHead; - #if OS_LINK_MAILBOXES - OS_EXTERN OS_MAILBOX * OS_SADDR OS_pMailbox; + #if (OS_LINK_MAILBOXES != 0) + OS_EXTERN OS_MAILBOX* OS_SADDR OS_pMailbox; #endif - #if OS_DEBUG - OS_EXTERN OS_CSEMA * OS_SADDR OS_pCSema; + #if (OS_DEBUG != 0) + OS_EXTERN OS_CSEMA* OS_SADDR OS_pCSema; #endif - OS_EXTERN OS_MEMF * OS_SADDR OS_pMEMF; /* linked list of all fixed size memory pools */ - OS_EXTERN OS_TICK_HOOK * OS_SADDR OS_pTickHook; /* linked list of all tick hook functions */ - #if OS_SUPPORT_PTLS - OS_EXTERN OS_TLS_PTR OS_SADDR OS_pTLS; /* Global pointer to thread local storage */ + OS_EXTERN OS_MEMF* OS_SADDR OS_pMEMF; // linked list of all fixed size memory pools + OS_EXTERN OS_TICK_HOOK* OS_SADDR OS_pTickHook; // linked list of all tick hook functions + #if (OS_SUPPORT_PTLS != 0) + OS_EXTERN OS_TLS_PTR OS_SADDR OS_pTLS; // Global pointer to thread local storage + #endif + #if (OS_SUPPORT_SAVE_RESTORE_HOOK != 0) + OS_EXTERN OS_EXTEND_TASK_CONTEXT* OS_SADDR OS_pDefaultTaskContextExtension; #endif #endif -#else /* OS_COMPILER_STORAGE_MODIFIER_LEFT == 0, needed for Keil 166 */ +#else // OS_COMPILER_STORAGE_MODIFIER_LEFT == 0, needed for Keil 166 #error "OS_COMPILER_STORAGE_MODIFIER_LEFT == 0 not supported in this version." -#endif /* OS_COMPILER_STORAGE_MODIFIER_LEFT */ +#endif // OS_COMPILER_STORAGE_MODIFIER_LEFT -/***** Mark end of memory pragma area *******************************/ +//**** Mark end of memory pragma area ******************************* #if defined(__ghs_zda) #pragma ghs endzda #endif -/********************************************************************/ +//******************************************************************* -#define OS_RegionCnt OS_Global.Counters.Cnt.Region -#define OS_DICnt OS_Global.Counters.Cnt.DI +#define OS_RegionCnt OS_Global.Counters.Cnt.Region +#define OS_DICnt OS_Global.Counters.Cnt.DI /********************************************************************* * * OS_CREATETASK macro * OS_CREATETASK_EX macro */ -#if OS_RR_SUPPORTED +#if (OS_RR_SUPPORTED != 0) #define CTPARA_TIMESLICE ,2u #else #define CTPARA_TIMESLICE #endif -#if OS_TRACKNAME +#if (OS_TRACKNAME != 0) #define OS_CREATETASK(pTask, Name, Hook, Priority, pStack) \ OS_CreateTask ((pTask), \ (Name), \ @@ -1710,7 +2193,7 @@ struct OS_GLOBAL_STRUCT { ) #endif -#if OS_TRACKNAME +#if (OS_TRACKNAME != 0) #define OS_CREATETASK_EX(pTask, Name, Hook, Priority, pStack, pContext) \ OS_CreateTaskEx ((pTask), \ (Name), \ @@ -1738,39 +2221,40 @@ struct OS_GLOBAL_STRUCT { * OS_CreateTask * OS_CreateTaskEx */ -#if OS_TRACKNAME - #define OS_CREATE_TASK_PARA_NAME OS_ROM_DATA const char* pName, +#if (OS_TRACKNAME != 0) + #define OS_CREATE_TASK_PARA_NAME OS_ROM_DATA const char* pName, #else #define OS_CREATE_TASK_PARA_NAME #endif -#if OS_RR_SUPPORTED +#if (OS_RR_SUPPORTED != 0) #define OS_CREATE_TASK_PARA_TS ,OS_UINT TimeSlice #else #define OS_CREATE_TASK_PARA_TS #endif -void OS_CreateTask ( OS_TASK * pTask, +void OS_CreateTask ( OS_TASK* pTask, OS_CREATE_TASK_PARA_NAME OS_PRIO Priority, void (*pRoutine)(void), - void OS_STACKPTR *pStack, + void OS_STACKPTR* pStack, OS_UINT StackSize OS_CREATE_TASK_PARA_TS - ); + ) OS_SECTION_ATTRIBUTE; -void OS_CreateTaskEx ( OS_TASK * pTask, - OS_CREATE_TASK_PARA_NAME - OS_PRIO Priority, - void (*pRoutine)(void * pVoid), - void OS_STACKPTR *pStack, - OS_UINT StackSize - OS_CREATE_TASK_PARA_TS, - void * pContext - ); +void OS_CreateTaskEx( OS_TASK* pTask, + OS_CREATE_TASK_PARA_NAME + OS_PRIO Priority, + void (*pRoutine)(void* pVoid), + void OS_STACKPTR* pStack, + OS_UINT StackSize + OS_CREATE_TASK_PARA_TS, + void* pContext + ) OS_SECTION_ATTRIBUTE; -#if OS_SUPPORT_SAVE_RESTORE_HOOK -void OS_ExtendTaskContext(const OS_EXTEND_TASK_CONTEXT * pExtendContext); +#if (OS_SUPPORT_SAVE_RESTORE_HOOK != 0) +void OS_ExtendTaskContext (const OS_EXTEND_TASK_CONTEXT* pExtendContext) OS_SECTION_ATTRIBUTE; +void OS_AddExtendTaskContext(OS_EXTEND_TASK_CONTEXT_LINK* pExtendContextLink, const OS_EXTEND_TASK_CONTEXT* pExtendContext) OS_SECTION_ATTRIBUTE; #endif /********************************************************************* @@ -1779,149 +2263,133 @@ void OS_ExtendTaskContext(const OS_EXTEND_TASK_CONTEXT * pExtendContext); * ********************************************************************** */ -void OS_AddOnTerminateHook (OS_ON_TERMINATE_HOOK * pHook, OS_ON_TERMINATE_FUNC * pfUser); -void OS_Delay (OS_TIME ms); /* OSKern.c */ -void OS_DelayUntil (OS_TIME t); /* OSKern.c */ -void OS_Delayus (OS_U16 us); /* OS_Delayus.c */ -OS_U8 OS_GetSuspendCnt (OS_CONST_PTR OS_TASK* pTask); /* OS_GetSuspendCnt.c */ -void OS_GetState (OS_TASK* pTask); -OS_BOOL OS_IsTask (OS_CONST_PTR OS_TASK* pTask); /* OSIsTask.c */ -void OS_Resume (OS_TASK* pTask); /* OS_Suspend.c */ -void OS_ResumeAllSuspendedTasks (void); /* OS_ResumeAllTasks.c */ -void OS_SetTaskName (OS_TASK * pTask, OS_ROM_DATA const char* s); -void OS_SetPriority (OS_TASK* pTask, OS_U8 Priority); /* OSSetP.c */ -void OS_SetInitialSuspendCnt (OS_U8 SuspendCnt); /* OS_SetSuspendCnt.c */ -void OS_Suspend (OS_TASK* pTask); /* OS_Suspend.c */ -void OS_SuspendAllTasks (void); /* OS_SuspendAllTasks.c */ -void OS_TerminateTask (OS_TASK* pTask); /* OSTerm.c */ -void OS_TerminateError (void); /* OSTermE.c */ -void OS_WakeTask (OS_TASK* pTask); /* OSWake.c */ -void OS_Yield (void); /* OS_Yield */ -#if OS_SUSPEND_TASK_ON_TERMINATE /* Set task state of a terminated task to "suspended" */ - #define OS_SUSPEND_TERMINATED_TASK(pTask) (pTask->Stat = 0x01) +void OS_AddTerminateHook (OS_ON_TERMINATE_HOOK* pHook, OS_ON_TERMINATE_FUNC* pfUser) OS_SECTION_ATTRIBUTE; +void OS_RemoveAllTerminateHooks (void) OS_SECTION_ATTRIBUTE; +void OS_RemoveTerminateHook (const OS_ON_TERMINATE_HOOK* pHook) OS_SECTION_ATTRIBUTE; +void OS_Delay (OS_TIME ms) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_DelayUntil (OS_TIME t) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Delayus (OS_U16 us) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_GetNumTasks (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_PRIO OS_GetPriority (OS_CONST_PTR OS_TASK * pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_U8 OS_GetSuspendCnt (OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_BOOL OS_IsTask (OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Resume (OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_ResumeAllTasks (void) OS_SECTION_ATTRIBUTE; +void OS_SetTaskName (OS_TASK* pTask, OS_ROM_DATA const char* s) OS_SECTION_ATTRIBUTE; +void OS_SetPriority (OS_TASK* pTask, OS_PRIO Priority) OS_SECTION_ATTRIBUTE; +void OS_SetInitialSuspendCnt (OS_U8 SuspendCnt) OS_SECTION_ATTRIBUTE; +void OS_Suspend (OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_SuspendAllTasks (void) OS_SECTION_ATTRIBUTE; +OS_TASK* OS_TaskIndex2Ptr (int TaskIndex) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_TerminateTask (OS_TASK* pTask) OS_SECTION_ATTRIBUTE; +void OS_WakeTask (OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Yield (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +#if (OS_SUSPEND_TASK_ON_TERMINATE != 0) // Set task state of a terminated task to "suspended" + #define OS_SUSPEND_TERMINATED_TASK(pTask) ((pTask)->Stat = 0x01) #else #define OS_SUSPEND_TERMINATED_TASK(pTask) #endif /********************************************************************* * -* Info routines (OSInfo.c) +* Info routines * ********************************************************************** */ -OS_ROM_DATA const char* OS_GetCPU(void); -OS_ROM_DATA const char* OS_GetLibMode(void); -OS_ROM_DATA const char* OS_GetModel(void); -OS_ROM_DATA const char* OS_GetLibName(void); - -OS_UINT OS_GetVersion(void); -#define OS_GetType() OS_GetLibMode() - -#define OS_TASKID OS_TASK * -#define OS_GetTaskID() OS_Global.pCurrentTask +OS_ROM_DATA const char* OS_GetCPU (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_ROM_DATA const char* OS_GetLibMode(void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_ROM_DATA const char* OS_GetModel (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_ROM_DATA const char* OS_GetLibName(void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_UINT OS_GetVersion(void) OS_SECTION_ATTRIBUTE; +#define OS_GetType() OS_GetLibMode() +#define OS_TASKID OS_TASK* +#define OS_GetTaskID() OS_Global.pCurrentTask #define OS_GetpCurrentTask() OS_Global.pCurrentTask #define OS_IsRunning() OS_Running -#if OS_USE_IN_INTERRUPT_FUNCTION // OS_InInterrupt() may be implemented as function if required - OS_BOOL OS_InInterruptFunc(void); - #define OS_InInterrupt OS_InInterruptFunc -#else - #define OS_InInterrupt() OS_InInt -#endif +OS_BOOL OS_InInterrupt(void); -#if OS_SUPPORT_TIMER +#if (OS_SUPPORT_TIMER != 0) #define OS_GetpCurrentTimer() OS_Global.pCurrentTimer #define OS_GetpCurrentTimerEx() ((OS_TIMER_EX*)OS_Global.pCurrentTimer) #endif // OS_SUPPORT_TIMER -#if OS_TRACKNAME - OS_ROM_DATA const char* OS_GetTaskName(OS_CONST_PTR OS_TASK OS_TCBPTR *pTask); +#if (OS_TRACKNAME != 0) + OS_ROM_DATA const char* OS_GetTaskName(OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE; #else #define OS_GetTaskName(pt) ("n/a") #endif -#if OS_CHECKSTACK - void OS_CheckStack(void); /* internal usage */ - unsigned int OS_GetStackSpace(OS_TASK * pTask); - unsigned int OS_GetStackUsed (OS_TASK * pTask); - unsigned int OS_GetStackSize (OS_TASK OS_TCBPTR * pTask); - void OS_STACKPTR* OS_GetStackBase (OS_TASK OS_TCBPTR *pTask); +#if (OS_CHECKSTACK != 0) + unsigned int OS_GetStackSpace(OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE; + unsigned int OS_GetStackUsed (OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE; + unsigned int OS_GetStackSize (OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE; + void OS_STACKPTR* OS_GetStackBase (OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE; #else - #define OS_CheckStack() #define OS_GetStackSpace(pt) 0u #define OS_GetStackUsed(pt) 0u #define OS_GetStackSize(pt) 0u #define OS_GetStackBase(pt) 0u #endif -#if OS_SUPPORT_SYSSTACK_INFO - void OS_STACKPTR* OS_GetSysStackBase (void); /* RTOS asm part or OS_StackInfo.c */ - unsigned int OS_GetSysStackSize (void); /* RTOS asm part or OS_StackInfo.c */ +#if (OS_SUPPORT_SYSSTACK_INFO != 0) + void OS_STACKPTR* OS_GetSysStackBase (void) OS_SECTION_ATTRIBUTE; + unsigned int OS_GetSysStackSize (void) OS_SECTION_ATTRIBUTE; #else #define OS_GetSysStackBase() 0 #define OS_GetSysStackSize() 0u #endif -#if OS_CHECKSTACK && OS_SUPPORT_SYSSTACK_INFO - unsigned int OS_GetSysStackSpace(void); /* OS_SysStackInfo.c */ - unsigned int OS_GetSysStackUsed (void); /* OS_SysStackInfo.c */ +#if ((OS_CHECKSTACK != 0) && (OS_SUPPORT_SYSSTACK_INFO != 0)) + unsigned int OS_GetSysStackSpace(void) OS_SECTION_ATTRIBUTE; + unsigned int OS_GetSysStackUsed (void) OS_SECTION_ATTRIBUTE; #else #define OS_GetSysStackSpace() 0u #define OS_GetSysStackUsed() 0u #endif -#if OS_SUPPORT_INTSTACK_INFO - void OS_STACKPTR* OS_GetIntStackBase(void); /* RTOS asm part or OS_StackInfo.c */ - unsigned int OS_GetIntStackSize(void); /* RTOS asm part or OS_StackInfo.c */ +#if (OS_SUPPORT_INTSTACK_INFO != 0) + void OS_STACKPTR* OS_GetIntStackBase(void) OS_SECTION_ATTRIBUTE; + unsigned int OS_GetIntStackSize(void) OS_SECTION_ATTRIBUTE; #else #define OS_GetIntStackBase() 0 #define OS_GetIntStackSize() 0u #endif -#if OS_CHECKSTACK && OS_SUPPORT_INTSTACK_INFO - unsigned int OS_GetIntStackSpace(void); /* OS_IntStackInfo.c */ - unsigned int OS_GetIntStackUsed (void); /* OS_IntStackInfo.c */ +#if ((OS_CHECKSTACK != 0) && (OS_SUPPORT_INTSTACK_INFO != 0)) + unsigned int OS_GetIntStackSpace(void) OS_SECTION_ATTRIBUTE; + unsigned int OS_GetIntStackUsed (void) OS_SECTION_ATTRIBUTE; #else #define OS_GetIntStackSpace() 0u #define OS_GetIntStackUsed() 0u #endif -#if OS_RR_SUPPORTED - OS_U8 OS_SetTimeSlice(OS_TASK * pTask, OS_U8 TimeSlice); - OS_U8 OS_GetTimeSliceRem(OS_CONST_PTR OS_TASK OS_TCBPTR * pTask); +#if (OS_RR_SUPPORTED != 0) + OS_U8 OS_SetTimeSlice(OS_TASK * pTask, OS_U8 TimeSlice) OS_SECTION_ATTRIBUTE; + OS_U8 OS_GetTimeSliceRem(OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE; #define OS_GetTimeSliceReload(pTask) (pTask)->TimeSliceReload #else #define OS_GetTimeSliceRem(pTask) 0u #define OS_GetTimeSliceReload(pTask) 0u #endif -OS_PRIO OS_GetPriority(OS_CONST_PTR OS_TASK * pTask); /* OS_GetPrio.c */ -#define OS_GET_PRIORITY(pt) (pt)->Priority - -int OS_GetNumTasks(void); /* OS_GetNumTasks.c */ - -OS_TASK* OS_TaskIndex2Ptr(int TaskIndex); /* OS_TaskIndex2Ptr.c */ - -#if OS_PROFILE >=1 - OS_U32 OS_STAT_GetExecTime_Cycles (OS_TASK *pTask); /* OSStat.c */ - int OS_STAT_GetLoad (OS_TASK *pTask); /* OSStatGL.c */ - void OS_STAT_NotifyReadyStart (OS_TASK *pTask); /* OSStat.c */ - void OS_STAT_Sample(void); /* OSStat.c */ +#if (OS_PROFILE >= 1) + int OS_STAT_GetLoad (const OS_TASK *pTask) OS_SECTION_ATTRIBUTE; + void OS_STAT_Sample (void) OS_SECTION_ATTRIBUTE; + void OS_STAT_Enable (void) OS_SECTION_ATTRIBUTE; + void OS_STAT_Disable (void) OS_SECTION_ATTRIBUTE; + OS_U32 OS_STAT_GetTaskExecTime (const OS_TASK *pTask) OS_SECTION_ATTRIBUTE; #else - #define OS_STAT_NotifyExecEnd() - #define OS_STAT_GetExecTime_Cycles(pTask) 0u - #define OS_STAT_GetLoad(pTask) 0 + #define OS_STAT_GetTaskExecTime(pTask) 0u + #define OS_STAT_GetLoad(pTask) 0 #define OS_STAT_Sample() - #define OS_STAT_SetClocksPerUnit(ClocksPerUnit) - #define OS_STAT_NOTIFYREADYSTART(pTask) #endif - -#if OS_SUPPORT_STAT - OS_U32 OS_STAT_GetNumActivations (OS_TASK *pTask); /* OSStat.c */ - OS_U32 OS_STAT_GetNumPreemptions (OS_TASK *pTask); /* OSStat.c */ +#if (OS_SUPPORT_STAT != 0) + OS_U32 OS_STAT_GetNumActivations (const OS_TASK *pTask) OS_SECTION_ATTRIBUTE; + OS_U32 OS_STAT_GetNumPreemptions (const OS_TASK *pTask) OS_SECTION_ATTRIBUTE; #else #define OS_STAT_GetNumActivations(pTask) 0u #define OS_STAT_GetNumPreemptions(pTask) 0u @@ -1929,46 +2397,44 @@ OS_TASK* OS_TaskIndex2Ptr(int TaskIndex); /* OS_TaskIndex2Ptr.c */ /********************************************************************* * -* Size info routines (OS_GetSize.c) +* Size info routines * ********************************************************************** */ +int OS_WAIT_OBJ_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_WAIT_LIST_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_EXTEND_TASK_CONTEXT_GetSize(void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_TASK_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_REGS_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_TICK_HOOK_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_RSEMA_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_CSEMA_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_MAILBOX_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_MEMF_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_EVENT_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_TRACE_ENTRY_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; -int OS_WAIT_OBJ_GetSize(void); -int OS_WAIT_OBJ_EX_GetSize(void); -int OS_WAIT_LIST_GetSize(void); -int OS_EXTEND_TASK_CONTEXT_GetSize(void); -int OS_TASK_GetSize(void); -int OS_REGS_GetSize(void); -int OS_TICK_HOOK_GetSize(void); -int OS_RSEMA_GetSize(void); -int OS_CSEMA_GetSize(void); -int OS_MAILBOX_GetSize(void); -int OS_Q_GetSize(void); -int OS_MEMF_GetSize(void); -int OS_EVENT_GetSize(void); -int OS_TRACE_ENTRY_GetSize(void); - -#if OS_SUPPORT_TIMER - int OS_TIMER_GetSize(void); - int OS_TIMER_EX_GetSize(void); +#if (OS_SUPPORT_TIMER != 0) + int OS_TIMER_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; + int OS_TIMER_EX_GetSize (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #endif /********************************************************************* * -* Critical regions (OsKern.c) +* Critical regions * ********************************************************************** */ // -// For some GCC compiler it is necessary to use an OS_EnterRegion() function +// For some compiler it is necessary to use an OS_EnterRegion() function // instead of the macro. To do so please add the following line to OSCHIP.h: // #define OS_EnterRegion OS_EnterRegionFunc // #ifndef OS_EnterRegion - #if OS_DEBUG > 1 - #define OS_EnterRegion() {if (OS_RegionCnt == 0xFF) OS_Error(OS_ERR_REGIONCNT); else OS_RegionCnt++; } + #if (OS_DEBUG > 1) + #define OS_EnterRegion() {if (OS_RegionCnt == 0xFFu) OS_Error(OS_ERR_REGIONCNT); else OS_RegionCnt++; } #else #define OS_EnterRegion() {OS_RegionCnt++; } #endif @@ -1983,8 +2449,8 @@ int OS_TRACE_ENTRY_GetSize(void); #define OS_IntEnterRegion() {OS_RegionCnt++;} #endif -void OS_EnterRegionFunc(void); /* in OS_EnterRegionFunc.c */ -void OS_LeaveRegion(void); +void OS_EnterRegionFunc(void) OS_SECTION_ATTRIBUTE; +void OS_LeaveRegion (void) OS_SECTION_ATTRIBUTE; /********************************************************************* * @@ -1992,28 +2458,28 @@ void OS_LeaveRegion(void); * ********************************************************************** */ - #define OS_IncDI() { OS_ASSERT_DICnt(); OS_DI(); OS_DICnt++; } #define OS_DecRI() { OS_ASSERT_DICnt(); \ - if (--OS_DICnt == 0u) { /*lint !e548 No else required*/ \ + OS_DICnt--; \ + if (OS_DICnt == 0u) { /*lint !e548 No else required*/ \ OS_EI(); \ } \ } #define OS_RESTORE_I() { OS_ASSERT_DICnt(); \ - if (OS_DICnt == 0u) { /*lint !e548 No else required*/ \ + if (OS_DICnt == 0u) { /*lint !e548 No else required*/ \ OS_EI(); \ } \ } -void OS_RestoreI(void); /* OS_Kern.c */ +void OS_RestoreI(void) OS_SECTION_ATTRIBUTE; /********************************************************************* * * Global interrupt save/disable/restore macros * * The global OS_INTERRUPT_ functions are declared as MACRO. -* If not defined in OSChip.h, these macros are translated +* If not defined in OSCHIP.h, these macros are translated * to a fucntion call and the function is declared here. * The functions have to be implemented in the CPU specific * sources OS_Priv.c or specific assembly file. @@ -2023,50 +2489,76 @@ void OS_RestoreI(void); /* OS_Kern.c */ * ********************************************************************** */ - #ifndef OS_INTERRUPT_MaskGlobal - OS_INTERWORK void OS_InterruptMaskGlobal(void); + OS_INTERWORK void OS_InterruptMaskGlobal(void) OS_SECTION_ATTRIBUTE; #define OS_INTERRUPT_MaskGlobal() OS_InterruptMaskGlobal() #endif #ifndef OS_INTERRUPT_UnmaskGlobal - OS_INTERWORK void OS_InterruptUnmaskGlobal(void); + OS_INTERWORK void OS_InterruptUnmaskGlobal(void) OS_SECTION_ATTRIBUTE; #define OS_INTERRUPT_UnmaskGlobal() OS_InterruptUnmaskGlobal() #endif #ifndef OS_INTERRUPT_PreserveGlobal - OS_INTERWORK void OS_InterruptPreserveGlobal(OS_U32 *pSave); + OS_INTERWORK void OS_InterruptPreserveGlobal(OS_U32 *pSave) OS_SECTION_ATTRIBUTE; #define OS_INTERRUPT_PreserveGlobal(p) OS_InterruptPreserveGlobal((p)) #endif #ifndef OS_INTERRUPT_RestoreGlobal - OS_INTERWORK void OS_InterruptRestoreGlobal(OS_U32 *pSave); + OS_INTERWORK void OS_InterruptRestoreGlobal(OS_U32 *pSave) OS_SECTION_ATTRIBUTE; #define OS_INTERRUPT_RestoreGlobal(p) OS_InterruptRestoreGlobal((p)) #endif #ifndef OS_INTERRUPT_PreserveAndMaskGlobal - OS_INTERWORK void OS_InterruptPreserveAndMaskGlobal(OS_U32 *pSave); + OS_INTERWORK void OS_InterruptPreserveAndMaskGlobal(OS_U32 *pSave) OS_SECTION_ATTRIBUTE; #define OS_INTERRUPT_PreserveAndMaskGlobal(p) OS_InterruptPreserveAndMaskGlobal((p)) #endif +/********************************************************************* +* +* Interrupt state preserve/restore macros +* +* These macros preserve and restore the embOS interrupt status. +* It can be used to temporarily disabled embOS interrupts without +* changing the interrupt status which means that embOS interrupts +* are again disabled when they were disabled before. +* The actual macro is defined in OSCHIP.h. +* For example: +* OS_U32 p; +* OS_INT_PRIO_PRESERVE(&p); +* OS_DI(); +* DoSomething(); +* OS_INT_PRIO_RESTORE(&p); +*/ +#ifndef OS_INT_PRIO_PRESERVE + OS_INTERWORK void OS_IntPrioPreserve(OS_U32* p) OS_SECTION_ATTRIBUTE; + #define OS_INT_PRIO_PRESERVE(p) OS_IntPrioPreserve(p) +#endif + +#ifndef OS_INT_PRIO_RESTORE + OS_INTERWORK void OS_IntPrioRestore(OS_U32* p) OS_SECTION_ATTRIBUTE; + #define OS_INT_PRIO_RESTORE(p) OS_IntPrioRestore(p) +#endif + /********************************************************************* * * ISR (Interrupt service routine) support * ********************************************************************** */ - -#if OS_DEBUG - #define OS_MARK_IN_ISR() {OS_InInt++;} - #define OS_MARK_OUTOF_ISR() {if (!OS_InInt--) {OS_Error(OS_ERR_LEAVEINT);}} +#if ((OS_DEBUG != 0) || (OS_TRACE != 0)) + #define OS_MARK_IN_ISR() { TRACE_ON_ISR_ENTER(); OS_Global.InInt++; } + #define OS_MARK_OUTOF_ISR() { TRACE_ON_ISR_EXIT(); if (OS_Global.InInt == 0u) {OS_Error(OS_ERR_LEAVEINT);} OS_Global.InInt--; } + #define OS_MARK_OUTOF_ISR_SWITCH() { TRACE_ON_ISR_EXIT_TO_SCHEDULER(); if (OS_Global.InInt == 0u) {OS_Error(OS_ERR_LEAVEINT);} OS_Global.InInt--; } #else - #define OS_MARK_IN_ISR() {OS_InInt++;} - #define OS_MARK_OUTOF_ISR() {OS_InInt--;} + #define OS_MARK_IN_ISR() { TRACE_ON_ISR_ENTER(); } + #define OS_MARK_OUTOF_ISR() { TRACE_ON_ISR_EXIT(); } + #define OS_MARK_OUTOF_ISR_SWITCH() { TRACE_ON_ISR_EXIT_TO_SCHEDULER(); } #endif -#if OS_SUPPORT_CALL_ISR // Not allowed for some CPUs -void OS_CallISR (void (*pRoutine)(void)); -void OS_CallNestableISR(void (*pRoutine)(void)); +#if (OS_SUPPORT_CALL_ISR != 0) // Not allowed for some CPUs +void OS_CallISR (void (*pRoutine)(void)) OS_SECTION_ATTRIBUTE; +void OS_CallNestableISR(void (*pRoutine)(void)) OS_SECTION_ATTRIBUTE; #endif #if (OS_SUPPORT_ENTER_INTERRUPT == 0) || ((OS_SWITCH_FROM_INT_MODIFIES_STACK == 0) && (OS_INTERRUPTS_ARE_NESTABLE_ON_ENTRY != 0) && (OS_SCHEDULER_ACTIVATED_BY_EXCEPTION == 0)) @@ -2085,7 +2577,7 @@ void OS_CallNestableISR(void (*pRoutine)(void)); #define OS_RESTORE_IPL() #endif - #if OS_INTERRUPTS_ARE_NESTABLE_ON_ENTRY + #if (OS_INTERRUPTS_ARE_NESTABLE_ON_ENTRY != 0) #define OS_DI_ON_ENTRY() OS_DI() #else #define OS_DI_ON_ENTRY() @@ -2099,14 +2591,13 @@ void OS_CallNestableISR(void (*pRoutine)(void)); #define OS_EI_ON_LEAVE() // Required for CPUs which do not restore DI-flag by RETI. Currently only CM3. #endif - #if OS_SWITCH_FROM_INT_MODIFIES_STACK + #if (OS_SWITCH_FROM_INT_MODIFIES_STACK != 0) #define OS_HANDLE_REGION_CNT_ON_LI() \ - else { \ OS_RegionCnt--; \ } #else #define OS_HANDLE_REGION_CNT_ON_LI() \ - OS_RegionCnt--; + } OS_RegionCnt--; #endif #ifndef OS_DI_ON_LEAVE_NESTABLE @@ -2119,8 +2610,10 @@ void OS_CallNestableISR(void (*pRoutine)(void)); #define OS_SWITCH_FROM_INT_IF_REQUIRED() \ if ((OS_RegionCnt == (OS_U8) 1u) && (OS_Global.Pending.All != 0u)) { \ + OS_MARK_OUTOF_ISR_SWITCH(); \ OS_SwitchFromInt(); \ - } + } else { \ + OS_MARK_OUTOF_ISR(); #define OS_EnterInterrupt() { \ OS_MARK_IN_ISR(); \ @@ -2132,7 +2625,6 @@ void OS_CallNestableISR(void (*pRoutine)(void)); } #define OS_LeaveInterrupt() { \ - OS_MARK_OUTOF_ISR(); \ OS_DICnt--; /* Must have been zero initially ! (We could put =0 instead) */ \ OS_SWITCH_FROM_INT_IF_REQUIRED() \ OS_HANDLE_REGION_CNT_ON_LI(); \ @@ -2155,7 +2647,6 @@ void OS_CallNestableISR(void (*pRoutine)(void)); #define OS_LeaveNestableInterrupt() { \ OS_DI_ON_LEAVE_NESTABLE(); \ - OS_MARK_OUTOF_ISR(); \ OS_SWITCH_FROM_INT_IF_REQUIRED() \ OS_HANDLE_REGION_CNT_ON_LI(); \ OS_RESTORE_IPL(); \ @@ -2172,39 +2663,35 @@ void OS_CallNestableISR(void (*pRoutine)(void)); #endif #ifndef OS_EnterIntStack - void OS__EnterIntStack(void); + void OS__EnterIntStack(void) OS_SECTION_ATTRIBUTE; #define OS_EnterIntStack() {OS_DI(); OS__EnterIntStack(); OS_RESTORE_I(); } #endif #ifndef OS_LeaveIntStack - void OS__LeaveIntStack(void); + void OS__LeaveIntStack(void) OS_SECTION_ATTRIBUTE; #define OS_LeaveIntStack() {OS_DI(); OS__LeaveIntStack(); } #endif -void OS_SetFastIntPriorityLimit(OS_UINT Priority); +void OS_SetFastIntPriorityLimit(OS_UINT Priority) OS_SECTION_ATTRIBUTE; -#if OS_DEBUG - void OS_AssertCPUInISRMode(void); /* OSKern.c */ +#if (OS_DEBUG != 0) + void OS_AssertCPUInISRMode(void) OS_SECTION_ATTRIBUTE; #endif - - /********************************************************************* * * Resource semaphores * ********************************************************************** */ - -int OS_Use (OS_RSEMA * pRSema); /* OSRsem.c */ -int OS_UseTimed (OS_RSEMA * pRSema, OS_TIME TimeOut); /* OS_UseTimed.c */ -void OS_Unuse (OS_RSEMA * pRSema); /* OSRsem.c */ -char OS_Request (OS_RSEMA * pRSema); /* OSRsemRQ.c */ -int OS_GetSemaValue (OS_CONST_PTR OS_RSEMA * pRSema); /* OSRSemGV.c */ -OS_TASK* OS_GetResourceOwner(OS_CONST_PTR OS_RSEMA * pRSema); /* OSRsemGO.c */ - -void OS_CreateRSema (OS_RSEMA * pRSema); /* OSRsem.c */ -void OS_DeleteRSema (OS_RSEMA * pRSema); /* OSDelRS.c */ +void OS_CreateRSema (OS_RSEMA* pRSema) OS_SECTION_ATTRIBUTE; +void OS_DeleteRSema (OS_RSEMA* pRSema) OS_SECTION_ATTRIBUTE; +int OS_Use (OS_RSEMA* pRSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_UseTimed (OS_RSEMA* pRSema, OS_TIME TimeOut) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Unuse (OS_RSEMA* pRSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_Request (OS_RSEMA* pRSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_GetSemaValue (OS_CONST_PTR OS_RSEMA* pRSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK* OS_GetResourceOwner(OS_CONST_PTR OS_RSEMA* pRSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #define OS_CREATERSEMA(ps) OS_CreateRSema(ps) @@ -2214,16 +2701,15 @@ void OS_DeleteRSema (OS_RSEMA * pRSema); /* OSDelRS.c * ********************************************************************** */ - -void OS_CreateCSema (OS_CSEMA * pCSema, OS_UINT InitValue); /* OSCSEM.c */ -void OS_DeleteCSema (OS_CSEMA * pCSema); /* OSDELCS.c */ -int OS_GetCSemaValue (OS_CONST_PTR OS_CSEMA *pCSema); /* OSCSEMGV.c */ -OS_U8 OS_SetCSemaValue (OS_CSEMA * pCSema, OS_UINT Value); /* OS_SetCSemaValue.c */ -void OS_SignalCSema (OS_CSEMA * pCSema); /* OSCSEM.c */ -void OS_SignalCSemaMax (OS_CSEMA * pCSema, OS_UINT MaxValue); /* OS_CSEMA_SignalMax.c */ -void OS_WaitCSema (OS_CSEMA * pCSema); /* OSCSEM.c */ -OS_BOOL OS_WaitCSemaTimed (OS_CSEMA * pCSema, OS_TIME TimeOut); /* OSCSEMT.c */ -OS_BOOL OS_CSemaRequest (OS_CSEMA * pCSema); /* OSCSEMRQ.c */ +void OS_CreateCSema (OS_CSEMA* pCSema, OS_UINT InitValue) OS_SECTION_ATTRIBUTE; +void OS_DeleteCSema (OS_CSEMA* pCSema) OS_SECTION_ATTRIBUTE; +int OS_GetCSemaValue (OS_CONST_PTR OS_CSEMA* pCSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_U8 OS_SetCSemaValue (OS_CSEMA* pCSema, OS_UINT Value) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_SignalCSema (OS_CSEMA* pCSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_SignalCSemaMax(OS_CSEMA* pCSema, OS_UINT MaxValue) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_WaitCSema (OS_CSEMA* pCSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_BOOL OS_WaitCSemaTimed(OS_CSEMA* pCSema, OS_TIME TimeOut) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_BOOL OS_CSemaRequest (OS_CSEMA* pCSema) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #define OS_CREATECSEMA(ps) OS_CreateCSema((ps), 0) @@ -2233,53 +2719,63 @@ OS_BOOL OS_CSemaRequest (OS_CSEMA * pCSema); /* OSCSEMRQ.c * ********************************************************************** */ -void OS_CreateMB (OS_MAILBOX * pMB, OS_U16 sizeofMsg, OS_UINT maxnofMsg, void* Buffer); /* initialize mailbox */ -void OS_ClearMB (OS_MAILBOX * pMB); -void OS_PutMail (OS_MAILBOX * pMB, OS_CONST_PTR void* pMail); -char OS_PutMailCond (OS_MAILBOX * pMB, OS_CONST_PTR void* pMail); -void OS_PutMailFront (OS_MAILBOX * pMB, OS_CONST_PTR void* pMail); -char OS_PutMailFrontCond (OS_MAILBOX * pMB, OS_CONST_PTR void* pMail); -void OS_PutMail1 (OS_MAILBOX * pMB, OS_CONST_PTR char* pMail); -char OS_PutMailCond1 (OS_MAILBOX * pMB, OS_CONST_PTR char* pMail); -void OS_PutMailFront1 (OS_MAILBOX * pMB, OS_CONST_PTR char* pMail); -char OS_PutMailFrontCond1 (OS_MAILBOX * pMB, OS_CONST_PTR char* pMail); -void OS_GetMail (OS_MAILBOX * pMB, void* pDest); -char OS_GetMailCond (OS_MAILBOX * pMB, void* pDest); -void OS_GetMail1 (OS_MAILBOX * pMB, char* pDest); -char OS_GetMailCond1 (OS_MAILBOX * pMB, char* pDest); -char OS_GetMailTimed (OS_MAILBOX * pMB, void* pDest, OS_TIME Timeout); -void OS_DeleteMB (OS_MAILBOX * pMB); -char OS_PeekMail (OS_CONST_PTR OS_MAILBOX * pMB, void* pDest); -void OS_WaitMail (OS_MAILBOX * pMB); -char OS_WaitMailTimed (OS_MAILBOX * pMB, OS_TIME Timeout); +void OS_CreateMB (OS_MAILBOX* pMB, OS_U16 sizeofMsg, OS_UINT maxnofMsg, void* Buffer) OS_SECTION_ATTRIBUTE; +void OS_DeleteMB (OS_MAILBOX* pMB) OS_SECTION_ATTRIBUTE; +void OS_ClearMB (OS_MAILBOX* pMB) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_PutMail (OS_MAILBOX* pMB, OS_CONST_PTR void* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_PutMailCond (OS_MAILBOX* pMB, OS_CONST_PTR void* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_PutMailFront (OS_MAILBOX* pMB, OS_CONST_PTR void* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_PutMailFrontCond (OS_MAILBOX* pMB, OS_CONST_PTR void* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_BOOL OS_PutMailTimed (OS_MAILBOX* pMB, OS_CONST_PTR void* pMail, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_PutMail1 (OS_MAILBOX* pMB, OS_CONST_PTR char* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_PutMailCond1 (OS_MAILBOX* pMB, OS_CONST_PTR char* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_PutMailFront1 (OS_MAILBOX* pMB, OS_CONST_PTR char* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_PutMailFrontCond1(OS_MAILBOX* pMB, OS_CONST_PTR char* pMail) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_BOOL OS_PutMailTimed1 (OS_MAILBOX* pMB, OS_CONST_PTR char* pMail, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_GetMail (OS_MAILBOX* pMB, void* pDest) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_GetMailCond (OS_MAILBOX* pMB, void* pDest) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_GetMail1 (OS_MAILBOX* pMB, char* pDest) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_GetMailCond1 (OS_MAILBOX* pMB, char* pDest) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_GetMailTimed (OS_MAILBOX* pMB, void* pDest, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_GetMailTimed1 (OS_MAILBOX* pMB, char* pDest, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_PeekMail (OS_CONST_PTR OS_MAILBOX* pMB, void* pDest) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_WaitMail (OS_MAILBOX* pMB) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_WaitMailTimed (OS_MAILBOX* pMB, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Mail_GetPtr (OS_MAILBOX* pMB, void** ppDest) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_Mail_GetPtrCond (OS_MAILBOX* pMB, void** ppDest) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Mail_Purge (OS_MAILBOX* pMB) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; -#if OS_DEBUG == 0 +#if (OS_DEBUG == 0) #define OS_GetMessageCnt(pMB) (*(pMB)).nofMsg #else - OS_UINT OS_GetMessageCnt(OS_MAILBOX * pMB); /* get no. of available Messages */ + OS_UINT OS_GetMessageCnt(const OS_MAILBOX* pMB) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; // Get number of available messages #endif /********************************************************************* * -* Message Queues (OSQ.c) +* Message Queues * ********************************************************************** */ +void OS_Q_Create (OS_Q* pQ, void* pData, OS_UINT Size) OS_SECTION_ATTRIBUTE; +void OS_Q_Delete (OS_Q* pQ) OS_SECTION_ATTRIBUTE; +void OS_Q_Clear (OS_Q* pQ) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_GetMessageCnt (OS_CONST_PTR OS_Q* pQ) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_Put (OS_Q* pQ, OS_CONST_PTR void* pSrc, OS_UINT Size) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Q_PutBlocked (OS_Q* pQ, OS_CONST_PTR void* pSrc, OS_UINT Size) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_Q_PutTimed (OS_Q* pQ, OS_CONST_PTR void* pSrc, OS_UINT Size, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_PutEx (OS_Q* pQ, OS_CONST_PTR OS_Q_SRCLIST* pSrcList, OS_UINT NumSrc) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Q_PutBlockedEx (OS_Q* pQ, OS_CONST_PTR OS_Q_SRCLIST* pSrcList, OS_UINT NumSrc) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_Q_PutTimedEx (OS_Q* pQ, OS_CONST_PTR OS_Q_SRCLIST* pSrcList, OS_UINT NumSrc, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_GetPtr (OS_Q* pQ, void** ppData) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_GetPtrCond (OS_Q* pQ, void** ppData) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_GetPtrTimed (OS_Q* pQ, void** ppData, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Q_Purge (OS_Q* pQ) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_BOOL OS_Q_IsInUse (OS_CONST_PTR OS_Q* pQ) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_GetMessageSize(OS_CONST_PTR OS_Q* pQ) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +int OS_Q_PeekPtr (OS_CONST_PTR OS_Q* pQ, void** ppData) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; -void OS_Q_Create (OS_Q* pQ, void*pData, OS_UINT Size); -void OS_Q_Clear (OS_Q* pQ); /* OSQCL.c */ -void OS_Q_Delete (OS_Q* pQ); /* OSQDEL.c */ -int OS_Q_GetMessageCnt (OS_CONST_PTR OS_Q* pQ); /* OSQGMC.c */ -int OS_Q_Put (OS_Q* pQ, OS_CONST_PTR void* pSrc, OS_UINT Size); -void OS_Q_PutBlocked (OS_Q* pQ, OS_CONST_PTR void* pSrc, OS_UINT Size); -char OS_Q_PutTimed (OS_Q* pQ, OS_CONST_PTR void* pSrc, OS_UINT Size, OS_TIME Timeout); -int OS_Q_GetPtr (OS_Q* pQ, void**ppData); -int OS_Q_GetPtrCond (OS_Q* pQ, void**ppData); /* OSQGPC.c */ -int OS_Q_GetPtrTimed (OS_Q* pQ, void**ppData, OS_TIME Timeout); /* OSQGPT.c */ -void OS_Q_Purge (OS_Q* pQ); -OS_BOOL OS_Q_IsInUse (OS_CONST_PTR OS_Q* pQ); -int OS_Q_GetMessageSize(OS_CONST_PTR OS_Q* pQ); -int OS_Q_PeekPtr (OS_CONST_PTR OS_Q* pQ, void**ppData); +#define OS_Q_SIZEOF_HEADER (sizeof(OS_INT)) /********************************************************************* * @@ -2287,43 +2783,43 @@ int OS_Q_PeekPtr (OS_CONST_PTR OS_Q* pQ, void**ppData); * ********************************************************************** */ - -OS_TASK_EVENT OS_ClearEvents (OS_TASK * pTask); /* OSEVENCL.c */ -OS_TASK_EVENT OS_GetEventsOccurred (OS_CONST_PTR OS_TASK * pTask); /* OSEVENGE.c */ -void OS_SignalEvent (OS_TASK_EVENT Event, OS_TASK * pTask); /* OSENENS.c */ -OS_TASK_EVENT OS_WaitEvent (OS_TASK_EVENT EventMask); /* OSEVENW.c */ -OS_TASK_EVENT OS_WaitEventTimed (OS_TASK_EVENT EventMask, OS_TIME TimeOut); /* OSEVENT.c */ -OS_TASK_EVENT OS_WaitSingleEvent (OS_TASK_EVENT EventMask); /* OSEVENWS.c */ -OS_TASK_EVENT OS_WaitSingleEventTimed (OS_TASK_EVENT EventMask, OS_TIME TimeOut); /* OSEVENWST.c */ +OS_TASK_EVENT OS_ClearEvents (OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_ClearEventsEx (OS_TASK* pTask, OS_TASK_EVENT EventMask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_GetEventsOccurred (OS_CONST_PTR OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_SignalEvent (OS_TASK_EVENT Event, OS_TASK* pTask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_WaitEvent (OS_TASK_EVENT EventMask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_WaitEventTimed (OS_TASK_EVENT EventMask, OS_TIME TimeOut) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_WaitSingleEvent (OS_TASK_EVENT EventMask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_WaitSingleEventTimed(OS_TASK_EVENT EventMask, OS_TIME TimeOut) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; /********************************************************************* * -* Timers(OSTIME.c) +* Software timer * ********************************************************************** */ - -#if OS_SUPPORT_TIMER +#if (OS_SUPPORT_TIMER != 0) #ifdef OS_SIZEOF_INT - #if OS_SIZEOF_INT == 2 + #if (OS_SIZEOF_INT == 2) #define OS_TIMER_MAX_TIME 0x7F00 - #elif OS_SIZEOF_INT == 4 + #elif (OS_SIZEOF_INT == 4) #define OS_TIMER_MAX_TIME 0x7FFFFF00 #else #error "OS_SIZEOF_INT not correctly defined" #endif #endif -void OS_CreateTimer (OS_TIMER * pTimer, OS_TIMERROUTINE* Callback, OS_TIME Timeout); -void OS_RetriggerTimer (OS_TIMER * pTimer); -void OS_StartTimer (OS_TIMER * pTimer); -void OS_StopTimer (OS_TIMER * pTimer); -void OS_DeleteTimer (OS_TIMER * pTimer); /* OSTIMED.c */ -OS_TIME OS_GetTimerPeriod (OS_CONST_PTR OS_TIMER * pTimer); /* OSTIMEGP.c */ -OS_BOOL OS_GetTimerStatus (OS_CONST_PTR OS_TIMER * pTimer); /* OSTIMEGS.c */ -OS_TIME OS_GetTimerValue (OS_CONST_PTR OS_TIMER * pTimer); /* OSTIMEGV.c */ -void OS_SetTimerPeriod (OS_TIMER * pTimer, OS_TIME Period); /* OSTIMES.c */ +void OS_CreateTimer (OS_TIMER* pTimer, OS_TIMERROUTINE* Callback, OS_TIME Timeout) OS_SECTION_ATTRIBUTE; +void OS_DeleteTimer (OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE; +void OS_RetriggerTimer(OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_StartTimer (OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_StopTimer (OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_TriggerTimer (OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TIME OS_GetTimerPeriod(OS_CONST_PTR OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_BOOL OS_GetTimerStatus(OS_CONST_PTR OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TIME OS_GetTimerValue (OS_CONST_PTR OS_TIMER* pTimer) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_SetTimerPeriod(OS_TIMER* pTimer, OS_TIME Period) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #define OS_CREATETIMER(pTimer,c,d) \ OS_CreateTimer((pTimer), (c), (d)); \ @@ -2331,15 +2827,16 @@ void OS_SetTimerPeriod (OS_TIMER * pTimer, OS_TIME Period); /* OSTIMES.c */ /********************************************************************* * -* Extended timers (OSTIMERX.c) +* Extended timers * ********************************************************************** */ -void OS_CreateTimerEx (OS_TIMER_EX * pTimerEx, OS_TIMER_EX_ROUTINE* Callback, OS_TIME Timeout, void * pData); +void OS_CreateTimerEx (OS_TIMER_EX* pTimerEx, OS_TIMER_EX_ROUTINE* Callback, OS_TIME Timeout, void* pData) OS_SECTION_ATTRIBUTE; #define OS_RetriggerTimerEx(pTimerEx) OS_RetriggerTimer(&(pTimerEx)->Timer) #define OS_StartTimerEx(pTimerEx) OS_StartTimer(&(pTimerEx)->Timer) #define OS_StopTimerEx(pTimerEx) OS_StopTimer(&(pTimerEx)->Timer) +#define OS_TriggerTimerEx(pTimerEx) OS_TriggerTimer(&(pTimerEx)->Timer) #define OS_DeleteTimerEx(pTimerEx) OS_DeleteTimer(&(pTimerEx)->Timer) #define OS_GetTimerPeriodEx(pTimerEx) OS_GetTimerPeriod(&(pTimerEx)->Timer) #define OS_GetTimerStatusEx(pTimerEx) OS_GetTimerStatus(&(pTimerEx)->Timer) @@ -2354,7 +2851,7 @@ void OS_CreateTimerEx (OS_TIMER_EX * pTimerEx, OS_TIMER_EX_ROUTINE* Callback, /********************************************************************* * -* Heap type memory management (OS_Alloc.c) +* Heap type memory management * ********************************************************************** @@ -2363,11 +2860,10 @@ void OS_CreateTimerEx (OS_TIMER_EX * pTimerEx, OS_TIMER_EX_ROUTINE* Callback, which has to be defined in CPU specific part */ - -#if OS_SUPPORT_OS_ALLOC - void* OS_malloc (unsigned int Size); - void OS_free (void* pMemBlock); - void* OS_realloc (void* pMemBlock, unsigned int NewSize); +#if (OS_SUPPORT_OS_ALLOC != 0) + void* OS_malloc (unsigned int Size) OS_SECTION_ATTRIBUTE; + void OS_free (void* pMemBlock) OS_SECTION_ATTRIBUTE; + void* OS_realloc (void* pMemBlock, unsigned int NewSize) OS_SECTION_ATTRIBUTE; #endif /********************************************************************* @@ -2376,19 +2872,18 @@ void OS_CreateTimerEx (OS_TIMER_EX * pTimerEx, OS_TIMER_EX_ROUTINE* Callback, * ********************************************************************** */ - -void OS_MEMF_Create (OS_MEMF* pMEMF, void* pPool, OS_UINT NumBlocks, OS_UINT BlockSize); -void OS_MEMF_Delete (OS_MEMF* pMEMF); -void* OS_MEMF_Alloc (OS_MEMF* pMEMF, int Purpose); -void* OS_MEMF_AllocTimed (OS_MEMF* pMEMF, OS_TIME Timeout, int Purpose); -void* OS_MEMF_Request (OS_MEMF* pMEMF, int Purpose); -void OS_MEMF_Release (OS_MEMF* pMEMF, void* pMemBlock); -void OS_MEMF_FreeBlock (void* pMemBlock); -int OS_MEMF_GetNumFreeBlocks (OS_CONST_PTR OS_MEMF* pMEMF); -OS_BOOL OS_MEMF_IsInPool (OS_CONST_PTR OS_MEMF* pMEMF, OS_CONST_PTR void* pMemBlock); -int OS_MEMF_GetMaxUsed (OS_CONST_PTR OS_MEMF* pMEMF); -int OS_MEMF_GetNumBlocks (OS_CONST_PTR OS_MEMF* pMEMF); -int OS_MEMF_GetBlockSize (OS_CONST_PTR OS_MEMF* pMEMF); +void OS_MEMF_Create (OS_MEMF* pMEMF, void* pPool, OS_UINT NumBlocks, OS_UINT BlockSize) OS_SECTION_ATTRIBUTE; +void OS_MEMF_Delete (OS_MEMF* pMEMF) OS_SECTION_ATTRIBUTE; +void* OS_MEMF_Alloc (OS_MEMF* pMEMF, int Purpose) OS_SECTION_ATTRIBUTE; +void* OS_MEMF_AllocTimed (OS_MEMF* pMEMF, OS_TIME Timeout, int Purpose) OS_SECTION_ATTRIBUTE; +void* OS_MEMF_Request (OS_MEMF* pMEMF, int Purpose) OS_SECTION_ATTRIBUTE; +void OS_MEMF_Release (OS_MEMF* pMEMF, void* pMemBlock) OS_SECTION_ATTRIBUTE; +void OS_MEMF_FreeBlock (void* pMemBlock) OS_SECTION_ATTRIBUTE; +int OS_MEMF_GetNumFreeBlocks(OS_CONST_PTR OS_MEMF* pMEMF) OS_SECTION_ATTRIBUTE; +OS_BOOL OS_MEMF_IsInPool (OS_CONST_PTR OS_MEMF* pMEMF, OS_CONST_PTR void* pMemBlock) OS_SECTION_ATTRIBUTE; +int OS_MEMF_GetMaxUsed (OS_CONST_PTR OS_MEMF* pMEMF) OS_SECTION_ATTRIBUTE; +int OS_MEMF_GetNumBlocks (OS_CONST_PTR OS_MEMF* pMEMF) OS_SECTION_ATTRIBUTE; +int OS_MEMF_GetBlockSize (OS_CONST_PTR OS_MEMF* pMEMF) OS_SECTION_ATTRIBUTE; /********************************************************************* * @@ -2396,71 +2891,86 @@ int OS_MEMF_GetBlockSize (OS_CONST_PTR OS_MEMF* pMEMF); * ********************************************************************** */ - -/****** Simple OS_EVENT functions ************************************/ - -void OS_EVENT_Create (OS_EVENT* pEvent); -void OS_EVENT_CreateEx (OS_EVENT* pEvent, OS_EVENT_RESET_MODE Mode); -void OS_EVENT_Delete (OS_EVENT* pEvent); -OS_BOOL OS_EVENT_Get (OS_CONST_PTR OS_EVENT* pEvent); -OS_EVENT_RESET_MODE OS_EVENT_GetResetMode(OS_EVENT* pEvent); -void OS_EVENT_Pulse (OS_EVENT* pEvent); -void OS_EVENT_Reset (OS_EVENT* pEvent); -void OS_EVENT_Set (OS_EVENT* pEvent); -void OS_EVENT_SetResetMode(OS_EVENT* pEvent, OS_EVENT_RESET_MODE Mode); -void OS_EVENT_Wait (OS_EVENT* pEvent); -char OS_EVENT_WaitTimed (OS_EVENT* pEvent, OS_TIME Timeout); +void OS_EVENT_Create (OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE; +void OS_EVENT_CreateEx (OS_EVENT* pEvent, unsigned int Mode) OS_SECTION_ATTRIBUTE; +void OS_EVENT_Delete (OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE; +OS_BOOL OS_EVENT_Get (OS_CONST_PTR OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_EVENT_GetMask (OS_EVENT* pEvent, OS_TASK_EVENT EventMask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_EVENT_MASK_MODE OS_EVENT_GetMaskMode (OS_CONST_PTR OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_EVENT_RESET_MODE OS_EVENT_GetResetMode (OS_CONST_PTR OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_EVENT_Pulse (OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_EVENT_Reset (OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_EVENT_Set (OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_EVENT_SetMask (OS_EVENT* pEvent, OS_TASK_EVENT EventMask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_EVENT_SetMaskMode (OS_EVENT* pEvent, OS_EVENT_MASK_MODE MaskMode) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_EVENT_SetResetMode (OS_EVENT* pEvent, OS_EVENT_RESET_MODE ResetMode) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_EVENT_Wait (OS_EVENT* pEvent) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_EVENT_WaitMask (OS_EVENT* pEvent, OS_TASK_EVENT EventMask) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +char OS_EVENT_WaitTimed (OS_EVENT* pEvent, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_TASK_EVENT OS_EVENT_WaitMaskTimed(OS_EVENT* pEvent, OS_TASK_EVENT EventMask, OS_TIME Timeout) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; /********************************************************************* * -* Timing support (OSTiming.c) +* Timing and tickless support * ********************************************************************** - - New in V3.04, but not yet documented to the end user. Great for - run-time measurement. */ - #define OS_TIMING OS_U32 -void OS_Timing_Start(OS_TIMING* pCycle); -void OS_Timing_End(OS_TIMING* pCycle); -OS_U32 OS_Timing_Getus(OS_CONST_PTR OS_TIMING* pCycle); +void OS_Timing_Start(OS_TIMING* pCycle) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_Timing_End (OS_TIMING* pCycle) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_U32 OS_Timing_Getus(OS_CONST_PTR OS_TIMING* pCycle) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #define OS_Timing_GetCycles(pPara) (*(pPara)) -OS_TIME OS_GetNumIdleTicks(void); /* OS_GetNumIdleTicks.c */ -void OS_AdjustTime(OS_TIME Time); /* OS_AdjustTime.c */ -void OS_StartTicklessMode(OS_TIME Time, voidRoutine* Hook); /* OS_Tickless.c */ +OS_TIME OS_GetNumIdleTicks (void) OS_SECTION_ATTRIBUTE; +void OS_AdjustTime (OS_TIME Time) OS_SECTION_ATTRIBUTE; +void OS_StartTicklessMode(OS_TIME Time, voidRoutine *Callback) OS_SECTION_ATTRIBUTE; +void OS_StopTicklessMode (void) OS_SECTION_ATTRIBUTE; /********************************************************************* * -* OS Power control module OS_Power.c +* OS peripheral power control * ********************************************************************** */ -#if OS_SUPPORT_POWER -#define OS_POWER_LEVEL0 (0x0001) -#define OS_POWER_LEVEL1 (0x0002) -#define OS_POWER_LEVEL2 (0x0004) -#define OS_POWER_LEVEL3 (0x0008) -#define OS_POWER_LEVEL4 (0x0010) -#define OS_POWER_LEVEL5 (0x0020) -#define OS_POWER_LEVEL6 (0x0040) -#define OS_POWER_LEVEL8 (0x0080) - -void OS_POWER_UsageInc(OS_UINT Index); -void OS_POWER_UsageDec(OS_UINT Index); -OS_UINT OS_POWER_GetMask(void); +#if (OS_SUPPORT_PERIPHERAL_POWER_CTRL != 0) +void OS_POWER_UsageInc(OS_UINT Index) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +void OS_POWER_UsageDec(OS_UINT Index) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_UINT OS_POWER_GetMask (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #endif +/********************************************************************* +* +* Spinlock API +* +********************************************************************** +*/ +void OS_SPINLOCK_Create (OS_SPINLOCK* pSpinlock) OS_SECTION_ATTRIBUTE; +void OS_SPINLOCK_Lock (OS_SPINLOCK* pSpinlock) OS_SECTION_ATTRIBUTE; +void OS_SPINLOCK_Unlock (OS_SPINLOCK* pSpinlock) OS_SECTION_ATTRIBUTE; +void OS_SPINLOCK_SW_Create(OS_SPINLOCK_SW* pSpinlock) OS_SECTION_ATTRIBUTE; +void OS_SPINLOCK_SW_Lock (OS_SPINLOCK_SW* pSpinlock, OS_UINT Id) OS_SECTION_ATTRIBUTE; +void OS_SPINLOCK_SW_Unlock(OS_SPINLOCK_SW* pSpinlock, OS_UINT Id) OS_SECTION_ATTRIBUTE; + +/********************************************************************* +* +* Watchdog API +* +********************************************************************** +*/ +void OS_WD_Add (OS_WD* pWD, OS_TIME Timeout) OS_SECTION_ATTRIBUTE; +void OS_WD_Check (void) OS_SECTION_ATTRIBUTE; +void OS_WD_Config (voidRoutine* pfTriggerFunc, voidRoutine* pfResetFunc) OS_SECTION_ATTRIBUTE; +void OS_WD_Remove (OS_CONST_PTR OS_WD* pWD) OS_SECTION_ATTRIBUTE; +void OS_WD_Trigger(OS_WD* pWD) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; + /********************************************************************* * * CPU load measurement * ********************************************************************** */ - -void OS_AddLoadMeasurement(int Period, OS_U8 AutoAdjust, OS_I32 DefaultMaxValue); -int OS_GetLoadMeasurement(void); +void OS_AddLoadMeasurement(int Period, OS_U8 AutoAdjust, OS_I32 DefaultMaxValue) OS_SECTION_ATTRIBUTE; +int OS_GetLoadMeasurement(void) OS_SECTION_ATTRIBUTE; #if (OS_U32_OP_IS_ATOMIC == 0) #define OS_INC_IDLE_CNT() \ @@ -2475,13 +2985,13 @@ int OS_GetLoadMeasurement(void); /********************************************************************* * -* Advanced profiling support (Module OsKern.c) +* Advanced profiling support * ********************************************************************** */ -#if OS_PROFILE >= 1 - void OS_EnableProfiling(int Period); - #define OS_DisableProfiling() { OS_ProfilingOn=0; } +#if (OS_PROFILE >= 1) + void OS_EnableProfiling(int Period) OS_SECTION_ATTRIBUTE; + #define OS_DisableProfiling() { OS_ProfilingOn = 0; } #else #define OS_EnableProfiling(Period); #define OS_DisableProfiling() @@ -2489,102 +2999,52 @@ int OS_GetLoadMeasurement(void); /********************************************************************* * -* OS_TICK_HANDLE and sub-macros -* -********************************************************************** -*/ -#if ((OS_U32_OP_IS_ATOMIC == 0) || (OS_PTR_OP_IS_ATOMIC == 0)) - #define OS_SET_TIME(t) \ - { \ - OS_DI(); \ - OS_Global.Time = t; \ - OS_RESTORE_I(); \ - } -#else - #define OS_SET_TIME(t) OS_Global.Time = (t); -#endif - -#if OS_RR_SUPPORTED - #define OS_HANDLE_RR() \ - if (OS_TimeSlice) { \ - if (--OS_TimeSlice==0) { \ - OS_Global.Pending.Flag.RoundRobin = 1; \ - } \ - } -#else - #define OS_HANDLE_RR() -#endif - -#if OS_SUPPORT_TICK_HOOK - #define OS_HANDLE_TICK_HOOK() \ - { \ - OS_TICK_HOOK* pHook; \ - pHook = OS_pTickHook; \ - while (pHook) { \ - (*(pHook->pfUser))(); \ - pHook = pHook->pNext; \ - } \ - } -#else - #define OS_HANDLE_TICK_HOOK() -#endif - -#define OS_TICK_HANDLE() { \ - OS_I32 Time; \ - OS_ASSERT_INT(); /* Ensure OS_EnterInterrupt() or related was called */ \ - Time = OS_Global.Time + 1; /* Compute new OS_Time */ \ - OS_SET_TIME(Time); /* Update the global time variable as atomic operation */ \ - if ( OS_SUB_TIME((OS_TIME)Time, OS_Global.TimeDex) >= 0) { /* Check if the delay is expired */ \ - OS_Global.Pending.Flag.Taskswitch = 1; \ - } \ - OS_HANDLE_RR(); \ - OS_HANDLE_TICK_HOOK(); \ -} - -/********************************************************************* -* -* Trace support (OSTrace.c) +* Trace support (embOSView) * ********************************************************************** -Trace support is enabled by defining OS_TRACE 1. +Trace support is enabled by defining OS_TRACE = 1. This is automatically done, when OS_LIBMODE_T is defined. */ -#if OS_TRACE - /* Declare trace function prototypes */ - void OS_TraceVoid (OS_U8 id); - void OS_TracePtr (OS_U8 id, void* p); - void OS_TraceData (OS_U8 id, int v); - void OS_TraceDataPtr (OS_U8 id, int v, void*p); - void OS_TraceU32Ptr (OS_U8 id, OS_U32 p0, void*p1); - void OS_TraceEnable(void); - void OS_TraceDisable(void); - void OS_TraceEnableAll(void); /* OSTrace1.c */ - void OS_TraceDisableAll(void); /* OSTrace1.c */ - void OS_TraceEnableId(OS_U8 id); /* OSTrace1.c */ - void OS_TraceDisableId(OS_U8 id); /* OSTrace1.c */ - void OS_TraceEnableFilterId(OS_U8 FilterIndex, OS_U8 id); /* OSTrace1.c */ - void OS_TraceDisableFilterId(OS_U8 FilterIndex, OS_U8 id); /* OSTrace1.c */ +#if (OS_TRACE != 0) + // + // Declare trace function prototypes + // + void OS_TraceVoid (OS_U8 id) OS_SECTION_ATTRIBUTE; + void OS_TracePtr (OS_U8 id, void *p) OS_SECTION_ATTRIBUTE; + void OS_TraceData (OS_U8 id, int v) OS_SECTION_ATTRIBUTE; + void OS_TraceDataPtr (OS_U8 id, int v, void *p) OS_SECTION_ATTRIBUTE; + void OS_TraceU32Ptr (OS_U8 id, OS_U32 p0, void *p1) OS_SECTION_ATTRIBUTE; + void OS_TraceEnable (void) OS_SECTION_ATTRIBUTE; + void OS_TraceDisable (void) OS_SECTION_ATTRIBUTE; + void OS_TraceEnableAll (void) OS_SECTION_ATTRIBUTE; + void OS_TraceDisableAll (void) OS_SECTION_ATTRIBUTE; + void OS_TraceEnableId (OS_U8 id) OS_SECTION_ATTRIBUTE; + void OS_TraceDisableId (OS_U8 id) OS_SECTION_ATTRIBUTE; + void OS_TraceEnableFilterId (OS_U8 FilterIndex, OS_U8 id) OS_SECTION_ATTRIBUTE; + void OS_TraceDisableFilterId (OS_U8 FilterIndex, OS_U8 id) OS_SECTION_ATTRIBUTE; + // + // Trace function macros, used in API functions + // + #define OS_TRACE_VOID(id) OS_TraceVoid (id) + #define OS_TRACE_PTR(id, p) OS_TracePtr ((id), (p)) + #define OS_TRACE_DATA(id, v) OS_TraceData ((id), ((int) (v))) + #define OS_TRACE_DATA_PTR(id, v, p) OS_TraceDataPtr((id), ((int) (v)), (p)) + #define OS_TRACE_U32_PTR(id, p0, p1) OS_TraceU32Ptr ((id), (p0), (p1)) - /* Trace function macros, used in API functions */ - #define OS_TRACE_VOID(id) OS_TraceVoid(id) - #define OS_TRACE_PTR(id, p) OS_TracePtr ((id), (p)) - #define OS_TRACE_DATA(id, v) OS_TraceData((id), ((int) (v))) - #define OS_TRACE_DATA_PTR(id, v, p) OS_TraceDataPtr((id), ((int) (v)), (p)) - #define OS_TRACE_U32_PTR(id, p0, p1) OS_TraceU32Ptr((id), (p0), (p1)) - - #define OS_TRACE_START() { OS_EnterRegion(); } - #define OS_TRACE_START_VOID(id) { OS_EnterRegion(); OS_TraceVoid((id)); } - #define OS_TRACE_START_PTR(id, p) { OS_EnterRegion(); OS_TracePtr((id), (p)); } + #define OS_TRACE_START() { OS_EnterRegion(); } + #define OS_TRACE_START_VOID(id) { OS_EnterRegion(); OS_TraceVoid((id)); } + #define OS_TRACE_START_PTR(id, p) { OS_EnterRegion(); OS_TracePtr((id), (p)); } #define OS_TRACE_START_DATA(id, v) { OS_EnterRegion(); OS_TraceData((id), ((int) (v))); } #define OS_TRACE_START_DATA_PTR(id, v, p) { OS_EnterRegion(); OS_TraceDataPtr((id), ((int) (v)), (p)); } - #define OS_TRACE_START_U32_PTR(id, p0, p1) { OS_EnterRegion(); OS_TraceU32Ptr((id), (u), (p)); } - #define OS_TRACE_END() { OS_LeaveRegion(); } - + #define OS_TRACE_START_U32_PTR(id, p0, p1) { OS_EnterRegion(); OS_TraceU32Ptr((id), (u), (p)); } + #define OS_TRACE_END() { OS_LeaveRegion(); } #else - /* Replace trace functions by empty macros if trace is not enabled */ + // + // Replace trace functions by empty macros if trace is not enabled + // #define OS_TraceVoid(id) #define OS_TracePtr(id, p) #define OS_TraceData(id, v) @@ -2598,8 +3058,10 @@ This is automatically done, when OS_LIBMODE_T is defined. #define OS_TraceDisableId(id) #define OS_TraceEnableFilterId(FilterIndex, id) #define OS_TraceDisableFilterId(FilterIndex, id) - /* Trace function macros, used in API functions. */ - /* Expand to nothing if trace is disabled */ + // + // Trace function macros, used in API functions. + // Expand to nothing if trace is disabled. + // #define OS_TRACE_VOID(id) #define OS_TRACE_PTR(id, p) #define OS_TRACE_DATA(id, v) @@ -2615,6 +3077,14 @@ This is automatically done, when OS_LIBMODE_T is defined. #define OS_TRACE_END() #endif +/********************************************************************* +* +* Extended task context +* +********************************************************************** +*/ +void OS_SetDefaultTaskContextExtension(const OS_EXTEND_TASK_CONTEXT* pExtendContext) OS_SECTION_ATTRIBUTE; + /********************************************************************* * * RTOSInit and misc. @@ -2625,32 +3095,57 @@ The routines declared below are available on all targets. */ -/* Routines in RTOSInit.c */ -void OS_InitHW(void); -void OS_Idle(void); -OS_U32 OS_ConvertCycles2us(OS_U32 Cycles); -OS_U32 OS_GetTime_Cycles(void); -void OS_COM_Init(void); -void OS_COM_Send1(unsigned char c); +// +// Defines for embOSView communication +// +// These defines shall be used in RTOSInit.c, e.g.: +// #ifndef OS_VIEW_IFSELECT +// #define OS_VIEW_IFSELECT OS_VIEW_IF_JLINK +// #endif +// +#define OS_VIEW_DISABLED 0u // embOSView communication is disabled +#define OS_VIEW_IF_UART 1u // If set, UART will be used for communication +#define OS_VIEW_IF_JLINK 2u // If set, J-Link will be used for communication +#define OS_VIEW_IF_ETHERNET 3u // If set, Ethernet will be used for communication +// +// Routines in RTOSInit.c +// +void OS_InitHW (void) OS_SECTION_ATTRIBUTE; +void OS_Idle (void) OS_SECTION_ATTRIBUTE; +OS_U32 OS_ConvertCycles2us(OS_U32 Cycles) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +OS_U32 OS_GetTime_Cycles (void) OS_SECTION_ATTRIBUTE; +void OS_COM_Init (void) OS_SECTION_ATTRIBUTE; +void OS_COM_Send1 (unsigned char c) OS_SECTION_ATTRIBUTE; +// +// Routines in OS_Error.c, delivered as source file +// +void OS_Error(int ErrCode) OS_SECTION_ATTRIBUTE; -/* Routines in OS_Error.c, delivered as source file */ -void OS_Error(int ErrCode); +OS_INTERWORK void OS_StartASM (void) OS_SECTION_ATTRIBUTE; +OS_INTERWORK int OS_SwitchFromInt (void) OS_SECTION_ATTRIBUTE; +void OS_InitKern (void) OS_SECTION_ATTRIBUTE; +OS_U8 OS_OnTx (void) OS_SECTION_ATTRIBUTE; +OS_INT OS_COM_GetNextChar (void) OS_SECTION_ATTRIBUTE; +void OS_OnRx (OS_U8 Data) OS_SECTION_ATTRIBUTE; +void OS_Send1 (OS_U8 c) OS_SECTION_ATTRIBUTE; +void OS_SendString (OS_ROM_DATA const char* s) OS_SECTION_ATTRIBUTE; +void OS_SendStringFast (OS_ROM_DATA const char* s) OS_SECTION_ATTRIBUTE; +OS_RX_CALLBACK* OS_SetRxCallback (OS_RX_CALLBACK* cb) OS_SECTION_ATTRIBUTE; +OS_U8 OS_EvaPacketEx (const OS_U8 pSrc[], OS_U16 SrcLen, OS_U8** pReturn) OS_SECTION_ATTRIBUTE; +void OS_COM_ClearTxActive(void) OS_SECTION_ATTRIBUTE; -OS_INTERWORK void OS_StartASM(void); /* RTOS ASM part */ -OS_INTERWORK int OS_SwitchFromInt(void); /* RTOS ASM part */ - -void OS_InitKern(void); /* OSKern.c */ -OS_U8 OS_OnTx(void); /* OSComRxTx1.c, Returns 1 on last byte */ -OS_INT OS_COM_GetNextChar(void); /* OSComRxTx1.c, Returns the character to send, or -1 */ -void OS_OnRx(OS_U8 Data); /* OSComRxTx1.c */ -void OS_Send1(OS_U8 c); /* not implemented */ -void OS_SendString(OS_ROM_DATA const char* s); /* OSSend.c */ -OS_RX_CALLBACK* OS_SetRxCallback(OS_RX_CALLBACK* cb); -OS_U8 OS_EvaPacketEx(const OS_U8 pSrc[], OS_U16 SrcLen, OS_U8** pReturn); /* OS_EvaPacketEx.c */ - -void OS_COM_ClearTxActive(void); /* OSCom2.c */ - -#define OS_Start() OS_Running = 1u; OS_StartASM() +#if (OS_DEBUG != 0) + #define OS_Start() \ + if (OS_GetVersion() != OS_VERSION) { \ + OS_Error(OS_ERR_VERSION_MISMATCH); \ + } \ + OS_Running = 1u; \ + OS_StartASM() +#else + #define OS_Start() \ + OS_Running = 1u; \ + OS_StartASM() +#endif /********************************************************************* * @@ -2662,58 +3157,132 @@ The routines declared below are available on some targets only. (Because they do not make much sense on others) */ -/* Timing routines. Their existance depends on the CPU. In general, - 8-bit CPUs require both routines, where 16-bit CPUs require one - and 32-bit CPUs require none of these. -*/ +// +// Timing routines. Their existence depends on the CPU. In general, +// 8-bit CPUs require both routines, where 16-bit CPUs require one +// and 32-bit CPUs require none of these. +// #ifndef OS_GetTime - OS_TIME OS_GetTime(void); + OS_TIME OS_GetTime(void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #endif #ifndef OS_GetTime32 #if (OS_SIZEOF_INT == 4) #define OS_GetTime32() (OS_Global.Time) #else - OS_I32 OS_GetTime32(void); + OS_I32 OS_GetTime32(void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; #endif #endif -void OS__di(void); -void OS__ei(void); -void OS__SaveIPL(void); -void OS__RestIPL(void); -void OS_SIM_Init(void); +#ifdef OS_U64 + void OS_Config_SysTimer(const OS_SYSTIMER_CONFIG *pConfig) OS_SECTION_ATTRIBUTE; // Routine for setting up values for OS_GetTime_us() + OS_U32 OS_GetTime_us (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; // Routine for calculating current system time in usec + OS_U64 OS_GetTime_us64 (void) OS_SECTION_ATTRIBUTE OS_SECURE_ATTRIBUTE; +#endif -/* Standard tick handler which increment OS time variable by one on each interrupt */ -void OS_TICK_Handle(void); /* New version of OS_TickHandler() without Enter- Leave-Interrupt */ -void OS_TICK_HandleEx(void); /* OS_TICK_HandleEx.c */ -void OS_TICK_HandleNoHook(void); /* Alternate fster tick hanlder without tick-hook-function */ -void OS_TICK_Config(unsigned FractPerInt, unsigned FractPerTick); -void OS_TICK_AddHook (OS_TICK_HOOK* pHook, OS_TICK_HOOK_ROUTINE * pfUser); -void OS_TICK_RemoveHook(OS_CONST_PTR OS_TICK_HOOK* pHook); +void OS__di (void) OS_SECTION_ATTRIBUTE; +void OS__ei (void) OS_SECTION_ATTRIBUTE; +void OS__SaveIPL(void) OS_SECTION_ATTRIBUTE; +void OS__RestIPL(void) OS_SECTION_ATTRIBUTE; +void OS_SIM_Init(void) OS_SECTION_ATTRIBUTE; -/* Routines for the PC-version running in native mode (non-windows) */ -void OS_SetIntFreq(OS_UINT f); -void OS_Exit(int code); -void OS_UseDos(void); -void OS_UnuseDos(void); -int OS_GetKey(void); -int OS_WaitKey(void); +// +// Standard tick handler which increment OS time variable by one on each interrupt +// +void OS_TICK_Handle (void) OS_SECTION_ATTRIBUTE; // New version of OS_TickHandler() without Enter- Leave-Interrupt +void OS_TICK_HandleEx (void) OS_SECTION_ATTRIBUTE; +void OS_TICK_HandleNoHook(void) OS_SECTION_ATTRIBUTE; // Alternate faster tick handler without tick-hook-function +void OS_TICK_Config (unsigned FractPerInt, unsigned FractPerTick) OS_SECTION_ATTRIBUTE; +void OS_TICK_AddHook (OS_TICK_HOOK* pHook, OS_TICK_HOOK_ROUTINE * pfUser) OS_SECTION_ATTRIBUTE; +void OS_TICK_RemoveHook (OS_CONST_PTR OS_TICK_HOOK* pHook) OS_SECTION_ATTRIBUTE; -/* Compatibility with manual */ -#define OS_CREATEMB OS_CreateMB -#define OS_GetUseCnt OS_GetSemaValue -#define OS_WaitCSema_Timed OS_WaitCSemaTimed -#define OS_WaitEvent_Timed OS_WaitEventTimed -#define OS_GetEventsOccured OS_GetEventsOccurred +// +// Routines for the PC-version running in native mode (non-windows) +// +void OS_SetIntFreq(OS_UINT f) OS_SECTION_ATTRIBUTE; +void OS_Exit (int code) OS_SECTION_ATTRIBUTE; +void OS_UseDos (void) OS_SECTION_ATTRIBUTE; +void OS_UnuseDos (void) OS_SECTION_ATTRIBUTE; +int OS_GetKey (void) OS_SECTION_ATTRIBUTE; +int OS_WaitKey (void) OS_SECTION_ATTRIBUTE; -/* Compatibility with pre V3.60e versions, renamed functions */ -#define OS_HandleTick OS_TICK_Handle -#define OS_HandleTickEx OS_TICK_HandleEx -#define OS_AddTickHook OS_TICK_AddHook -#define OS_RemoveTickHook OS_TICK_RemoveHook +/********************************************************************* +* +* Compatibility with manual and older embOS versions +* +********************************************************************** +*/ +// +// Compatibility with manual +// +#define OS_CREATEMB OS_CreateMB +#define OS_GetUseCnt OS_GetSemaValue +#define OS_WaitCSema_Timed OS_WaitCSemaTimed +#define OS_WaitEvent_Timed OS_WaitEventTimed +#define OS_GetEventsOccured OS_GetEventsOccurred +// +// Compatibility with pre V3.60e versions, renamed functions +// +#define OS_HandleTick OS_TICK_Handle +#define OS_HandleTickEx OS_TICK_HandleEx +#define OS_AddTickHook OS_TICK_AddHook +#define OS_RemoveTickHook OS_TICK_RemoveHook +// +// Compatibility with pre V3.82v versions, renamed functions +// +#define OS_Terminate OS_TerminateTask +// +// Compatibility with pre V4.30 versions, renamed function +// +#define OS_AddOnTerminateHook OS_AddTerminateHook +#define OS_RemoveOnTerminateHooks OS_RemoveAllTerminateHooks +#define OS_ResumeAllSuspendedTasks OS_ResumeAllTasks -/* Compatibility with pre V3.82v versions, renamed functions */ -#define OS_Terminate OS_TerminateTask +/********************************************************************* +* +* Debug info for thread awareness +* +********************************************************************** +* +* Field offsets required by remote debugger for thread-awareness, +* i.e. for walking the task list. +*/ +struct OS_DEBUG_INFO_STRUCT +{ + // + // Offsets in OS_GLOBAL struct + // + OS_U8 OS_GLOBAL_pCurrentTask_Offs; // Offset of pCurrentTask + OS_U8 OS_GLOBAL_pTask_Offs; // Offset of pTask + OS_U8 OS_GLOBAL_pActiveTask_Offs; // Offset of pActiveTask + OS_U8 OS_GLOBAL_pTimer_Offs; // Offset of pTimer + OS_U8 OS_GLOBAL_pCurrentTimer_Offs; // Offset of pCurrentTimer + OS_U8 OS_GLOBAL_Time_Offs; // Offset of Time + OS_U8 OS_GLOBAL_TimeSlice_Offs; // Offset of TimeSlice + OS_U8 OS_GLOBAL_TimeSliceAtStart_Offs; // Offset of TimeSliceAtStart + // + // Offsets in OS_TASK struct + // + OS_U8 OS_TASK_pNext_Offs; // Offset of pNext + OS_U8 OS_TASK_pStack_Offs; // Offset of pStack + OS_U8 OS_TASK_Timeout_Offs; // Offset of Timeout + OS_U8 OS_TASK_Stat_Offs; // Offset of Stat + OS_U8 OS_TASK_Priority_Offs; // Offset of Priority + OS_U8 OS_TASK_BasePrio_Offs; // Offset of BasePrio + OS_U8 OS_TASK_Events_Offs; // Offset of Events + OS_U8 OS_TASK_EventMask_Offs; // Offset of EventMask + OS_U8 OS_TASK_Name_Offs; // Offset of Name + OS_U8 OS_TASK_StackSize_Offs; // Offset of StackSize + OS_U8 OS_TASK_pStackBot_Offs; // Offset of pStackBot + OS_U8 OS_TASK_NumActivations_Offs; // Offset of NumActivations + OS_U8 OS_TASK_NumPreemptions_Offs; // Offset of NumPreemptions + OS_U8 OS_TASK_ExecTotal_Offs; // Offset of ExecTotal + OS_U8 OS_TASK_ExecLast_Offs; // Offset of ExecLast + OS_U8 OS_TASK_Load_Offs; // Offset of Load + OS_U8 OS_TASK_TimeSliceRem_Offs; // Offset of TimeSliceRem + OS_U8 OS_TASK_TimeSliceReload_Offs; // Offset of TimeSliceReload +}; + +typedef struct OS_DEBUG_INFO_STRUCT OS_DEBUG_INFO; /********************************************************************/ @@ -2723,4 +3292,4 @@ int OS_WaitKey(void); #endif /* RTOS_H_INCLUDED */ -/****** End Of File *************************************************/ +/*************************** End of file ****************************/ diff --git a/doxygen/Doxyfile b/doxygen/Doxyfile index 8e64886c..30e1cd54 100644 --- a/doxygen/Doxyfile +++ b/doxygen/Doxyfile @@ -5,7 +5,7 @@ #--------------------------------------------------------------------------- DOXYFILE_ENCODING = UTF-8 PROJECT_NAME = "QP/C" -PROJECT_NUMBER = "5.8.2" +PROJECT_NUMBER = "5.9.0" PROJECT_BRIEF = PROJECT_LOGO = images/header_logo_ql.png OUTPUT_DIRECTORY = @@ -191,10 +191,10 @@ IGNORE_PREFIX = GENERATE_HTML = YES HTML_OUTPUT = ../../html/qpc HTML_FILE_EXTENSION = .html -HTML_HEADER = ../../doxygen/header.html -HTML_FOOTER = ../../doxygen/footer.html +HTML_HEADER = ../../html/header.html +HTML_FOOTER = ../../html/footer.html HTML_STYLESHEET = -HTML_EXTRA_STYLESHEET = ../../doxygen/ql.css +HTML_EXTRA_STYLESHEET = ../../html/ql.css HTML_EXTRA_FILES = HTML_COLORSTYLE_HUE = 220 HTML_COLORSTYLE_SAT = 100 diff --git a/doxygen/Doxyfile-CHM b/doxygen/Doxyfile-CHM index bee482b1..fc8eae8a 100644 --- a/doxygen/Doxyfile-CHM +++ b/doxygen/Doxyfile-CHM @@ -5,7 +5,7 @@ #--------------------------------------------------------------------------- DOXYFILE_ENCODING = UTF-8 PROJECT_NAME = "QP/C" -PROJECT_NUMBER = "5.8.2" +PROJECT_NUMBER = "5.9.0" PROJECT_BRIEF = PROJECT_LOGO = images/header_logo_ql.png OUTPUT_DIRECTORY = @@ -191,10 +191,10 @@ IGNORE_PREFIX = GENERATE_HTML = YES HTML_OUTPUT = tmp HTML_FILE_EXTENSION = .html -HTML_HEADER = ../../doxygen/header.html -HTML_FOOTER = ../../doxygen/footer.html +HTML_HEADER = ../../html/header.html +HTML_FOOTER = ../../html/footer.html HTML_STYLESHEET = -HTML_EXTRA_STYLESHEET = ../../doxygen/ql.css +HTML_EXTRA_STYLESHEET = ../../html/ql.css HTML_EXTRA_FILES = HTML_COLORSTYLE_HUE = 220 HTML_COLORSTYLE_SAT = 100 diff --git a/doxygen/Doxyfile-DOC b/doxygen/Doxyfile-DOC index 4c225dd8..cfd091ad 100644 --- a/doxygen/Doxyfile-DOC +++ b/doxygen/Doxyfile-DOC @@ -108,7 +108,7 @@ WARN_LOGFILE = #--------------------------------------------------------------------------- # Configuration options related to the input files #--------------------------------------------------------------------------- -INPUT = \ +INPUT = \ main.dox \ gs.dox \ struct.dox \ @@ -130,7 +130,13 @@ INPUT = \ history.dox \ macros.h \ metrics.dox \ - modules.dox + modules.dox \ + ../include \ + ../source \ + ../ports/lint \ + ../ports/lint/qk \ + ../ports/lint/qv \ + ../ports/lint/qxk INPUT_ENCODING = UTF-8 FILE_PATTERNS = \ @@ -189,10 +195,10 @@ IGNORE_PREFIX = GENERATE_HTML = YES HTML_OUTPUT = ../../html/qpc HTML_FILE_EXTENSION = .html -HTML_HEADER = ../../doxygen/header.html -HTML_FOOTER = ../../doxygen/footer.html +HTML_HEADER = ../../html/header.html +HTML_FOOTER = ../../html/footer.html HTML_STYLESHEET = -HTML_EXTRA_STYLESHEET = ../../doxygen/ql.css +HTML_EXTRA_STYLESHEET = ../../html/ql.css HTML_EXTRA_FILES = HTML_COLORSTYLE_HUE = 220 HTML_COLORSTYLE_SAT = 100 diff --git a/doxygen/exa.dox b/doxygen/exa.dox index b304aa60..90c3d904 100644 --- a/doxygen/exa.dox +++ b/doxygen/exa.dox @@ -150,7 +150,7 @@ To demonstrate QP/C features on an embedded board, you need to create an applica With the exception of the game application, all other example applications can be implemented on a board with just a couple of LEDs. The @ref game application is a bit more involved and requires a small graphic display on the board. -Beyond these basic applications for demonstrating and testing the various @ref ports "QP/C ports", the QP/C distribution contains all examples described in the book Practical UML Statecharts in C/C++, 2nd Edition. +Beyond these basic applications for demonstrating and testing the various @ref ports "QP/C ports", the QP/C distribution contains all examples described in the book Practical UML Statecharts in C/C++, 2nd Edition. @sa @ref exa_win32 @@ -182,7 +182,7 @@ The different phases of embedded software life cycle pose different challenges. ----------------------------------------------------------------------------- @subsection exa_sec_qm QM Models -Many example projects contain code auto-generated by the QM modeling tool. Such projects always contain the corresponding **QM model** file, which you can open in QM, modify, and re-generate the code. +Many example projects contain code auto-generated by the QM modeling tool. Such projects always contain the corresponding **QM model** file, which you can open in QM, modify, and re-generate the code. @note The auto-generated files are saved as **read-only**. This protects them from inadvertent modifications, which will get lost when the files are re-generated by QM (or QMC). All modifications to the auto-generated code should be done in the QM model, not in the code. @@ -223,10 +223,10 @@ By copying and re-naming an existing, working project, as opposed to creating a To work with QP/C effectively, you need to learn a bit more about active objects and state machines. Below is a list of links to enable you to further your knowledge: -1. The book “Practical UML Statecharts in C/C++, 2nd Edition” [PSiCC2] and the companion web-page to the book (http://www.state-machine.com/psicc2/ +1. The book “Practical UML Statecharts in C/C++, 2nd Edition” [PSiCC2] and the companion web-page to the book (https://www.state-machine.com/psicc2/ 2. Free Support Forum for QP/QM (https://sourceforge.net/p/qpc/discussion/668726 ) -3. QP Code Downloads summary (http://www.state-machine.com/downloads ) -4. QP Application Notes (http://www.state-machine.com/doc/an.html ) +3. QP Code Downloads summary (https://www.state-machine.com/downloads ) +4. QP Application Notes (https://www.state-machine.com/doc/an ) 5. "State Space" Blog (http://embeddedgurus.com/state-space/ ) @next{exa_ref} diff --git a/doxygen/exa_apps.dox b/doxygen/exa_apps.dox index 0be8b867..00e7d8a7 100644 --- a/doxygen/exa_apps.dox +++ b/doxygen/exa_apps.dox @@ -9,17 +9,17 @@ - @subpage game - @subpage pelican -Additionally, the QP/C distribution contains several application examples described in the PSiCC2 book. +Additionally, the QP/C distribution contains several application examples described in the PSiCC2 book. -- Calculator example from Chapter 2 of PSiCC2 -- Orthogonal Component design pattern -- Orthogonal Component with QM model design pattern -- Deferred Event design pattern -- Transition-to-History (with ::QHsm class) -- Transition-to-History (with ::QMsm class) -- QMsmTst Test State Machine based on QP::QMsm with QM model -- QHsmTst Test State Machine based on QP::QHsm with QM model -- Reminder design pattern from Chapter 5 of PSiCC2 +- Calculator example from Chapter 2 of PSiCC2 +- Orthogonal Component design pattern +- Orthogonal Component with QM model design pattern +- Deferred Event design pattern +- Transition-to-History (with ::QHsm class) +- Transition-to-History (with ::QMsm class) +- QMsmTst Test State Machine based on QP::QMsm with QM model +- QHsmTst Test State Machine based on QP::QHsm with QM model +- Reminder design pattern from Chapter 5 of PSiCC2 - Reminder design pattern different version @next{blinky} @@ -46,7 +46,7 @@ The ultra-simple Blinky application, which consists of just one active object n @section blinky_sm State Machine The very simple state machine of the Blinky AO is shown in the figure below: -@image html SM_blinky.png "State Machine of the Blinky AO" +@image html SM_blinky.png "State Machine of the Blinky AO"
  • 1 The top-most initial transition in this state machine arms a QP time event (QTimeEvt_armX()) to deliver the `TIMEOUT` signal every half second, so that the LED can stay on for one half second and off for the other half. @@ -91,11 +91,11 @@ As you can see, the structure of the state machine is very clearly recognizable /*##########################################################################*/ /*! @page dpp Dining Philosophers Problem (DPP) -The Dining Philosophers Problem (DPP) example is described in the Application Note: Dining Philosophers Problem (DPP) Example. +The Dining Philosophers Problem (DPP) example is described in the Application Note: Dining Philosophers Problem (DPP) Example. @htmlonly
    - +
    Application Note: Dining Philosophers Problem (DPP) Example
    @@ -108,11 +108,11 @@ Application Note: Dining Philosophers Problem (DPP) Example /*##########################################################################*/ /*! @page game "Fly 'n' Shoot" Game -The "Fly 'n' Shoot" game example is described in the Application Note: Fly 'n' Shoot Game Example. +The "Fly 'n' Shoot" game example is described in the Application Note: Fly 'n' Shoot Game Example. @htmlonly
    - +
    Application Note: Fly 'n' Shoot Game Example
    @@ -125,11 +125,11 @@ Application Note: Fly 'n' Shoot Game Example /*##########################################################################*/ /*! @page pelican PEdestrian LIgtht CONtrolled (PELICAN) Crossing -The "Fly 'n' Shoot" game example is described in the Application Note: PEdestrian LIght CONtrolled (PELICAN) Crossing Example. +The "Fly 'n' Shoot" game example is described in the Application Note: PEdestrian LIght CONtrolled (PELICAN) Crossing Example. @htmlonly
    - +
    Application Note: PEdestrian LIght CONtrolled (PELICAN) Crossing Example
    diff --git a/doxygen/exa_mware.dox b/doxygen/exa_mware.dox index 81716eb1..9c1f1794 100644 --- a/doxygen/exa_mware.dox +++ b/doxygen/exa_mware.dox @@ -13,23 +13,23 @@ /*##########################################################################*/ /*! @page lwip_ek-lm3s6965 lwIP on EK-LM3S6965 -@image html bd_EK-LM3S6965.jpg EK-LM3S6965 board +@image html bd_EK-LM3S6965.jpg EK-LM3S6965 board lwIP example for Texas Instruments EK-LM3S6965 (Cortex-M3) with GNU-ARM and IAR-ARM toolsets. -@image html bd_EK-LM3S6965_lwip.jpg QP-lwIP on EK-LM3S6965 +@image html bd_EK-LM3S6965_lwip.jpg QP-lwIP on EK-LM3S6965 @n@n -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page exa_emwin emWin Embedded GUI -

    The Application Note "QP and emWin Embedded GUI" describes how to use QP™ with the emWin&trad; Embedded GUI from SEGGER and also µC/GUI from Micriµm, which technically are the same products. +

    The Application Note "QP and emWin Embedded GUI" describes how to use QP™ with the emWin&trad; Embedded GUI from SEGGER and also µC/GUI from Micriµm, which technically are the same products.

    -@image html emWin_demo.jpg QP-emWin demo (DPP) running on Windows +@image html emWin_demo.jpg QP-emWin demo (DPP) running on Windows To demonstrate the working examples, this Application Note uses the emWin Simulation on Windows, which is available for a free download from the SEGGER (requires registration). You need only a Windows-based PC to execute the examples provided in this Application Note. Additionally, you’d need Microsoft Visual Studio 2013 (could be the free Express Edition) or higher to re-build and debug the provided examples. diff --git a/doxygen/exa_native.dox b/doxygen/exa_native.dox index f118087c..ddd3ef62 100644 --- a/doxygen/exa_native.dox +++ b/doxygen/exa_native.dox @@ -1,5 +1,5 @@ -namespace QP { - +namespace QP { + /*##########################################################################*/ /*! @page exa_native Native Examples (Built-in Kernels) @@ -148,7 +148,7 @@ You can hover the mouse cursor over the    /*##########################################################################*/ /*! @page arm-cm_blinky_ek-tm4c123gxl Blinky on EK-TM4C123GXL -@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board +@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board @n @n @image html blinky_ek-tm4c123gxl.gif Blinky on EK-TM4C123GLX (TivaC LaunchPad) @@ -158,110 +158,110 @@ Simple "Blinky" example for Texas Instruments TivaC123GXL MCU (Cortex-M4F), ARM @image html blinky_win32.png Blinky emulation running in a Windows console @n @n -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_blinky_efm32-slstk3401a Blinky on EFM32-SLSTK3401A -@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board +@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board @n Simple "Blinky" example for for Silicon Labs Pearl Gecko MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets. @n @image html blinky_win32.png Blinky emulation running in a Windows console @n @n -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_dpp_ek-tm4c123gxl DPP on EK-TM4C123GXL -@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board +@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board Dining Philosophers Problem (DPP) example for Texas Instruments TivaC123GXL MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets. @image html dpp_win32.png DPP emulation running in Windows GUI @n @n -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_dpp_efm32-slstk3401a DPP on EFM32-SLSTK3401A -@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board +@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board @n Dining Philosophers Problem (DPP) example for for Silicon Labs Pearl Gecko MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets. @n -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_dpp_mbed-lpc1768 DPP on mbed-LPC1768 -@image html bd_mbed-LPC1768.jpg mbed-LPC1768 board +@image html bd_mbed-LPC1768.jpg mbed-LPC1768 board Dining Philosophers Problem (DPP) example for NXP LPC1768 MCU (Cortex-M3) with GNU-ARM toolset. -@image html mbed-LPC1768_button.jpg Adding External Button to mbed-LPC1768 +@image html mbed-LPC1768_button.jpg Adding External Button to mbed-LPC1768 @n @n -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_dpp_nucleo-l053r8 DPP on NUCLEO-L053R8 -@image html bd_nucleo-l053r8.jpg NUCLEO-L053R8 board +@image html bd_nucleo-l053r8.jpg NUCLEO-L053R8 board Dining Philosophers Problem (DPP) example for STM32-L053R8T6 MCU (Cortex-M0+) with ARM-Keil, GNU-ARM, and IAR-ARM toolsets. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_dpp_nucleo-l152re DPP on NUCLEO-L152RE -@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board +@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board Dining Philosophers Problem (DPP) example for STM32-L152RET6 MCU (Cortex-M3) with ARM-Keil, GNU-ARM, and IAR-ARM toolsets. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_dpp_stm32f746g-disco DPP on STM32F746G-Discovery -@image html bd_STM32F746G-Disco.jpg STM32F746G-Discovery +@image html bd_STM32F746G-Disco.jpg STM32F746G-Discovery Dining Philosophers Problem (DPP) example for STM32F746G-Discovery MCU (Cortex-M7) with ARM-Keil, GNU-ARM, and IAR-ARM toolsets. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cm_game_efm32-slstk3401a "Fly 'n' Shoot" Game on EFM32-SLSTK3401A -@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board +@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board "Fly 'n' Shoot" game example for Silicon Labs Pearl Gecko MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets. @image html game_win32.png Game emulation running in Windows GUI @n @n -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cr_blinky_launchxl2-tms57012 Blinky on LAUNCHXL2-TMS57012 -@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012 +@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012 @ref blinky "Blinky" example for LAUNCHXL2-TMS57012 MCU (Cortex-R, Hercules) with IAR-ARM and TI toolsets. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page arm-cr_dpp_launchxl2-tms57012 DPP on LAUNCHXL2-TMS57012 -@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012 +@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012 Dining Philosophers Problem (DPP) example for LAUNCHXL2-TMS57012 MCU (Cortex-R, Hercules) with IAR-ARM and TI toolsets. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ @@ -278,11 +278,11 @@ The native (bare-metal) QP/C examples for the "classic" ARM7/ARM9 are as follows /*##########################################################################*/ /*! @page arm7-9_dpp_at91sam7s-ek DPP on AT91SAM7S-EK -@image html bd_AT91SAM7S-EK.jpg AT91SAM7S-EK board +@image html bd_AT91SAM7S-EK.jpg AT91SAM7S-EK board Dining Philosophers Problem (DPP) example for Atmel AT91SAM7S MCU (ARM7) with GNU-ARM toolset. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page exa_msp430 MSP430 @@ -300,25 +300,25 @@ The native (bare-metal) QP/C examples for MSP430 are as follows: /*##########################################################################*/ /*! @page msp430_blinky_msp-exp430g2 Blinky on MSP-EXP430G2 -@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board +@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board Simple Blinky example for MSP-EXP430G2 with CCS-430 and IAR-430 toolsets. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page msp430_blinky_msp-exp430f5529lp Blinky on MSP-EXP430F5529LP -@image html bd_MSP-EXP430F5529LP.jpg MSP-EXP430F5529LP board +@image html bd_MSP-EXP430F5529LP.jpg MSP-EXP430F5529LP board Simple Blinky example for MSP-EXP430F5529LP with CCS-430 and IAR-430 toolsets. -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page msp430_dpp_msp-exp430g2 DPP on MSP-EXP430G2 -@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board +@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board DPP example for MSP-EXP430G2 with CCS-430 and IAR-430 toolsets. @@ -333,12 +333,12 @@ qspy -cCOM_PORT -b9600 -O2 -F2 -E1 -P1 -B1 where `COM_PORT` denotes the Virtual COM port, which you can find out in the Device Manager (see the screen shot below): -@image html com_msp-exp430g2.png Virtual COM port of the MSP-EXP430G2 board +@image html com_msp-exp430g2.png Virtual COM port of the MSP-EXP430G2 board @note To receive the QS data over the Virtual COM Port, you need to make sure that the jumper J3 on the MSP-EXP430G2 board is configured for the "Hardware UART" (the first two jumpers should be in the horizontal setting, as shown in the picture of the MSP-EXP430G2 board on top of this page. -@image html under_construction.jpg +@image html under_construction.jpg */ - + } // namespace QP \ No newline at end of file diff --git a/doxygen/exa_os.dox b/doxygen/exa_os.dox index 78e13e9f..a3b4d7e7 100644 --- a/doxygen/exa_os.dox +++ b/doxygen/exa_os.dox @@ -1,66 +1,66 @@ /*! @page exa_os Examples for Third-Party OS - @subpage exa_posix "POSIX" -- @subpage exa_win32 -- @subpage exa_win32-qv +- @subpage exa_win32 +- @subpage exa_win32-qv -@next{exa_posix} +@next{exa_posix} */ /*##########################################################################*/ /*! @page exa_posix POSIX (Linux, VxWorks, QNX, INTEGRITY, etc.) -

    The examples/posix folder contains the following examples: -

    - -- blinky Simple "Blinky" (command-line) -- dpp DPP (command-line) -- qmsmtst Test State Machine based on QP::QMsm with QM model -- qhsmtst Test State Machine based on QP::QHsm with QM model +

    The examples/posix folder contains the following examples: +

    -@next{exa_win32} +- blinky Simple "Blinky" (command-line) +- dpp DPP (command-line) +- qmsmtst Test State Machine based on QP::QMsm with QM model +- qhsmtst Test State Machine based on QP::QHsm with QM model + +@next{exa_win32} */ - -/*##########################################################################*/ -/*! @page exa_win32 Win32 API (Windows) - -

    The examples/win32 folder contains all examples described in the book Practical UML Statecharts in C/C++, 2nd Edition. These examples include: -

    - -- blinky Simple "Blinky" for Windows (command line) -- calc Calculator example from Chapter 2 of PSiCC2 -- comp Orthogonal Component design pattern -- comp_qm Orthogonal Component with QM model design pattern -- defer Deferred Event design pattern -- dpp DPP (command-line) -- dpp-gui DPP (with GUI on Windows) -- game-gui "Fly 'n' Shoot" game from Chapter 1 of PSiCC2 -- history_qhsm Transition-to-History (with ::QHsm class) -- history_qmsm Transition-to-History (with ::QMsm class) -- qmsmtst Test State Machine based on ::QMsm with QM model -- qhsmtst Test State Machine based on ::QHsm with QM model -- reminder Reminder design pattern from Chapter 5 of PSiCC2 + +/*##########################################################################*/ +/*! @page exa_win32 Win32 API (Windows) + +

    The examples/win32 folder contains all examples described in the book Practical UML Statecharts in C/C++, 2nd Edition. These examples include: +

    + +- blinky Simple "Blinky" for Windows (command line) +- calc Calculator example from Chapter 2 of PSiCC2 +- comp Orthogonal Component design pattern +- comp_qm Orthogonal Component with QM model design pattern +- defer Deferred Event design pattern +- dpp DPP (command-line) +- dpp-gui DPP (with GUI on Windows) +- game-gui "Fly 'n' Shoot" game from Chapter 1 of PSiCC2 +- history_qhsm Transition-to-History (with ::QHsm class) +- history_qmsm Transition-to-History (with ::QMsm class) +- qmsmtst Test State Machine based on ::QMsm with QM model +- qhsmtst Test State Machine based on ::QHsm with QM model +- reminder Reminder design pattern from Chapter 5 of PSiCC2 - reminder Reminder design pattern different version @sa -- @ref exa_win32-qv -- @ref win32 +- @ref exa_win32-qv +- @ref win32 -@next{exa_win32-qv} -*/ - -/*##########################################################################*/ -/*! @page exa_win32-qv Win32-QV (Windows) - -

    The examples/win32-qv folder contains examples for Win32 API with the cooperative QV kernel. In the Win32-QV port all active objects share only one Win32 thread and are scheduled exactly as in the \ref comp_qv "cooperative QV kernel". The following examples are provided: +@next{exa_win32-qv} +*/ + +/*##########################################################################*/ +/*! @page exa_win32-qv Win32-QV (Windows) + +

    The examples/win32-qv folder contains examples for Win32 API with the cooperative QV kernel. In the Win32-QV port all active objects share only one Win32 thread and are scheduled exactly as in the \ref comp_qv "cooperative QV kernel". The following examples are provided:

    - -- dpp DPP (command-line) -- game-gui "Fly 'n' Shoot" game from Chapter 1 of PSiCC2 + +- dpp DPP (command-line) +- game-gui "Fly 'n' Shoot" game from Chapter 1 of PSiCC2 @note -All examples for @ref exa_win32 will also work with the @ref win32-qv "Win32-QV port" without any modifications to the source code, because @ref win32-qv "Win32-QV port" is designed as a drop-in replacement for the standard @ref win32 "Win32 port". To build the examples with @ref win32-qv "Win32-QV port" you merely need to include ports/win32-qv instead of ports/win32 and you need to link the @ref win32-qv "Win32-QV" QP library. +All examples for @ref exa_win32 will also work with the @ref win32-qv "Win32-QV port" without any modifications to the source code, because @ref win32-qv "Win32-QV port" is designed as a drop-in replacement for the standard @ref win32 "Win32 port". To build the examples with @ref win32-qv "Win32-QV port" you merely need to include ports/win32-qv instead of ports/win32 and you need to link the @ref win32-qv "Win32-QV" QP library. @sa -- @ref exa_win32 -- @ref win32-qv +- @ref exa_win32 +- @ref win32-qv */ \ No newline at end of file diff --git a/doxygen/exa_rtos.dox b/doxygen/exa_rtos.dox index 79c93004..c3983966 100644 --- a/doxygen/exa_rtos.dox +++ b/doxygen/exa_rtos.dox @@ -36,7 +36,7 @@ You can hover the mouse cursor over the    The @ref dpp "DPP example" for embOS on STM32F4-Discovery board is located directory examples/embos/arm-cm/dpp_stm32f429-discovery. -@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board +@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board The sub-directory iar contains the workspace and project file that you can open in IAR EWARM IDE. @@ -57,7 +57,7 @@ VDD | VCC GND | GND -@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter +@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter The output is generated at 115200 baud rate. @@ -90,7 +90,7 @@ You can hover the mouse cursor over the    The @ref dpp "DPP example" for ThreadX on STM32F4-Discovery board is located directory examples/threadx/arm-cm/dpp_stm32f429-discovery. -@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board +@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board The sub-directory iar contains the workspace and project file that you can open in IAR EWARM IDE. @@ -115,7 +115,7 @@ VDD | VCC GND | GND -@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter +@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter The output is generated at 115200 baud rate. @@ -129,7 +129,7 @@ The actual COM port number might be different on your Windows machine. Please ch @next{exa_ti-rtos examples} */ - + /*##########################################################################*/ /*! @page exa_ti-rtos TI-RTOS @htmlonly @@ -164,10 +164,10 @@ You can hover the mouse cursor over the    The @ref dpp "DPP example" for TI-RTOS on EK-TM4C123GXL board is located directory examples/ti-rtos/arm-cm/dpp_ek-tm4c123gxl. -@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board +@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board -@attention -The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the 3rd_party/ directory in the QP/C++ distribution. Therefore, you need to **download and install TI-RTOS** on your machine before you can build any examples (preferably in the default location C:/TI). Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: SPRUHU5D) for more information. +@attention +The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the 3rd_party/ directory in the QP/C++ distribution. Therefore, you need to **download and install TI-RTOS** on your machine before you can build any examples (preferably in the default location C:/TI). Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: SPRUHU5D) for more information. The sub-directory ccs contains the project files that you can **import** into the TI CCS IDE. @@ -334,22 +334,22 @@ You can hover the mouse cursor over the    /*##########################################################################*/ /*! @page ucos-ii_dpp_ek-tm4c123gxl DPP on EK-TM4C123GXL -@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board +@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board DPP example for Texas Instruments TivaC123GXL MCU (Cortex-M4F) and IAR EWARM toolsets. -@image html under_construction.jpg +@image html under_construction.jpg @next{exa_os examples} */ /*##########################################################################*/ /*! @page ucos-ii_dpp_nucleo-l152re DPP on NUCLEO-L152RE -@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board +@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board DPP example for Texas Instruments STM32 L152RET6 MCU (Cortex-M3) and IAR EWARM toolsets. -@image html under_construction.jpg +@image html under_construction.jpg @next{exa_os examples} */ diff --git a/doxygen/gs.dox b/doxygen/gs.dox index f72db6ce..43ebd4c7 100644 --- a/doxygen/gs.dox +++ b/doxygen/gs.dox @@ -37,16 +37,16 @@ When the *Tree View* is **unlinked** from the Current Topic, the *Tree View* wil ------------------------------------------------------------------------------ @section gs_an Getting Started with QP/C App Note -The Quantum Leaps Application Note Getting Started with QP/C provides step-by-step instructions on how to download, install, and get started with QP/C quickly. The application note also contains a **QP/C Tutorial**, in which you build a simple "Blinky" application. +The Quantum Leaps Application Note Getting Started with QP/C provides step-by-step instructions on how to download, install, and get started with QP/C quickly. The application note also contains a **QP/C Tutorial**, in which you build a simple "Blinky" application. @htmlonly
    - +
    Application Note: Getting Started with QP/C
    @endhtmlonly - -@next{struct} -*/ + +@next{struct} +*/ diff --git a/doxygen/history.dox b/doxygen/history.dox index 48c8cb94..5ae16e0f 100644 --- a/doxygen/history.dox +++ b/doxygen/history.dox @@ -1,6 +1,58 @@ /** @page history Revision History +@section qpc_5_9_0 Version 5.9.0, 2017-05-19 +The main purpose of this milestone QP/C release is to provide support for the powerful **Unit Testing Framework** called +QUTest™ (pronounced *cutest*). +QUTest™ is the fundamental tooling for Test-Driven Development (TDD) of QP/C applications, which is a highly recommended best-practice. This release introduces changes in the QS-RX (receive) channel and adds several new callbacks. + +@note The signatrue of the QS_onCommand() has changed and the function now takes 3 arbitrary 32-bit parameters instead of one. This introduces backwards-incompatibility with previous code that used QS_onCommand(). + + +This release also changes the critical section for QP/C ports to ARM Cortex-M +in that the policy of "save and restore interrupt status" is used. This policy +permits nesting of critical sections, which was requested by customers. + +Additionally, this release changes the selective interrupt disabling for +ARM Cortex-M3/4/7 (with the BASEPRI register) to address the hardware problem +on ARM Cortex-M7 core r0p1 (ARM-EPM-064408, errata 837070). The QP ports to +ARM Cortex-M3/4/7 now implement the workaround recommended by ARM, which is +to surround MSR BASEPRI with the "CPSID i"/"CPSIE i" pair. This workaround +works also for Cortex-M3/M4 cores. + +New ports: +- ports/win32-qutest folder contains port to QUTest for Windows +- ports/posix-qutest folder contains port to QUTest for POSIX (Linux) +- ports/arm-cm/qutest folder contains port to QUTest for ARM Cortex-M + +New examples: +- examples/qutest/dpp folder contains the QUTest DPP test for various + platforms (Win32, EFM32-SLSTK3401A and EK-TM4C123GXL) +- examples/qutest/qhsmtst folder contains the QUTest test for + the QHsmTst state machine (structural test) +- examples/qutest/qmsmtst folder contains the QUTest test for + the QMsmTst state machine (structural test) +- examples/qutest/self_test folder contains the QUTest self-test for + various features of QUTest +- examples/qutest/TDDbook_Flash folder contains the QUTest + of a flash memory driver from Chapter 10 of the "TDD-book" by James + Grenning. +- examples/qutest/TDDbook_LedDriver folder contains the QUTest + of a flash memory driver from Chapters 3&4 of the "TDD-book" by James + Grenning. +- examples/qutest/TDDbook_Sprintf folder contains the QUTest + of a flash memory driver from Chapter 1 of the "TDD-book" by James + Grenning. + +Updates of 3rd_party software: +- the 3rd_party/CMSIS folder has been updated to CMSIS 5.0.2. +- the 3rd_party/embOS folder has been updated to embOS 4.34.1 + +Finally, this release fixes the following bugs: +- bug#162 "QF critical sections require modification for M7 core" + + +------------------------------------------------------------------------------ @section qpc_5_8_2 Version 5.8.2, 2017-02-08 This release adds examples for the ARM Cortex-M7 CPU. Specifically, the release contains the standard @ref dpp "Dining Philosophers Problem (DPP)" @@ -13,19 +65,19 @@ for the STM32F7xx MCUs, which contains parts of STM32CubeF7 library. Also, the `3rd_party/CMSIS` folder now provides the new CMSIS V5.0.1. -Finally, this release fixes the following bugs: +Finally, this release fixes the following bugs: - bug#159 QP/C/C++ Win32 ports don't work on all x86 CPUs - bug#157 In QPC ucosii port, conversion of AO's priority to OS task priority is incorrect. - bug#152 Typo (qpc\ports\arm7-9\qk\gnu\qk_port.s:42) prevents compilation - ------------------------------------------------------------------------------- + +------------------------------------------------------------------------------ @section qpc_5_8_1 Version 5.8.1, 2016-12-16 This release is in response to a recent finding that many QP users of the ports to ARM Cortex-M3/M4 forget to explicitly set their interrupt priorities, -as described in the AppNote "Setting ARM Cortex-M Interrupt Priorities in QP 5.x". +as described in the AppNote "Setting ARM Cortex-M Interrupt Priorities in QP 5.x". Specifically, this release improves safety of QP ports to ARM Cortex-M3/M4, by initializing the interrupt priorities to a safe default in a generic, @@ -58,8 +110,8 @@ Changes in detail: dropped during the upgrade to CMSIS 5.0.1, because it is not part of the standard distribution. - ------------------------------------------------------------------------------- + +------------------------------------------------------------------------------ @section qpc_5_8_0 Version 5.8.0, 2016-11-30 The main purpose of this milestone QP/C release is to finally provide the baseline framework fully compatible with the upcoming QM 4.0.0. @@ -105,66 +157,66 @@ Finally, the complete list of bugs fixed in this release is as follows: - bug#143 "QACTIVE_POST_LIFO() on initial transition asserts on QXK" - bug#124 "Windows port now cause memory leakage" - ------------------------------------------------------------------------------- + +------------------------------------------------------------------------------ @section qpc_5_7_4 Version 5.7.4, 2016-11-04 -This release fixes the following bugs: -- bug#145 QF_PUBLISH() leaks events that have no subscribers -- bug#144 Obsolete Win32 API in qwin_gui.c -- bug#143 QACTIVE_POST_LIFO() on initial transition asserts on QXK - - ------------------------------------------------------------------------------- +This release fixes the following bugs: +- bug#145 QF_PUBLISH() leaks events that have no subscribers +- bug#144 Obsolete Win32 API in qwin_gui.c +- bug#143 QACTIVE_POST_LIFO() on initial transition asserts on QXK + + +------------------------------------------------------------------------------ @section qpc_5_7_3 Version 5.7.3, 2016-10-07 -This release adds QP ports to the TI-RTOS kernel (SYS/BIOS) with TI-CCS -and IAR EWARM toolsets. Examples are provided for the EK-TM4C123GXL -(TivaC LaunchPad) in the directory: - -qpc/examples/ti-rtos/arm-cm/dpp_ek-tm4c123gxl - -NOTE: The examples require a separate installation of the TI-RTOS -(file tirtos_tivac_setupwin32_2_16_01_14.exe) - -Also, this release fixes the following bugs: -- bug#140 (PendSV_Handler() exception stacked PC not halfword aligned). -- bug#142 (PendSV_restore_ex may not be able to enable interrupt before - returning to task). - - ------------------------------------------------------------------------------- +This release adds QP ports to the TI-RTOS kernel (SYS/BIOS) with TI-CCS +and IAR EWARM toolsets. Examples are provided for the EK-TM4C123GXL +(TivaC LaunchPad) in the directory: + +qpc/examples/ti-rtos/arm-cm/dpp_ek-tm4c123gxl + +NOTE: The examples require a separate installation of the TI-RTOS +(file tirtos_tivac_setupwin32_2_16_01_14.exe) + +Also, this release fixes the following bugs: +- bug#140 (PendSV_Handler() exception stacked PC not halfword aligned). +- bug#142 (PendSV_restore_ex may not be able to enable interrupt before + returning to task). + + +------------------------------------------------------------------------------ @section qpc_5_7_2 Version 5.7.2, 2016-09-30 -This is the first production release of the "dual-mode" QXK kernel. -"Dual-mode" QXK means that QXK supports both basic-threads (BC1 class -from the OSEK/VDX RTOS specification) as well as extended-threads -(EC1 class from the OSEK/VDX RTOS specification. In other words, -QXK executes active objects (basic threads) like the QK kernel using the -single stack (Main Stack on ARM Cortex-M), but can also execute -traditional *blocking* threads (extended threads). - -Only the extended threads (::QXThread class) need their private stack -spaces and the overhead of the full context switch. The basic threads -(::QMActive and ::QActive classes) run efficiently using the main stack with -much lower context switch overhead. - -The QXK examples have been updated for more thorough demonstration of -the QXK features. The QXK examples are available in the following -directories: dpp_efm32-slstk3401a, dpp_ek-tm4c123gxl, and dpp_nucleo-l053r8. - -This release fixes several issues in QXK 5.7.1-beta with handling -timeouts while blocking in extended-threads, such as timed blocking on -event queues and semaphores. - -This release also changes the internal QK implementation to match the -terminology applied in the QXK kernel (e.g., QK_sched_() has been renamed -to QK_activate_() and QK_schedPrio_() to QK_sched_()). These changes fall -into the category of refactoring and have no impact on the API or -performance. - -Finally, this release improves the implementation of scheduler locking -in publish-subscribe event delivery. - - ------------------------------------------------------------------------------- +This is the first production release of the "dual-mode" QXK kernel. +"Dual-mode" QXK means that QXK supports both basic-threads (BC1 class +from the OSEK/VDX RTOS specification) as well as extended-threads +(EC1 class from the OSEK/VDX RTOS specification. In other words, +QXK executes active objects (basic threads) like the QK kernel using the +single stack (Main Stack on ARM Cortex-M), but can also execute +traditional *blocking* threads (extended threads). + +Only the extended threads (::QXThread class) need their private stack +spaces and the overhead of the full context switch. The basic threads +(::QMActive and ::QActive classes) run efficiently using the main stack with +much lower context switch overhead. + +The QXK examples have been updated for more thorough demonstration of +the QXK features. The QXK examples are available in the following +directories: dpp_efm32-slstk3401a, dpp_ek-tm4c123gxl, and dpp_nucleo-l053r8. + +This release fixes several issues in QXK 5.7.1-beta with handling +timeouts while blocking in extended-threads, such as timed blocking on +event queues and semaphores. + +This release also changes the internal QK implementation to match the +terminology applied in the QXK kernel (e.g., QK_sched_() has been renamed +to QK_activate_() and QK_schedPrio_() to QK_sched_()). These changes fall +into the category of refactoring and have no impact on the API or +performance. + +Finally, this release improves the implementation of scheduler locking +in publish-subscribe event delivery. + + +------------------------------------------------------------------------------ @section qpc_5_7_0 Version 5.7.0, 2016-08-31 This release adds support for sub-machines and sub-machine states for reusing pieces of state machines (an advanced UML concept) to the QMsm-state machine implementation strategy. This feature is to match the upcoming QM 4.0.0. @@ -176,7 +228,7 @@ Also, this release changes slightly the QXK port to ARM Cortex-M, where again th Finally, this release replaces all absolute paths with relative paths in all CCS-Eclipse project files (for TivaC, Hercules, and MSP430). -Changes in detail: +Changes in detail: 1. Modified qep_msm.c to correct the support for sub-machines and sub-machine states 2. Added new port to ARM Cortex-R in the directory ports/arm-cr @@ -184,13 +236,13 @@ Changes in detail: 4. Modified the ARM Cortex-M QK ports (ARM-KEIL, GNU, IAR, and TI) 5. Modified the ARM Cortex-M QXK ports (ARM-KEIL, GNU, IAR, and TI) - ------------------------------------------------------------------------------- -@section qpc_5_6_5 Version 5.6.5, 2016-06-06 -This release adds support for the new board: EFM32-SLSTK3401A (Pearl Gecko Starter Kit from Silicon Labs). This board replaces the Stellaris EK-LM3S811 board, which has been discontinued. (The Stellaris EK-LM3S811 board had been used in the "Fly 'n' Shoot" game example accompanying the PSiCC2 book). - + +------------------------------------------------------------------------------ +@section qpc_5_6_5 Version 5.6.5, 2016-06-06 +This release adds support for the new board: EFM32-SLSTK3401A (Pearl Gecko Starter Kit from Silicon Labs). This board replaces the Stellaris EK-LM3S811 board, which has been discontinued. (The Stellaris EK-LM3S811 board had been used in the "Fly 'n' Shoot" game example accompanying the PSiCC2 book). + This release also introduces a new version of the QWIN GUI Toolkit in the Windows prototypes for the "Fly 'n' Shoot" game and the DPP-GUI -version (see http://www.state-machine.com/products/index.html#QWIN). +version (see https://www.state-machine.com/products/#QWIN). Additionally, this release also includes the QP/C integration with the emWin emgedded GUI from SEGGER, which is also the same product as uC/GUI distributed by Micrium (@ref exa_emwin). @@ -200,65 +252,65 @@ Finally, this relase comes with updated project files for TI Code Composer Studi This release fixes the following bugs: - bug#130 (POSIX port stop->start leads to reuse of sestroyed mutex). - bug#131 (QF_newRef_ increments reference counter without QF_CRIT_ENTRY_()). - - ------------------------------------------------------------------------------- -@section qpc_5_6_4 Version 5.6.4, 2016-04-25 -This release fixes a serious Bug #128 (https://sourceforge.net/p/qpc/bugs/128 ) in the QK port to ARM Cortex-M introduced back in QP 5.6.1 - - ------------------------------------------------------------------------------- -@section qpc_5_6_3 Version 5.6.3, 2016-04-12 -This release fixes a serious Bug #126 (https://sourceforge.net/p/qpc/bugs/126 ) in the QK preemptive scheduler introduced in QP 5.6.2. - - + + +------------------------------------------------------------------------------ +@section qpc_5_6_4 Version 5.6.4, 2016-04-25 +This release fixes a serious Bug #128 (https://sourceforge.net/p/qpc/bugs/128 ) in the QK port to ARM Cortex-M introduced back in QP 5.6.1 + + +------------------------------------------------------------------------------ +@section qpc_5_6_3 Version 5.6.3, 2016-04-12 +This release fixes a serious Bug #126 (https://sourceforge.net/p/qpc/bugs/126 ) in the QK preemptive scheduler introduced in QP 5.6.2. + + ------------------------------------------------------------------------------ @section qpc_5_6_2 Version 5.6.2, 2016-03-31 -The main purpose of this release is to introduce _atomic event multicasting_, meaning that event publishing to all subscribers is now protected from preemption. This eliminates potential for re-ordering of events under preemptive kernels (such as QK, QXK, or 3rd-party RTOSes), when events are published from low-priority AOs and some higher-priority subscribers can preempt multicasting and post/publish events of their own (before the original event is posted to all subscribers). - -The atomic event multicasting is implemented by means of selective scheduler locking--very much like a priory-ceiling mutex. During event multicasting the scheduler gets locked, but only up to the highest-priority subscriber to a given event. The whole point here is that active objects with priorities above such "priority ceiling" are _not_ affected. Please see the discussion thread: - -https://sourceforge.net/p/qpc/discussion/668726/thread/c186bf45 - -This release also changes the implementation of the priority-ceiling mutex in the preemptive built-in kernels: QK and QXK. Specifically, the implementation now re-uses the selective scheduler locking mechanism. In this new implementation, the QXMutex of the QXK kernel is much more efficient and lightweight, but it _cannot block_ while holding a mutex. - -Finally, this release changes the QP ports to 3rd-party RTOSes by performing any RTOS operations (like posting events to message queues) outside critical sections. Also the ports have been augmented to support scheduler locking (this feature depends on what's available in the specific RTOSes). - -Changes in detail: - -1. Added scheduler locking to QF_publish_() in qf_ps.c. This feature is added in a portable way, via macros #QF_SCHED_STAT_TYPE_, QF_SCHED_LOCK_() and QF_SCHED_UNLOCK_(), which need to be implemented in every QP port. - -2. Modified QV kernel to provide (dummy) implementation of selective scheduler locking. - -3. Modified QK kernel to implement selective scheduler locking via modified priority-ceiling mutex QMutex. - -4. Modified QXK kernel to implement selective scheduler locking via modified priority-ceiling mutex QXMutex. - -5. Modified embOS port to provide (global) scheduler locking, which affects all priorities, because that's all embOS supports. Also, modified the embOS port to perform event posting outside the QF critical section. - -6. Modified uC/OS-II port to provide (global) scheduler locking, which affects all priorities, because that's all uC/OS-II supports. Also, modified the uC/OS-II port to perform event posting outside the QF critical section. - -7. Modified ThreadX port to provide selective scheduler locking, by means of "priority-threshold" available in ThreadX. Also, modified the ThreadX port to perform event posting outside the QF critical section. - -8. Changed the ThreadX example to run on ARM Cortex-M4 board (STM32DiscoveryF4), instead of Win32 emulation (see qpc/examples/threadx/arm-cm/dpp_stm32f429-discovery). - -9. Modified the Win32 port to provide (global) scheduler locking, which is implemented by Win32 critical section. - -10. Fixed Bug#122 (QP didn't initiate some internal variables) https://sourceforge.net/p/qpc/bugs/122/ by adding explicit clearing of all QP variables in QF_init(). - -11. Modified the POSIX port to dummy-out scheduler locking. This means that this port currently does NOT lock scheduler around event publishing. (At this point it is not clear how to implement POSIX scheduler locking in a portable way.) - -12. Modified QK and QXK examples in qpc/examples/arm-cm/dpp_ek-tm4c123gxl to demonstrate the usage of the new priority-ceiling mutexes. - -13. Fixed the 3rd-party file startup_stm32l32l1xx.c to include exceptions for Cortex-M3 (MemManage_Handler, BusFault_Handler, and UsageFault_Handler). - -14. Updated the 3rd-party files for the EK-TM4C123GXL board (TivaC LaunchPad). - -15. Modified Makefiles for the EK-TM4C123GXL board with GNU-ARM toolset to define the symbol TARGET_IS_TM4C123_RB1 for compatibility with the updated 3rd-party files. - -16. Implemented Feature Request #110 as well as the duplicate Request #62 by adding function QActive_flushDeferred() +The main purpose of this release is to introduce _atomic event multicasting_, meaning that event publishing to all subscribers is now protected from preemption. This eliminates potential for re-ordering of events under preemptive kernels (such as QK, QXK, or 3rd-party RTOSes), when events are published from low-priority AOs and some higher-priority subscribers can preempt multicasting and post/publish events of their own (before the original event is posted to all subscribers). + +The atomic event multicasting is implemented by means of selective scheduler locking--very much like a priory-ceiling mutex. During event multicasting the scheduler gets locked, but only up to the highest-priority subscriber to a given event. The whole point here is that active objects with priorities above such "priority ceiling" are _not_ affected. Please see the discussion thread: + +https://sourceforge.net/p/qpc/discussion/668726/thread/c186bf45 + +This release also changes the implementation of the priority-ceiling mutex in the preemptive built-in kernels: QK and QXK. Specifically, the implementation now re-uses the selective scheduler locking mechanism. In this new implementation, the QXMutex of the QXK kernel is much more efficient and lightweight, but it _cannot block_ while holding a mutex. + +Finally, this release changes the QP ports to 3rd-party RTOSes by performing any RTOS operations (like posting events to message queues) outside critical sections. Also the ports have been augmented to support scheduler locking (this feature depends on what's available in the specific RTOSes). + +Changes in detail: + +1. Added scheduler locking to QF_publish_() in qf_ps.c. This feature is added in a portable way, via macros #QF_SCHED_STAT_TYPE_, QF_SCHED_LOCK_() and QF_SCHED_UNLOCK_(), which need to be implemented in every QP port. + +2. Modified QV kernel to provide (dummy) implementation of selective scheduler locking. + +3. Modified QK kernel to implement selective scheduler locking via modified priority-ceiling mutex QMutex. + +4. Modified QXK kernel to implement selective scheduler locking via modified priority-ceiling mutex QXMutex. + +5. Modified embOS port to provide (global) scheduler locking, which affects all priorities, because that's all embOS supports. Also, modified the embOS port to perform event posting outside the QF critical section. + +6. Modified uC/OS-II port to provide (global) scheduler locking, which affects all priorities, because that's all uC/OS-II supports. Also, modified the uC/OS-II port to perform event posting outside the QF critical section. + +7. Modified ThreadX port to provide selective scheduler locking, by means of "priority-threshold" available in ThreadX. Also, modified the ThreadX port to perform event posting outside the QF critical section. + +8. Changed the ThreadX example to run on ARM Cortex-M4 board (STM32DiscoveryF4), instead of Win32 emulation (see qpc/examples/threadx/arm-cm/dpp_stm32f429-discovery). + +9. Modified the Win32 port to provide (global) scheduler locking, which is implemented by Win32 critical section. + +10. Fixed Bug#122 (QP didn't initiate some internal variables) https://sourceforge.net/p/qpc/bugs/122/ by adding explicit clearing of all QP variables in QF_init(). + +11. Modified the POSIX port to dummy-out scheduler locking. This means that this port currently does NOT lock scheduler around event publishing. (At this point it is not clear how to implement POSIX scheduler locking in a portable way.) + +12. Modified QK and QXK examples in qpc/examples/arm-cm/dpp_ek-tm4c123gxl to demonstrate the usage of the new priority-ceiling mutexes. + +13. Fixed the 3rd-party file startup_stm32l32l1xx.c to include exceptions for Cortex-M3 (MemManage_Handler, BusFault_Handler, and UsageFault_Handler). + +14. Updated the 3rd-party files for the EK-TM4C123GXL board (TivaC LaunchPad). + +15. Modified Makefiles for the EK-TM4C123GXL board with GNU-ARM toolset to define the symbol TARGET_IS_TM4C123_RB1 for compatibility with the updated 3rd-party files. + +16. Implemented Feature Request #110 as well as the duplicate Request #62 by adding function QActive_flushDeferred() + - ------------------------------------------------------------------------------ @section qpc_5_6_1 Version 5.6.1, 2016-01-01 This release is the first official (production) release of the new blocking @ref qxk "QXK" kernel. @@ -270,7 +322,7 @@ Changes in detail: 2. Corrected example projects for the ARM Cortex-M with TI/CCS toolset ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_5_6_0 Version 5.6.0-beta, 2015-12-24 The main purpose of this *beta* release is to introduce a new component of the QP/C framework called @ref qxk "QXK" ("eXtended Quantum Kernel"). QXK is a small, preemptive, priority-based, **blocking** kernel that provides most features you might expect of a traditional blocking RTOS kernel. @@ -312,63 +364,63 @@ Changes in detail: 11. Updated Makefiles for GNU-ARM to use the __ARM_ARCH macro for defining the ARM architecture. 12. Updated CMSIS from 4.2 to 4.3 in qpc/3rd-party/CMSIS - - + + ------------------------------------------------------------------------------ @section qpc_5_5_1 Version 5.5.1, 2015-10-05 -The main focus of this release is to improve the AAPCS compliance of the -ARM Cortex-M port to the QK preemptive kernel. Specifically, the PendSV -handler in assembly did not always maintain the 8-byte stack alignment, -which is required by AAPCS. This version corrects the stack misalignment -in the qk_port.s files for all supported ARM compilers (ARM-Keil, GNU, -IAR, and TI CCS). All these ports should also be ready for ARM Cortex-M7. - -Also, this release adds support for the TI CCS ARM compiler. -Specifically, a new ARM Cortex-M ports have been added (in directories -`qpc\ports\arm-cm\qk\ti\` and `qpc\ports\arm-cm\qk\ti\`) and TI CCS -example projects have been provided (in directories -`qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qk\ti\` and -`qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qv\ti\`). - -Finally, this release corrects a bug in the DPP example for -EK-TM4C123GXL with the QV (Vanilla) cooperative kernel. Specifically, -the file `qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qv\bsp.c` did not -re-enable interrupts in the QV_onIdle() callback. - - +The main focus of this release is to improve the AAPCS compliance of the +ARM Cortex-M port to the QK preemptive kernel. Specifically, the PendSV +handler in assembly did not always maintain the 8-byte stack alignment, +which is required by AAPCS. This version corrects the stack misalignment +in the qk_port.s files for all supported ARM compilers (ARM-Keil, GNU, +IAR, and TI CCS). All these ports should also be ready for ARM Cortex-M7. + +Also, this release adds support for the TI CCS ARM compiler. +Specifically, a new ARM Cortex-M ports have been added (in directories +`qpc\ports\arm-cm\qk\ti\` and `qpc\ports\arm-cm\qk\ti\`) and TI CCS +example projects have been provided (in directories +`qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qk\ti\` and +`qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qv\ti\`). + +Finally, this release corrects a bug in the DPP example for +EK-TM4C123GXL with the QV (Vanilla) cooperative kernel. Specifically, +the file `qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qv\bsp.c` did not +re-enable interrupts in the QV_onIdle() callback. + + ------------------------------------------------------------------------------ @section qpc_5_5_0 Version 5.5.0, 2015-09-04 -The main purpose of this release is the extension of the QS software tracing system to bi-directional communication with embedded Targets. Specifically, the QS-RX (receive channel for QS) has been added with the following capabilities: - -1. Set global QS filters inside the Target - -2. Set local QS filters inside the Target - -3. Inject an arbitrary event to the Target (direct post or publish) - -4. Execute a user-defined callback function inside the Target with arguments supplied from QSPY - -5. Peek data inside the Target and send to QSPY - -6. Poke data (supplied from QSPY) into the Target - -7. Execute clock tick inside the Target - -8. Request target information (version, all sizes of objects, build time-stamp) - -9. Remotely reset of the Target - - -This QP/C version complements the recent release of Qtools 5.5.0, where the QSPY host application has been extended with a UDP socket, which is open for communication with various Front-Ends (GUI-based or headless). An example Front-End written in Tcl/Tk called "QspyView" has been developed to demonstrate all the features. The example application located in the directory qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qspy contains customization of the "qspyview" script for the DPP application. Please refer to the documentation of this example (@ref arm-cm_dpp_ek-tm4c123gxl) for more information. +The main purpose of this release is the extension of the QS software tracing system to bi-directional communication with embedded Targets. Specifically, the QS-RX (receive channel for QS) has been added with the following capabilities: + +1. Set global QS filters inside the Target + +2. Set local QS filters inside the Target + +3. Inject an arbitrary event to the Target (direct post or publish) + +4. Execute a user-defined callback function inside the Target with arguments supplied from QSPY + +5. Peek data inside the Target and send to QSPY + +6. Poke data (supplied from QSPY) into the Target + +7. Execute clock tick inside the Target + +8. Request target information (version, all sizes of objects, build time-stamp) + +9. Remotely reset of the Target + + +This QP/C version complements the recent release of Qtools 5.5.0, where the QSPY host application has been extended with a UDP socket, which is open for communication with various Front-Ends (GUI-based or headless). An example Front-End written in Tcl/Tk called "QspyView" has been developed to demonstrate all the features. The example application located in the directory qpc\examples\arm-cm\dpp_ek-tm4c123gxl\qspy contains customization of the "qspyview" script for the DPP application. Please refer to the documentation of this example (@ref arm-cm_dpp_ek-tm4c123gxl) for more information. Finally, this release adds a state machine operation for implementing the shallow history mechanism. The operation is called "childState", because it computes a child state of a given parent, such that the child belongs to the same state hierarchy as the current state. - -Changes in detail: - + +Changes in detail: + 1. Modified the QS software tracing component to add new functionality, such as the QS-RX input channel. Also added new trace records. @@ -400,8 +452,8 @@ Q_onAssert() for each specific project. 9. Replaced deprecated registers in TM4C (TivaC) projects (SYSCTL->RCGCGPIO rather than the deprecated SYSCTL->RCGC2). - - + + ------------------------------------------------------------------------------ @section qpc_5_4_2 Version 5.4.2, 2015-06-04 @@ -429,7 +481,7 @@ Changes in detail: 8. Updated all Windows examples to the latest QP API by compiling the code with the macro #QP_API_VERSION set to 9999 (latest API without backwards compatibility) -9. Improved the PC-Lint support for checking the application-level code located in in `examples\arm-cm\dpp_ek-tm4c123gxl\lint` +9. Improved the PC-Lint support for checking the application-level code located in in `examples\arm-cm\dpp_ek-tm4c123gxl\lint` ------------------------------------------------------------------------------ @@ -455,10 +507,10 @@ Also, this release brings several cosmetic improvements: 6. The file display drver for the EK-LM2S811 board locate at `qpc/3rd_party/ek-lm3s811/display96x16x1.c` has been modified to fix the problem with incorrect hardware delay with the GNU compiler at higher levels of optimization. The in-line assembly for the GNU compiler has been updated such that the delay loop cannot be "optimized away". 7. Several README files have been updated. - + ------------------------------------------------------------------------------ -@section qpc_5_4_0 Version 5.4.0, 2015-04-26 +@section qpc_5_4_0 Version 5.4.0, 2015-04-26 This release changes the basic philosophy of distributing the QP frameworks by **combining** the "QP/C Baseline Code" with all currently available "QP/C Development Kits" (QDK/C). This is done to eliminate any potential mistakes in downloading and installing separate pieces of code. @@ -516,599 +568,599 @@ Changes in detail: 15. Updated the @ref lwip_ek-lm3s6965 "lwIP-QP example for EK-LM3S6965 board". - ------------------------------------------------------------------------------- -@section qpc_5_3_1 Version 5.3.1, 2014-09-19 - -@note QP/C 5.3.1 remains backwards-compatible with all QP/C ports and -applications -This release fixes the following bugs: - -1. QMsm_isInState() returns invalid result (bug #105) - -2. QP/C syntax error in qf_pkg.h (bug #104) - -3. QF_gc() doc typo (bug #102) - -4. POSIX-port Makefile error (bug #65) - - -Additionally, this release improves the uC/OS-II port in that it is now generic and applicable for any CPU, for which uC/OS-II port exists. Specifically, all references to DOS or x86 have been removed from the QP port and any CPU-specific dependencies have been placed in the separate part of the port. - -Finally, this release improves the "QP/C Reference Manual" generated by Doxygen and available both inside the QP/C baseline distribution (qpc.chm file) and online at: http://www.state-machine.com/qpc - - ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ +@section qpc_5_3_1 Version 5.3.1, 2014-09-19 + +@note QP/C 5.3.1 remains backwards-compatible with all QP/C ports and +applications + +This release fixes the following bugs: + +1. QMsm_isInState() returns invalid result (bug #105) + +2. QP/C syntax error in qf_pkg.h (bug #104) + +3. QF_gc() doc typo (bug #102) + +4. POSIX-port Makefile error (bug #65) + + +Additionally, this release improves the uC/OS-II port in that it is now generic and applicable for any CPU, for which uC/OS-II port exists. Specifically, all references to DOS or x86 have been removed from the QP port and any CPU-specific dependencies have been placed in the separate part of the port. + +Finally, this release improves the "QP/C Reference Manual" generated by Doxygen and available both inside the QP/C baseline distribution (qpc.chm file) and online at: https://www.state-machine.com/qpc + + +------------------------------------------------------------------------------ @section qpc_5_3_0 Version 5.3.0, 2014-03-31 - -This release adds the "transition to history" (deep history) feature to -both QHsm and QMsm state machines and their subclasses. This QP/C -release matches the new QM modeling tool version 3.1.0, which now -supports the "transition to history" connector and the corresponding -code generation for transitions to history. - -@note QP/C 5.3.0 remains backwards-compatible with QP/C applications -developed for QP/C 4.x and QP/5.x. However, any QM models created for -the previous QP/C versions require re-generating the code with QM 3.1.0. - -This release adds new QS (Quantum Spy) instrumentation for tracing -transitions to history as well as entry and exit points in submachines. -All these features require the matching QSPY host application included -in Qtools 5.3.0. - -Additionally, the QMsm state machine has been extended to add -implementation of the reusable submachine states and submachines with -entry points and exit points. The reusable submachines in QP/C 5.3.0 lay -the groundwork for providing reusable submachine states and submachine -diagrams in the next upcoming QM version. - -This release also goes several steps towards compliance with the new -MISRA-C:2012 rules. For example, unused tag declarations have been -removed (MISRA-C:2012 Rule 2.4), the C99 standard Boolean data type in - has been added instead of uint8_t for stricter type -analysis, and the C99 data types uint_fast8_t and uint_fast16_t are used -instead of the non-standard uint_t. - -Finally, this QP/C release brings deep changes in the source code -comments and the doxygen documentation generated from the source code. -All comments have now more consistent structure, and every function is -now documented in the implementation file (.c file), whereas the -interface (.h files) contain only the brief descriptions of the -functions. This re-structuring of documentation is performed as part of -the validation and verification effort that has begun to provide a -certification package for QP/C for safety standards, such as IEC 61508 -and ISO 62304 (FDA 510(k)). - - -Changes in detail: - -1. Moved detailed documentation of functions from the header files (.h) -to implementation files (.c). - -2. Removed the header file "qevt.h" and merged its contents into "qep.h" - -3. Added macros: trace records QS_QEP_TRAN_HIST, QS_QEP_TRAN_EP, and -QS_QEP_TRAN_XP to "qs.h" - -4. Added macros: Q_TRAN_HIST(), QM_TRAN_HIST(), QM_TRAN_EP(), -QM_TRAN_XP(), and QM_SUPER_SUB() to "qep.h" - -5. Added attributes entryAction and initAction to the QMState struct in -"qep.h" (needed for transition to history). - -6. Added attribute act to the QMAttr union in "qep.h" (needed for -transitions to entry point in submachine states). - -7. Changed return type to bool in functions QHsm_isIn(), -QMsmVtbl.post(), QActive_post_(), QEQueue_post(), QActive_defer(), -QTimeEvt_rearm(), QTimeEvt_disarm(), QF_noTimeEvtsActiveX(). - -8. Changed the QState return type from action/state handler functions to -uint_fast8_t. - -9. Changed the prio attribute of QActive to uint_fast8_t. - -10. Changed the type of prio argument to uint_fast8_t and qlen/stkSize -to uint_fast16_t in the signature of QActiveVtbl.start function pointer -and QActive_start_() implementation. - -11. Changed the type of the tickRate argument in QTimeEvt_ctorX() and -QF_tickX_(), and QF_noTimeEvtsActiveX() to uint_fast8_t. - -12. Changed the type of the poolSize argument in QF_poolInit() to -uint_fast16_t. - -13. Changed arguments evtSize and margin in QF_newX_() to uint_fast16_t. - -14. Changed attribute bits in QPSet8 as well as bytes and bits[] in -QPSet64 to uint_fast8_t. - -15. Changed the QEQueueCtr event queue counter type to uint_fast8_t. - -16. Changed type of arguments qLen and margin in QEQueue_init() and -QEQueue/QActive_post() to uint_fast16_t. - -17. Changed the return type from QK_schedPrio_() (priority) as well as -the p argument in QK_sched_() and QK_schedExt_() to uint_fast8_t - -18. Added function QMsm_isInState() to "qep.h" and its implementation -file qmsm_in.c. This function tests whether the QMsm state machine (or -its subclasses like QMActive) "is in" the given state. - -19. Updated all make scripts for QP/C ports to include the new qmsm_in.c -in the QP/C library builds. - - ------------------------------------------------------------------------------- -@section qpc_5_2_1 Version 5.2.1, 2014-01-06 - -This release fixes two bugs. - -1. In file qmsm_dis.c added saving of the action-table into a temporary -variable *before* exiting the current state to the transition source. -Also, changed the signature of the QMsm_tran_() helper function to take -the action table as parameter. NOTE: This bug only affected the Spy -configuration and because of this escaped regression testing. The -internal testing process have been updated to test all build -configurations: Debug, Release, and Spy. - -2. In file qs_mem.c fixed an error in accounting used bytes in the QS -trace buffer. - - ------------------------------------------------------------------------------- -@section qpc_5_2_0 Version 5.2.0, 2013-12-26 - -This release matches the new QM 3.0.0, for which it provides model -examples based on the new QMsm/QMActive classes. This, in turn -demonstrates the new state machine code generation that QM3 was -specifically designed to do. - -This release also provides consistent API for late-binding ("virtual" -functions) introduced in QP 5.0.0, as opposed to using regular linking -(early-binding) for direct function calls, such as QHsm_dispatch(). A -clearly separated API compatibility layer is provided, whereas you can -configure a level of backwards compatibility by means of the -#QP_API_VERSION macro. This facilitates migrating existing QP -applications to the newer API. - -An cyclomatic complexity (McCabe V(G)) analysis of this version has been -performed and the maximum V(G) complexity per function has been reduced -to 15 by breaking up the QHsm_dispatch_() function. The code metrics -report, including cyclomatic complexity by function as well as other -standard code metrics (e.g., lines of code), is now included in the -"QP/C Reference Manual", see -http://www.state-machine.com/qpc/metrics.html - -Also, in this release all internal QP data that were previously -uninitialized are now explicitly initialized to zero. In other words, -this release no longer assumes that all uninitialized data (global and -static inside functions) is implicitly initialized to zero before the -control is transferred to main(). This is a requirement of the C -Standard, but some embedded startup code fails to do this. - -Finally, this release demonstrates safer stack allocation and safer -exception handlers in all ARM Cortex-M examples. The techniques are -described in the Embedded.com article "Are We Shooting Ourselves in the -Foot with Stack Overflow?". - - -Changes in detail: - -1. In file qep.h renamed the implementation functions, such as -QHsm_init() and QHsm_dispatch() to QHsm_init_() and QHsm_dispatch_() -(note the underscore, which means that the functions should not be -called directly by the application code). The only correct way of -calling the functions is through the macros QMSM_INIT() and -QMSM_DISPATCH(), respectively. The latter macros implement late-binding -("virtual" functions in C). - -2. In file qf.h renamed the implementation functions, such as -QActive_start(), QActive_post() and QActive_postLIFO() to -QActive_start_(), QActive_post_(), and QActive_postLIFO_, respectively -(note the underscore, which means that the functions should not be -called directly by the application code). The only correct way of -calling the functions is through the macros QACTIVE_START(), -QACTIVE_POST(), and QACTIVE_POST_LIFO(), respectively. The latter macros -implement late-binding ("virtual" functions in C). - -3. for backwards compatibility, in file qp_port.h defined "API -Compatibility Layer", which is controlled by the macro #QP_API_VERSION. -For example, specifying QP_API_VERSION=500 chooses API compatible with -QP version 5.0.0 or newer, but excludes APIs that became deprecated in -the earlier versions. If the macro #QP_API_VERSION is not defined by the -user (typically on the command line for the compiler), the default value -of 0 is assumed. This default means maximum backwards compatibility -(from version 0.0.0). On the other hand, higher values of -#QP_API_VERSION mean less backwards compatibility. For example -QP_API_VERSION=9999 will specify compatibility only with the latest -version of QP. The API Compatibility Layer for QP_API_VERSION < 500 -provides macros: QHsm_init(), QHsm_dispatch(), QActive_start(), -QActive_post() and QActive_postLIFO(). These macros resolve to -QMSM_INIT() and QMSM_DISPATCH(), QACTIVE_START(), QACTIVE_POST() and -QACTIVE_POST_LIFO() respectively, so that calls based on the older API -also use late-binging. - -4. In file qhsm_dis.c, broken up the function QHsm_dispatch() into two -functions QHsm_dispatch_() and QHsm_tran_(). This has reduced the -cyclomatic complexity from 25 for the original function, to 11 and 15 -for QHsm_dispatch_() and QHsm_tran_(), respectively. - -5. In file qmsm_dis.c, broken up the function QMsm_dispatch() into two -functions QMsm_dispatch_() and QMsm_tran_(). This has reduced the -cyclomatic complexity from 15 for the original function, to 9 and 7 for -QMsm_dispatch_() and QMsm_tran_(), respectively. - -6. In file qf_act.c added the function QF_bzero(), and in files -qvanilla.c and qk.c added calls to QF_bzero() to explicitly clear the -uninitialized data. Also added calls to QF_bzero() inside qf_psini.c. - -7. Updated all examples for ARM Cortex-M to use safer stack allocation -and safer exception handlers in all ARM Cortex-M examples, as described -in the Embedded.com article "Are We Shooting Ourselves in the Foot with -Stack Overflow?". - - ------------------------------------------------------------------------------- -@section qpc_5_1_1 Version 5.1.1, 2013-10-10 - -This release fixes reversal of logic in the QF_noTimeEvtsActiveX() -function as well as sleep mode transition in the ARM Cortex-M3/M4 ports -to the cooperative Vanilla kernel. Also, the native QP event queue -implementation has been changed to count the extra "front-event" -location into the number of free entries, which fixes the problem of -defer queues of depth 1. Finally, the release restores the support for -linting (with PC-Lint) of the QP/C applications for ARM Cortex-M (with -IAR and GNU compilers). - -Changes in detail: - -1. In file qf_tick.c reversed the logic inside QF_noTimeEvtsActiveX() - -2. Modified free entry accounting (nFree) in the files: qeq_init.c, -qeq_fifo.c, qeq_get.c, and qeq_lifo.c. - -3. Modified free entry accounting (nFree) in the files: qa_init.c, -qa_fifo.c, qa_get_.c, and qa_lifo.c. - -4. Introduced new macro QF_CPU_SLEEP() in the ARM Cortex-M Vanilla ports. - -5. Changed Board Support Package files (bsp.c) in the ARM Cortex-M -Vanilla examples. - -6. Modified the CMSIS-compliant startup code in all ARM Cortex-M Vanilla -examples. - -7. Modified the application examples with PC-Lint -(qpc/examples/arm-cm/qk/gnu/dpp-qk_ek-lm3s811-lint and -qpc/examples/arm-cm/qk/iar/dpp-qk_ek-lm3s811-lint). Updated lint files -for the latest PC-Lint - - ------------------------------------------------------------------------------- -@section qpc_5_1_0 Version 5.1.0, 2013-09-23 - -This release brings significant improvements to the QS software tracing -implementation and also brings important changes the ARM Cortex-M port. - -@note QP/C 5.1.0 requires changing the interrupt priority setting in the -existing ARM Cortex-M applications. Specifically, you need to set the -interrupt priorities equal or lower than QF_AWARE_ISR_CMSIS_PRI constant -provided in the qf_port.h header file. - -Changes to the QS software tracing component in detail: - -1. Optimized the internal QS implementation of all functions that insert -trace data into the trace buffer. The general idea of the optimization -is to extensively use automatic variables instead of global variables -(such as buffer head and tail indexes, the running checksum, etc.). For -the modern CPUs (such as ARM) this resulting machine code performs most -operations in registers, instead of constantly updating the memory -through the expensive load/store instructions. The time savings through -avoiding load/store instructions are significant, even after taking the -performance hit from loading the registers from the globals in the -beginning of each function and storing the final register values into -the globals at the end. - -2. Reduced the QS code size by using loops instead of unrolled-loops as -before. This reduced the QS component size from over 4KB to 1.7KB (for -ARM Cortex-M3/M4, IAR compiler). - -3. Modified the make scripts for building QP libraries to use -higher-level optimization for the QS software tracing functions in the -SPY build configuration. This brings additional 20-50% speed -improvement, depending on the compiler and optimization options used. -Please note that only the QS component is built with high-optimization. -The QEP, QF, and QK components in the SPY configuration are still built -with low-optimization level, so that the application can be conveniently -debugged. - -4. Reduced the number of QS global filters from 256 to 124 (0x7C). This -enables the code to avoid escaping the trace record numbers (because -they cannot overlap the special flag byte 0x7E or the escape byte 0x7D) -and also speeds up the QS_filterOff(QS_ALL_RECORDS) function, which is -useful for stopping the trace quickly to avoid overwriting some -interesting data with the new data. - -5. An empty QS record and the QS_RESET record are now inserted -automatically into the trace buffer in the function QS_initBuf(). The -empty QS record/QS_RESET pair provides a clean start of a session and -allows the QSPY host application to re-synch with the data stream, even -if the last QS record of a previous session is incomplete. This ability -is very helpful for re-setting the target while collecting a trace. - -Overall, lab tests for ARM Cortex-M4 with the IAR compiler show that the -processing time of the QS_u32_() function (the one frequently used to -store pointers and timestamps) dropped from 233 CPU cycles for QP 5.0 -with low-level optimization to just 76 cycles for QP 5.1 with high-level -of optimization. At the same time, the code size of this function dropped -from 876 bytes to 274 bytes. - - -Changes to the QP ports to ARM Cortex-M in detail: - -QP 5.1.0 never completely disables interrupts in the ARM Cortex-M3/M4 -cores, even inside the critical sections. On Cortex-M3/M4 (ARMv7-M -architectures), the QP port disables interrupts selectively using the -BASEPRI register. (NOTE: The BASEPRI register is not implemented in the -ARMv6-M architecture (Cortex-M0/M0+), so Cortex-M0/M0+ need to use the -PRIMASK register to disable interrupts globally). - -This new policy of disabling interrupts divides interrupts into -"kernel-unaware" interrupts, which are never disabled, and -"kernel-aware" interrupts, which are disabled in the QP critical -sections. Only "kernel-aware" interrupts are allowed to call QP -services. "Kernel-unaware" interrupts are *NOT* allowed to call any QP -services and they can communicate with QP only by triggering a -"kernel-aware" interrupt (which can post or publish events). - -As mentioned above, all QP ports to ARM Cortex-M included in the QP -5.1.0 Baseline Code provide the constant QF_AWARE_ISR_CMSIS_PRI, which -must be used to offset the "kernel-aware" interrupt priorities. - -All example projects for ARM Cortex-M included in the QP 5.1.0 Baseline -Code demonstrate the recommended way of assigning interrupt priorities -in your applications. The initialization consist of two steps: - -1. you enumerate the "kernel-unaware" and "kernel-aware" interrupt -priorities (whereas you offset the "kernel-aware" priorities by the -constant QF_AWARE_ISR_CMSIS_PRI) and - -2. you assign the priorities to *ALL* interrupts by calling the -NVIC_SetPriority() CMSIS function. - -@note Leaving the interrupt priority at the default value of zero -(the highest priority) is most likely incorrect, because the -"kernel-unaware" interrupts cannot call any QP services. - -For more information, please read the short Application Note "Setting -ARM Cortex-M Interrupt Priorities in QP 5.1" available at: -http://www.state-machine.com/doc/AN_ARM-Cortex-M_Interrupt-Priorities.pdf - ------------------------------------------------------------------------------- +This release adds the "transition to history" (deep history) feature to +both QHsm and QMsm state machines and their subclasses. This QP/C +release matches the new QM modeling tool version 3.1.0, which now +supports the "transition to history" connector and the corresponding +code generation for transitions to history. + +@note QP/C 5.3.0 remains backwards-compatible with QP/C applications +developed for QP/C 4.x and QP/5.x. However, any QM models created for +the previous QP/C versions require re-generating the code with QM 3.1.0. + +This release adds new QS (Quantum Spy) instrumentation for tracing +transitions to history as well as entry and exit points in submachines. +All these features require the matching QSPY host application included +in Qtools 5.3.0. + +Additionally, the QMsm state machine has been extended to add +implementation of the reusable submachine states and submachines with +entry points and exit points. The reusable submachines in QP/C 5.3.0 lay +the groundwork for providing reusable submachine states and submachine +diagrams in the next upcoming QM version. + +This release also goes several steps towards compliance with the new +MISRA-C:2012 rules. For example, unused tag declarations have been +removed (MISRA-C:2012 Rule 2.4), the C99 standard Boolean data type in + has been added instead of uint8_t for stricter type +analysis, and the C99 data types uint_fast8_t and uint_fast16_t are used +instead of the non-standard uint_t. + +Finally, this QP/C release brings deep changes in the source code +comments and the doxygen documentation generated from the source code. +All comments have now more consistent structure, and every function is +now documented in the implementation file (.c file), whereas the +interface (.h files) contain only the brief descriptions of the +functions. This re-structuring of documentation is performed as part of +the validation and verification effort that has begun to provide a +certification package for QP/C for safety standards, such as IEC 61508 +and ISO 62304 (FDA 510(k)). + + +Changes in detail: + +1. Moved detailed documentation of functions from the header files (.h) +to implementation files (.c). + +2. Removed the header file "qevt.h" and merged its contents into "qep.h" + +3. Added macros: trace records QS_QEP_TRAN_HIST, QS_QEP_TRAN_EP, and +QS_QEP_TRAN_XP to "qs.h" + +4. Added macros: Q_TRAN_HIST(), QM_TRAN_HIST(), QM_TRAN_EP(), +QM_TRAN_XP(), and QM_SUPER_SUB() to "qep.h" + +5. Added attributes entryAction and initAction to the QMState struct in +"qep.h" (needed for transition to history). + +6. Added attribute act to the QMAttr union in "qep.h" (needed for +transitions to entry point in submachine states). + +7. Changed return type to bool in functions QHsm_isIn(), +QMsmVtbl.post(), QActive_post_(), QEQueue_post(), QActive_defer(), +QTimeEvt_rearm(), QTimeEvt_disarm(), QF_noTimeEvtsActiveX(). + +8. Changed the QState return type from action/state handler functions to +uint_fast8_t. + +9. Changed the prio attribute of QActive to uint_fast8_t. + +10. Changed the type of prio argument to uint_fast8_t and qlen/stkSize +to uint_fast16_t in the signature of QActiveVtbl.start function pointer +and QActive_start_() implementation. + +11. Changed the type of the tickRate argument in QTimeEvt_ctorX() and +QF_tickX_(), and QF_noTimeEvtsActiveX() to uint_fast8_t. + +12. Changed the type of the poolSize argument in QF_poolInit() to +uint_fast16_t. + +13. Changed arguments evtSize and margin in QF_newX_() to uint_fast16_t. + +14. Changed attribute bits in QPSet8 as well as bytes and bits[] in +QPSet64 to uint_fast8_t. + +15. Changed the QEQueueCtr event queue counter type to uint_fast8_t. + +16. Changed type of arguments qLen and margin in QEQueue_init() and +QEQueue/QActive_post() to uint_fast16_t. + +17. Changed the return type from QK_schedPrio_() (priority) as well as +the p argument in QK_sched_() and QK_schedExt_() to uint_fast8_t + +18. Added function QMsm_isInState() to "qep.h" and its implementation +file qmsm_in.c. This function tests whether the QMsm state machine (or +its subclasses like QMActive) "is in" the given state. + +19. Updated all make scripts for QP/C ports to include the new qmsm_in.c +in the QP/C library builds. + + +------------------------------------------------------------------------------ +@section qpc_5_2_1 Version 5.2.1, 2014-01-06 + +This release fixes two bugs. + +1. In file qmsm_dis.c added saving of the action-table into a temporary +variable *before* exiting the current state to the transition source. +Also, changed the signature of the QMsm_tran_() helper function to take +the action table as parameter. NOTE: This bug only affected the Spy +configuration and because of this escaped regression testing. The +internal testing process have been updated to test all build +configurations: Debug, Release, and Spy. + +2. In file qs_mem.c fixed an error in accounting used bytes in the QS +trace buffer. + + +------------------------------------------------------------------------------ +@section qpc_5_2_0 Version 5.2.0, 2013-12-26 + +This release matches the new QM 3.0.0, for which it provides model +examples based on the new QMsm/QMActive classes. This, in turn +demonstrates the new state machine code generation that QM3 was +specifically designed to do. + +This release also provides consistent API for late-binding ("virtual" +functions) introduced in QP 5.0.0, as opposed to using regular linking +(early-binding) for direct function calls, such as QHsm_dispatch(). A +clearly separated API compatibility layer is provided, whereas you can +configure a level of backwards compatibility by means of the +#QP_API_VERSION macro. This facilitates migrating existing QP +applications to the newer API. + +An cyclomatic complexity (McCabe V(G)) analysis of this version has been +performed and the maximum V(G) complexity per function has been reduced +to 15 by breaking up the QHsm_dispatch_() function. The code metrics +report, including cyclomatic complexity by function as well as other +standard code metrics (e.g., lines of code), is now included in the +"QP/C Reference Manual", see +https://www.state-machine.com/qpc/metrics.html + +Also, in this release all internal QP data that were previously +uninitialized are now explicitly initialized to zero. In other words, +this release no longer assumes that all uninitialized data (global and +static inside functions) is implicitly initialized to zero before the +control is transferred to main(). This is a requirement of the C +Standard, but some embedded startup code fails to do this. + +Finally, this release demonstrates safer stack allocation and safer +exception handlers in all ARM Cortex-M examples. The techniques are +described in the Embedded.com article "Are We Shooting Ourselves in the +Foot with Stack Overflow?". + + +Changes in detail: + +1. In file qep.h renamed the implementation functions, such as +QHsm_init() and QHsm_dispatch() to QHsm_init_() and QHsm_dispatch_() +(note the underscore, which means that the functions should not be +called directly by the application code). The only correct way of +calling the functions is through the macros QMSM_INIT() and +QMSM_DISPATCH(), respectively. The latter macros implement late-binding +("virtual" functions in C). + +2. In file qf.h renamed the implementation functions, such as +QActive_start(), QActive_post() and QActive_postLIFO() to +QActive_start_(), QActive_post_(), and QActive_postLIFO_, respectively +(note the underscore, which means that the functions should not be +called directly by the application code). The only correct way of +calling the functions is through the macros QACTIVE_START(), +QACTIVE_POST(), and QACTIVE_POST_LIFO(), respectively. The latter macros +implement late-binding ("virtual" functions in C). + +3. for backwards compatibility, in file qp_port.h defined "API +Compatibility Layer", which is controlled by the macro #QP_API_VERSION. +For example, specifying QP_API_VERSION=500 chooses API compatible with +QP version 5.0.0 or newer, but excludes APIs that became deprecated in +the earlier versions. If the macro #QP_API_VERSION is not defined by the +user (typically on the command line for the compiler), the default value +of 0 is assumed. This default means maximum backwards compatibility +(from version 0.0.0). On the other hand, higher values of +#QP_API_VERSION mean less backwards compatibility. For example +QP_API_VERSION=9999 will specify compatibility only with the latest +version of QP. The API Compatibility Layer for QP_API_VERSION < 500 +provides macros: QHsm_init(), QHsm_dispatch(), QActive_start(), +QActive_post() and QActive_postLIFO(). These macros resolve to +QMSM_INIT() and QMSM_DISPATCH(), QACTIVE_START(), QACTIVE_POST() and +QACTIVE_POST_LIFO() respectively, so that calls based on the older API +also use late-binging. + +4. In file qhsm_dis.c, broken up the function QHsm_dispatch() into two +functions QHsm_dispatch_() and QHsm_tran_(). This has reduced the +cyclomatic complexity from 25 for the original function, to 11 and 15 +for QHsm_dispatch_() and QHsm_tran_(), respectively. + +5. In file qmsm_dis.c, broken up the function QMsm_dispatch() into two +functions QMsm_dispatch_() and QMsm_tran_(). This has reduced the +cyclomatic complexity from 15 for the original function, to 9 and 7 for +QMsm_dispatch_() and QMsm_tran_(), respectively. + +6. In file qf_act.c added the function QF_bzero(), and in files +qvanilla.c and qk.c added calls to QF_bzero() to explicitly clear the +uninitialized data. Also added calls to QF_bzero() inside qf_psini.c. + +7. Updated all examples for ARM Cortex-M to use safer stack allocation +and safer exception handlers in all ARM Cortex-M examples, as described +in the Embedded.com article "Are We Shooting Ourselves in the Foot with +Stack Overflow?". + + +------------------------------------------------------------------------------ +@section qpc_5_1_1 Version 5.1.1, 2013-10-10 + +This release fixes reversal of logic in the QF_noTimeEvtsActiveX() +function as well as sleep mode transition in the ARM Cortex-M3/M4 ports +to the cooperative Vanilla kernel. Also, the native QP event queue +implementation has been changed to count the extra "front-event" +location into the number of free entries, which fixes the problem of +defer queues of depth 1. Finally, the release restores the support for +linting (with PC-Lint) of the QP/C applications for ARM Cortex-M (with +IAR and GNU compilers). + +Changes in detail: + +1. In file qf_tick.c reversed the logic inside QF_noTimeEvtsActiveX() + +2. Modified free entry accounting (nFree) in the files: qeq_init.c, +qeq_fifo.c, qeq_get.c, and qeq_lifo.c. + +3. Modified free entry accounting (nFree) in the files: qa_init.c, +qa_fifo.c, qa_get_.c, and qa_lifo.c. + +4. Introduced new macro QF_CPU_SLEEP() in the ARM Cortex-M Vanilla ports. + +5. Changed Board Support Package files (bsp.c) in the ARM Cortex-M +Vanilla examples. + +6. Modified the CMSIS-compliant startup code in all ARM Cortex-M Vanilla +examples. + +7. Modified the application examples with PC-Lint +(qpc/examples/arm-cm/qk/gnu/dpp-qk_ek-lm3s811-lint and +qpc/examples/arm-cm/qk/iar/dpp-qk_ek-lm3s811-lint). Updated lint files +for the latest PC-Lint + + +------------------------------------------------------------------------------ +@section qpc_5_1_0 Version 5.1.0, 2013-09-23 + +This release brings significant improvements to the QS software tracing +implementation and also brings important changes the ARM Cortex-M port. + +@note QP/C 5.1.0 requires changing the interrupt priority setting in the +existing ARM Cortex-M applications. Specifically, you need to set the +interrupt priorities equal or lower than QF_AWARE_ISR_CMSIS_PRI constant +provided in the qf_port.h header file. + +Changes to the QS software tracing component in detail: + +1. Optimized the internal QS implementation of all functions that insert +trace data into the trace buffer. The general idea of the optimization +is to extensively use automatic variables instead of global variables +(such as buffer head and tail indexes, the running checksum, etc.). For +the modern CPUs (such as ARM) this resulting machine code performs most +operations in registers, instead of constantly updating the memory +through the expensive load/store instructions. The time savings through +avoiding load/store instructions are significant, even after taking the +performance hit from loading the registers from the globals in the +beginning of each function and storing the final register values into +the globals at the end. + +2. Reduced the QS code size by using loops instead of unrolled-loops as +before. This reduced the QS component size from over 4KB to 1.7KB (for +ARM Cortex-M3/M4, IAR compiler). + +3. Modified the make scripts for building QP libraries to use +higher-level optimization for the QS software tracing functions in the +SPY build configuration. This brings additional 20-50% speed +improvement, depending on the compiler and optimization options used. +Please note that only the QS component is built with high-optimization. +The QEP, QF, and QK components in the SPY configuration are still built +with low-optimization level, so that the application can be conveniently +debugged. + +4. Reduced the number of QS global filters from 256 to 124 (0x7C). This +enables the code to avoid escaping the trace record numbers (because +they cannot overlap the special flag byte 0x7E or the escape byte 0x7D) +and also speeds up the QS_filterOff(QS_ALL_RECORDS) function, which is +useful for stopping the trace quickly to avoid overwriting some +interesting data with the new data. + +5. An empty QS record and the QS_RESET record are now inserted +automatically into the trace buffer in the function QS_initBuf(). The +empty QS record/QS_RESET pair provides a clean start of a session and +allows the QSPY host application to re-synch with the data stream, even +if the last QS record of a previous session is incomplete. This ability +is very helpful for re-setting the target while collecting a trace. + +Overall, lab tests for ARM Cortex-M4 with the IAR compiler show that the +processing time of the QS_u32_() function (the one frequently used to +store pointers and timestamps) dropped from 233 CPU cycles for QP 5.0 +with low-level optimization to just 76 cycles for QP 5.1 with high-level +of optimization. At the same time, the code size of this function dropped +from 876 bytes to 274 bytes. + + +Changes to the QP ports to ARM Cortex-M in detail: + +QP 5.1.0 never completely disables interrupts in the ARM Cortex-M3/M4 +cores, even inside the critical sections. On Cortex-M3/M4 (ARMv7-M +architectures), the QP port disables interrupts selectively using the +BASEPRI register. (NOTE: The BASEPRI register is not implemented in the +ARMv6-M architecture (Cortex-M0/M0+), so Cortex-M0/M0+ need to use the +PRIMASK register to disable interrupts globally). + +This new policy of disabling interrupts divides interrupts into +"kernel-unaware" interrupts, which are never disabled, and +"kernel-aware" interrupts, which are disabled in the QP critical +sections. Only "kernel-aware" interrupts are allowed to call QP +services. "Kernel-unaware" interrupts are *NOT* allowed to call any QP +services and they can communicate with QP only by triggering a +"kernel-aware" interrupt (which can post or publish events). + +As mentioned above, all QP ports to ARM Cortex-M included in the QP +5.1.0 Baseline Code provide the constant QF_AWARE_ISR_CMSIS_PRI, which +must be used to offset the "kernel-aware" interrupt priorities. + +All example projects for ARM Cortex-M included in the QP 5.1.0 Baseline +Code demonstrate the recommended way of assigning interrupt priorities +in your applications. The initialization consist of two steps: + +1. you enumerate the "kernel-unaware" and "kernel-aware" interrupt +priorities (whereas you offset the "kernel-aware" priorities by the +constant QF_AWARE_ISR_CMSIS_PRI) and + +2. you assign the priorities to *ALL* interrupts by calling the +NVIC_SetPriority() CMSIS function. + +@note Leaving the interrupt priority at the default value of zero +(the highest priority) is most likely incorrect, because the +"kernel-unaware" interrupts cannot call any QP services. + +For more information, please read the short Application Note "Setting +ARM Cortex-M Interrupt Priorities in QP 5.1" available at: +https://www.state-machine.com/doc/AN_ARM-Cortex-M_Interrupt-Priorities.pdf + + +------------------------------------------------------------------------------ @section qpc_5_0_0 Version 5.0.0, 2013-09-10 - -@note QP/C 5.0.0 remains backwards-compatible with the existing QP/C 4.x -applications. - -The main purpose of this milestone QP/C release is to enable the QM -modeling tool to generate a new type of state machine code (requires QM -version 3.0.0, which is still in development as of this writing). - -This new type of state machine implementation in QP/C 5 is based on the -new QMsm class, which takes advantage of the QM tool as an advanced -"state machine compiler". QM can perform optimizations that were not -possible with the C pre-processor alone. Specifically, the QM can easily -determine the LCA (Least-Common-Ancestor) state for every transition and -it can generate the complete transition-sequences (sequences of -exit/entry/initial actions) at code-generation time. The resulting code -can be still highly human-readable, but it will no longer be -human-maintainable. The lab tests indicate that the new "housekeeping" -code for executing hierarchical state machines can be about twice as -fast as the previous code based on the QHsm class. Additionally, the new -code requires less run-time support (smaller event processor) and uses -70% less of stack space in the call to the QMsm_dispatch() operation -than QHsm_dispatch(). - -The next big feature introduced in QP/C 5 is polymorphism ("virtual" -functions) for basic operations, such as state machine init() and -dispatch() and active object start(), post(), and postLIFO() perations. -Making theses functions "virtual" means that all these operations can be -re-defined in sub-classes of state machines and active objects. This, in -turn, allows a single application to use a mix of state machine classes -derived from the new QMsm base class with state machines derived from -the QHsm base class, each one using a different state machine -implementation strategy. Additionally, the virtual post() operation -could be very useful for implementing various Proxy active objects -(e.g., for active object event posting across networks). - -Another big feature introduced in QP/C 5 are the multiple, independent -system clock tick rates for time events. The number of system tick rates -can be now configured in the QP/C ports. For example, a digital watch -can use a "fast" clock tick rate of 100Hz and a "slow" clock tick rate -of only 1Hz. These clock tick rates can be managed independently, so for -example, the fast clock tick rate can be shut down in the absence of -time events assigned to this rate. This feature allows the applications -to implement sophisticated power-saving policies. - -As yet another important feature, QP/C adds a new "extended" API for -non-asserting event allocation and posting. This feature is intended for -situations, where an application is hammered with external events that -at times arrive too fast for processing, but that can be ignored under -the overload conditions. In those cases firing an assertion inside the -framework is undesirable. The non-asserting API allows a designer to -request a safety-margin when allocating or posting an event. The event -is not allocated/posted if the safety margin cannot be satisfied at the -time of the call. On the other hand, the safety margin allows the -application to still use the regular (asserting) event allocation and -posting, because the event pools and event queues are guaranteed to -maintain a minimal margin for safe operation. - -Finally, QP/C adds a number of smaller features and improvements, -summarized in the following detailed list of changes: - -1. Added the new QMsm "class" to qep.h. Changed the inheritance tree by -deriving QHsm and QFsm from the QMsm base class. Added virtual table -structures for QMsm, QHsm, and QFsm (polymorphism). - - added macro QMSM_INIT() to polymorphically call the state - machine initialization implementation in the QMsm base class and - all subclasses. - - added macro QMSM_DISPATCH() to polymorphically call the state - machine event dispatching implementation in the QMsm base class - and all subclasses. - -2. Added new source files qmsm_ini.c and qmsm_dis.c to the QEP. These -files implement the QMsm_init() and QMsm_dispatch() functions, respectively. - -3. Added the new "QMActive" "class" to qf.h. Extended the inheritance -tree to derive QMActive from QActive. Added virtual table structures for -QMActive and QActvie (polymorphism). - - modified macro QACTIVE_POST() to polymorphically call the direct - event posting to an active object. - - modified macro QACTIVE_POST_LIFO() to polymorphically call the - post-LIFO (self-posting) to an active object. - - modified macro QACTIVE_START() to polymorphically call the - starting of an active object. - -4. Added the multiple system clock tick rates feature in qf.h: - - added new configuration macro #QF_MAX_TICK_RATE, which specifies - the number of clock tick rates. This macro is to be defined in - the QF ports (in the qf_port.h header file). If the macro is - undefined, the default value is 1 (one clock tick rate). - - renamed and re-implemented the QF_tick() function as the - "extended" QF_tickX() function with the argument 'tickRate' for - processing time events allocated to different clock rates. The - application must call QF_tickX(0), QF_tickX(1), ... at the - specified tick rates from ISRs or *tasks*. - - added an "extended" time event constructor QTimeEvt_ctorX(), which - assigns a time event to a specific tick rate as well as specific - active object. - - renamed and re-implemented the internal function QTimeEvt_arm_() - to a public function QTimeEvt_armX() for arming time events - initialized with the "extended" constructor. The QTimeEvt_armX() - function is the new recommended API for arming time events, both - one-shot and periodic. - - re-implemented QTimeEvt_disarm() and QTimeEvt_rarm(). - - renamed QF_noTimeEvtsActive() to the "extended" version - QF_noTimeEvtsActiveX(), which checks time events assigned to the - given tick rate. - -5. Added the new non-asserting API to qf.h: - - renamed internal function QF_new_() to QF_newX_(), the latter one - taking the argument 'margin' for allocating events. The function - returns NULL if the event pool has less free events than the - specified margin. The function asserts if the margin is zero and - the event can't be allocated. - - added function QActive_post() to post an event to the given - active object. The function does not post the event if the target - event queue has less free slots than the specified margin. The - function asserts if the margin is zero and the event can't be - posted. - - added "extended" macro QF_NEW_X() for allocating events with a - margin. - - added "extended" macro QACTIVE_POST_X() for posting events with a - margin. - -6. Modified the QActive_defer() function to return the status of the - defer operation (true==success), instead of asserting when the defer - queue overflows. - -7. Modified QS (Quantum Spy) software tracing implementation: - - added additional tick rate byte to the trace records QS_QF_TICK - and QS_QFF_TIMEEVT_*. - - added new trace records QS_QF_ACTIVE_POST_ATTEMPT, - QS_QF_EQUEUE_POST_ATTEMPT, and QS_QF_MPOOL_GET_ATTEMPT for the - "extened" non-asserting event allocation and posting. - - added new trace records QS_TEST_RUN and QS_TEST_FAIL for future - support for unit testing. - - added new QS source file qs_dict.c with functions QS_*_dict() to - generate various dictionary entries. Changed the macros - QS_*_DICTIONARY() to call these functions. This was done to - significantly reduce the amount of tracing code needed to send the - dictionaries from applications. - - grouped together the various QS variables (such as filters, trace - buffer indexes, etc.) in a single struct, which results in a more - efficient code for various QS operations. - -8. Changed the structure of the ARM Cortex-M ports - - renamed the sub-directory for ARM Cortex-M ports and examples - from "arm-cortex" to "arm-cm". This is done to avoid confusion - with other ARM Cortex variants, such as Cortex-A/R, which very - different from Cortex-M. - - removed the CMSIS (Cortex Microcontroller Software Interface - Standard) directories from the Cortex-M examples and moved it to - the common location in the %QPC%/ports/arm-cm/cmsis/ directory. - Upgraded the CMSIS to the latest version 3.20. - - added the ARM Cortex-M ports and examples with Keil/ARM MDK to - the QP Baseline Code. - - upgraded ARM Cortex-M ports with IAR to the latest IAR EWARM 6.60 - - upgraded ARM Cortex-M ports with Sourcery CodeBench to the latest - version 2013.05-53. - -9. Added the requested simple "Blinky" example for Windows and ARM -Cortex-M (with the GNU, IAR, and Keil toolsets). - - Added "Getting Started with QP/C" guide based on the Blinky - example. - -10. Updated the Doxygen documentation (QP/C Reference Manual) - - updated the QP/C tutorial - - updated and added documentation and code samples - - added search box and tree-view panel to the HTML documentation - - ------------------------------------------------------------------------------- + +@note QP/C 5.0.0 remains backwards-compatible with the existing QP/C 4.x +applications. + +The main purpose of this milestone QP/C release is to enable the QM +modeling tool to generate a new type of state machine code (requires QM +version 3.0.0, which is still in development as of this writing). + +This new type of state machine implementation in QP/C 5 is based on the +new QMsm class, which takes advantage of the QM tool as an advanced +"state machine compiler". QM can perform optimizations that were not +possible with the C pre-processor alone. Specifically, the QM can easily +determine the LCA (Least-Common-Ancestor) state for every transition and +it can generate the complete transition-sequences (sequences of +exit/entry/initial actions) at code-generation time. The resulting code +can be still highly human-readable, but it will no longer be +human-maintainable. The lab tests indicate that the new "housekeeping" +code for executing hierarchical state machines can be about twice as +fast as the previous code based on the QHsm class. Additionally, the new +code requires less run-time support (smaller event processor) and uses +70% less of stack space in the call to the QMsm_dispatch() operation +than QHsm_dispatch(). + +The next big feature introduced in QP/C 5 is polymorphism ("virtual" +functions) for basic operations, such as state machine init() and +dispatch() and active object start(), post(), and postLIFO() perations. +Making theses functions "virtual" means that all these operations can be +re-defined in sub-classes of state machines and active objects. This, in +turn, allows a single application to use a mix of state machine classes +derived from the new QMsm base class with state machines derived from +the QHsm base class, each one using a different state machine +implementation strategy. Additionally, the virtual post() operation +could be very useful for implementing various Proxy active objects +(e.g., for active object event posting across networks). + +Another big feature introduced in QP/C 5 are the multiple, independent +system clock tick rates for time events. The number of system tick rates +can be now configured in the QP/C ports. For example, a digital watch +can use a "fast" clock tick rate of 100Hz and a "slow" clock tick rate +of only 1Hz. These clock tick rates can be managed independently, so for +example, the fast clock tick rate can be shut down in the absence of +time events assigned to this rate. This feature allows the applications +to implement sophisticated power-saving policies. + +As yet another important feature, QP/C adds a new "extended" API for +non-asserting event allocation and posting. This feature is intended for +situations, where an application is hammered with external events that +at times arrive too fast for processing, but that can be ignored under +the overload conditions. In those cases firing an assertion inside the +framework is undesirable. The non-asserting API allows a designer to +request a safety-margin when allocating or posting an event. The event +is not allocated/posted if the safety margin cannot be satisfied at the +time of the call. On the other hand, the safety margin allows the +application to still use the regular (asserting) event allocation and +posting, because the event pools and event queues are guaranteed to +maintain a minimal margin for safe operation. + +Finally, QP/C adds a number of smaller features and improvements, +summarized in the following detailed list of changes: + +1. Added the new QMsm "class" to qep.h. Changed the inheritance tree by +deriving QHsm and QFsm from the QMsm base class. Added virtual table +structures for QMsm, QHsm, and QFsm (polymorphism). + - added macro QMSM_INIT() to polymorphically call the state + machine initialization implementation in the QMsm base class and + all subclasses. + - added macro QMSM_DISPATCH() to polymorphically call the state + machine event dispatching implementation in the QMsm base class + and all subclasses. + +2. Added new source files qmsm_ini.c and qmsm_dis.c to the QEP. These +files implement the QMsm_init() and QMsm_dispatch() functions, respectively. + +3. Added the new "QMActive" "class" to qf.h. Extended the inheritance +tree to derive QMActive from QActive. Added virtual table structures for +QMActive and QActvie (polymorphism). + - modified macro QACTIVE_POST() to polymorphically call the direct + event posting to an active object. + - modified macro QACTIVE_POST_LIFO() to polymorphically call the + post-LIFO (self-posting) to an active object. + - modified macro QACTIVE_START() to polymorphically call the + starting of an active object. + +4. Added the multiple system clock tick rates feature in qf.h: + - added new configuration macro #QF_MAX_TICK_RATE, which specifies + the number of clock tick rates. This macro is to be defined in + the QF ports (in the qf_port.h header file). If the macro is + undefined, the default value is 1 (one clock tick rate). + - renamed and re-implemented the QF_tick() function as the + "extended" QF_tickX() function with the argument 'tickRate' for + processing time events allocated to different clock rates. The + application must call QF_tickX(0), QF_tickX(1), ... at the + specified tick rates from ISRs or *tasks*. + - added an "extended" time event constructor QTimeEvt_ctorX(), which + assigns a time event to a specific tick rate as well as specific + active object. + - renamed and re-implemented the internal function QTimeEvt_arm_() + to a public function QTimeEvt_armX() for arming time events + initialized with the "extended" constructor. The QTimeEvt_armX() + function is the new recommended API for arming time events, both + one-shot and periodic. + - re-implemented QTimeEvt_disarm() and QTimeEvt_rarm(). + - renamed QF_noTimeEvtsActive() to the "extended" version + QF_noTimeEvtsActiveX(), which checks time events assigned to the + given tick rate. + +5. Added the new non-asserting API to qf.h: + - renamed internal function QF_new_() to QF_newX_(), the latter one + taking the argument 'margin' for allocating events. The function + returns NULL if the event pool has less free events than the + specified margin. The function asserts if the margin is zero and + the event can't be allocated. + - added function QActive_post() to post an event to the given + active object. The function does not post the event if the target + event queue has less free slots than the specified margin. The + function asserts if the margin is zero and the event can't be + posted. + - added "extended" macro QF_NEW_X() for allocating events with a + margin. + - added "extended" macro QACTIVE_POST_X() for posting events with a + margin. + +6. Modified the QActive_defer() function to return the status of the + defer operation (true==success), instead of asserting when the defer + queue overflows. + +7. Modified QS (Quantum Spy) software tracing implementation: + - added additional tick rate byte to the trace records QS_QF_TICK + and QS_QFF_TIMEEVT_*. + - added new trace records QS_QF_ACTIVE_POST_ATTEMPT, + QS_QF_EQUEUE_POST_ATTEMPT, and QS_QF_MPOOL_GET_ATTEMPT for the + "extened" non-asserting event allocation and posting. + - added new trace records QS_TEST_RUN and QS_TEST_FAIL for future + support for unit testing. + - added new QS source file qs_dict.c with functions QS_*_dict() to + generate various dictionary entries. Changed the macros + QS_*_DICTIONARY() to call these functions. This was done to + significantly reduce the amount of tracing code needed to send the + dictionaries from applications. + - grouped together the various QS variables (such as filters, trace + buffer indexes, etc.) in a single struct, which results in a more + efficient code for various QS operations. + +8. Changed the structure of the ARM Cortex-M ports + - renamed the sub-directory for ARM Cortex-M ports and examples + from "arm-cortex" to "arm-cm". This is done to avoid confusion + with other ARM Cortex variants, such as Cortex-A/R, which very + different from Cortex-M. + - removed the CMSIS (Cortex Microcontroller Software Interface + Standard) directories from the Cortex-M examples and moved it to + the common location in the %QPC%/ports/arm-cm/cmsis/ directory. + Upgraded the CMSIS to the latest version 3.20. + - added the ARM Cortex-M ports and examples with Keil/ARM MDK to + the QP Baseline Code. + - upgraded ARM Cortex-M ports with IAR to the latest IAR EWARM 6.60 + - upgraded ARM Cortex-M ports with Sourcery CodeBench to the latest + version 2013.05-53. + +9. Added the requested simple "Blinky" example for Windows and ARM +Cortex-M (with the GNU, IAR, and Keil toolsets). + - Added "Getting Started with QP/C" guide based on the Blinky + example. + +10. Updated the Doxygen documentation (QP/C Reference Manual) + - updated the QP/C tutorial + - updated and added documentation and code samples + - added search box and tree-view panel to the HTML documentation + + +------------------------------------------------------------------------------ @section qpc_4_5_04 Version 4.5.04, Feb 08, 2013 - + The main purpose of this release is adding support for the ARM Cortex-M4F processors with the hardware Floating-Point Unit (FPU). The QP/C ports to Cortex-M4F take full advantage of the "lazy stacking" feature of the FPU registers, and by doing so offer the most efficient preemptive -multitasking on this processor. +multitasking on this processor. -@note QP/C Version 4.5.04 preserves full compatibility with QM 2.2.03 -and all existing QDKs for QP/C 4.5.xx. - -Changes in detail: - -1. Added ports and examples for ARM Cortex-M4F with the EK-LM4F120XL -board (Stellaris Launchpad). - -2. Added the macro QF_LOG2(), which can be re-implemented in the QP ports, -if the CPU supports special instructions, such as CLZ (count leading zeros -in Cortex-M3/M4). If the macro is not defined in the QP port, the default -implementation uses a lookup table. - -3. Updated all ARM Cortex-M ports and examples to the latest IAR EWARM -6.50 and Sourcery CodeBench 2012.09-85. - -4. Updated App Notes "QP and ARM Cortex-M with IAR" and "QP and ARM +@note QP/C Version 4.5.04 preserves full compatibility with QM 2.2.03 +and all existing QDKs for QP/C 4.5.xx. + +Changes in detail: + +1. Added ports and examples for ARM Cortex-M4F with the EK-LM4F120XL +board (Stellaris Launchpad). + +2. Added the macro QF_LOG2(), which can be re-implemented in the QP ports, +if the CPU supports special instructions, such as CLZ (count leading zeros +in Cortex-M3/M4). If the macro is not defined in the QP port, the default +implementation uses a lookup table. + +3. Updated all ARM Cortex-M ports and examples to the latest IAR EWARM +6.50 and Sourcery CodeBench 2012.09-85. + +4. Updated App Notes "QP and ARM Cortex-M with IAR" and "QP and ARM Cortex-M with GNU". - -5. Updated the PC-Lint support files (include/lib-qpc.lnt, au-misra2.lnt) -to the latest PC-Lint 9.00j. - + +5. Updated the PC-Lint support files (include/lib-qpc.lnt, au-misra2.lnt) +to the latest PC-Lint 9.00j. + 6. Updated the Application Note: "QP/C MISRA-C:2004 Compliance Matrix". -7. Spell-checked the comments in all QP/C source files and removed -several typos. - -8. Removed the Qt ports and examples from the QP/C Baseline Code and -moved them to the separate QDK/C-Qt. - +7. Spell-checked the comments in all QP/C source files and removed +several typos. ------------------------------------------------------------------------------- +8. Removed the Qt ports and examples from the QP/C Baseline Code and +moved them to the separate QDK/C-Qt. + + +------------------------------------------------------------------------------ @section qpc_4_5_03 Version 4.5.03, Nov 27, 2012 -This release changes the directory structure of QP ports to various -operating systems, such as POSIX (Linux, BSD, etc.), Win32 (Windows), -Qt, etc. The OS ports are moved from the ports/80x86/ directory one -level up to ports/. Also, the OS examples are moved from the -examples/80x86/ directory one level up to examples/. - +This release changes the directory structure of QP ports to various +operating systems, such as POSIX (Linux, BSD, etc.), Win32 (Windows), +Qt, etc. The OS ports are moved from the ports/80x86/ directory one +level up to ports/. Also, the OS examples are moved from the +examples/80x86/ directory one level up to examples/. ------------------------------------------------------------------------------- + +------------------------------------------------------------------------------ @section qpc_4_5_02 Version 4.5.02, Aug 04, 2012 The main purpose of this release is better, more comprehensive @@ -1130,7 +1182,7 @@ takes the arguments for the event constructor. This generally allows creating dynamic events "on-the-fly" without a temporary pointer to the event. This QP configuration is demonstrated only in the QP port to Qt, but can be used in any other port. - + @note The event constructor feature is NOT backward-compatible with the existing applications. @@ -1199,7 +1251,7 @@ names for user-defined trace records when the target resets. This allows QSPY to reset its internal state. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_5_01 Version 4.5.01, Jun 14, 2012 The main purpose of this minor release is providing improved @@ -1249,7 +1301,7 @@ slot function, but instead to allow defining this slot function in the BSP of the application. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_5_00 Version 4.5.00, May 29, 2012 The main pupose of this relase is to improve host-based development of QP @@ -1328,7 +1380,7 @@ applications (DPP and PELICAN crossing). P-threads, including QP ports and examples for Linux and Mac OS X. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_4_01 Version 4.4.01, Mar 23, 2012 The relase fixes a bug in Q-SPY software tracing, which caused the @@ -1341,7 +1393,7 @@ a few cosmetic changes, which the Microchip C18 compiler didn't like. qeq_get.c, qeq_init.c, and qa_get_.c. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_4_00 Version 4.4.00, Jan 30, 2012 The main pupose of this relase is MISRA-C:2004 compliance, strong-type @@ -1402,7 +1454,7 @@ qpc/doc/, with the following Application notes: "QP and ARM Cortex-M, and QP and Windows", ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_3_00 Version 4.3.00, Nov 01, 2011 1. This release changes the names of critical section macros and @@ -1435,7 +1487,7 @@ latest IAR EWARM version 6.30. latest Sourcery CodeBench 2011.07-60. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_2_04 Version 4.2.04, Sep 24, 2011 The main pupose of this relase is to provide a bug fix for the QK port @@ -1452,7 +1504,7 @@ implemented in the qk_port.s file and consists of clearing the PENDSVSET bit programmatically inside PendSV_Handler. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_2_02 Version 4.2.02, Sep 08, 2011 1. The main pupose of this relase is to repackage the default QP/C @@ -1467,7 +1519,7 @@ distinguish libraries generated by different GNU-toolchains (such as CodeRed, Attolic, DevKit ARM, etc.) ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_2_01 Version 4.2.01, Aug 13, 2011 1. Modified file qassert.h to add assertion macros #Q_ASSERT_ID, @@ -1478,7 +1530,7 @@ volatility of line numbers for indentifying assertions. 2. Added QP port and examples for Mac OS X on 80x86. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_2_00 Version 4.2.00, Jul 14, 2011 The goal of this milestone release is to extend the number of event @@ -1550,7 +1602,7 @@ framework. latest IAR EWARM 6.20. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_07 Version 4.1.07, Feb 28, 2011 The goal of this release is to improve the ease of experimenting with @@ -1570,7 +1622,7 @@ building all QP/C libraries from the IDE. Three build configurations 2. Added Win32 port with the MinGW comiler (ports/80x86/win32/mingw). This directory contains the Makefile for building all QP/C libraries. Three build configurations (dbg, rel, and spy) are supported. - + @note the Makefile assumes that the MinGW/bin directory is added to the PATH. @@ -1591,7 +1643,7 @@ on 64-bit targets (such as 64-bit Linux). latest Sourcery G++ 2011.02-2. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_06 Version 4.1.06, Jan 07, 2011 1. Made cosmetic improvements to the example QM models of the @@ -1607,7 +1659,7 @@ IAR EWARM version 6.10. latest Sourcery G++ 2010.09-66. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_05 Version 4.1.05, Nov 01, 2010 This release is adds examples for the QM (QP Modeler) graphical modeling @@ -1631,7 +1683,7 @@ Additionally, the QP/C baseline code has been slighlty modified for better conformance to the MISRA C 2004 rules and the latest PC-Lint 9.x. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_04 Version 4.1.04, Mar 16, 2010 This release is adds compatibility of all examples for DOS with the DOSBox @@ -1650,7 +1702,7 @@ improvement extends the CMSIS from Sandstorm to Fury, DustDevil, and Tempest Stellaris families. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_03 Version 4.1.03, Jan 21, 2010 This release is concerned with the ARM Cortex ports and examples. @@ -1679,7 +1731,7 @@ any way, so the release has NO IMPACT on the QP/C applications except for the ARM Cortex ports and applications. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_02 Version 4.1.02, Jan 14, 2010 The purpose of this minor maintenance release is the change in the directory @@ -1694,7 +1746,7 @@ release has NO IMPACT on the QP/C applications except for the ARM Cortex ports and applications. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_01 Version 4.1.01, Nov 05, 2009 The main purpose of this release is to replace the Turbo C++ 1.01 toolset @@ -1715,7 +1767,7 @@ state machine classes with QP 4.x. The SLS example located in new State-Local Storage state design pattern. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_1_00 Version 4.1.00, Oct 09, 2009 The release brings a number of improvements to QP/C and updates the QP/C ARM @@ -1762,7 +1814,7 @@ scheduler and two contex-switches if the ready-set is empty. - in the game example moved setting up the QS filters from main.c to bsp.c. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_0_04 Version 4.0.04, Apr 09, 2009 The maintenance release provides a fix for the compile-time assertions, @@ -1778,7 +1830,7 @@ The main changes in QP v4.0.04 with respect to earlier version are as follows: a negative array dimension when the asserted condition is not TRUE. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_0_03 Version 4.0.03, Dec 27, 2008 The main purpose of this release is to fix a bug in the QK preemptive kernel, @@ -1814,7 +1866,7 @@ when the macro QK_NO_MUTEX is not defined. when the macro QK_NO_MUTEX is not defined. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_0_02 Version 4.0.02, Nov 15, 2008 This maintenance release does not change the QP/C API in any way, so the @@ -1829,7 +1881,7 @@ the PC-lint warining about using the comma-operator (MISRA rule 42). HIT_WALL was not declared static. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_0_01 Version 4.0.01, June 09, 2008 This maintenace release is made to allow using QS software tracing with @@ -1848,7 +1900,7 @@ as static to save stack space, because QF_run() never returns and is not reentrant. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section qpc_4_0_00 Version 4.0.00, Apr 07, 2008 This milestone release is made for the book /ref PSiCC2. The book describes in diff --git a/doxygen/images/qp_banner.jpg b/doxygen/images/qp_banner.jpg index 081cb900..5612aa7a 100644 Binary files a/doxygen/images/qp_banner.jpg and b/doxygen/images/qp_banner.jpg differ diff --git a/doxygen/img/img.htm b/doxygen/img/img.htm index 20b28d82..1c187d1b 100644 --- a/doxygen/img/img.htm +++ b/doxygen/img/img.htm @@ -4,38 +4,39 @@ QP built-in images - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/doxygen/images/logo_qwin256.jpg b/doxygen/img/logo_qwin.jpg similarity index 100% rename from doxygen/images/logo_qwin256.jpg rename to doxygen/img/logo_qwin.jpg diff --git a/doxygen/main.dox b/doxygen/main.dox index 58c47517..314b597c 100644 --- a/doxygen/main.dox +++ b/doxygen/main.dox @@ -1,14 +1,15 @@ /*! @mainpage About QP/C™ -@tableofcontents +@image html qp_banner.jpg @section ab_about What is it? -QP/C™ (Quantum Platform in C) is a lightweight, open source active object (actor) framework for building responsive and modular real-time embedded applications as systems of asynchronous event-driven active objects (actors). The QP/C™ framework is a member of a larger family consisting of QP/C, QP/C++, and QP-nano frameworks, which are all strictly quality controlled, thoroughly documented, and available under @ref licensing "dual licensing model". +QP/C™ (Quantum Platform in C) is a lightweight, open source active object (actor) framework for building modern, +reactive, real-time embedded applications as systems of asynchronous event-driven active objects (actors). The QP/C™ framework is a member of a larger family consisting of QP/C, QP/C++, and QP-nano frameworks, which are all strictly quality controlled, thoroughly documented, and available under @ref licensing "dual licensing model". -The behavior of active objects is specified in QP/C by means of hierarchical state machines (UML statecharts). The framework supports manual coding of UML state machines in C as well as automatic code generation by means of the free QM™ modeling tool. +The behavior of active objects is specified in QP/C by means of hierarchical state machines (UML statecharts). The framework supports manual coding of UML state machines in C as well as automatic code generation by means of the free QM™ modeling tool. @attention -To use QP/C™ effectively, you need to understand the key concepts that underline the architecture of the framework and your applications based on the framework. +To use QP/C™ effectively, you need to understand the key concepts that underline the architecture of the framework and your applications based on the framework.
    @@ -20,20 +21,20 @@ To use QP/C™ effectively, you need to understand the active objects (actors), which is _safer_ and easier to understand than "free-threading" with a traditional RTOS. -- to provide a simple-to-use coding techniques for hierarchical state machines, with which to implement the behavior of active objects. -- to provide efficient and thread-safe event-driven mechanisms for active objects to communicate, such as direct event passing and publish-subscribe. +- to provide a reusable event-driven **architecture** based on active objects (actors), which is inherently **safer**, more extensible, and easier to understand than the usual _shared-state concurrency_ based on a traditional Real-Time Operating System (RTOS). +- to provide a simple-to-use coding techniques for hierarchical state machines, with which to implement the behavior of active objects. +- to provide efficient and thread-safe asynchronous mechanisms for active objects to communicate, such as direct event passing and publish-subscribe. - to provide event-driven timing services (time events). - to provide a selection of built-in real-time kernels to run the QP applications, such as the cooperative @ref qv "QV kernel", the preemptive non-blocking @ref qk "QK kernel", and the preemptive blocking @ref qxk "QXK kernel". -- to provide testing support for applications based on software tracing (@ref qs "Q-Spy"). +- to provide **unit testing** support for applications based on software tracing (QUTest™). - to provide portability layer and ready-to-use ports to @ref ports_rtos "3rd-party RTOSes" and desktop operating systems such as @ref posix "Linux" and @ref win32 "Windows". -- to provide a target for modeling and automatic code generation from the QM modeling tool. +- to provide a target for modeling and automatic code generation from the QM™ modeling tool. ------------------------------------------------------------------------------ @section ab_special What's special about it? -The QP/C™ framework is a unique offering on the embedded software market. It provides a modern, reusable **architecture** of embedded applications, which combines object-orientation with the particular model of concurrency, known as active objects (actors). This architecture is generally **safer**, more responsive and easier to understand than "free threading" with a traditional Real-Time Operating System (RTOS). It also provides high enough level of abstraction and the right abstractions to effectively apply modeling and code generation to deeply embedded systems. +The QP/C™ framework is a unique offering on the embedded software market. It provides a modern, reusable **architecture** of embedded applications, which combines object-orientation with the particular model of concurrency, known as active objects (actors). This architecture is generally **safer**, more responsive and easier to understand than "free threading" with a traditional Real-Time Operating System (RTOS). It also provides higher level of abstraction and the right abstractions to effectively apply modeling and code generation to deeply embedded systems.
    @@ -41,11 +42,11 @@ The QP/C™ framework is a unique offering on the embedded software market. Even though it is written in @ref misra "MISRA-compliant" ANSI-C, QP/C™ is fundamentally an **object-oriented** framework, which means that the framework itself and your applications derived from the framework are fundamentally composed of classes and only classes can have @ref sm "state machines" associated with them.
    @note -If you program in C and object-oriented programming is new to you, please refer to the Application Note "Simple Object-Oriented Programming in C", which describes how you can implement the concepts of _classes_, _inheritance_, and _polymorphism_ to portable ANSI-C. +If you program in C and object-oriented programming is new to you, please refer to the Application Note "Simple Object-Oriented Programming in C", which describes how you can implement the concepts of _classes_, _inheritance_, and _polymorphism_ to portable ANSI-C.
    @htmlonly
    - +
    Application Note: Object-Oriented Programming in C
    @@ -54,80 +55,79 @@ Application Note: Object-Oriented Programming in C
    -@subsection lightweight Lightweight +@subsection lightweight Lightweight The most unique characteristic of the QP/C™ framework is its very small footprint, especially in RAM. In this respect, QP/C™ requires less resources than even the smallest conventional Real-Time Operating System (RTOS) kernel. At the same time, QP gives you a much higher level of abstraction than a conventional RTOS. With QP, you work at the level of active objects, state machines and events, as opposed to "naked" threads of an RTOS.
    -@subsection hsms Hierarchical State Machines +@subsection hsms Hierarchical State Machines The behavior of active objects is specified in QP by means of -hierarchical state machines (UML statecharts). The frameworks support manual coding of UML state machines in C or C++ as well as fully automatic code generation by means of the free graphical QM™ modeling tool. +hierarchical state machines (UML statecharts). The frameworks support manual coding of UML state machines in C or C++ as well as fully automatic code generation by means of the free graphical QM™ modeling tool.
    -@subsection kernels Built-in Kernels +@subsection kernels Built-in Kernels The QP™/C framework can run on @ref exa_native "bare-metal single-chip microcontrollers", completely replacing a traditional RTOS. The framework contains a selection of built-in real-time kernels, such as the cooperative @ref qv "QV kernel", the preemptive non-blocking @ref qk "QK kernel", and the preemptive, dual-mode, blocking @ref qxk "QXK kernel". The QXK kernel provides all the features you might expect from a traditional RTOS kernel and has been specifically designed for mixing event-driven active objects with traditional blocking code, such as commercial middleware (TCP/IP stacks, UDP stacks, embedded file systems, etc.) or legacy software. @ref ports_native "Native QP ports" and ready-to-use @ref exa_native "examples" are provided for major @ref exa_ref_mcu "CPU families".
    -@subsection inter Interoperability +@subsection inter Interoperability QP/C can also work with many traditional @ref exa_rtos "RTOSes" and @ref exa_rtos "desktop OSes" (such as Windows and Linux).
    -@subsection popular Popularity & Maturity -With over 15 years of continuous development and 60,000 downloads a year, the QP™ framework family is the most mature and popular such solution on the embedded software market. +@subsection popular Popularity & Maturity +With over 15 years of continuous development and 60,000 downloads a year, the QP™ framework family is the most mature and popular such solution on the embedded software market. -The QP™ frameworks are used in millions of products worldwide in aerospace, medical devices, consumer electronics, wired and wireless telecommunications, industrial automation, transportation, robotics, and many more. +The QP™ frameworks are used in millions of products worldwide in aerospace, medical devices, consumer electronics, wired and wireless telecommunications, industrial automation, transportation, robotics, and many more.
    @subsection psicc2 Book -The book, Practical UML Statecharts in C/C++, 2nd Edition provides a detailed design study of the QP frameworks and explains all the related concepts. +The book, Practical UML Statecharts in C/C++, 2nd Edition provides a detailed design study of the QP frameworks and explains all the related concepts. -@image html PSiCC2-3D.jpg "Practical UML Statecharts in C/C++, 2nd Edition" +@image html PSiCC2-3D.jpg "Practical UML Statecharts in C/C++, 2nd Edition" - ------------------------------------------------------------------------------- -@section licensing How is it licensed? - -QP/C is licensed under the increasingly popular dual licensing model, in which both the open source software distribution mechanism and traditional closed source software distribution models are combined. - -@note If your company has a policy forbidding open source in your product, all QP frameworks can be licensed commercially, in which case you don't use any open source license and you do not violate your policy. + +------------------------------------------------------------------------------ +@section licensing How is it licensed? + +QP/C is licensed under the increasingly popular dual licensing model, in which both the open source software distribution mechanism and traditional closed source software distribution models are combined. + +@note If your company has a policy forbidding open source in your product, all QP frameworks can be licensed commercially, in which case you don't use any open source license and you do not violate your policy.
    -@subsection open-source Open Source Projects -If you are developing and distributing open source applications under the GNU General Public License (GPL), as published by the Free Software Foundation, then you are free to use the Quantum Leaps software under the GPL version 3 of the License, or (at your option) any later version. Please note that GPL requires that all modifications to the original code as well as your application code (Derivative Works as defined in the Copyright Law) must also be released under the terms of the GPL open source license. - +@subsection open-source Open Source Projects +If you are developing and distributing open source applications under the GNU General Public License (GPL), as published by the Free Software Foundation, then you are free to use the Quantum Leaps software under the GPL version 3 of the License, or (at your option) any later version. Please note that GPL requires that all modifications to the original code as well as your application code (Derivative Works as defined in the Copyright Law) must also be released under the terms of the GPL open source license. +
    -@subsection closed-source Closed Source Projects -If you are developing and distributing traditional closed source applications, you can purchase one of Quantum Leaps commercial licenses, which are specifically designed for users interested in retaining the proprietary status of their code. All Quantum Leaps commercial licenses expressly supersede the GPL open source license. This means that when you license Quantum Leaps software under a commercial license, you specifically do not use the software under the open source license and therefore you are not subject to any of its terms. +@subsection closed-source Closed Source Projects +If you are developing and distributing traditional closed source applications, you can purchase one of Quantum Leaps commercial licenses, which are specifically designed for users interested in retaining the proprietary status of their code. All Quantum Leaps commercial licenses expressly supersede the GPL open source license. This means that when you license Quantum Leaps software under a commercial license, you specifically do not use the software under the open source license and therefore you are not subject to any of its terms. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section help How to get help? Please post any **technical questions** to the Free Support Forum hosted on SourceForge.net. Posts to this forum benefit the whole community and are typically answered the same day. Direct **Commercial Support** is available to the commercial licensees. Every commercial license includes one year of Technical Support for the licensed software. The support term can be extended annually. - -Training and consulting services are also available from Quantum Leaps. Please refer to the Contact web-page for more information. + +Training and consulting services are also available from Quantum Leaps. Please refer to the Contact web-page for more information. ------------------------------------------------------------------------------- -@section contact Contact Information - -- Quantum Leaps Web site: www.state-machine.com - -- Quantum Leaps licensing: www.state-machine.com/licensing +------------------------------------------------------------------------------ +@section ab_help How to get help? -- QP/QM on SourceForge.net: sourceforge.net/projects/qpc +- Free Support Forum +- Bug Reports +- Feature Requests +- Quantum Leaps website +- info@state-machine.com@n -- e-mail: info@state-machine.com +@image html logo_ql_TM.jpg -@image html logo_ql_TM.jpg -Copyright © 2002-2017 Quantum Leaps, LLC. All Rights Reserved. +Copyright © 2002-2017 Quantum Leaps, LLC. All Rights Reserved.@n -@next{gs} -*/ +@next{gs} +*/ diff --git a/doxygen/make.bat b/doxygen/make.bat index 38bc2f1c..e5117597 100644 --- a/doxygen/make.bat +++ b/doxygen/make.bat @@ -1,8 +1,8 @@ @echo off :: ========================================================================== :: Product: QP/C script for generating Doxygen documentation -:: Last Updated for Version: 5.8.2 -:: Date of the Last Update: 2017-02-07 +:: Last Updated for Version: 5.9.0 +:: Date of the Last Update: 2017-05-03 :: :: Q u a n t u m L e a P s :: --------------------------- @@ -29,7 +29,7 @@ :: along with this program. If not, see . :: :: Contact information: -:: http://www.state-machine.com +:: https://state-machine.com :: mailto:info@state-machine.com :: ========================================================================== setlocal @@ -38,7 +38,7 @@ echo usage: echo make echo make -CHM -set VERSION=5.8.2 +set VERSION=5.9.0 :: Generate Resource Standard Metrics for QP/C ............................... set DOXHOME="C:\tools\doxygen\bin" diff --git a/doxygen/metrics.dox b/doxygen/metrics.dox index 979e0085..7cdf973b 100644 --- a/doxygen/metrics.dox +++ b/doxygen/metrics.dox @@ -1,2793 +1,3019 @@ -/** @page metrics Code Metrics - -@code - Standard Code Metrics for QP/C 5.8.2 - - Resource Standard Metrics (TM) for C, C++, C# and Java - Version 7.75 - mSquaredTechnologies.com - - License Type: Windows Single User License - Licensed To : Quantum Leaps, LLC - License No. : WS2975 License Date: Dec 15, 2013 - Build Date : Sep 2 2009 Run Date: Feb 07, 2017 - (C)1996-2009 M Squared Technologies LLC - ________________________________________________________________________ - - ~~ Function Metrics ~~ - ~~ Complexity Detail Analysis ~~ - - File: ..\include\qassert.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 43 eLOC 42 lLOC 3 Comment 240 Lines 303 - ________________________________________________________________________ - End of File: ..\include\qassert.h - - - File: ..\include\qep.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 157 eLOC 153 lLOC 57 Comment 405 Lines 617 - ________________________________________________________________________ - End of File: ..\include\qep.h - - - File: ..\include\qequeue.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 33 eLOC 33 lLOC 15 Comment 180 Lines 233 - ________________________________________________________________________ - End of File: ..\include\qequeue.h - - - File: ..\include\qf.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 190 eLOC 190 lLOC 75 Comment 523 Lines 817 - ________________________________________________________________________ - End of File: ..\include\qf.h - - - File: ..\include\qk.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 64 eLOC 64 lLOC 24 Comment 105 Lines 177 - ________________________________________________________________________ - End of File: ..\include\qk.h - - - File: ..\include\qmpool.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 42 eLOC 42 lLOC 18 Comment 109 Lines 169 - ________________________________________________________________________ - End of File: ..\include\qmpool.h - - - File: ..\include\qp_port.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 4 eLOC 4 lLOC 0 Comment 40 Lines 45 - ________________________________________________________________________ - End of File: ..\include\qp_port.h - - - File: ..\include\qpc.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 66 eLOC 65 lLOC 8 Comment 125 Lines 223 - ________________________________________________________________________ - End of File: ..\include\qpc.h - - - File: ..\include\qpset.h - ________________________________________________________________________ - - Inline Function: QF_LOG2 - Parameters: (uint32_t x) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 3 - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 25 eLOC 18 lLOC 11 Comment 7 Lines 26 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 98 eLOC 91 lLOC 23 Comment 103 Lines 224 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 1 - Total Function LOC.....: 25 Total Function Pts LOC : 0.0 - Total Function eLOC....: 18 Total Function Pts eLOC: 0.0 - Total Function lLOC....: 11 Total Function Pts lLOC: 0.0 - Total Function Params .: 1 Total Function Return .: 1 - Total Cyclo Complexity : 4 Total Function Complex.: 6 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 25 Average Function LOC ..: 25.00 - Max Function eLOC .....: 18 Average Function eLOC .: 18.00 - Max Function lLOC .....: 11 Average Function lLOC .: 11.00 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 1 Avg Function Parameters: 1.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 2 Avg Interface Complex. : 2.00 - Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 4.00 - Max Total Complexity ..: 6 Avg Total Complexity ..: 6.00 - ________________________________________________________________________ - End of File: ..\include\qpset.h - - - File: ..\include\qs.h - ________________________________________________________________________ - - - NOTICE: The end of the source file has been reached where the - open brace count { 26 != 24 } close brace count - This is an indication of non-compilable code within the source - file. RSM processes all source code including code wrapped - with preprocessor directives. Accurate metrics requires that - all code present in this file must be compilable. - ~~ Total File Summary ~~ - - LOC 452 eLOC 447 lLOC 106 Comment 663 Lines 1140 - ________________________________________________________________________ - End of File: ..\include\qs.h - - - File: ..\include\qs_dummy.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 68 eLOC 68 lLOC 0 Comment 43 Lines 119 - ________________________________________________________________________ - End of File: ..\include\qs_dummy.h - - - File: ..\include\qv.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 25 eLOC 25 lLOC 2 Comment 80 Lines 111 - ________________________________________________________________________ - End of File: ..\include\qv.h - - - File: ..\include\qxk.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 67 eLOC 67 lLOC 26 Comment 112 Lines 186 - ________________________________________________________________________ - End of File: ..\include\qxk.h - - - File: ..\include\qxthread.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 31 eLOC 31 lLOC 15 Comment 132 Lines 176 - ________________________________________________________________________ - End of File: ..\include\qxthread.h - - - File: ..\source\qf_pkg.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 63 eLOC 63 lLOC 8 Comment 120 Lines 206 - ________________________________________________________________________ - End of File: ..\source\qf_pkg.h - - - File: ..\source\qs_pkg.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 25 eLOC 23 lLOC 6 Comment 59 Lines 93 - ________________________________________________________________________ - End of File: ..\source\qs_pkg.h - - - File: ..\source\qxk_pkg.h - ________________________________________________________________________ - - ~~ Total File Summary ~~ - - LOC 20 eLOC 19 lLOC 8 Comment 49 Lines 78 - ________________________________________________________________________ - End of File: ..\source\qxk_pkg.h - - - File: ..\source\qep_hsm.c - ________________________________________________________________________ - - Function: QHsm_ctor - Parameters: (QHsm * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 9 eLOC 7 lLOC 4 Comment 21 Lines 9 - - Function: QHsm_init_ - Parameters: (QHsm * const me, QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 3 - Conditional if / else if: 1 - Logical and ( && ) : 2 - Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 - LOC 50 eLOC 47 lLOC 31 Comment 34 Lines 70 - - Function: QHsm_top - Parameters: (void const * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 18 Lines 5 - - Function: QHsm_dispatch_ - Parameters: (QHsm * const me, QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 4 - Loops for / foreach : 2 - Conditional if / else if: 5 - Logical and ( && ) : 1 - Complexity Param 2 Return 1 Cyclo Vg 13 Total 16 - LOC 106 eLOC 95 lLOC 62 Comment 67 Lines 147 - - Function: QHsm_tran_ - Parameters: (QHsm * const me, QStateHandler path[QHSM_MAX_NEST_DEPTH_]) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 4 - Conditional if / else if: 10 - Complexity Param 2 Return 1 Cyclo Vg 15 Total 18 - LOC 97 eLOC 76 lLOC 48 Comment 62 Lines 134 - - Function: QHsm_isIn - Parameters: (QHsm * const me, QStateHandler const state) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 16 eLOC 13 lLOC 9 Comment 21 Lines 21 - - Function: QHsm_childState_ - Parameters: (QHsm * const me, QStateHandler const parent) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 19 eLOC 15 lLOC 12 Comment 30 Lines 25 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 344 eLOC 297 lLOC 176 Comment 314 Lines 625 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 7 - Total Function LOC.....: 302 Total Function Pts LOC : 2.7 - Total Function eLOC....: 257 Total Function Pts eLOC: 2.3 - Total Function lLOC....: 169 Total Function Pts lLOC: 1.4 - Total Function Params .: 14 Total Function Return .: 7 - Total Cyclo Complexity : 43 Total Function Complex.: 64 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 106 Average Function LOC ..: 43.14 - Max Function eLOC .....: 95 Average Function eLOC .: 36.71 - Max Function lLOC .....: 62 Average Function lLOC .: 24.14 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 2.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 3.00 - Max Cyclomatic Complex.: 15 Avg Cyclomatic Complex.: 6.14 - Max Total Complexity ..: 18 Avg Total Complexity ..: 9.14 - ________________________________________________________________________ - End of File: ..\source\qep_hsm.c - - - File: ..\source\qep_msm.c - ________________________________________________________________________ - - Function: QMsm_ctor - Parameters: (QMsm * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 9 eLOC 7 lLOC 4 Comment 28 Lines 10 - - Function: QMsm_init_ - Parameters: (QMsm * const me, QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Logical and ( && ) : 2 - Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 - LOC 23 eLOC 22 lLOC 13 Comment 25 Lines 37 - - Function: QMsm_dispatch_ - Parameters: (QMsm * const me, QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 2 - Conditional if / else if: 13 - Complexity Param 2 Return 1 Cyclo Vg 16 Total 19 - LOC 114 eLOC 97 lLOC 59 Comment 75 Lines 156 - - Function: QMsm_execTatbl_ - Parameters: (QMsm * const me, QMTranActTable const *tatbl) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 6 - Complexity Param 2 Return 1 Cyclo Vg 8 Total 11 - LOC 53 eLOC 43 lLOC 21 Comment 33 Lines 64 - - Function: QMsm_exitToTranSource_ - Parameters: (QMsm * const me, QMState const *s, QMState const *ts) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Conditional if / else if: 2 - Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 - LOC 17 eLOC 12 lLOC 6 Comment 20 Lines 23 - - Function: QMsm_enterHistory_ - Parameters: (QMsm * const me, QMState const * const hist) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 2 - Conditional if / else if: 3 - Complexity Param 2 Return 1 Cyclo Vg 6 Total 9 - LOC 40 eLOC 33 lLOC 21 Comment 24 Lines 48 - - Function: QMsm_isInState - Parameters: (QMsm const * const me, QMState const * const state) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 11 eLOC 8 lLOC 6 Comment 16 Lines 12 - - Function: QMsm_childStateObj_ - Parameters: (QMsm const * const me, QMState const * const parent) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 19 eLOC 13 lLOC 9 Comment 20 Lines 23 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 313 eLOC 260 lLOC 144 Comment 298 Lines 581 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 8 - Total Function LOC.....: 286 Total Function Pts LOC : 2.4 - Total Function eLOC....: 235 Total Function Pts eLOC: 2.0 - Total Function lLOC....: 139 Total Function Pts lLOC: 1.1 - Total Function Params .: 17 Total Function Return .: 8 - Total Cyclo Complexity : 45 Total Function Complex.: 70 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 114 Average Function LOC ..: 35.75 - Max Function eLOC .....: 97 Average Function eLOC .: 29.38 - Max Function lLOC .....: 59 Average Function lLOC .: 17.38 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 2.13 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 3.13 - Max Cyclomatic Complex.: 16 Avg Cyclomatic Complex.: 5.63 - Max Total Complexity ..: 19 Avg Total Complexity ..: 8.75 - ________________________________________________________________________ - End of File: ..\source\qep_msm.c - - - File: ..\source\qf_act.c - ________________________________________________________________________ - - Function: QF_add_ - Parameters: (QActive * const a) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 2 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 15 eLOC 14 lLOC 8 Comment 23 Lines 25 - - Function: QF_remove_ - Parameters: (QActive * const a) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 2 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 16 eLOC 15 lLOC 9 Comment 23 Lines 25 - - Function: QF_bzero - Parameters: (void * const start, uint_fast16_t len) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 8 eLOC 6 lLOC 4 Comment 14 Lines 8 - - Inline Function: QF_LOG2 - Parameters: (uint32_t x) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 3 - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 25 eLOC 18 lLOC 11 Comment 1 Lines 26 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 148 eLOC 136 lLOC 35 Comment 123 Lines 276 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 4 - Total Function LOC.....: 64 Total Function Pts LOC : 1.2 - Total Function eLOC....: 53 Total Function Pts eLOC: 1.1 - Total Function lLOC....: 32 Total Function Pts lLOC: 0.3 - Total Function Params .: 5 Total Function Return .: 4 - Total Cyclo Complexity : 12 Total Function Complex.: 21 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 25 Average Function LOC ..: 16.00 - Max Function eLOC .....: 18 Average Function eLOC .: 13.25 - Max Function lLOC .....: 11 Average Function lLOC .: 8.00 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 1.25 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 2.25 - Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 3.00 - Max Total Complexity ..: 6 Avg Total Complexity ..: 5.25 - ________________________________________________________________________ - End of File: ..\source\qf_act.c - - - File: ..\source\qf_actq.c - ________________________________________________________________________ - - Function: QActive_post_ - Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con - st margin) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 5 - Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 - LOC 56 eLOC 47 lLOC 35 Comment 79 Lines 77 - - Function: QActive_postLIFO_ - Parameters: (QActive * const me, QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 4 - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 37 eLOC 31 lLOC 22 Comment 36 Lines 50 - - Function: QActive_get_ - Parameters: (QActive * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 36 eLOC 32 lLOC 23 Comment 32 Lines 46 - - Function: QF_getQueueMin - Parameters: (uint_fast8_t const prio) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 10 eLOC 9 lLOC 6 Comment 18 Lines 13 - - Function: QTicker_ctor - Parameters: (QTicker * const me, uint8_t tickRate) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 12 eLOC 10 lLOC 4 Comment 6 Lines 14 - - Function: QTicker_init_ - Parameters: (QHsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - Function: QTicker_dispatch_ - Parameters: (QHsm * const me, QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 12 eLOC 10 lLOC 8 Comment 4 Lines 15 - - Function: QTicker_post_ - Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con - st margin) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 24 eLOC 21 lLOC 17 Comment 15 Lines 32 - - Function: QTicker_postLIFO_ - Parameters: (QActive * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 232 eLOC 203 lLOC 126 Comment 246 Lines 440 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 9 - Total Function LOC.....: 197 Total Function Pts LOC : 1.8 - Total Function eLOC....: 168 Total Function Pts eLOC: 1.6 - Total Function lLOC....: 121 Total Function Pts lLOC: 1.0 - Total Function Params .: 18 Total Function Return .: 9 - Total Cyclo Complexity : 23 Total Function Complex.: 50 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 56 Average Function LOC ..: 21.89 - Max Function eLOC .....: 47 Average Function eLOC .: 18.67 - Max Function lLOC .....: 35 Average Function lLOC .: 13.44 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 2.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 3.00 - Max Cyclomatic Complex.: 6 Avg Cyclomatic Complex.: 2.56 - Max Total Complexity ..: 10 Avg Total Complexity ..: 5.56 - ________________________________________________________________________ - End of File: ..\source\qf_actq.c - - - File: ..\source\qf_defer.c - ________________________________________________________________________ - - Function: QActive_defer - Parameters: (QActive const * const me, QEQueue * const eq, QEvt const * - const e) - Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 - LOC 4 eLOC 2 lLOC 2 Comment 24 Lines 5 - - Function: QActive_recall - Parameters: (QActive * const me, QEQueue * const eq) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 19 eLOC 15 lLOC 10 Comment 33 Lines 36 - - Function: QActive_flushDeferred - Parameters: (QActive const * const me, QEQueue * const eq) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 10 eLOC 7 lLOC 7 Comment 17 Lines 12 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 42 eLOC 33 lLOC 19 Comment 117 Lines 163 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 3 - Total Function LOC.....: 33 Total Function Pts LOC : 0.3 - Total Function eLOC....: 24 Total Function Pts eLOC: 0.3 - Total Function lLOC....: 19 Total Function Pts lLOC: 0.1 - Total Function Params .: 7 Total Function Return .: 3 - Total Cyclo Complexity : 6 Total Function Complex.: 16 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 19 Average Function LOC ..: 11.00 - Max Function eLOC .....: 15 Average Function eLOC .: 8.00 - Max Function lLOC .....: 10 Average Function lLOC .: 6.33 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 2.33 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 3.33 - Max Cyclomatic Complex.: 3 Avg Cyclomatic Complex.: 2.00 - Max Total Complexity ..: 6 Avg Total Complexity ..: 5.33 - ________________________________________________________________________ - End of File: ..\source\qf_defer.c - - - File: ..\source\qf_dyn.c - ________________________________________________________________________ - - Function: QEvt_ctor - Parameters: (QEvt * const me, enum_t const sig) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 - - Function: QF_poolInit - Parameters: (void * const poolSto, uint_fast32_t const poolSize, uint_fa - st16_t const evtSize) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical or ( || ) : 1 - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 9 eLOC 7 lLOC 4 Comment 38 Lines 13 - - Function: QF_newX_ - Parameters: (uint_fast16_t const evtSize, uint_fast16_t const margin, en - um_t const sig) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 2 - Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 - LOC 26 eLOC 20 lLOC 14 Comment 35 Lines 35 - - Function: QF_gc - Parameters: (QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 26 eLOC 22 lLOC 13 Comment 35 Lines 39 - - Function: QF_newRef_ - Parameters: (QEvt const * const e, QEvt const * const evtRef) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 10 eLOC 8 lLOC 5 Comment 16 Lines 15 - - Function: QF_poolGetMaxBlockSize - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 5 Lines 3 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 97 eLOC 81 lLOC 42 Comment 191 Lines 287 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 6 - Total Function LOC.....: 79 Total Function Pts LOC : 0.8 - Total Function eLOC....: 63 Total Function Pts eLOC: 0.6 - Total Function lLOC....: 40 Total Function Pts lLOC: 0.3 - Total Function Params .: 11 Total Function Return .: 6 - Total Cyclo Complexity : 13 Total Function Complex.: 30 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 26 Average Function LOC ..: 13.17 - Max Function eLOC .....: 22 Average Function eLOC .: 10.50 - Max Function lLOC .....: 14 Average Function lLOC .: 6.67 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 1.83 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 2.83 - Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 2.17 - Max Total Complexity ..: 8 Avg Total Complexity ..: 5.00 - ________________________________________________________________________ - End of File: ..\source\qf_dyn.c - - - File: ..\source\qf_mem.c - ________________________________________________________________________ - - Function: QMPool_init - Parameters: (QMPool * const me, void * const poolSto, uint_fast32_t pool - Size, uint_fast16_t blockSize) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 2 - Logical and ( && ) : 2 - Complexity Param 4 Return 1 Cyclo Vg 5 Total 10 - LOC 36 eLOC 32 lLOC 24 Comment 58 Lines 52 - - Function: QMPool_put - Parameters: (QMPool * const me, void *b) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 15 eLOC 14 lLOC 9 Comment 29 Lines 22 - - Function: QMPool_get - Parameters: (QMPool * const me, uint_fast16_t const margin) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 3 - Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 - LOC 41 eLOC 35 lLOC 23 Comment 54 Lines 65 - - Function: QF_getPoolMin - Parameters: (uint_fast8_t const poolId) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 10 eLOC 9 lLOC 6 Comment 13 Lines 14 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 114 eLOC 102 lLOC 62 Comment 201 Lines 301 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 4 - Total Function LOC.....: 102 Total Function Pts LOC : 0.9 - Total Function eLOC....: 90 Total Function Pts eLOC: 0.8 - Total Function lLOC....: 62 Total Function Pts lLOC: 0.5 - Total Function Params .: 9 Total Function Return .: 4 - Total Cyclo Complexity : 13 Total Function Complex.: 26 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 41 Average Function LOC ..: 25.50 - Max Function eLOC .....: 35 Average Function eLOC .: 22.50 - Max Function lLOC .....: 24 Average Function lLOC .: 15.50 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 4 Avg Function Parameters: 2.25 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 5 Avg Interface Complex. : 3.25 - Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 3.25 - Max Total Complexity ..: 10 Avg Total Complexity ..: 6.50 - ________________________________________________________________________ - End of File: ..\source\qf_mem.c - - - File: ..\source\qf_ps.c - ________________________________________________________________________ - - Function: QF_psInit - Parameters: (QSubscrList * const subscrSto, enum_t const maxSignal) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 7 eLOC 6 lLOC 3 Comment 32 Lines 12 - - Function: QF_publish_ - Parameters: (QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Conditional if / else if: 3 - Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 - LOC 36 eLOC 30 lLOC 21 Comment 50 Lines 63 - - Function: QActive_subscribe - Parameters: (QActive const * const me, enum_t const sig) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 4 - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 16 eLOC 15 lLOC 8 Comment 22 Lines 22 - - Function: QActive_unsubscribe - Parameters: (QActive const * const me, enum_t const sig) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 4 - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 16 eLOC 15 lLOC 8 Comment 29 Lines 25 - - Function: QActive_unsubscribeAll - Parameters: (QActive const * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 1 - Logical and ( && ) : 2 - Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 - LOC 21 eLOC 18 lLOC 10 Comment 24 Lines 24 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 113 eLOC 101 lLOC 52 Comment 205 Lines 320 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 5 - Total Function LOC.....: 96 Total Function Pts LOC : 0.9 - Total Function eLOC....: 84 Total Function Pts eLOC: 0.8 - Total Function lLOC....: 50 Total Function Pts lLOC: 0.4 - Total Function Params .: 8 Total Function Return .: 5 - Total Cyclo Complexity : 21 Total Function Complex.: 34 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 36 Average Function LOC ..: 19.20 - Max Function eLOC .....: 30 Average Function eLOC .: 16.80 - Max Function lLOC .....: 21 Average Function lLOC .: 10.00 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 1.60 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 2.60 - Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 4.20 - Max Total Complexity ..: 8 Avg Total Complexity ..: 6.80 - ________________________________________________________________________ - End of File: ..\source\qf_ps.c - - - File: ..\source\qf_qact.c - ________________________________________________________________________ - - Function: QActive_ctor - Parameters: (QActive * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 12 eLOC 10 lLOC 4 Comment 19 Lines 17 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 14 eLOC 12 lLOC 4 Comment 69 Lines 81 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 1 - Total Function LOC.....: 12 Total Function Pts LOC : 0.1 - Total Function eLOC....: 10 Total Function Pts eLOC: 0.1 - Total Function lLOC....: 4 Total Function Pts lLOC: 0.0 - Total Function Params .: 2 Total Function Return .: 1 - Total Cyclo Complexity : 1 Total Function Complex.: 4 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 12 Average Function LOC ..: 12.00 - Max Function eLOC .....: 10 Average Function eLOC .: 10.00 - Max Function lLOC .....: 4 Average Function lLOC .: 4.00 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 2.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 3.00 - Max Cyclomatic Complex.: 1 Avg Cyclomatic Complex.: 1.00 - Max Total Complexity ..: 4 Avg Total Complexity ..: 4.00 - ________________________________________________________________________ - End of File: ..\source\qf_qact.c - - - File: ..\source\qf_qeq.c - ________________________________________________________________________ - - Function: QEQueue_init - Parameters: (QEQueue * const me, QEvt const *qSto[], uint_fast16_t const - qLen) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 16 eLOC 13 lLOC 9 Comment 22 Lines 18 - - Function: QEQueue_post - Parameters: (QEQueue * const me, QEvt const * const e, uint_fast16_t con - st margin) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 5 - Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 - LOC 51 eLOC 42 lLOC 30 Comment 55 Lines 72 - - Function: QEQueue_postLIFO - Parameters: (QEQueue * const me, QEvt const * const e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 4 - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 34 eLOC 29 lLOC 21 Comment 41 Lines 44 - - Function: QEQueue_get - Parameters: (QEQueue * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 3 - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 36 eLOC 31 lLOC 21 Comment 35 Lines 46 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 151 eLOC 129 lLOC 81 Comment 204 Lines 319 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 4 - Total Function LOC.....: 137 Total Function Pts LOC : 1.2 - Total Function eLOC....: 115 Total Function Pts eLOC: 1.0 - Total Function lLOC....: 81 Total Function Pts lLOC: 0.6 - Total Function Params .: 9 Total Function Return .: 4 - Total Cyclo Complexity : 17 Total Function Complex.: 30 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 51 Average Function LOC ..: 34.25 - Max Function eLOC .....: 42 Average Function eLOC .: 28.75 - Max Function lLOC .....: 30 Average Function lLOC .: 20.25 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 2.25 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 3.25 - Max Cyclomatic Complex.: 6 Avg Cyclomatic Complex.: 4.25 - Max Total Complexity ..: 10 Avg Total Complexity ..: 7.50 - ________________________________________________________________________ - End of File: ..\source\qf_qeq.c - - - File: ..\source\qf_qmact.c - ________________________________________________________________________ - - Function: QMActive_ctor - Parameters: (QMActive * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 12 eLOC 10 lLOC 4 Comment 28 Lines 28 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 15 eLOC 13 lLOC 4 Comment 79 Lines 94 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 1 - Total Function LOC.....: 12 Total Function Pts LOC : 0.1 - Total Function eLOC....: 10 Total Function Pts eLOC: 0.1 - Total Function lLOC....: 4 Total Function Pts lLOC: 0.0 - Total Function Params .: 2 Total Function Return .: 1 - Total Cyclo Complexity : 1 Total Function Complex.: 4 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 12 Average Function LOC ..: 12.00 - Max Function eLOC .....: 10 Average Function eLOC .: 10.00 - Max Function lLOC .....: 4 Average Function lLOC .: 4.00 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 2.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 3.00 - Max Cyclomatic Complex.: 1 Avg Cyclomatic Complex.: 1.00 - Max Total Complexity ..: 4 Avg Total Complexity ..: 4.00 - ________________________________________________________________________ - End of File: ..\source\qf_qmact.c - - - File: ..\source\qf_time.c - ________________________________________________________________________ - - Function: QF_tickX_ - Parameters: (uint_fast8_t const tickRate) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 5 - Complexity Param 1 Return 1 Cyclo Vg 7 Total 9 - LOC 65 eLOC 53 lLOC 36 Comment 53 Lines 93 - - Function: QF_noTimeEvtsActiveX - Parameters: (uint_fast8_t const tickRate) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 14 eLOC 10 lLOC 6 Comment 13 Lines 17 - - Function: QTimeEvt_ctorX - Parameters: (QTimeEvt * const me, QActive * const act, enum_t const sig, - uint_fast8_t tickRate) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 1 - Complexity Param 4 Return 1 Cyclo Vg 2 Total 7 - LOC 11 eLOC 9 lLOC 8 Comment 32 Lines 31 - - Function: QTimeEvt_armX - Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks, QTimeEvtCtr - const interval) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Logical and ( && ) : 4 - Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 - LOC 28 eLOC 25 lLOC 16 Comment 49 Lines 50 - - Function: QTimeEvt_disarm - Parameters: (QTimeEvt * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 29 eLOC 26 lLOC 17 Comment 30 Lines 37 - - Function: QTimeEvt_rearm - Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Inlined if-else ( ? : ) : 1 - Logical and ( && ) : 3 - Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 - LOC 34 eLOC 30 lLOC 18 Comment 47 Lines 60 - - Function: QTimeEvt_ctr - Parameters: (QTimeEvt const * const me) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 16 eLOC 15 lLOC 11 Comment 20 Lines 19 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 217 eLOC 188 lLOC 113 Comment 304 Lines 513 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 7 - Total Function LOC.....: 197 Total Function Pts LOC : 1.7 - Total Function eLOC....: 168 Total Function Pts eLOC: 1.5 - Total Function lLOC....: 112 Total Function Pts lLOC: 0.9 - Total Function Params .: 13 Total Function Return .: 7 - Total Cyclo Complexity : 28 Total Function Complex.: 48 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 65 Average Function LOC ..: 28.14 - Max Function eLOC .....: 53 Average Function eLOC .: 24.00 - Max Function lLOC .....: 36 Average Function lLOC .: 16.00 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 4 Avg Function Parameters: 1.86 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 5 Avg Interface Complex. : 2.86 - Max Cyclomatic Complex.: 7 Avg Cyclomatic Complex.: 4.00 - Max Total Complexity ..: 10 Avg Total Complexity ..: 6.86 - ________________________________________________________________________ - End of File: ..\source\qf_time.c - - - File: ..\source\qk.c - ________________________________________________________________________ - - Function: QF_init - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 14 eLOC 13 lLOC 10 Comment 18 Lines 21 - - Function: QF_stop - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 - - Function: initial_events - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 - - Function: QF_run - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 12 eLOC 10 lLOC 7 Comment 12 Lines 15 - - Function: QActive_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Logical and ( && ) : 3 - Complexity Param 7 Return 1 Cyclo Vg 5 Total 13 - LOC 19 eLOC 16 lLOC 11 Comment 29 Lines 24 - - Function: QActive_stop - Parameters: (QActive * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 - - Function: QK_sched_ - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 - LOC 15 eLOC 11 lLOC 7 Comment 21 Lines 19 - - Function: QK_activate_ - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Conditional if / else if: 5 - Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 - LOC 60 eLOC 52 lLOC 29 Comment 48 Lines 86 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 159 eLOC 136 lLOC 75 Comment 212 Lines 356 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 8 - Total Function LOC.....: 140 Total Function Pts LOC : 1.2 - Total Function eLOC....: 117 Total Function Pts eLOC: 1.1 - Total Function lLOC....: 73 Total Function Pts lLOC: 0.6 - Total Function Params .: 8 Total Function Return .: 8 - Total Cyclo Complexity : 23 Total Function Complex.: 39 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 60 Average Function LOC ..: 17.50 - Max Function eLOC .....: 52 Average Function eLOC .: 14.63 - Max Function lLOC .....: 29 Average Function lLOC .: 9.13 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 7 Avg Function Parameters: 1.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 8 Avg Interface Complex. : 2.00 - Max Cyclomatic Complex.: 7 Avg Cyclomatic Complex.: 2.88 - Max Total Complexity ..: 13 Avg Total Complexity ..: 4.88 - ________________________________________________________________________ - End of File: ..\source\qk.c - - - File: ..\source\qk_mutex.c - ________________________________________________________________________ - - Function: QMutex_init - Parameters: (QMutex * const me, uint_fast8_t prio) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 - - Function: QMutex_lock - Parameters: (QMutex * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 16 eLOC 14 lLOC 7 Comment 28 Lines 23 - - Function: QMutex_unlock - Parameters: (QMutex * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 21 eLOC 18 lLOC 10 Comment 28 Lines 28 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 57 eLOC 50 lLOC 20 Comment 122 Lines 173 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 3 - Total Function LOC.....: 41 Total Function Pts LOC : 0.4 - Total Function eLOC....: 35 Total Function Pts eLOC: 0.4 - Total Function lLOC....: 19 Total Function Pts lLOC: 0.2 - Total Function Params .: 4 Total Function Return .: 3 - Total Cyclo Complexity : 8 Total Function Complex.: 15 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 21 Average Function LOC ..: 13.67 - Max Function eLOC .....: 18 Average Function eLOC .: 11.67 - Max Function lLOC .....: 10 Average Function lLOC .: 6.33 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 1.33 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 2.33 - Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 2.67 - Max Total Complexity ..: 6 Avg Total Complexity ..: 5.00 - ________________________________________________________________________ - End of File: ..\source\qk_mutex.c - - - File: ..\source\qs.c - ________________________________________________________________________ - - Function: QS_initBuf - Parameters: (uint8_t sto[], uint_fast16_t stoSize) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 21 eLOC 20 lLOC 19 Comment 30 Lines 35 - - Function: QS_filterOn - Parameters: (uint_fast8_t rec) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 1 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 17 eLOC 12 lLOC 6 Comment 16 Lines 19 - - Function: QS_filterOff - Parameters: (uint_fast8_t rec) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 1 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 20 eLOC 15 lLOC 10 Comment 16 Lines 25 - - Function: QS_beginRec - Parameters: (uint_fast8_t rec) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 14 eLOC 13 lLOC 10 Comment 18 Lines 18 - - Function: QS_endRec - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Logical and ( && ) : 1 - Complexity Param 0 Return 1 Cyclo Vg 4 Total 5 - LOC 22 eLOC 18 lLOC 10 Comment 17 Lines 28 - - Function: QS_target_info_ - Parameters: (uint8_t isReset) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Selection case : 12 - Conditional if / else if: 2 - Complexity Param 1 Return 1 Cyclo Vg 15 Total 17 - LOC 97 eLOC 90 lLOC 48 Comment 10 Lines 111 - - Function: QS_u8 - Parameters: (uint8_t format, uint8_t d) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 11 eLOC 10 lLOC 7 Comment 13 Lines 14 - - Function: QS_u16 - Parameters: (uint8_t format, uint16_t d) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 15 eLOC 14 lLOC 10 Comment 13 Lines 20 - - Function: QS_u32 - Parameters: (uint8_t format, uint32_t d) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 16 eLOC 14 lLOC 11 Comment 14 Lines 20 - - Function: QS_u8_ - Parameters: (uint8_t d) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 - - Function: QS_u8u8_ - Parameters: (uint8_t d1, uint8_t d2) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 11 eLOC 10 lLOC 7 Comment 11 Lines 13 - - Function: QS_u16_ - Parameters: (uint16_t d) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 14 eLOC 13 lLOC 10 Comment 12 Lines 18 - - Function: QS_u32_ - Parameters: (uint32_t d) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 15 eLOC 13 lLOC 11 Comment 11 Lines 17 - - Function: QS_str_ - Parameters: (char_t const *s) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 20 eLOC 18 lLOC 14 Comment 16 Lines 22 - - Function: QS_getByte - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 - LOC 18 eLOC 14 lLOC 10 Comment 20 Lines 18 - - Function: QS_getBlock - Parameters: (uint16_t *pNbytes) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 4 - Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 - LOC 28 eLOC 22 lLOC 16 Comment 32 Lines 32 - - Function: QS_sig_dict - Parameters: (enum_t const sig, void const * const obj, char_t const *nam - e) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 14 eLOC 11 lLOC 9 Comment 3 Lines 15 - - Function: QS_obj_dict - Parameters: (void const * const obj, char_t const *name) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 13 eLOC 10 lLOC 8 Comment 3 Lines 14 - - Function: QS_fun_dict - Parameters: (void (* const fun)(void), char_t const *name) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 13 eLOC 11 lLOC 8 Comment 3 Lines 14 - - Function: QS_usr_dict - Parameters: (enum_t const rec, char_t const * const name) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 10 eLOC 8 lLOC 7 Comment 3 Lines 11 - - Function: QS_mem - Parameters: (uint8_t const *blk, uint8_t size) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 18 eLOC 16 lLOC 11 Comment 11 Lines 23 - - Function: QS_str - Parameters: (char_t const *s) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 21 eLOC 19 lLOC 14 Comment 16 Lines 24 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 451 eLOC 393 lLOC 266 Comment 345 Lines 760 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 22 - Total Function LOC.....: 438 Total Function Pts LOC : 3.5 - Total Function eLOC....: 380 Total Function Pts eLOC: 3.1 - Total Function lLOC....: 263 Total Function Pts lLOC: 2.1 - Total Function Params .: 31 Total Function Return .: 22 - Total Cyclo Complexity : 57 Total Function Complex.: 110 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 97 Average Function LOC ..: 19.91 - Max Function eLOC .....: 90 Average Function eLOC .: 17.27 - Max Function lLOC .....: 48 Average Function lLOC .: 11.95 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 1.41 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 2.41 - Max Cyclomatic Complex.: 15 Avg Cyclomatic Complex.: 2.59 - Max Total Complexity ..: 17 Avg Total Complexity ..: 5.00 - ________________________________________________________________________ - End of File: ..\source\qs.c - - - File: ..\source\qs_64bit.c - ________________________________________________________________________ - - Function: QS_u64_ - Parameters: (uint64_t d) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 15 eLOC 13 lLOC 11 Comment 7 Lines 17 - - Function: QS_u64 - Parameters: (uint8_t format, uint64_t d) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 16 eLOC 14 lLOC 11 Comment 9 Lines 20 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 35 eLOC 31 lLOC 22 Comment 57 Lines 94 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 2 - Total Function LOC.....: 31 Total Function Pts LOC : 0.3 - Total Function eLOC....: 27 Total Function Pts eLOC: 0.2 - Total Function lLOC....: 22 Total Function Pts lLOC: 0.2 - Total Function Params .: 3 Total Function Return .: 2 - Total Cyclo Complexity : 4 Total Function Complex.: 9 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 16 Average Function LOC ..: 15.50 - Max Function eLOC .....: 14 Average Function eLOC .: 13.50 - Max Function lLOC .....: 11 Average Function lLOC .: 11.00 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 1.50 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 2.50 - Max Cyclomatic Complex.: 2 Avg Cyclomatic Complex.: 2.00 - Max Total Complexity ..: 5 Avg Total Complexity ..: 4.50 - ________________________________________________________________________ - End of File: ..\source\qs_64bit.c - - - File: ..\source\qs_fp.c - ________________________________________________________________________ - - Function: QS_f32 - Parameters: (uint8_t format, float32_t f) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 21 eLOC 19 lLOC 15 Comment 16 Lines 26 - - Function: QS_f64 - Parameters: (uint8_t format, float64_t d) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 2 - Conditional if / else if: 1 - Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 - LOC 38 eLOC 34 lLOC 26 Comment 17 Lines 49 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 61 eLOC 55 lLOC 41 Comment 73 Lines 129 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 2 - Total Function LOC.....: 59 Total Function Pts LOC : 0.5 - Total Function eLOC....: 53 Total Function Pts eLOC: 0.4 - Total Function lLOC....: 41 Total Function Pts lLOC: 0.3 - Total Function Params .: 4 Total Function Return .: 2 - Total Cyclo Complexity : 6 Total Function Complex.: 12 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 38 Average Function LOC ..: 29.50 - Max Function eLOC .....: 34 Average Function eLOC .: 26.50 - Max Function lLOC .....: 26 Average Function lLOC .: 20.50 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 2.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 3.00 - Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 3.00 - Max Total Complexity ..: 7 Avg Total Complexity ..: 6.00 - ________________________________________________________________________ - End of File: ..\source\qs_fp.c - - - File: ..\source\qs_rx.c - ________________________________________________________________________ - - Function: QS_rxInitBuf - Parameters: (uint8_t sto[], uint16_t stoSize) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 18 eLOC 17 lLOC 15 Comment 19 Lines 21 - - Function: QS_rxGetNfree - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 - LOC 14 eLOC 10 lLOC 5 Comment 9 Lines 14 - - Function: QS_rxParse - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Conditional if / else if: 5 - Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 - LOC 36 eLOC 26 lLOC 16 Comment 5 Lines 41 - - Function: QS_rxParseData_ - Parameters: (uint8_t b) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Selection case : 40 - Conditional if / else if: 16 - Complexity Param 1 Return 1 Cyclo Vg 57 Total 59 - LOC 254 eLOC 197 lLOC 125 Comment 18 Lines 265 - - Function: QS_rxHandleGoodFrame_ - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 3 - Selection case : 17 - Conditional if / else if: 4 - Complexity Param 0 Return 1 Cyclo Vg 25 Total 26 - LOC 127 eLOC 103 lLOC 69 Comment 15 Lines 137 - - Function: QS_rxHandleBadFrame_ - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Selection case : 1 - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 12 eLOC 8 lLOC 4 Comment 1 Lines 12 - - Function: QS_rxReportSuccess_ - Parameters: (enum QSpyRxRecords recId) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 7 eLOC 6 lLOC 2 Comment 3 Lines 7 - - Function: QS_rxReportError_ - Parameters: (uint8_t stateId) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 7 eLOC 6 lLOC 2 Comment 3 Lines 7 - - Function: QS_rxAddr_ - Parameters: (uint8_t b, QSAddr *addr, uint8_t *idx) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Inlined if-else ( ? : ) : 1 - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 590 eLOC 486 lLOC 299 Comment 131 Lines 731 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 9 - Total Function LOC.....: 480 Total Function Pts LOC : 4.6 - Total Function eLOC....: 377 Total Function Pts eLOC: 3.8 - Total Function lLOC....: 241 Total Function Pts lLOC: 2.3 - Total Function Params .: 8 Total Function Return .: 9 - Total Cyclo Complexity : 99 Total Function Complex.: 116 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 254 Average Function LOC ..: 53.33 - Max Function eLOC .....: 197 Average Function eLOC .: 41.89 - Max Function lLOC .....: 125 Average Function lLOC .: 26.78 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 0.89 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 1.89 - Max Cyclomatic Complex.: 57 Avg Cyclomatic Complex.: 11.00 - Max Total Complexity ..: 59 Avg Total Complexity ..: 12.89 - ________________________________________________________________________ - End of File: ..\source\qs_rx.c - - - File: ..\source\qv.c - ________________________________________________________________________ - - Function: QF_init - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 12 eLOC 11 lLOC 8 Comment 16 Lines 18 - - Function: QF_stop - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 - - Function: QF_run - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Conditional if / else if: 3 - Complexity Param 0 Return 1 Cyclo Vg 5 Total 6 - LOC 48 eLOC 42 lLOC 24 Comment 45 Lines 75 - - Function: QActive_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Logical and ( && ) : 2 - Complexity Param 7 Return 1 Cyclo Vg 3 Total 11 - LOC 11 eLOC 9 lLOC 7 Comment 31 Lines 17 - - Function: QActive_stop - Parameters: (QActive * const me) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 3 eLOC 2 lLOC 1 Comment 13 Lines 3 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 95 eLOC 84 lLOC 42 Comment 171 Lines 259 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 5 - Total Function LOC.....: 77 Total Function Pts LOC : 0.7 - Total Function eLOC....: 66 Total Function Pts eLOC: 0.7 - Total Function lLOC....: 41 Total Function Pts lLOC: 0.3 - Total Function Params .: 8 Total Function Return .: 5 - Total Cyclo Complexity : 11 Total Function Complex.: 24 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 48 Average Function LOC ..: 15.40 - Max Function eLOC .....: 42 Average Function eLOC .: 13.20 - Max Function lLOC .....: 24 Average Function lLOC .: 8.20 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 7 Avg Function Parameters: 1.60 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 8 Avg Interface Complex. : 2.60 - Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 2.20 - Max Total Complexity ..: 11 Avg Total Complexity ..: 4.80 - ________________________________________________________________________ - End of File: ..\source\qv.c - - - File: ..\source\qxk.c - ________________________________________________________________________ - - Function: QF_init - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 16 eLOC 15 lLOC 12 Comment 16 Lines 22 - - Function: QF_stop - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 - - Function: initial_events - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 - - Function: QF_run - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops for / foreach : 1 - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 12 eLOC 10 lLOC 7 Comment 13 Lines 15 - - Function: QActive_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Logical and ( && ) : 6 - Complexity Param 7 Return 1 Cyclo Vg 8 Total 16 - LOC 23 eLOC 20 lLOC 12 Comment 32 Lines 28 - - Function: QActive_stop - Parameters: (QActive * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 - - Function: QXK_sched_ - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 5 - Complexity Param 0 Return 1 Cyclo Vg 6 Total 7 - LOC 50 eLOC 40 lLOC 22 Comment 33 Lines 67 - - Function: QXK_activate_ - Parameters: (void) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Loops while / do : 1 - Conditional if / else if: 6 - Complexity Param 0 Return 1 Cyclo Vg 8 Total 9 - LOC 75 eLOC 65 lLOC 36 Comment 54 Lines 104 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 216 eLOC 185 lLOC 101 Comment 233 Lines 430 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 8 - Total Function LOC.....: 196 Total Function Pts LOC : 1.7 - Total Function eLOC....: 165 Total Function Pts eLOC: 1.4 - Total Function lLOC....: 98 Total Function Pts lLOC: 0.8 - Total Function Params .: 8 Total Function Return .: 8 - Total Cyclo Complexity : 30 Total Function Complex.: 46 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 75 Average Function LOC ..: 24.50 - Max Function eLOC .....: 65 Average Function eLOC .: 20.63 - Max Function lLOC .....: 36 Average Function lLOC .: 12.25 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 7 Avg Function Parameters: 1.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 8 Avg Interface Complex. : 2.00 - Max Cyclomatic Complex.: 8 Avg Cyclomatic Complex.: 3.75 - Max Total Complexity ..: 16 Avg Total Complexity ..: 5.75 - ________________________________________________________________________ - End of File: ..\source\qxk.c - - - File: ..\source\qxk_mutex.c - ________________________________________________________________________ - - Function: QXMutex_init - Parameters: (QXMutex * const me, uint_fast8_t prio) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 - - Function: QXMutex_lock - Parameters: (QXMutex * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Inlined if-else ( ? : ) : 1 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 21 eLOC 19 lLOC 9 Comment 36 Lines 29 - - Function: QXMutex_unlock - Parameters: (QXMutex * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 22 eLOC 19 lLOC 11 Comment 37 Lines 30 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 63 eLOC 56 lLOC 23 Comment 139 Lines 195 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 3 - Total Function LOC.....: 47 Total Function Pts LOC : 0.5 - Total Function eLOC....: 41 Total Function Pts eLOC: 0.4 - Total Function lLOC....: 22 Total Function Pts lLOC: 0.2 - Total Function Params .: 4 Total Function Return .: 3 - Total Cyclo Complexity : 9 Total Function Complex.: 16 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 22 Average Function LOC ..: 15.67 - Max Function eLOC .....: 19 Average Function eLOC .: 13.67 - Max Function lLOC .....: 11 Average Function lLOC .: 7.33 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 2 Avg Function Parameters: 1.33 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 3 Avg Interface Complex. : 2.33 - Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 3.00 - Max Total Complexity ..: 6 Avg Total Complexity ..: 5.33 - ________________________________________________________________________ - End of File: ..\source\qxk_mutex.c - - - File: ..\source\qxk_sema.c - ________________________________________________________________________ - - Function: QXSemaphore_init - Parameters: (QXSemaphore * const me, uint_fast16_t count) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 4 eLOC 3 lLOC 2 Comment 16 Lines 4 - - Function: QXSemaphore_wait - Parameters: (QXSemaphore * const me, uint_fast16_t const nTicks, uint_fa - st8_t const tickRate) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Logical and ( && ) : 2 - Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 - LOC 27 eLOC 23 lLOC 18 Comment 34 Lines 35 - - Function: QXSemaphore_signal - Parameters: (QXSemaphore * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 23 eLOC 19 lLOC 12 Comment 21 Lines 30 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 69 eLOC 60 lLOC 32 Comment 120 Lines 187 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 3 - Total Function LOC.....: 54 Total Function Pts LOC : 0.5 - Total Function eLOC....: 45 Total Function Pts eLOC: 0.5 - Total Function lLOC....: 32 Total Function Pts lLOC: 0.3 - Total Function Params .: 6 Total Function Return .: 3 - Total Cyclo Complexity : 9 Total Function Complex.: 18 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 27 Average Function LOC ..: 18.00 - Max Function eLOC .....: 23 Average Function eLOC .: 15.00 - Max Function lLOC .....: 18 Average Function lLOC .: 10.67 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 3 Avg Function Parameters: 2.00 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 4 Avg Interface Complex. : 3.00 - Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 3.00 - Max Total Complexity ..: 8 Avg Total Complexity ..: 6.00 - ________________________________________________________________________ - End of File: ..\source\qxk_sema.c - - - File: ..\source\qxk_xthr.c - ________________________________________________________________________ - - Function: QXThread_ctor - Parameters: (QXThread * const me, QXThreadHandler handler, uint_fast8_t - tickRate) - Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 - LOC 13 eLOC 10 lLOC 5 Comment 24 Lines 16 - - Function: QXThread_init_ - Parameters: (QMsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 2 Lines 5 - - Function: QXThread_dispatch_ - Parameters: (QMsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - Function: QXThread_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Logical and ( && ) : 4 - Complexity Param 7 Return 1 Cyclo Vg 6 Total 14 - LOC 20 eLOC 17 lLOC 11 Comment 35 Lines 36 - - Function: QXThread_post_ - Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con - st margin) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 9 - Complexity Param 3 Return 1 Cyclo Vg 10 Total 14 - LOC 77 eLOC 63 lLOC 45 Comment 76 Lines 110 - - Function: QXThread_postLIFO_ - Parameters: (QActive * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 10 Lines 5 - - Function: QXThread_queueGet - Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 4 - Logical and ( && ) : 2 - Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 - LOC 58 eLOC 50 lLOC 35 Comment 50 Lines 78 - - Function: QXThread_block_ - Parameters: (QXThread const * const me) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 - - Function: QXThread_unblock_ - Parameters: (QXThread const * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Logical and ( && ) : 1 - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 8 eLOC 5 lLOC 2 Comment 10 Lines 8 - - Function: QXThread_teArm_ - Parameters: (QXThread * const me, QSignal sig, uint_fast16_t const nTick - s, uint_fast8_t const tickRate) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 2 - Complexity Param 4 Return 1 Cyclo Vg 3 Total 8 - LOC 13 eLOC 9 lLOC 7 Comment 23 Lines 30 - - Function: QXThread_teDisarm_ - Parameters: (QXThread * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 11 eLOC 8 lLOC 5 Comment 11 Lines 13 - - Function: QXThread_delay - Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 18 eLOC 17 lLOC 14 Comment 10 Lines 29 - - Function: QXThread_delayCancel - Parameters: (QXThread * const me) - Cyclomatic Complexity Vg Detail - Function Base : 1 - Conditional if / else if: 1 - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 14 eLOC 11 lLOC 7 Comment 2 Lines 16 - - Function: QXK_threadRet_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 - - ------------------------------------------------------------------------ - - ~~ Total File Summary ~~ - - LOC 308 eLOC 261 lLOC 156 Comment 325 Lines 629 - ------------------------------------------------------------------------ - - ~~ File Functional Summary ~~ - - File Function Count....: 14 - Total Function LOC.....: 262 Total Function Pts LOC : 2.4 - Total Function eLOC....: 215 Total Function Pts eLOC: 2.0 - Total Function lLOC....: 150 Total Function Pts lLOC: 1.2 - Total Function Params .: 31 Total Function Return .: 14 - Total Cyclo Complexity : 40 Total Function Complex.: 85 - ------ ----- ----- ------ ------ ----- - Max Function LOC ......: 77 Average Function LOC ..: 18.71 - Max Function eLOC .....: 63 Average Function eLOC .: 15.36 - Max Function lLOC .....: 45 Average Function lLOC .: 10.71 - ------ ----- ----- ------ ------ ----- - Max Function Parameters: 7 Avg Function Parameters: 2.21 - Max Function Returns ..: 1 Avg Function Returns ..: 1.00 - Max Interface Complex. : 8 Avg Interface Complex. : 3.21 - Max Cyclomatic Complex.: 10 Avg Cyclomatic Complex.: 2.86 - Max Total Complexity ..: 14 Avg Total Complexity ..: 6.07 - ________________________________________________________________________ - End of File: ..\source\qxk_xthr.c - - - ------------------------------------------------------------------------ - - ~~ Project Analysis For 40 Files ~~ - - ------------------------------------------------------------------------ - - ~~ Total Project Summary ~~ - - LOC 5352 eLOC 4779 lLOC 2329 Comment 7367 Lines 12860 - Average per File, metric/40 files - LOC 133 eLOC 119 lLOC 58 Comment 184 Lines 321 - - ------------------------------------------------------------------------ - - ~~ Project Functional Metrics ~~ - - Function: QF_LOG2 - Parameters: (uint32_t x) - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 25 eLOC 18 lLOC 11 Comment 7 Lines 26 - - Function: QHsm_ctor - Parameters: (QHsm * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 9 eLOC 7 lLOC 4 Comment 21 Lines 9 - - Function: QHsm_init_ - Parameters: (QHsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 - LOC 50 eLOC 47 lLOC 31 Comment 34 Lines 70 - - Function: QHsm_top - Parameters: (void const * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 18 Lines 5 - - Function: QHsm_dispatch_ - Parameters: (QHsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 13 Total 16 - LOC 106 eLOC 95 lLOC 62 Comment 67 Lines 147 - - Function: QHsm_tran_ - Parameters: (QHsm * const me, QStateHandler path[QHSM_MAX_NEST_DEPTH_]) - Complexity Param 2 Return 1 Cyclo Vg 15 Total 18 - LOC 97 eLOC 76 lLOC 48 Comment 62 Lines 134 - - Function: QHsm_isIn - Parameters: (QHsm * const me, QStateHandler const state) - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 16 eLOC 13 lLOC 9 Comment 21 Lines 21 - - Function: QHsm_childState_ - Parameters: (QHsm * const me, QStateHandler const parent) - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 19 eLOC 15 lLOC 12 Comment 30 Lines 25 - - Function: QMsm_ctor - Parameters: (QMsm * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 9 eLOC 7 lLOC 4 Comment 28 Lines 10 - - Function: QMsm_init_ - Parameters: (QMsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 - LOC 23 eLOC 22 lLOC 13 Comment 25 Lines 37 - - Function: QMsm_dispatch_ - Parameters: (QMsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 16 Total 19 - LOC 114 eLOC 97 lLOC 59 Comment 75 Lines 156 - - Function: QMsm_execTatbl_ - Parameters: (QMsm * const me, QMTranActTable const *tatbl) - Complexity Param 2 Return 1 Cyclo Vg 8 Total 11 - LOC 53 eLOC 43 lLOC 21 Comment 33 Lines 64 - - Function: QMsm_exitToTranSource_ - Parameters: (QMsm * const me, QMState const *s, QMState const *ts) - Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 - LOC 17 eLOC 12 lLOC 6 Comment 20 Lines 23 - - Function: QMsm_enterHistory_ - Parameters: (QMsm * const me, QMState const * const hist) - Complexity Param 2 Return 1 Cyclo Vg 6 Total 9 - LOC 40 eLOC 33 lLOC 21 Comment 24 Lines 48 - - Function: QMsm_isInState - Parameters: (QMsm const * const me, QMState const * const state) - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 11 eLOC 8 lLOC 6 Comment 16 Lines 12 - - Function: QMsm_childStateObj_ - Parameters: (QMsm const * const me, QMState const * const parent) - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 19 eLOC 13 lLOC 9 Comment 20 Lines 23 - - Function: QF_add_ - Parameters: (QActive * const a) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 15 eLOC 14 lLOC 8 Comment 23 Lines 25 - - Function: QF_remove_ - Parameters: (QActive * const a) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 16 eLOC 15 lLOC 9 Comment 23 Lines 25 - - Function: QF_bzero - Parameters: (void * const start, uint_fast16_t len) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 8 eLOC 6 lLOC 4 Comment 14 Lines 8 - - Function: QF_LOG2 - Parameters: (uint32_t x) - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 25 eLOC 18 lLOC 11 Comment 1 Lines 26 - - Function: QActive_post_ - Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con - st margin) - Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 - LOC 56 eLOC 47 lLOC 35 Comment 79 Lines 77 - - Function: QActive_postLIFO_ - Parameters: (QActive * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 37 eLOC 31 lLOC 22 Comment 36 Lines 50 - - Function: QActive_get_ - Parameters: (QActive * const me) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 36 eLOC 32 lLOC 23 Comment 32 Lines 46 - - Function: QF_getQueueMin - Parameters: (uint_fast8_t const prio) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 10 eLOC 9 lLOC 6 Comment 18 Lines 13 - - Function: QTicker_ctor - Parameters: (QTicker * const me, uint8_t tickRate) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 12 eLOC 10 lLOC 4 Comment 6 Lines 14 - - Function: QTicker_init_ - Parameters: (QHsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - Function: QTicker_dispatch_ - Parameters: (QHsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 12 eLOC 10 lLOC 8 Comment 4 Lines 15 - - Function: QTicker_post_ - Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con - st margin) - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 24 eLOC 21 lLOC 17 Comment 15 Lines 32 - - Function: QTicker_postLIFO_ - Parameters: (QActive * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - Function: QActive_defer - Parameters: (QActive const * const me, QEQueue * const eq, QEvt const * - const e) - Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 - LOC 4 eLOC 2 lLOC 2 Comment 24 Lines 5 - - Function: QActive_recall - Parameters: (QActive * const me, QEQueue * const eq) - Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 - LOC 19 eLOC 15 lLOC 10 Comment 33 Lines 36 - - Function: QActive_flushDeferred - Parameters: (QActive const * const me, QEQueue * const eq) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 10 eLOC 7 lLOC 7 Comment 17 Lines 12 - - Function: QEvt_ctor - Parameters: (QEvt * const me, enum_t const sig) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 - - Function: QF_poolInit - Parameters: (void * const poolSto, uint_fast32_t const poolSize, uint_fa - st16_t const evtSize) - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 9 eLOC 7 lLOC 4 Comment 38 Lines 13 - - Function: QF_newX_ - Parameters: (uint_fast16_t const evtSize, uint_fast16_t const margin, en - um_t const sig) - Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 - LOC 26 eLOC 20 lLOC 14 Comment 35 Lines 35 - - Function: QF_gc - Parameters: (QEvt const * const e) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 26 eLOC 22 lLOC 13 Comment 35 Lines 39 - - Function: QF_newRef_ - Parameters: (QEvt const * const e, QEvt const * const evtRef) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 10 eLOC 8 lLOC 5 Comment 16 Lines 15 - - Function: QF_poolGetMaxBlockSize - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 5 Lines 3 - - Function: QMPool_init - Parameters: (QMPool * const me, void * const poolSto, uint_fast32_t pool - Size, uint_fast16_t blockSize) - Complexity Param 4 Return 1 Cyclo Vg 5 Total 10 - LOC 36 eLOC 32 lLOC 24 Comment 58 Lines 52 - - Function: QMPool_put - Parameters: (QMPool * const me, void *b) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 15 eLOC 14 lLOC 9 Comment 29 Lines 22 - - Function: QMPool_get - Parameters: (QMPool * const me, uint_fast16_t const margin) - Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 - LOC 41 eLOC 35 lLOC 23 Comment 54 Lines 65 - - Function: QF_getPoolMin - Parameters: (uint_fast8_t const poolId) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 10 eLOC 9 lLOC 6 Comment 13 Lines 14 - - Function: QF_psInit - Parameters: (QSubscrList * const subscrSto, enum_t const maxSignal) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 7 eLOC 6 lLOC 3 Comment 32 Lines 12 - - Function: QF_publish_ - Parameters: (QEvt const * const e) - Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 - LOC 36 eLOC 30 lLOC 21 Comment 50 Lines 63 - - Function: QActive_subscribe - Parameters: (QActive const * const me, enum_t const sig) - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 16 eLOC 15 lLOC 8 Comment 22 Lines 22 - - Function: QActive_unsubscribe - Parameters: (QActive const * const me, enum_t const sig) - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 16 eLOC 15 lLOC 8 Comment 29 Lines 25 - - Function: QActive_unsubscribeAll - Parameters: (QActive const * const me) - Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 - LOC 21 eLOC 18 lLOC 10 Comment 24 Lines 24 - - Function: QActive_ctor - Parameters: (QActive * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 12 eLOC 10 lLOC 4 Comment 19 Lines 17 - - Function: QEQueue_init - Parameters: (QEQueue * const me, QEvt const *qSto[], uint_fast16_t const - qLen) - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 16 eLOC 13 lLOC 9 Comment 22 Lines 18 - - Function: QEQueue_post - Parameters: (QEQueue * const me, QEvt const * const e, uint_fast16_t con - st margin) - Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 - LOC 51 eLOC 42 lLOC 30 Comment 55 Lines 72 - - Function: QEQueue_postLIFO - Parameters: (QEQueue * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 - LOC 34 eLOC 29 lLOC 21 Comment 41 Lines 44 - - Function: QEQueue_get - Parameters: (QEQueue * const me) - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 36 eLOC 31 lLOC 21 Comment 35 Lines 46 - - Function: QMActive_ctor - Parameters: (QMActive * const me, QStateHandler initial) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 12 eLOC 10 lLOC 4 Comment 28 Lines 28 - - Function: QF_tickX_ - Parameters: (uint_fast8_t const tickRate) - Complexity Param 1 Return 1 Cyclo Vg 7 Total 9 - LOC 65 eLOC 53 lLOC 36 Comment 53 Lines 93 - - Function: QF_noTimeEvtsActiveX - Parameters: (uint_fast8_t const tickRate) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 14 eLOC 10 lLOC 6 Comment 13 Lines 17 - - Function: QTimeEvt_ctorX - Parameters: (QTimeEvt * const me, QActive * const act, enum_t const sig, - uint_fast8_t tickRate) - Complexity Param 4 Return 1 Cyclo Vg 2 Total 7 - LOC 11 eLOC 9 lLOC 8 Comment 32 Lines 31 - - Function: QTimeEvt_armX - Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks, QTimeEvtCtr - const interval) - Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 - LOC 28 eLOC 25 lLOC 16 Comment 49 Lines 50 - - Function: QTimeEvt_disarm - Parameters: (QTimeEvt * const me) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 29 eLOC 26 lLOC 17 Comment 30 Lines 37 - - Function: QTimeEvt_rearm - Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks) - Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 - LOC 34 eLOC 30 lLOC 18 Comment 47 Lines 60 - - Function: QTimeEvt_ctr - Parameters: (QTimeEvt const * const me) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 16 eLOC 15 lLOC 11 Comment 20 Lines 19 - - Function: QF_init - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 14 eLOC 13 lLOC 10 Comment 18 Lines 21 - - Function: QF_stop - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 - - Function: initial_events - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 - - Function: QF_run - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 12 eLOC 10 lLOC 7 Comment 12 Lines 15 - - Function: QActive_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Complexity Param 7 Return 1 Cyclo Vg 5 Total 13 - LOC 19 eLOC 16 lLOC 11 Comment 29 Lines 24 - - Function: QActive_stop - Parameters: (QActive * const me) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 - - Function: QK_sched_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 - LOC 15 eLOC 11 lLOC 7 Comment 21 Lines 19 - - Function: QK_activate_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 - LOC 60 eLOC 52 lLOC 29 Comment 48 Lines 86 - - Function: QMutex_init - Parameters: (QMutex * const me, uint_fast8_t prio) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 - - Function: QMutex_lock - Parameters: (QMutex * const me) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 16 eLOC 14 lLOC 7 Comment 28 Lines 23 - - Function: QMutex_unlock - Parameters: (QMutex * const me) - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 21 eLOC 18 lLOC 10 Comment 28 Lines 28 - - Function: QS_initBuf - Parameters: (uint8_t sto[], uint_fast16_t stoSize) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 21 eLOC 20 lLOC 19 Comment 30 Lines 35 - - Function: QS_filterOn - Parameters: (uint_fast8_t rec) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 17 eLOC 12 lLOC 6 Comment 16 Lines 19 - - Function: QS_filterOff - Parameters: (uint_fast8_t rec) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 20 eLOC 15 lLOC 10 Comment 16 Lines 25 - - Function: QS_beginRec - Parameters: (uint_fast8_t rec) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 14 eLOC 13 lLOC 10 Comment 18 Lines 18 - - Function: QS_endRec - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 4 Total 5 - LOC 22 eLOC 18 lLOC 10 Comment 17 Lines 28 - - Function: QS_target_info_ - Parameters: (uint8_t isReset) - Complexity Param 1 Return 1 Cyclo Vg 15 Total 17 - LOC 97 eLOC 90 lLOC 48 Comment 10 Lines 111 - - Function: QS_u8 - Parameters: (uint8_t format, uint8_t d) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 11 eLOC 10 lLOC 7 Comment 13 Lines 14 - - Function: QS_u16 - Parameters: (uint8_t format, uint16_t d) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 15 eLOC 14 lLOC 10 Comment 13 Lines 20 - - Function: QS_u32 - Parameters: (uint8_t format, uint32_t d) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 16 eLOC 14 lLOC 11 Comment 14 Lines 20 - - Function: QS_u8_ - Parameters: (uint8_t d) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 - - Function: QS_u8u8_ - Parameters: (uint8_t d1, uint8_t d2) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 11 eLOC 10 lLOC 7 Comment 11 Lines 13 - - Function: QS_u16_ - Parameters: (uint16_t d) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 14 eLOC 13 lLOC 10 Comment 12 Lines 18 - - Function: QS_u32_ - Parameters: (uint32_t d) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 15 eLOC 13 lLOC 11 Comment 11 Lines 17 - - Function: QS_str_ - Parameters: (char_t const *s) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 20 eLOC 18 lLOC 14 Comment 16 Lines 22 - - Function: QS_getByte - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 - LOC 18 eLOC 14 lLOC 10 Comment 20 Lines 18 - - Function: QS_getBlock - Parameters: (uint16_t *pNbytes) - Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 - LOC 28 eLOC 22 lLOC 16 Comment 32 Lines 32 - - Function: QS_sig_dict - Parameters: (enum_t const sig, void const * const obj, char_t const *nam - e) - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 14 eLOC 11 lLOC 9 Comment 3 Lines 15 - - Function: QS_obj_dict - Parameters: (void const * const obj, char_t const *name) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 13 eLOC 10 lLOC 8 Comment 3 Lines 14 - - Function: QS_fun_dict - Parameters: (void (* const fun)(void), char_t const *name) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 13 eLOC 11 lLOC 8 Comment 3 Lines 14 - - Function: QS_usr_dict - Parameters: (enum_t const rec, char_t const * const name) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 10 eLOC 8 lLOC 7 Comment 3 Lines 11 - - Function: QS_mem - Parameters: (uint8_t const *blk, uint8_t size) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 18 eLOC 16 lLOC 11 Comment 11 Lines 23 - - Function: QS_str - Parameters: (char_t const *s) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 21 eLOC 19 lLOC 14 Comment 16 Lines 24 - - Function: QS_u64_ - Parameters: (uint64_t d) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 15 eLOC 13 lLOC 11 Comment 7 Lines 17 - - Function: QS_u64 - Parameters: (uint8_t format, uint64_t d) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 16 eLOC 14 lLOC 11 Comment 9 Lines 20 - - Function: QS_f32 - Parameters: (uint8_t format, float32_t f) - Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 - LOC 21 eLOC 19 lLOC 15 Comment 16 Lines 26 - - Function: QS_f64 - Parameters: (uint8_t format, float64_t d) - Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 - LOC 38 eLOC 34 lLOC 26 Comment 17 Lines 49 - - Function: QS_rxInitBuf - Parameters: (uint8_t sto[], uint16_t stoSize) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 18 eLOC 17 lLOC 15 Comment 19 Lines 21 - - Function: QS_rxGetNfree - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 - LOC 14 eLOC 10 lLOC 5 Comment 9 Lines 14 - - Function: QS_rxParse - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 - LOC 36 eLOC 26 lLOC 16 Comment 5 Lines 41 - - Function: QS_rxParseData_ - Parameters: (uint8_t b) - Complexity Param 1 Return 1 Cyclo Vg 57 Total 59 - LOC 254 eLOC 197 lLOC 125 Comment 18 Lines 265 - - Function: QS_rxHandleGoodFrame_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 25 Total 26 - LOC 127 eLOC 103 lLOC 69 Comment 15 Lines 137 - - Function: QS_rxHandleBadFrame_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 12 eLOC 8 lLOC 4 Comment 1 Lines 12 - - Function: QS_rxReportSuccess_ - Parameters: (enum QSpyRxRecords recId) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 7 eLOC 6 lLOC 2 Comment 3 Lines 7 - - Function: QS_rxReportError_ - Parameters: (uint8_t stateId) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 7 eLOC 6 lLOC 2 Comment 3 Lines 7 - - Function: QS_rxAddr_ - Parameters: (uint8_t b, QSAddr *addr, uint8_t *idx) - Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - Function: QF_init - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 12 eLOC 11 lLOC 8 Comment 16 Lines 18 - - Function: QF_stop - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 - - Function: QF_run - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 5 Total 6 - LOC 48 eLOC 42 lLOC 24 Comment 45 Lines 75 - - Function: QActive_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Complexity Param 7 Return 1 Cyclo Vg 3 Total 11 - LOC 11 eLOC 9 lLOC 7 Comment 31 Lines 17 - - Function: QActive_stop - Parameters: (QActive * const me) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 3 eLOC 2 lLOC 1 Comment 13 Lines 3 - - Function: QF_init - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 16 eLOC 15 lLOC 12 Comment 16 Lines 22 - - Function: QF_stop - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 - - Function: initial_events - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 - - Function: QF_run - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 - LOC 12 eLOC 10 lLOC 7 Comment 13 Lines 15 - - Function: QActive_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Complexity Param 7 Return 1 Cyclo Vg 8 Total 16 - LOC 23 eLOC 20 lLOC 12 Comment 32 Lines 28 - - Function: QActive_stop - Parameters: (QActive * const me) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 - - Function: QXK_sched_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 6 Total 7 - LOC 50 eLOC 40 lLOC 22 Comment 33 Lines 67 - - Function: QXK_activate_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 8 Total 9 - LOC 75 eLOC 65 lLOC 36 Comment 54 Lines 104 - - Function: QXMutex_init - Parameters: (QXMutex * const me, uint_fast8_t prio) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 - - Function: QXMutex_lock - Parameters: (QXMutex * const me) - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 21 eLOC 19 lLOC 9 Comment 36 Lines 29 - - Function: QXMutex_unlock - Parameters: (QXMutex * const me) - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 22 eLOC 19 lLOC 11 Comment 37 Lines 30 - - Function: QXSemaphore_init - Parameters: (QXSemaphore * const me, uint_fast16_t count) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 4 eLOC 3 lLOC 2 Comment 16 Lines 4 - - Function: QXSemaphore_wait - Parameters: (QXSemaphore * const me, uint_fast16_t const nTicks, uint_fa - st8_t const tickRate) - Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 - LOC 27 eLOC 23 lLOC 18 Comment 34 Lines 35 - - Function: QXSemaphore_signal - Parameters: (QXSemaphore * const me) - Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 - LOC 23 eLOC 19 lLOC 12 Comment 21 Lines 30 - - Function: QXThread_ctor - Parameters: (QXThread * const me, QXThreadHandler handler, uint_fast8_t - tickRate) - Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 - LOC 13 eLOC 10 lLOC 5 Comment 24 Lines 16 - - Function: QXThread_init_ - Parameters: (QMsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 2 Lines 5 - - Function: QXThread_dispatch_ - Parameters: (QMsm * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 - - Function: QXThread_start_ - Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], - uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv - t const *ie) - Complexity Param 7 Return 1 Cyclo Vg 6 Total 14 - LOC 20 eLOC 17 lLOC 11 Comment 35 Lines 36 - - Function: QXThread_post_ - Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con - st margin) - Complexity Param 3 Return 1 Cyclo Vg 10 Total 14 - LOC 77 eLOC 63 lLOC 45 Comment 76 Lines 110 - - Function: QXThread_postLIFO_ - Parameters: (QActive * const me, QEvt const * const e) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 5 eLOC 4 lLOC 3 Comment 10 Lines 5 - - Function: QXThread_queueGet - Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) - Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 - LOC 58 eLOC 50 lLOC 35 Comment 50 Lines 78 - - Function: QXThread_block_ - Parameters: (QXThread const * const me) - Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 - LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 - - Function: QXThread_unblock_ - Parameters: (QXThread const * const me) - Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 - LOC 8 eLOC 5 lLOC 2 Comment 10 Lines 8 - - Function: QXThread_teArm_ - Parameters: (QXThread * const me, QSignal sig, uint_fast16_t const nTick - s, uint_fast8_t const tickRate) - Complexity Param 4 Return 1 Cyclo Vg 3 Total 8 - LOC 13 eLOC 9 lLOC 7 Comment 23 Lines 30 - - Function: QXThread_teDisarm_ - Parameters: (QXThread * const me) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 11 eLOC 8 lLOC 5 Comment 11 Lines 13 - - Function: QXThread_delay - Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) - Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 - LOC 18 eLOC 17 lLOC 14 Comment 10 Lines 29 - - Function: QXThread_delayCancel - Parameters: (QXThread * const me) - Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 - LOC 14 eLOC 11 lLOC 7 Comment 2 Lines 16 - - Function: QXK_threadRet_ - Parameters: (void) - Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 - LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 - - Total: Functions - LOC 3367 eLOC 2816 lLOC 1846 InCmp 370 CycloCmp 523 - Function Points FP(LOC) 26.1 FP(eLOC) 21.9 FP(lLOC) 14.3 - - ------------------------------------------------------------------------ - - ~~ Project Functional Analysis ~~ - - Total Functions .......: 139 Total Physical Lines ..: 4418 - Total LOC .............: 3367 Total Function Pts LOC : 26.1 - Total eLOC ............: 2816 Total Function Pts eLOC: 21.9 - Total lLOC.............: 1846 Total Function Pts lLOC: 14.3 - Total Cyclomatic Comp. : 523 Total Interface Comp. .: 370 - Total Parameters ......: 231 Total Return Points ...: 139 - Total Comment Lines ...: 3114 Total Blank Lines .....: 576 - ------ ----- ----- ------ ------ ----- - Avg Physical Lines ....: 31.78 - Avg LOC ...............: 24.22 Avg eLOC ..............: 20.26 - Avg lLOC ..............: 13.28 Avg Cyclomatic Comp. ..: 3.76 - Avg Interface Comp. ...: 2.66 Avg Parameters ........: 1.66 - Avg Return Points .....: 1.00 Avg Comment Lines .....: 22.40 - ------ ----- ----- ------ ------ ----- - Max LOC ...............: 254 - Max eLOC ..............: 197 Max lLOC ..............: 125 - Max Cyclomatic Comp. ..: 57 Max Interface Comp. ...: 8 - Max Parameters ........: 7 Max Return Points .....: 1 - Max Comment Lines .....: 79 Max Total Lines .......: 265 - ------ ----- ----- ------ ------ ----- - Min LOC ...............: 3 - Min eLOC ..............: 2 Min lLOC ..............: 1 - Min Cyclomatic Comp. ..: 1 Min Interface Comp. ...: 1 - Min Parameters ........: 0 Min Return Points .....: 1 - Min Comment Lines .....: 1 Min Total Lines .......: 3 - - ------------------------------------------------------------------------ - - ~~ File Summary ~~ - - C Source Files *.c ....: 23 C/C++ Include Files *.h: 17 - C++ Source Files *.c* .: 0 C++ Include Files *.h* : 0 - C# Source Files *.cs ..: 0 Java Source File *.jav*: 0 - Other File Count ......: 0 Total File Count ......: 40 - ________________________________________________________________________ - -@endcode -*/ +/** @page metrics Code Metrics + +@code + Standard Code Metrics for QP/C 5.9.0 + + Resource Standard Metrics (TM) for C, C++, C# and Java + Version 7.75 - mSquaredTechnologies.com + + License Type: Windows Single User License + Licensed To : Quantum Leaps, LLC + License No. : WS2975 License Date: Dec 15, 2013 + Build Date : Sep 2 2009 Run Date: May 10, 2017 + (C)1996-2009 M Squared Technologies LLC + ________________________________________________________________________ + + ~~ Function Metrics ~~ + ~~ Complexity Detail Analysis ~~ + + File: ..\include\qassert.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 43 eLOC 42 lLOC 3 Comment 240 Lines 303 + ________________________________________________________________________ + End of File: ..\include\qassert.h + + + File: ..\include\qep.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 156 eLOC 152 lLOC 56 Comment 404 Lines 613 + ________________________________________________________________________ + End of File: ..\include\qep.h + + + File: ..\include\qequeue.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 33 eLOC 33 lLOC 15 Comment 180 Lines 233 + ________________________________________________________________________ + End of File: ..\include\qequeue.h + + + File: ..\include\qf.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 190 eLOC 190 lLOC 75 Comment 523 Lines 817 + ________________________________________________________________________ + End of File: ..\include\qf.h + + + File: ..\include\qk.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 64 eLOC 64 lLOC 24 Comment 105 Lines 177 + ________________________________________________________________________ + End of File: ..\include\qk.h + + + File: ..\include\qmpool.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 42 eLOC 42 lLOC 18 Comment 109 Lines 169 + ________________________________________________________________________ + End of File: ..\include\qmpool.h + + + File: ..\include\qp_port.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 4 eLOC 4 lLOC 0 Comment 40 Lines 45 + ________________________________________________________________________ + End of File: ..\include\qp_port.h + + + File: ..\include\qpc.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 66 eLOC 65 lLOC 8 Comment 125 Lines 223 + ________________________________________________________________________ + End of File: ..\include\qpc.h + + + File: ..\include\qpset.h + ________________________________________________________________________ + + Inline Function: QF_LOG2 + Parameters: (uint32_t x) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 3 + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 25 eLOC 18 lLOC 11 Comment 7 Lines 26 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 98 eLOC 91 lLOC 23 Comment 96 Lines 216 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 1 + Total Function LOC.....: 25 Total Function Pts LOC : 0.0 + Total Function eLOC....: 18 Total Function Pts eLOC: 0.0 + Total Function lLOC....: 11 Total Function Pts lLOC: 0.0 + Total Function Params .: 1 Total Function Return .: 1 + Total Cyclo Complexity : 4 Total Function Complex.: 6 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 25 Average Function LOC ..: 25.00 + Max Function eLOC .....: 18 Average Function eLOC .: 18.00 + Max Function lLOC .....: 11 Average Function lLOC .: 11.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 1 Avg Function Parameters: 1.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 2 Avg Interface Complex. : 2.00 + Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 4.00 + Max Total Complexity ..: 6 Avg Total Complexity ..: 6.00 + ________________________________________________________________________ + End of File: ..\include\qpset.h + + + File: ..\include\qs.h + ________________________________________________________________________ + + + NOTICE: The end of the source file has been reached where the + open brace count { 27 != 25 } close brace count + This is an indication of non-compilable code within the source + file. RSM processes all source code including code wrapped + with preprocessor directives. Accurate metrics requires that + all code present in this file must be compilable. + ~~ Total File Summary ~~ + + LOC 483 eLOC 475 lLOC 116 Comment 701 Lines 1196 + ________________________________________________________________________ + End of File: ..\include\qs.h + + + File: ..\include\qs_dummy.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 71 eLOC 71 lLOC 0 Comment 43 Lines 123 + ________________________________________________________________________ + End of File: ..\include\qs_dummy.h + + + File: ..\include\qv.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 25 eLOC 25 lLOC 2 Comment 80 Lines 111 + ________________________________________________________________________ + End of File: ..\include\qv.h + + + File: ..\include\qxk.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 67 eLOC 67 lLOC 26 Comment 112 Lines 186 + ________________________________________________________________________ + End of File: ..\include\qxk.h + + + File: ..\include\qxthread.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 31 eLOC 31 lLOC 15 Comment 132 Lines 176 + ________________________________________________________________________ + End of File: ..\include\qxthread.h + + + File: ..\source\qf_pkg.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 63 eLOC 63 lLOC 8 Comment 120 Lines 206 + ________________________________________________________________________ + End of File: ..\source\qf_pkg.h + + + File: ..\source\qs_pkg.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 25 eLOC 23 lLOC 6 Comment 59 Lines 93 + ________________________________________________________________________ + End of File: ..\source\qs_pkg.h + + + File: ..\source\qxk_pkg.h + ________________________________________________________________________ + + ~~ Total File Summary ~~ + + LOC 20 eLOC 19 lLOC 8 Comment 49 Lines 78 + ________________________________________________________________________ + End of File: ..\source\qxk_pkg.h + + + File: ..\source\qep_hsm.c + ________________________________________________________________________ + + Function: QHsm_ctor + Parameters: (QHsm * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 9 eLOC 7 lLOC 4 Comment 21 Lines 9 + + Function: QHsm_init_ + Parameters: (QHsm * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 3 + Conditional if / else if: 1 + Logical and ( && ) : 2 + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 50 eLOC 47 lLOC 31 Comment 35 Lines 70 + + Function: QHsm_top + Parameters: (void const * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 18 Lines 5 + + Function: QHsm_dispatch_ + Parameters: (QHsm * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 4 + Loops for / foreach : 2 + Conditional if / else if: 5 + Logical and ( && ) : 1 + Complexity Param 2 Return 1 Cyclo Vg 13 Total 16 + LOC 106 eLOC 95 lLOC 62 Comment 67 Lines 147 + + Function: QHsm_tran_ + Parameters: (QHsm * const me, QStateHandler path[QHSM_MAX_NEST_DEPTH_]) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 4 + Conditional if / else if: 10 + Complexity Param 2 Return 1 Cyclo Vg 15 Total 18 + LOC 97 eLOC 76 lLOC 48 Comment 63 Lines 134 + + Function: QHsm_isIn + Parameters: (QHsm * const me, QStateHandler const state) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 16 eLOC 13 lLOC 9 Comment 21 Lines 21 + + Function: QHsm_childState_ + Parameters: (QHsm * const me, QStateHandler const parent) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 19 eLOC 15 lLOC 12 Comment 30 Lines 25 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 345 eLOC 298 lLOC 177 Comment 317 Lines 628 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 7 + Total Function LOC.....: 302 Total Function Pts LOC : 2.7 + Total Function eLOC....: 257 Total Function Pts eLOC: 2.3 + Total Function lLOC....: 169 Total Function Pts lLOC: 1.4 + Total Function Params .: 14 Total Function Return .: 7 + Total Cyclo Complexity : 43 Total Function Complex.: 64 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 106 Average Function LOC ..: 43.14 + Max Function eLOC .....: 95 Average Function eLOC .: 36.71 + Max Function lLOC .....: 62 Average Function lLOC .: 24.14 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 2.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 3.00 + Max Cyclomatic Complex.: 15 Avg Cyclomatic Complex.: 6.14 + Max Total Complexity ..: 18 Avg Total Complexity ..: 9.14 + ________________________________________________________________________ + End of File: ..\source\qep_hsm.c + + + File: ..\source\qep_msm.c + ________________________________________________________________________ + + Function: QMsm_ctor + Parameters: (QMsm * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 9 eLOC 7 lLOC 4 Comment 28 Lines 10 + + Function: QMsm_init_ + Parameters: (QMsm * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Logical and ( && ) : 2 + Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 + LOC 23 eLOC 22 lLOC 13 Comment 25 Lines 37 + + Function: QMsm_dispatch_ + Parameters: (QMsm * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 2 + Conditional if / else if: 13 + Complexity Param 2 Return 1 Cyclo Vg 16 Total 19 + LOC 114 eLOC 97 lLOC 59 Comment 75 Lines 156 + + Function: QMsm_execTatbl_ + Parameters: (QMsm * const me, QMTranActTable const *tatbl) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 6 + Complexity Param 2 Return 1 Cyclo Vg 8 Total 11 + LOC 53 eLOC 43 lLOC 21 Comment 33 Lines 64 + + Function: QMsm_exitToTranSource_ + Parameters: (QMsm * const me, QMState const *s, QMState const *ts) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Conditional if / else if: 2 + Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 + LOC 17 eLOC 12 lLOC 6 Comment 20 Lines 23 + + Function: QMsm_enterHistory_ + Parameters: (QMsm * const me, QMState const *const hist) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 2 + Conditional if / else if: 3 + Complexity Param 2 Return 1 Cyclo Vg 6 Total 9 + LOC 40 eLOC 33 lLOC 21 Comment 24 Lines 48 + + Function: QMsm_isInState + Parameters: (QMsm const * const me, QMState const * const state) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 11 eLOC 8 lLOC 6 Comment 16 Lines 12 + + Function: QMsm_childStateObj_ + Parameters: (QMsm const * const me, QMState const * const parent) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 19 eLOC 13 lLOC 9 Comment 20 Lines 23 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 313 eLOC 260 lLOC 144 Comment 298 Lines 581 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 8 + Total Function LOC.....: 286 Total Function Pts LOC : 2.4 + Total Function eLOC....: 235 Total Function Pts eLOC: 2.0 + Total Function lLOC....: 139 Total Function Pts lLOC: 1.1 + Total Function Params .: 17 Total Function Return .: 8 + Total Cyclo Complexity : 45 Total Function Complex.: 70 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 114 Average Function LOC ..: 35.75 + Max Function eLOC .....: 97 Average Function eLOC .: 29.38 + Max Function lLOC .....: 59 Average Function lLOC .: 17.38 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 3 Avg Function Parameters: 2.13 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 4 Avg Interface Complex. : 3.13 + Max Cyclomatic Complex.: 16 Avg Cyclomatic Complex.: 5.63 + Max Total Complexity ..: 19 Avg Total Complexity ..: 8.75 + ________________________________________________________________________ + End of File: ..\source\qep_msm.c + + + File: ..\source\qf_act.c + ________________________________________________________________________ + + Function: QF_add_ + Parameters: (QActive * const a) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 2 + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 15 eLOC 14 lLOC 8 Comment 23 Lines 25 + + Function: QF_remove_ + Parameters: (QActive * const a) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 2 + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 16 eLOC 15 lLOC 9 Comment 23 Lines 25 + + Function: QF_bzero + Parameters: (void * const start, uint_fast16_t len) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 8 eLOC 6 lLOC 4 Comment 14 Lines 8 + + Inline Function: QF_LOG2 + Parameters: (uint32_t x) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 3 + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 25 eLOC 18 lLOC 11 Comment 1 Lines 26 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 148 eLOC 136 lLOC 35 Comment 123 Lines 276 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 4 + Total Function LOC.....: 64 Total Function Pts LOC : 1.2 + Total Function eLOC....: 53 Total Function Pts eLOC: 1.1 + Total Function lLOC....: 32 Total Function Pts lLOC: 0.3 + Total Function Params .: 5 Total Function Return .: 4 + Total Cyclo Complexity : 12 Total Function Complex.: 21 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 25 Average Function LOC ..: 16.00 + Max Function eLOC .....: 18 Average Function eLOC .: 13.25 + Max Function lLOC .....: 11 Average Function lLOC .: 8.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 1.25 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 2.25 + Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 3.00 + Max Total Complexity ..: 6 Avg Total Complexity ..: 5.25 + ________________________________________________________________________ + End of File: ..\source\qf_act.c + + + File: ..\source\qf_actq.c + ________________________________________________________________________ + + Function: QActive_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 5 + Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 + LOC 58 eLOC 49 lLOC 35 Comment 79 Lines 79 + + Function: QActive_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 4 + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 37 eLOC 31 lLOC 22 Comment 36 Lines 50 + + Function: QActive_get_ + Parameters: (QActive * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 37 eLOC 33 lLOC 23 Comment 32 Lines 47 + + Function: QF_getQueueMin + Parameters: (uint_fast8_t const prio) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 10 eLOC 9 lLOC 6 Comment 18 Lines 13 + + Function: QTicker_ctor + Parameters: (QTicker * const me, uint8_t tickRate) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 12 eLOC 10 lLOC 4 Comment 6 Lines 14 + + Function: QTicker_init_ + Parameters: (QHsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 + + Function: QTicker_dispatch_ + Parameters: (QHsm * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 12 eLOC 10 lLOC 8 Comment 4 Lines 15 + + Function: QTicker_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 24 eLOC 21 lLOC 17 Comment 15 Lines 32 + + Function: QTicker_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 236 eLOC 207 lLOC 126 Comment 254 Lines 453 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 9 + Total Function LOC.....: 200 Total Function Pts LOC : 1.8 + Total Function eLOC....: 171 Total Function Pts eLOC: 1.6 + Total Function lLOC....: 121 Total Function Pts lLOC: 1.0 + Total Function Params .: 18 Total Function Return .: 9 + Total Cyclo Complexity : 23 Total Function Complex.: 50 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 58 Average Function LOC ..: 22.22 + Max Function eLOC .....: 49 Average Function eLOC .: 19.00 + Max Function lLOC .....: 35 Average Function lLOC .: 13.44 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 3 Avg Function Parameters: 2.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 4 Avg Interface Complex. : 3.00 + Max Cyclomatic Complex.: 6 Avg Cyclomatic Complex.: 2.56 + Max Total Complexity ..: 10 Avg Total Complexity ..: 5.56 + ________________________________________________________________________ + End of File: ..\source\qf_actq.c + + + File: ..\source\qf_defer.c + ________________________________________________________________________ + + Function: QActive_defer + Parameters: (QActive const * const me, QEQueue * const eq, QEvt const * + const e) + Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 + LOC 4 eLOC 2 lLOC 2 Comment 24 Lines 5 + + Function: QActive_recall + Parameters: (QActive * const me, QEQueue * const eq) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 19 eLOC 15 lLOC 10 Comment 33 Lines 36 + + Function: QActive_flushDeferred + Parameters: (QActive const * const me, QEQueue * const eq) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 10 eLOC 7 lLOC 7 Comment 17 Lines 12 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 47 eLOC 38 lLOC 19 Comment 121 Lines 167 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 3 + Total Function LOC.....: 33 Total Function Pts LOC : 0.4 + Total Function eLOC....: 24 Total Function Pts eLOC: 0.3 + Total Function lLOC....: 19 Total Function Pts lLOC: 0.1 + Total Function Params .: 7 Total Function Return .: 3 + Total Cyclo Complexity : 6 Total Function Complex.: 16 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 19 Average Function LOC ..: 11.00 + Max Function eLOC .....: 15 Average Function eLOC .: 8.00 + Max Function lLOC .....: 10 Average Function lLOC .: 6.33 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 3 Avg Function Parameters: 2.33 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 4 Avg Interface Complex. : 3.33 + Max Cyclomatic Complex.: 3 Avg Cyclomatic Complex.: 2.00 + Max Total Complexity ..: 6 Avg Total Complexity ..: 5.33 + ________________________________________________________________________ + End of File: ..\source\qf_defer.c + + + File: ..\source\qf_dyn.c + ________________________________________________________________________ + + Function: QEvt_ctor + Parameters: (QEvt * const me, enum_t const sig) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 + + Function: QF_poolInit + Parameters: (void * const poolSto, uint_fast32_t const poolSize, uint_fa + st16_t const evtSize) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical or ( || ) : 1 + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 9 eLOC 7 lLOC 4 Comment 38 Lines 13 + + Function: QF_newX_ + Parameters: (uint_fast16_t const evtSize, uint_fast16_t const margin, en + um_t const sig) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 2 + Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 + LOC 26 eLOC 20 lLOC 14 Comment 35 Lines 35 + + Function: QF_gc + Parameters: (QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 26 eLOC 22 lLOC 13 Comment 35 Lines 39 + + Function: QF_newRef_ + Parameters: (QEvt const * const e, QEvt const * const evtRef) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 10 eLOC 8 lLOC 5 Comment 16 Lines 15 + + Function: QF_poolGetMaxBlockSize + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 5 Lines 3 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 97 eLOC 81 lLOC 42 Comment 191 Lines 287 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 6 + Total Function LOC.....: 79 Total Function Pts LOC : 0.8 + Total Function eLOC....: 63 Total Function Pts eLOC: 0.6 + Total Function lLOC....: 40 Total Function Pts lLOC: 0.3 + Total Function Params .: 11 Total Function Return .: 6 + Total Cyclo Complexity : 13 Total Function Complex.: 30 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 26 Average Function LOC ..: 13.17 + Max Function eLOC .....: 22 Average Function eLOC .: 10.50 + Max Function lLOC .....: 14 Average Function lLOC .: 6.67 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 3 Avg Function Parameters: 1.83 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 4 Avg Interface Complex. : 2.83 + Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 2.17 + Max Total Complexity ..: 8 Avg Total Complexity ..: 5.00 + ________________________________________________________________________ + End of File: ..\source\qf_dyn.c + + + File: ..\source\qf_mem.c + ________________________________________________________________________ + + Function: QMPool_init + Parameters: (QMPool * const me, void * const poolSto, uint_fast32_t pool + Size, uint_fast16_t blockSize) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 2 + Logical and ( && ) : 2 + Complexity Param 4 Return 1 Cyclo Vg 5 Total 10 + LOC 36 eLOC 32 lLOC 24 Comment 58 Lines 52 + + Function: QMPool_put + Parameters: (QMPool * const me, void *b) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 15 eLOC 14 lLOC 9 Comment 29 Lines 22 + + Function: QMPool_get + Parameters: (QMPool * const me, uint_fast16_t const margin) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 3 + Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 + LOC 42 eLOC 36 lLOC 23 Comment 54 Lines 66 + + Function: QF_getPoolMin + Parameters: (uint_fast8_t const poolId) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 10 eLOC 9 lLOC 6 Comment 13 Lines 14 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 115 eLOC 103 lLOC 62 Comment 201 Lines 302 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 4 + Total Function LOC.....: 103 Total Function Pts LOC : 0.9 + Total Function eLOC....: 91 Total Function Pts eLOC: 0.8 + Total Function lLOC....: 62 Total Function Pts lLOC: 0.5 + Total Function Params .: 9 Total Function Return .: 4 + Total Cyclo Complexity : 13 Total Function Complex.: 26 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 42 Average Function LOC ..: 25.75 + Max Function eLOC .....: 36 Average Function eLOC .: 22.75 + Max Function lLOC .....: 24 Average Function lLOC .: 15.50 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 4 Avg Function Parameters: 2.25 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 5 Avg Interface Complex. : 3.25 + Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 3.25 + Max Total Complexity ..: 10 Avg Total Complexity ..: 6.50 + ________________________________________________________________________ + End of File: ..\source\qf_mem.c + + + File: ..\source\qf_ps.c + ________________________________________________________________________ + + Function: QF_psInit + Parameters: (QSubscrList * const subscrSto, enum_t const maxSignal) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 7 eLOC 6 lLOC 3 Comment 32 Lines 12 + + Function: QF_publish_ + Parameters: (QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Conditional if / else if: 3 + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 36 eLOC 30 lLOC 21 Comment 50 Lines 63 + + Function: QActive_subscribe + Parameters: (QActive const * const me, enum_t const sig) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 4 + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 16 eLOC 15 lLOC 8 Comment 22 Lines 22 + + Function: QActive_unsubscribe + Parameters: (QActive const * const me, enum_t const sig) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 4 + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 16 eLOC 15 lLOC 8 Comment 29 Lines 25 + + Function: QActive_unsubscribeAll + Parameters: (QActive const * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 1 + Logical and ( && ) : 2 + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 21 eLOC 18 lLOC 10 Comment 24 Lines 24 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 113 eLOC 101 lLOC 52 Comment 205 Lines 320 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 5 + Total Function LOC.....: 96 Total Function Pts LOC : 0.9 + Total Function eLOC....: 84 Total Function Pts eLOC: 0.8 + Total Function lLOC....: 50 Total Function Pts lLOC: 0.4 + Total Function Params .: 8 Total Function Return .: 5 + Total Cyclo Complexity : 21 Total Function Complex.: 34 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 36 Average Function LOC ..: 19.20 + Max Function eLOC .....: 30 Average Function eLOC .: 16.80 + Max Function lLOC .....: 21 Average Function lLOC .: 10.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 1.60 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 2.60 + Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 4.20 + Max Total Complexity ..: 8 Avg Total Complexity ..: 6.80 + ________________________________________________________________________ + End of File: ..\source\qf_ps.c + + + File: ..\source\qf_qact.c + ________________________________________________________________________ + + Function: QActive_ctor + Parameters: (QActive * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 12 eLOC 10 lLOC 4 Comment 19 Lines 17 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 14 eLOC 12 lLOC 4 Comment 69 Lines 81 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 1 + Total Function LOC.....: 12 Total Function Pts LOC : 0.1 + Total Function eLOC....: 10 Total Function Pts eLOC: 0.1 + Total Function lLOC....: 4 Total Function Pts lLOC: 0.0 + Total Function Params .: 2 Total Function Return .: 1 + Total Cyclo Complexity : 1 Total Function Complex.: 4 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 12 Average Function LOC ..: 12.00 + Max Function eLOC .....: 10 Average Function eLOC .: 10.00 + Max Function lLOC .....: 4 Average Function lLOC .: 4.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 2.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 3.00 + Max Cyclomatic Complex.: 1 Avg Cyclomatic Complex.: 1.00 + Max Total Complexity ..: 4 Avg Total Complexity ..: 4.00 + ________________________________________________________________________ + End of File: ..\source\qf_qact.c + + + File: ..\source\qf_qeq.c + ________________________________________________________________________ + + Function: QEQueue_init + Parameters: (QEQueue * const me, QEvt const *qSto[], uint_fast16_t const + qLen) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 16 eLOC 13 lLOC 9 Comment 22 Lines 18 + + Function: QEQueue_post + Parameters: (QEQueue * const me, QEvt const * const e, uint_fast16_t con + st margin) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 5 + Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 + LOC 53 eLOC 44 lLOC 30 Comment 55 Lines 74 + + Function: QEQueue_postLIFO + Parameters: (QEQueue * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 4 + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 34 eLOC 29 lLOC 21 Comment 41 Lines 44 + + Function: QEQueue_get + Parameters: (QEQueue * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 3 + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 37 eLOC 32 lLOC 21 Comment 35 Lines 47 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 154 eLOC 132 lLOC 81 Comment 204 Lines 322 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 4 + Total Function LOC.....: 140 Total Function Pts LOC : 1.2 + Total Function eLOC....: 118 Total Function Pts eLOC: 1.0 + Total Function lLOC....: 81 Total Function Pts lLOC: 0.6 + Total Function Params .: 9 Total Function Return .: 4 + Total Cyclo Complexity : 17 Total Function Complex.: 30 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 53 Average Function LOC ..: 35.00 + Max Function eLOC .....: 44 Average Function eLOC .: 29.50 + Max Function lLOC .....: 30 Average Function lLOC .: 20.25 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 3 Avg Function Parameters: 2.25 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 4 Avg Interface Complex. : 3.25 + Max Cyclomatic Complex.: 6 Avg Cyclomatic Complex.: 4.25 + Max Total Complexity ..: 10 Avg Total Complexity ..: 7.50 + ________________________________________________________________________ + End of File: ..\source\qf_qeq.c + + + File: ..\source\qf_qmact.c + ________________________________________________________________________ + + Function: QMActive_ctor + Parameters: (QMActive * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 12 eLOC 10 lLOC 4 Comment 28 Lines 28 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 15 eLOC 13 lLOC 4 Comment 79 Lines 94 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 1 + Total Function LOC.....: 12 Total Function Pts LOC : 0.1 + Total Function eLOC....: 10 Total Function Pts eLOC: 0.1 + Total Function lLOC....: 4 Total Function Pts lLOC: 0.0 + Total Function Params .: 2 Total Function Return .: 1 + Total Cyclo Complexity : 1 Total Function Complex.: 4 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 12 Average Function LOC ..: 12.00 + Max Function eLOC .....: 10 Average Function eLOC .: 10.00 + Max Function lLOC .....: 4 Average Function lLOC .: 4.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 2.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 3.00 + Max Cyclomatic Complex.: 1 Avg Cyclomatic Complex.: 1.00 + Max Total Complexity ..: 4 Avg Total Complexity ..: 4.00 + ________________________________________________________________________ + End of File: ..\source\qf_qmact.c + + + File: ..\source\qf_time.c + ________________________________________________________________________ + + Function: QF_tickX_ + Parameters: (uint_fast8_t const tickRate) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 5 + Complexity Param 1 Return 1 Cyclo Vg 7 Total 9 + LOC 66 eLOC 54 lLOC 36 Comment 53 Lines 94 + + Function: QF_noTimeEvtsActiveX + Parameters: (uint_fast8_t const tickRate) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 14 eLOC 10 lLOC 6 Comment 13 Lines 17 + + Function: QTimeEvt_ctorX + Parameters: (QTimeEvt * const me, QActive * const act, enum_t const sig, + uint_fast8_t tickRate) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 1 + Complexity Param 4 Return 1 Cyclo Vg 2 Total 7 + LOC 11 eLOC 9 lLOC 8 Comment 32 Lines 31 + + Function: QTimeEvt_armX + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks, QTimeEvtCtr + const interval) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Logical and ( && ) : 4 + Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 + LOC 28 eLOC 25 lLOC 16 Comment 49 Lines 50 + + Function: QTimeEvt_disarm + Parameters: (QTimeEvt * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 29 eLOC 26 lLOC 17 Comment 30 Lines 37 + + Function: QTimeEvt_rearm + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Inlined if-else ( ? : ) : 1 + Logical and ( && ) : 3 + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 34 eLOC 30 lLOC 18 Comment 47 Lines 60 + + Function: QTimeEvt_ctr + Parameters: (QTimeEvt const * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 16 eLOC 15 lLOC 11 Comment 20 Lines 19 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 218 eLOC 189 lLOC 113 Comment 304 Lines 514 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 7 + Total Function LOC.....: 198 Total Function Pts LOC : 1.7 + Total Function eLOC....: 169 Total Function Pts eLOC: 1.5 + Total Function lLOC....: 112 Total Function Pts lLOC: 0.9 + Total Function Params .: 13 Total Function Return .: 7 + Total Cyclo Complexity : 28 Total Function Complex.: 48 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 66 Average Function LOC ..: 28.29 + Max Function eLOC .....: 54 Average Function eLOC .: 24.14 + Max Function lLOC .....: 36 Average Function lLOC .: 16.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 4 Avg Function Parameters: 1.86 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 5 Avg Interface Complex. : 2.86 + Max Cyclomatic Complex.: 7 Avg Cyclomatic Complex.: 4.00 + Max Total Complexity ..: 10 Avg Total Complexity ..: 6.86 + ________________________________________________________________________ + End of File: ..\source\qf_time.c + + + File: ..\source\qk.c + ________________________________________________________________________ + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 13 eLOC 12 lLOC 9 Comment 14 Lines 16 + + Function: QF_stop + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 + + Function: initial_events + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 + + Function: QF_run + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 12 eLOC 10 lLOC 7 Comment 12 Lines 14 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Logical and ( && ) : 3 + Complexity Param 7 Return 1 Cyclo Vg 5 Total 13 + LOC 18 eLOC 15 lLOC 10 Comment 34 Lines 28 + + Function: QActive_stop + Parameters: (QActive * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 + + Function: QK_sched_ + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 + LOC 15 eLOC 11 lLOC 7 Comment 21 Lines 19 + + Function: QK_activate_ + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Conditional if / else if: 5 + Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 + LOC 60 eLOC 52 lLOC 29 Comment 48 Lines 86 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 157 eLOC 134 lLOC 73 Comment 213 Lines 353 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 8 + Total Function LOC.....: 138 Total Function Pts LOC : 1.2 + Total Function eLOC....: 115 Total Function Pts eLOC: 1.0 + Total Function lLOC....: 71 Total Function Pts lLOC: 0.6 + Total Function Params .: 8 Total Function Return .: 8 + Total Cyclo Complexity : 23 Total Function Complex.: 39 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 60 Average Function LOC ..: 17.25 + Max Function eLOC .....: 52 Average Function eLOC .: 14.38 + Max Function lLOC .....: 29 Average Function lLOC .: 8.88 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 7 Avg Function Parameters: 1.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 8 Avg Interface Complex. : 2.00 + Max Cyclomatic Complex.: 7 Avg Cyclomatic Complex.: 2.88 + Max Total Complexity ..: 13 Avg Total Complexity ..: 4.88 + ________________________________________________________________________ + End of File: ..\source\qk.c + + + File: ..\source\qk_mutex.c + ________________________________________________________________________ + + Function: QMutex_init + Parameters: (QMutex * const me, uint_fast8_t prio) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 + + Function: QMutex_lock + Parameters: (QMutex * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 16 eLOC 14 lLOC 7 Comment 28 Lines 23 + + Function: QMutex_unlock + Parameters: (QMutex * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Inlined if-else ( ? : ) : 1 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 23 eLOC 20 lLOC 10 Comment 28 Lines 30 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 59 eLOC 52 lLOC 20 Comment 122 Lines 175 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 3 + Total Function LOC.....: 43 Total Function Pts LOC : 0.5 + Total Function eLOC....: 37 Total Function Pts eLOC: 0.4 + Total Function lLOC....: 19 Total Function Pts lLOC: 0.2 + Total Function Params .: 4 Total Function Return .: 3 + Total Cyclo Complexity : 9 Total Function Complex.: 16 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 23 Average Function LOC ..: 14.33 + Max Function eLOC .....: 20 Average Function eLOC .: 12.33 + Max Function lLOC .....: 10 Average Function lLOC .: 6.33 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 1.33 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 2.33 + Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 3.00 + Max Total Complexity ..: 7 Avg Total Complexity ..: 5.33 + ________________________________________________________________________ + End of File: ..\source\qk_mutex.c + + + File: ..\source\qs.c + ________________________________________________________________________ + + Function: QS_initBuf + Parameters: (uint8_t sto[], uint_fast16_t stoSize) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 21 eLOC 20 lLOC 19 Comment 31 Lines 31 + + Function: QS_filterOn + Parameters: (uint_fast8_t rec) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 14 + Complexity Param 1 Return 1 Cyclo Vg 16 Total 18 + LOC 73 eLOC 56 lLOC 39 Comment 16 Lines 75 + + Function: QS_filterOff + Parameters: (uint_fast8_t rec) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 14 + Complexity Param 1 Return 1 Cyclo Vg 16 Total 18 + LOC 76 eLOC 59 lLOC 43 Comment 16 Lines 80 + + Function: QS_beginRec + Parameters: (uint_fast8_t rec) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 14 eLOC 13 lLOC 10 Comment 18 Lines 18 + + Function: QS_endRec + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Logical and ( && ) : 1 + Complexity Param 0 Return 1 Cyclo Vg 4 Total 5 + LOC 22 eLOC 18 lLOC 10 Comment 17 Lines 28 + + Function: QS_target_info_ + Parameters: (uint8_t isReset) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Selection case : 12 + Conditional if / else if: 2 + Complexity Param 1 Return 1 Cyclo Vg 15 Total 17 + LOC 97 eLOC 90 lLOC 48 Comment 10 Lines 111 + + Function: QS_u8 + Parameters: (uint8_t format, uint8_t d) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 11 eLOC 10 lLOC 7 Comment 13 Lines 14 + + Function: QS_u16 + Parameters: (uint8_t format, uint16_t d) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 15 eLOC 14 lLOC 10 Comment 13 Lines 20 + + Function: QS_u32 + Parameters: (uint8_t format, uint32_t d) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 16 eLOC 14 lLOC 11 Comment 14 Lines 20 + + Function: QS_u8_ + Parameters: (uint8_t d) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 + + Function: QS_u8u8_ + Parameters: (uint8_t d1, uint8_t d2) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 11 eLOC 10 lLOC 7 Comment 11 Lines 13 + + Function: QS_u16_ + Parameters: (uint16_t d) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 14 eLOC 13 lLOC 10 Comment 12 Lines 18 + + Function: QS_u32_ + Parameters: (uint32_t d) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 15 eLOC 13 lLOC 11 Comment 11 Lines 17 + + Function: QS_str_ + Parameters: (char_t const *s) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 20 eLOC 18 lLOC 14 Comment 16 Lines 22 + + Function: QS_getByte + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 + LOC 18 eLOC 14 lLOC 10 Comment 20 Lines 18 + + Function: QS_getBlock + Parameters: (uint16_t *pNbytes) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 4 + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 28 eLOC 22 lLOC 16 Comment 32 Lines 32 + + Function: QS_sig_dict + Parameters: (enum_t const sig, void const * const obj, char_t const *nam + e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 14 eLOC 11 lLOC 9 Comment 3 Lines 15 + + Function: QS_obj_dict + Parameters: (void const * const obj, char_t const *name) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 13 eLOC 10 lLOC 8 Comment 3 Lines 14 + + Function: QS_fun_dict + Parameters: (void (* const fun)(void), char_t const *name) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 13 eLOC 11 lLOC 8 Comment 3 Lines 14 + + Function: QS_usr_dict + Parameters: (enum_t const rec, char_t const * const name) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 10 eLOC 8 lLOC 7 Comment 3 Lines 11 + + Function: QS_mem + Parameters: (uint8_t const *blk, uint8_t size) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 18 eLOC 16 lLOC 11 Comment 11 Lines 23 + + Function: QS_str + Parameters: (char_t const *s) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 21 eLOC 19 lLOC 14 Comment 16 Lines 24 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 563 eLOC 481 lLOC 332 Comment 346 Lines 872 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 22 + Total Function LOC.....: 550 Total Function Pts LOC : 4.4 + Total Function eLOC....: 468 Total Function Pts eLOC: 3.8 + Total Function lLOC....: 329 Total Function Pts lLOC: 2.6 + Total Function Params .: 31 Total Function Return .: 22 + Total Cyclo Complexity : 83 Total Function Complex.: 136 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 97 Average Function LOC ..: 25.00 + Max Function eLOC .....: 90 Average Function eLOC .: 21.27 + Max Function lLOC .....: 48 Average Function lLOC .: 14.95 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 3 Avg Function Parameters: 1.41 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 4 Avg Interface Complex. : 2.41 + Max Cyclomatic Complex.: 16 Avg Cyclomatic Complex.: 3.77 + Max Total Complexity ..: 18 Avg Total Complexity ..: 6.18 + ________________________________________________________________________ + End of File: ..\source\qs.c + + + File: ..\source\qs_64bit.c + ________________________________________________________________________ + + Function: QS_u64_ + Parameters: (uint64_t d) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 15 eLOC 13 lLOC 11 Comment 7 Lines 17 + + Function: QS_u64 + Parameters: (uint8_t format, uint64_t d) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 16 eLOC 14 lLOC 11 Comment 9 Lines 20 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 35 eLOC 31 lLOC 22 Comment 57 Lines 94 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 2 + Total Function LOC.....: 31 Total Function Pts LOC : 0.3 + Total Function eLOC....: 27 Total Function Pts eLOC: 0.2 + Total Function lLOC....: 22 Total Function Pts lLOC: 0.2 + Total Function Params .: 3 Total Function Return .: 2 + Total Cyclo Complexity : 4 Total Function Complex.: 9 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 16 Average Function LOC ..: 15.50 + Max Function eLOC .....: 14 Average Function eLOC .: 13.50 + Max Function lLOC .....: 11 Average Function lLOC .: 11.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 1.50 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 2.50 + Max Cyclomatic Complex.: 2 Avg Cyclomatic Complex.: 2.00 + Max Total Complexity ..: 5 Avg Total Complexity ..: 4.50 + ________________________________________________________________________ + End of File: ..\source\qs_64bit.c + + + File: ..\source\qs_fp.c + ________________________________________________________________________ + + Function: QS_f32 + Parameters: (uint8_t format, float32_t f) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 21 eLOC 19 lLOC 15 Comment 16 Lines 26 + + Function: QS_f64 + Parameters: (uint8_t format, float64_t d) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 2 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 + LOC 38 eLOC 34 lLOC 26 Comment 17 Lines 49 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 61 eLOC 55 lLOC 41 Comment 73 Lines 129 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 2 + Total Function LOC.....: 59 Total Function Pts LOC : 0.5 + Total Function eLOC....: 53 Total Function Pts eLOC: 0.4 + Total Function lLOC....: 41 Total Function Pts lLOC: 0.3 + Total Function Params .: 4 Total Function Return .: 2 + Total Cyclo Complexity : 6 Total Function Complex.: 12 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 38 Average Function LOC ..: 29.50 + Max Function eLOC .....: 34 Average Function eLOC .: 26.50 + Max Function lLOC .....: 26 Average Function lLOC .: 20.50 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 2.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 3.00 + Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 3.00 + Max Total Complexity ..: 7 Avg Total Complexity ..: 6.00 + ________________________________________________________________________ + End of File: ..\source\qs_fp.c + + + File: ..\source\qs_rx.c + ________________________________________________________________________ + + Function: QS_rxInitBuf + Parameters: (uint8_t sto[], uint16_t stoSize) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 25 eLOC 24 lLOC 21 Comment 22 Lines 30 + + Function: QS_rxGetNfree + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 + LOC 14 eLOC 10 lLOC 5 Comment 9 Lines 14 + + Function: QS_rxParse + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Conditional if / else if: 5 + Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 + LOC 36 eLOC 26 lLOC 16 Comment 5 Lines 41 + + Function: QS_rxParseData_ + Parameters: (uint8_t b) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Selection case : 56 + Conditional if / else if: 27 + Inlined if-else ( ? : ) : 5 + Logical or ( || ) : 4 + Complexity Param 1 Return 1 Cyclo Vg 93 Total 95 + LOC 406 eLOC 319 lLOC 197 Comment 25 Lines 427 + + Function: QS_rxHandleGoodFrame_ + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 3 + Selection case : 25 + Conditional if / else if: 17 + Complexity Param 0 Return 1 Cyclo Vg 46 Total 47 + LOC 235 eLOC 183 lLOC 103 Comment 55 Lines 263 + + Function: QS_rxHandleBadFrame_ + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Selection case : 1 + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 13 eLOC 9 lLOC 5 Comment 3 Lines 13 + + Function: QS_rxReportAck_ + Parameters: (enum QSpyRxRecords recId) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 6 eLOC 5 lLOC 1 Comment 2 Lines 6 + + Function: QS_rxReportError_ + Parameters: (uint8_t code) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 6 eLOC 5 lLOC 1 Comment 2 Lines 6 + + Function: QS_rxReportDone_ + Parameters: (enum QSpyRxRecords recId) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 7 eLOC 6 lLOC 2 Comment 3 Lines 7 + + Function: QS_rxPoke_ + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Selection case : 3 + Complexity Param 0 Return 1 Cyclo Vg 4 Total 5 + LOC 21 eLOC 19 lLOC 12 Comment 1 Lines 22 + + Function: QS_getTestProbe_ + Parameters: (void (* const api)(void)) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 2 + Conditional if / else if: 1 + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 20 eLOC 16 lLOC 11 Comment 18 Lines 23 + + Function: QS_onGetTime + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 1 Lines 3 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 944 eLOC 775 lLOC 453 Comment 216 Lines 1152 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 12 + Total Function LOC.....: 792 Total Function Pts LOC : 7.4 + Total Function eLOC....: 624 Total Function Pts eLOC: 6.1 + Total Function lLOC....: 375 Total Function Pts lLOC: 3.5 + Total Function Params .: 7 Total Function Return .: 12 + Total Cyclo Complexity : 164 Total Function Complex.: 183 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 406 Average Function LOC ..: 66.00 + Max Function eLOC .....: 319 Average Function eLOC .: 52.00 + Max Function lLOC .....: 197 Average Function lLOC .: 31.25 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 0.58 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 1.58 + Max Cyclomatic Complex.: 93 Avg Cyclomatic Complex.: 13.67 + Max Total Complexity ..: 95 Avg Total Complexity ..: 15.25 + ________________________________________________________________________ + End of File: ..\source\qs_rx.c + + + File: ..\source\qutest.c + ________________________________________________________________________ + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 7 eLOC 6 lLOC 5 Comment 1 Lines 8 + + Function: QF_run + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 8 eLOC 7 lLOC 6 Comment 6 Lines 10 + + Function: QActive_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin, void const * const sender) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 4 Return 1 Cyclo Vg 3 Total 8 + LOC 47 eLOC 41 lLOC 29 Comment 30 Lines 66 + + Function: QActive_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 22 eLOC 19 lLOC 12 Comment 12 Lines 29 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 1 + Complexity Param 7 Return 1 Cyclo Vg 2 Total 10 + LOC 11 eLOC 9 lLOC 8 Comment 7 Lines 14 + + Function: QActive_stop + Parameters: (QActive * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 3 eLOC 2 lLOC 1 Comment 2 Lines 3 + + Function: QTimeEvt_ctr + Parameters: (QTimeEvt const * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 16 eLOC 15 lLOC 11 Comment 7 Lines 19 + + Function: QTimeEvt_ctorX + Parameters: (QTimeEvt * const me, QActive * const act, enum_t const sig, + uint_fast8_t tickRate) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 1 + Complexity Param 4 Return 1 Cyclo Vg 2 Total 7 + LOC 11 eLOC 9 lLOC 8 Comment 2 Lines 14 + + Function: QTimeEvt_armX + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks, QTimeEvtCtr + const interval) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 4 + Complexity Param 3 Return 1 Cyclo Vg 5 Total 9 + LOC 23 eLOC 21 lLOC 13 Comment 10 Lines 30 + + Function: QTimeEvt_disarm + Parameters: (QTimeEvt * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 29 eLOC 26 lLOC 17 Comment 14 Lines 37 + + Function: QTimeEvt_rearm + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Inlined if-else ( ? : ) : 1 + Logical and ( && ) : 3 + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 32 eLOC 28 lLOC 16 Comment 19 Lines 49 + + Function: QF_tickX_ + Parameters: (uint_fast8_t const tickRate, void const * const sender) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 32 eLOC 28 lLOC 17 Comment 18 Lines 42 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 261 eLOC 231 lLOC 144 Comment 175 Lines 401 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 12 + Total Function LOC.....: 241 Total Function Pts LOC : 2.0 + Total Function eLOC....: 211 Total Function Pts eLOC: 1.8 + Total Function lLOC....: 143 Total Function Pts lLOC: 1.1 + Total Function Params .: 27 Total Function Return .: 12 + Total Cyclo Complexity : 30 Total Function Complex.: 69 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 47 Average Function LOC ..: 20.08 + Max Function eLOC .....: 41 Average Function eLOC .: 17.58 + Max Function lLOC .....: 29 Average Function lLOC .: 11.92 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 7 Avg Function Parameters: 2.25 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 8 Avg Interface Complex. : 3.25 + Max Cyclomatic Complex.: 7 Avg Cyclomatic Complex.: 2.50 + Max Total Complexity ..: 10 Avg Total Complexity ..: 5.75 + ________________________________________________________________________ + End of File: ..\source\qutest.c + + + File: ..\source\qv.c + ________________________________________________________________________ + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 11 eLOC 10 lLOC 7 Comment 12 Lines 13 + + Function: QF_stop + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 + + Function: QF_run + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Conditional if / else if: 3 + Complexity Param 0 Return 1 Cyclo Vg 5 Total 6 + LOC 48 eLOC 42 lLOC 24 Comment 45 Lines 75 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Logical and ( && ) : 2 + Complexity Param 7 Return 1 Cyclo Vg 3 Total 11 + LOC 11 eLOC 9 lLOC 7 Comment 31 Lines 17 + + Function: QActive_stop + Parameters: (QActive * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 7 eLOC 6 lLOC 4 Comment 13 Lines 9 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 98 eLOC 87 lLOC 44 Comment 167 Lines 258 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 5 + Total Function LOC.....: 80 Total Function Pts LOC : 0.8 + Total Function eLOC....: 69 Total Function Pts eLOC: 0.7 + Total Function lLOC....: 43 Total Function Pts lLOC: 0.3 + Total Function Params .: 8 Total Function Return .: 5 + Total Cyclo Complexity : 11 Total Function Complex.: 24 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 48 Average Function LOC ..: 16.00 + Max Function eLOC .....: 42 Average Function eLOC .: 13.80 + Max Function lLOC .....: 24 Average Function lLOC .: 8.60 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 7 Avg Function Parameters: 1.60 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 8 Avg Interface Complex. : 2.60 + Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 2.20 + Max Total Complexity ..: 11 Avg Total Complexity ..: 4.80 + ________________________________________________________________________ + End of File: ..\source\qv.c + + + File: ..\source\qxk.c + ________________________________________________________________________ + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 16 eLOC 15 lLOC 12 Comment 16 Lines 22 + + Function: QF_stop + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 + + Function: initial_events + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 + + Function: QF_run + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops for / foreach : 1 + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 12 eLOC 10 lLOC 7 Comment 13 Lines 15 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Logical and ( && ) : 4 + Complexity Param 7 Return 1 Cyclo Vg 6 Total 14 + LOC 19 eLOC 16 lLOC 10 Comment 35 Lines 28 + + Function: QActive_stop + Parameters: (QActive * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 + + Function: QXK_sched_ + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 5 + Complexity Param 0 Return 1 Cyclo Vg 6 Total 7 + LOC 50 eLOC 40 lLOC 22 Comment 33 Lines 67 + + Function: QXK_activate_ + Parameters: (void) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Loops while / do : 1 + Conditional if / else if: 6 + Complexity Param 0 Return 1 Cyclo Vg 8 Total 9 + LOC 75 eLOC 65 lLOC 36 Comment 54 Lines 104 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 212 eLOC 181 lLOC 99 Comment 236 Lines 428 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 8 + Total Function LOC.....: 192 Total Function Pts LOC : 1.7 + Total Function eLOC....: 161 Total Function Pts eLOC: 1.4 + Total Function lLOC....: 96 Total Function Pts lLOC: 0.8 + Total Function Params .: 8 Total Function Return .: 8 + Total Cyclo Complexity : 28 Total Function Complex.: 44 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 75 Average Function LOC ..: 24.00 + Max Function eLOC .....: 65 Average Function eLOC .: 20.13 + Max Function lLOC .....: 36 Average Function lLOC .: 12.00 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 7 Avg Function Parameters: 1.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 8 Avg Interface Complex. : 2.00 + Max Cyclomatic Complex.: 8 Avg Cyclomatic Complex.: 3.50 + Max Total Complexity ..: 14 Avg Total Complexity ..: 5.50 + ________________________________________________________________________ + End of File: ..\source\qxk.c + + + File: ..\source\qxk_mutex.c + ________________________________________________________________________ + + Function: QXMutex_init + Parameters: (QXMutex * const me, uint_fast8_t prio) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 + + Function: QXMutex_lock + Parameters: (QXMutex * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Inlined if-else ( ? : ) : 1 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 21 eLOC 19 lLOC 9 Comment 36 Lines 29 + + Function: QXMutex_unlock + Parameters: (QXMutex * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Inlined if-else ( ? : ) : 1 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 24 eLOC 21 lLOC 11 Comment 37 Lines 32 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 65 eLOC 58 lLOC 23 Comment 139 Lines 197 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 3 + Total Function LOC.....: 49 Total Function Pts LOC : 0.5 + Total Function eLOC....: 43 Total Function Pts eLOC: 0.5 + Total Function lLOC....: 22 Total Function Pts lLOC: 0.2 + Total Function Params .: 4 Total Function Return .: 3 + Total Cyclo Complexity : 10 Total Function Complex.: 17 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 24 Average Function LOC ..: 16.33 + Max Function eLOC .....: 21 Average Function eLOC .: 14.33 + Max Function lLOC .....: 11 Average Function lLOC .: 7.33 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 2 Avg Function Parameters: 1.33 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 3 Avg Interface Complex. : 2.33 + Max Cyclomatic Complex.: 5 Avg Cyclomatic Complex.: 3.33 + Max Total Complexity ..: 7 Avg Total Complexity ..: 5.67 + ________________________________________________________________________ + End of File: ..\source\qxk_mutex.c + + + File: ..\source\qxk_sema.c + ________________________________________________________________________ + + Function: QXSemaphore_init + Parameters: (QXSemaphore * const me, uint_fast16_t count) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 4 eLOC 3 lLOC 2 Comment 16 Lines 4 + + Function: QXSemaphore_wait + Parameters: (QXSemaphore * const me, uint_fast16_t const nTicks, uint_fa + st8_t const tickRate) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Logical and ( && ) : 2 + Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 + LOC 27 eLOC 23 lLOC 18 Comment 34 Lines 35 + + Function: QXSemaphore_signal + Parameters: (QXSemaphore * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 23 eLOC 19 lLOC 12 Comment 21 Lines 30 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 69 eLOC 60 lLOC 32 Comment 120 Lines 187 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 3 + Total Function LOC.....: 54 Total Function Pts LOC : 0.5 + Total Function eLOC....: 45 Total Function Pts eLOC: 0.5 + Total Function lLOC....: 32 Total Function Pts lLOC: 0.3 + Total Function Params .: 6 Total Function Return .: 3 + Total Cyclo Complexity : 9 Total Function Complex.: 18 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 27 Average Function LOC ..: 18.00 + Max Function eLOC .....: 23 Average Function eLOC .: 15.00 + Max Function lLOC .....: 18 Average Function lLOC .: 10.67 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 3 Avg Function Parameters: 2.00 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 4 Avg Interface Complex. : 3.00 + Max Cyclomatic Complex.: 4 Avg Cyclomatic Complex.: 3.00 + Max Total Complexity ..: 8 Avg Total Complexity ..: 6.00 + ________________________________________________________________________ + End of File: ..\source\qxk_sema.c + + + File: ..\source\qxk_xthr.c + ________________________________________________________________________ + + Function: QXThread_ctor + Parameters: (QXThread * const me, QXThreadHandler handler, uint_fast8_t + tickRate) + Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 + LOC 13 eLOC 10 lLOC 5 Comment 24 Lines 16 + + Function: QXThread_init_ + Parameters: (QMsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 2 Lines 5 + + Function: QXThread_dispatch_ + Parameters: (QMsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 + + Function: QXThread_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Logical and ( && ) : 4 + Complexity Param 7 Return 1 Cyclo Vg 6 Total 14 + LOC 20 eLOC 17 lLOC 11 Comment 35 Lines 36 + + Function: QXThread_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 9 + Complexity Param 3 Return 1 Cyclo Vg 10 Total 14 + LOC 78 eLOC 64 lLOC 45 Comment 76 Lines 111 + + Function: QXThread_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 10 Lines 5 + + Function: QXThread_queueGet + Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 4 + Logical and ( && ) : 2 + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 60 eLOC 52 lLOC 35 Comment 50 Lines 80 + + Function: QXThread_block_ + Parameters: (QXThread const * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 + + Function: QXThread_unblock_ + Parameters: (QXThread const * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Logical and ( && ) : 1 + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 8 eLOC 5 lLOC 2 Comment 10 Lines 8 + + Function: QXThread_teArm_ + Parameters: (QXThread * const me, QSignal sig, uint_fast16_t const nTick + s, uint_fast8_t const tickRate) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 2 + Complexity Param 4 Return 1 Cyclo Vg 3 Total 8 + LOC 13 eLOC 9 lLOC 7 Comment 23 Lines 30 + + Function: QXThread_teDisarm_ + Parameters: (QXThread * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 11 eLOC 8 lLOC 5 Comment 11 Lines 13 + + Function: QXThread_delay + Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 18 eLOC 17 lLOC 14 Comment 10 Lines 29 + + Function: QXThread_delayCancel + Parameters: (QXThread * const me) + Cyclomatic Complexity Vg Detail + Function Base : 1 + Conditional if / else if: 1 + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 14 eLOC 11 lLOC 7 Comment 2 Lines 16 + + Function: QXK_threadRet_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 + + ------------------------------------------------------------------------ + + ~~ Total File Summary ~~ + + LOC 311 eLOC 264 lLOC 156 Comment 325 Lines 631 + ------------------------------------------------------------------------ + + ~~ File Functional Summary ~~ + + File Function Count....: 14 + Total Function LOC.....: 265 Total Function Pts LOC : 2.4 + Total Function eLOC....: 218 Total Function Pts eLOC: 2.1 + Total Function lLOC....: 150 Total Function Pts lLOC: 1.2 + Total Function Params .: 31 Total Function Return .: 14 + Total Cyclo Complexity : 40 Total Function Complex.: 85 + ------ ----- ----- ------ ------ ----- + Max Function LOC ......: 78 Average Function LOC ..: 18.93 + Max Function eLOC .....: 64 Average Function eLOC .: 15.57 + Max Function lLOC .....: 45 Average Function lLOC .: 10.71 + ------ ----- ----- ------ ------ ----- + Max Function Parameters: 7 Avg Function Parameters: 2.21 + Max Function Returns ..: 1 Avg Function Returns ..: 1.00 + Max Interface Complex. : 8 Avg Interface Complex. : 3.21 + Max Cyclomatic Complex.: 10 Avg Cyclomatic Complex.: 2.86 + Max Total Complexity ..: 14 Avg Total Complexity ..: 6.07 + ________________________________________________________________________ + End of File: ..\source\qxk_xthr.c + + + ------------------------------------------------------------------------ + + ~~ Project Analysis For 41 Files ~~ + + ------------------------------------------------------------------------ + + ~~ Total Project Summary ~~ + + LOC 6131 eLOC 5436 lLOC 2701 Comment 7673 Lines 13867 + Average per File, metric/41 files + LOC 149 eLOC 132 lLOC 65 Comment 187 Lines 338 + + ------------------------------------------------------------------------ + + ~~ Project Functional Metrics ~~ + + Function: QF_LOG2 + Parameters: (uint32_t x) + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 25 eLOC 18 lLOC 11 Comment 7 Lines 26 + + Function: QHsm_ctor + Parameters: (QHsm * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 9 eLOC 7 lLOC 4 Comment 21 Lines 9 + + Function: QHsm_init_ + Parameters: (QHsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 50 eLOC 47 lLOC 31 Comment 35 Lines 70 + + Function: QHsm_top + Parameters: (void const * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 18 Lines 5 + + Function: QHsm_dispatch_ + Parameters: (QHsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 13 Total 16 + LOC 106 eLOC 95 lLOC 62 Comment 67 Lines 147 + + Function: QHsm_tran_ + Parameters: (QHsm * const me, QStateHandler path[QHSM_MAX_NEST_DEPTH_]) + Complexity Param 2 Return 1 Cyclo Vg 15 Total 18 + LOC 97 eLOC 76 lLOC 48 Comment 63 Lines 134 + + Function: QHsm_isIn + Parameters: (QHsm * const me, QStateHandler const state) + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 16 eLOC 13 lLOC 9 Comment 21 Lines 21 + + Function: QHsm_childState_ + Parameters: (QHsm * const me, QStateHandler const parent) + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 19 eLOC 15 lLOC 12 Comment 30 Lines 25 + + Function: QMsm_ctor + Parameters: (QMsm * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 9 eLOC 7 lLOC 4 Comment 28 Lines 10 + + Function: QMsm_init_ + Parameters: (QMsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 + LOC 23 eLOC 22 lLOC 13 Comment 25 Lines 37 + + Function: QMsm_dispatch_ + Parameters: (QMsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 16 Total 19 + LOC 114 eLOC 97 lLOC 59 Comment 75 Lines 156 + + Function: QMsm_execTatbl_ + Parameters: (QMsm * const me, QMTranActTable const *tatbl) + Complexity Param 2 Return 1 Cyclo Vg 8 Total 11 + LOC 53 eLOC 43 lLOC 21 Comment 33 Lines 64 + + Function: QMsm_exitToTranSource_ + Parameters: (QMsm * const me, QMState const *s, QMState const *ts) + Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 + LOC 17 eLOC 12 lLOC 6 Comment 20 Lines 23 + + Function: QMsm_enterHistory_ + Parameters: (QMsm * const me, QMState const *const hist) + Complexity Param 2 Return 1 Cyclo Vg 6 Total 9 + LOC 40 eLOC 33 lLOC 21 Comment 24 Lines 48 + + Function: QMsm_isInState + Parameters: (QMsm const * const me, QMState const * const state) + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 11 eLOC 8 lLOC 6 Comment 16 Lines 12 + + Function: QMsm_childStateObj_ + Parameters: (QMsm const * const me, QMState const * const parent) + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 19 eLOC 13 lLOC 9 Comment 20 Lines 23 + + Function: QF_add_ + Parameters: (QActive * const a) + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 15 eLOC 14 lLOC 8 Comment 23 Lines 25 + + Function: QF_remove_ + Parameters: (QActive * const a) + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 16 eLOC 15 lLOC 9 Comment 23 Lines 25 + + Function: QF_bzero + Parameters: (void * const start, uint_fast16_t len) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 8 eLOC 6 lLOC 4 Comment 14 Lines 8 + + Function: QF_LOG2 + Parameters: (uint32_t x) + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 25 eLOC 18 lLOC 11 Comment 1 Lines 26 + + Function: QActive_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin) + Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 + LOC 58 eLOC 49 lLOC 35 Comment 79 Lines 79 + + Function: QActive_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 37 eLOC 31 lLOC 22 Comment 36 Lines 50 + + Function: QActive_get_ + Parameters: (QActive * const me) + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 37 eLOC 33 lLOC 23 Comment 32 Lines 47 + + Function: QF_getQueueMin + Parameters: (uint_fast8_t const prio) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 10 eLOC 9 lLOC 6 Comment 18 Lines 13 + + Function: QTicker_ctor + Parameters: (QTicker * const me, uint8_t tickRate) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 12 eLOC 10 lLOC 4 Comment 6 Lines 14 + + Function: QTicker_init_ + Parameters: (QHsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 + + Function: QTicker_dispatch_ + Parameters: (QHsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 12 eLOC 10 lLOC 8 Comment 4 Lines 15 + + Function: QTicker_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin) + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 24 eLOC 21 lLOC 17 Comment 15 Lines 32 + + Function: QTicker_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 + + Function: QActive_defer + Parameters: (QActive const * const me, QEQueue * const eq, QEvt const * + const e) + Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 + LOC 4 eLOC 2 lLOC 2 Comment 24 Lines 5 + + Function: QActive_recall + Parameters: (QActive * const me, QEQueue * const eq) + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 19 eLOC 15 lLOC 10 Comment 33 Lines 36 + + Function: QActive_flushDeferred + Parameters: (QActive const * const me, QEQueue * const eq) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 10 eLOC 7 lLOC 7 Comment 17 Lines 12 + + Function: QEvt_ctor + Parameters: (QEvt * const me, enum_t const sig) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 + + Function: QF_poolInit + Parameters: (void * const poolSto, uint_fast32_t const poolSize, uint_fa + st16_t const evtSize) + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 9 eLOC 7 lLOC 4 Comment 38 Lines 13 + + Function: QF_newX_ + Parameters: (uint_fast16_t const evtSize, uint_fast16_t const margin, en + um_t const sig) + Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 + LOC 26 eLOC 20 lLOC 14 Comment 35 Lines 35 + + Function: QF_gc + Parameters: (QEvt const * const e) + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 26 eLOC 22 lLOC 13 Comment 35 Lines 39 + + Function: QF_newRef_ + Parameters: (QEvt const * const e, QEvt const * const evtRef) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 10 eLOC 8 lLOC 5 Comment 16 Lines 15 + + Function: QF_poolGetMaxBlockSize + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 5 Lines 3 + + Function: QMPool_init + Parameters: (QMPool * const me, void * const poolSto, uint_fast32_t pool + Size, uint_fast16_t blockSize) + Complexity Param 4 Return 1 Cyclo Vg 5 Total 10 + LOC 36 eLOC 32 lLOC 24 Comment 58 Lines 52 + + Function: QMPool_put + Parameters: (QMPool * const me, void *b) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 15 eLOC 14 lLOC 9 Comment 29 Lines 22 + + Function: QMPool_get + Parameters: (QMPool * const me, uint_fast16_t const margin) + Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 + LOC 42 eLOC 36 lLOC 23 Comment 54 Lines 66 + + Function: QF_getPoolMin + Parameters: (uint_fast8_t const poolId) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 10 eLOC 9 lLOC 6 Comment 13 Lines 14 + + Function: QF_psInit + Parameters: (QSubscrList * const subscrSto, enum_t const maxSignal) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 7 eLOC 6 lLOC 3 Comment 32 Lines 12 + + Function: QF_publish_ + Parameters: (QEvt const * const e) + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 36 eLOC 30 lLOC 21 Comment 50 Lines 63 + + Function: QActive_subscribe + Parameters: (QActive const * const me, enum_t const sig) + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 16 eLOC 15 lLOC 8 Comment 22 Lines 22 + + Function: QActive_unsubscribe + Parameters: (QActive const * const me, enum_t const sig) + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 16 eLOC 15 lLOC 8 Comment 29 Lines 25 + + Function: QActive_unsubscribeAll + Parameters: (QActive const * const me) + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 21 eLOC 18 lLOC 10 Comment 24 Lines 24 + + Function: QActive_ctor + Parameters: (QActive * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 12 eLOC 10 lLOC 4 Comment 19 Lines 17 + + Function: QEQueue_init + Parameters: (QEQueue * const me, QEvt const *qSto[], uint_fast16_t const + qLen) + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 16 eLOC 13 lLOC 9 Comment 22 Lines 18 + + Function: QEQueue_post + Parameters: (QEQueue * const me, QEvt const * const e, uint_fast16_t con + st margin) + Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 + LOC 53 eLOC 44 lLOC 30 Comment 55 Lines 74 + + Function: QEQueue_postLIFO + Parameters: (QEQueue * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 5 Total 8 + LOC 34 eLOC 29 lLOC 21 Comment 41 Lines 44 + + Function: QEQueue_get + Parameters: (QEQueue * const me) + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 37 eLOC 32 lLOC 21 Comment 35 Lines 47 + + Function: QMActive_ctor + Parameters: (QMActive * const me, QStateHandler initial) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 12 eLOC 10 lLOC 4 Comment 28 Lines 28 + + Function: QF_tickX_ + Parameters: (uint_fast8_t const tickRate) + Complexity Param 1 Return 1 Cyclo Vg 7 Total 9 + LOC 66 eLOC 54 lLOC 36 Comment 53 Lines 94 + + Function: QF_noTimeEvtsActiveX + Parameters: (uint_fast8_t const tickRate) + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 14 eLOC 10 lLOC 6 Comment 13 Lines 17 + + Function: QTimeEvt_ctorX + Parameters: (QTimeEvt * const me, QActive * const act, enum_t const sig, + uint_fast8_t tickRate) + Complexity Param 4 Return 1 Cyclo Vg 2 Total 7 + LOC 11 eLOC 9 lLOC 8 Comment 32 Lines 31 + + Function: QTimeEvt_armX + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks, QTimeEvtCtr + const interval) + Complexity Param 3 Return 1 Cyclo Vg 6 Total 10 + LOC 28 eLOC 25 lLOC 16 Comment 49 Lines 50 + + Function: QTimeEvt_disarm + Parameters: (QTimeEvt * const me) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 29 eLOC 26 lLOC 17 Comment 30 Lines 37 + + Function: QTimeEvt_rearm + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks) + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 34 eLOC 30 lLOC 18 Comment 47 Lines 60 + + Function: QTimeEvt_ctr + Parameters: (QTimeEvt const * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 16 eLOC 15 lLOC 11 Comment 20 Lines 19 + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 13 eLOC 12 lLOC 9 Comment 14 Lines 16 + + Function: QF_stop + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 + + Function: initial_events + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 + + Function: QF_run + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 12 eLOC 10 lLOC 7 Comment 12 Lines 14 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Complexity Param 7 Return 1 Cyclo Vg 5 Total 13 + LOC 18 eLOC 15 lLOC 10 Comment 34 Lines 28 + + Function: QActive_stop + Parameters: (QActive * const me) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 + + Function: QK_sched_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 + LOC 15 eLOC 11 lLOC 7 Comment 21 Lines 19 + + Function: QK_activate_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 + LOC 60 eLOC 52 lLOC 29 Comment 48 Lines 86 + + Function: QMutex_init + Parameters: (QMutex * const me, uint_fast8_t prio) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 + + Function: QMutex_lock + Parameters: (QMutex * const me) + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 16 eLOC 14 lLOC 7 Comment 28 Lines 23 + + Function: QMutex_unlock + Parameters: (QMutex * const me) + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 23 eLOC 20 lLOC 10 Comment 28 Lines 30 + + Function: QS_initBuf + Parameters: (uint8_t sto[], uint_fast16_t stoSize) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 21 eLOC 20 lLOC 19 Comment 31 Lines 31 + + Function: QS_filterOn + Parameters: (uint_fast8_t rec) + Complexity Param 1 Return 1 Cyclo Vg 16 Total 18 + LOC 73 eLOC 56 lLOC 39 Comment 16 Lines 75 + + Function: QS_filterOff + Parameters: (uint_fast8_t rec) + Complexity Param 1 Return 1 Cyclo Vg 16 Total 18 + LOC 76 eLOC 59 lLOC 43 Comment 16 Lines 80 + + Function: QS_beginRec + Parameters: (uint_fast8_t rec) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 14 eLOC 13 lLOC 10 Comment 18 Lines 18 + + Function: QS_endRec + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 4 Total 5 + LOC 22 eLOC 18 lLOC 10 Comment 17 Lines 28 + + Function: QS_target_info_ + Parameters: (uint8_t isReset) + Complexity Param 1 Return 1 Cyclo Vg 15 Total 17 + LOC 97 eLOC 90 lLOC 48 Comment 10 Lines 111 + + Function: QS_u8 + Parameters: (uint8_t format, uint8_t d) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 11 eLOC 10 lLOC 7 Comment 13 Lines 14 + + Function: QS_u16 + Parameters: (uint8_t format, uint16_t d) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 15 eLOC 14 lLOC 10 Comment 13 Lines 20 + + Function: QS_u32 + Parameters: (uint8_t format, uint32_t d) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 16 eLOC 14 lLOC 11 Comment 14 Lines 20 + + Function: QS_u8_ + Parameters: (uint8_t d) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 + + Function: QS_u8u8_ + Parameters: (uint8_t d1, uint8_t d2) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 11 eLOC 10 lLOC 7 Comment 11 Lines 13 + + Function: QS_u16_ + Parameters: (uint16_t d) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 14 eLOC 13 lLOC 10 Comment 12 Lines 18 + + Function: QS_u32_ + Parameters: (uint32_t d) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 15 eLOC 13 lLOC 11 Comment 11 Lines 17 + + Function: QS_str_ + Parameters: (char_t const *s) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 20 eLOC 18 lLOC 14 Comment 16 Lines 22 + + Function: QS_getByte + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 + LOC 18 eLOC 14 lLOC 10 Comment 20 Lines 18 + + Function: QS_getBlock + Parameters: (uint16_t *pNbytes) + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 28 eLOC 22 lLOC 16 Comment 32 Lines 32 + + Function: QS_sig_dict + Parameters: (enum_t const sig, void const * const obj, char_t const *nam + e) + Complexity Param 3 Return 1 Cyclo Vg 2 Total 6 + LOC 14 eLOC 11 lLOC 9 Comment 3 Lines 15 + + Function: QS_obj_dict + Parameters: (void const * const obj, char_t const *name) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 13 eLOC 10 lLOC 8 Comment 3 Lines 14 + + Function: QS_fun_dict + Parameters: (void (* const fun)(void), char_t const *name) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 13 eLOC 11 lLOC 8 Comment 3 Lines 14 + + Function: QS_usr_dict + Parameters: (enum_t const rec, char_t const * const name) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 10 eLOC 8 lLOC 7 Comment 3 Lines 11 + + Function: QS_mem + Parameters: (uint8_t const *blk, uint8_t size) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 18 eLOC 16 lLOC 11 Comment 11 Lines 23 + + Function: QS_str + Parameters: (char_t const *s) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 21 eLOC 19 lLOC 14 Comment 16 Lines 24 + + Function: QS_u64_ + Parameters: (uint64_t d) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 15 eLOC 13 lLOC 11 Comment 7 Lines 17 + + Function: QS_u64 + Parameters: (uint8_t format, uint64_t d) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 16 eLOC 14 lLOC 11 Comment 9 Lines 20 + + Function: QS_f32 + Parameters: (uint8_t format, float32_t f) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 21 eLOC 19 lLOC 15 Comment 16 Lines 26 + + Function: QS_f64 + Parameters: (uint8_t format, float64_t d) + Complexity Param 2 Return 1 Cyclo Vg 4 Total 7 + LOC 38 eLOC 34 lLOC 26 Comment 17 Lines 49 + + Function: QS_rxInitBuf + Parameters: (uint8_t sto[], uint16_t stoSize) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 25 eLOC 24 lLOC 21 Comment 22 Lines 30 + + Function: QS_rxGetNfree + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 3 Total 4 + LOC 14 eLOC 10 lLOC 5 Comment 9 Lines 14 + + Function: QS_rxParse + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 7 Total 8 + LOC 36 eLOC 26 lLOC 16 Comment 5 Lines 41 + + Function: QS_rxParseData_ + Parameters: (uint8_t b) + Complexity Param 1 Return 1 Cyclo Vg 93 Total 95 + LOC 406 eLOC 319 lLOC 197 Comment 25 Lines 427 + + Function: QS_rxHandleGoodFrame_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 46 Total 47 + LOC 235 eLOC 183 lLOC 103 Comment 55 Lines 263 + + Function: QS_rxHandleBadFrame_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 13 eLOC 9 lLOC 5 Comment 3 Lines 13 + + Function: QS_rxReportAck_ + Parameters: (enum QSpyRxRecords recId) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 6 eLOC 5 lLOC 1 Comment 2 Lines 6 + + Function: QS_rxReportError_ + Parameters: (uint8_t code) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 6 eLOC 5 lLOC 1 Comment 2 Lines 6 + + Function: QS_rxReportDone_ + Parameters: (enum QSpyRxRecords recId) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 7 eLOC 6 lLOC 2 Comment 3 Lines 7 + + Function: QS_rxPoke_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 4 Total 5 + LOC 21 eLOC 19 lLOC 12 Comment 1 Lines 22 + + Function: QS_getTestProbe_ + Parameters: (void (* const api)(void)) + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 20 eLOC 16 lLOC 11 Comment 18 Lines 23 + + Function: QS_onGetTime + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 1 Lines 3 + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 7 eLOC 6 lLOC 5 Comment 1 Lines 8 + + Function: QF_run + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 8 eLOC 7 lLOC 6 Comment 6 Lines 10 + + Function: QActive_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin, void const * const sender) + Complexity Param 4 Return 1 Cyclo Vg 3 Total 8 + LOC 47 eLOC 41 lLOC 29 Comment 30 Lines 66 + + Function: QActive_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 2 Total 5 + LOC 22 eLOC 19 lLOC 12 Comment 12 Lines 29 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Complexity Param 7 Return 1 Cyclo Vg 2 Total 10 + LOC 11 eLOC 9 lLOC 8 Comment 7 Lines 14 + + Function: QActive_stop + Parameters: (QActive * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 3 eLOC 2 lLOC 1 Comment 2 Lines 3 + + Function: QTimeEvt_ctr + Parameters: (QTimeEvt const * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 16 eLOC 15 lLOC 11 Comment 7 Lines 19 + + Function: QTimeEvt_ctorX + Parameters: (QTimeEvt * const me, QActive * const act, enum_t const sig, + uint_fast8_t tickRate) + Complexity Param 4 Return 1 Cyclo Vg 2 Total 7 + LOC 11 eLOC 9 lLOC 8 Comment 2 Lines 14 + + Function: QTimeEvt_armX + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks, QTimeEvtCtr + const interval) + Complexity Param 3 Return 1 Cyclo Vg 5 Total 9 + LOC 23 eLOC 21 lLOC 13 Comment 10 Lines 30 + + Function: QTimeEvt_disarm + Parameters: (QTimeEvt * const me) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 29 eLOC 26 lLOC 17 Comment 14 Lines 37 + + Function: QTimeEvt_rearm + Parameters: (QTimeEvt * const me, QTimeEvtCtr const nTicks) + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 32 eLOC 28 lLOC 16 Comment 19 Lines 49 + + Function: QF_tickX_ + Parameters: (uint_fast8_t const tickRate, void const * const sender) + Complexity Param 2 Return 1 Cyclo Vg 3 Total 6 + LOC 32 eLOC 28 lLOC 17 Comment 18 Lines 42 + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 11 eLOC 10 lLOC 7 Comment 12 Lines 13 + + Function: QF_stop + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 + + Function: QF_run + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 5 Total 6 + LOC 48 eLOC 42 lLOC 24 Comment 45 Lines 75 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Complexity Param 7 Return 1 Cyclo Vg 3 Total 11 + LOC 11 eLOC 9 lLOC 7 Comment 31 Lines 17 + + Function: QActive_stop + Parameters: (QActive * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 7 eLOC 6 lLOC 4 Comment 13 Lines 9 + + Function: QF_init + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 16 eLOC 15 lLOC 12 Comment 16 Lines 22 + + Function: QF_stop + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 3 eLOC 2 lLOC 1 Comment 14 Lines 4 + + Function: initial_events + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 6 eLOC 4 lLOC 2 Comment 6 Lines 8 + + Function: QF_run + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 2 Total 3 + LOC 12 eLOC 10 lLOC 7 Comment 13 Lines 15 + + Function: QActive_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Complexity Param 7 Return 1 Cyclo Vg 6 Total 14 + LOC 19 eLOC 16 lLOC 10 Comment 35 Lines 28 + + Function: QActive_stop + Parameters: (QActive * const me) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 11 eLOC 9 lLOC 6 Comment 13 Lines 15 + + Function: QXK_sched_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 6 Total 7 + LOC 50 eLOC 40 lLOC 22 Comment 33 Lines 67 + + Function: QXK_activate_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 8 Total 9 + LOC 75 eLOC 65 lLOC 36 Comment 54 Lines 104 + + Function: QXMutex_init + Parameters: (QXMutex * const me, uint_fast8_t prio) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 4 eLOC 3 lLOC 2 Comment 17 Lines 4 + + Function: QXMutex_lock + Parameters: (QXMutex * const me) + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 21 eLOC 19 lLOC 9 Comment 36 Lines 29 + + Function: QXMutex_unlock + Parameters: (QXMutex * const me) + Complexity Param 1 Return 1 Cyclo Vg 5 Total 7 + LOC 24 eLOC 21 lLOC 11 Comment 37 Lines 32 + + Function: QXSemaphore_init + Parameters: (QXSemaphore * const me, uint_fast16_t count) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 4 eLOC 3 lLOC 2 Comment 16 Lines 4 + + Function: QXSemaphore_wait + Parameters: (QXSemaphore * const me, uint_fast16_t const nTicks, uint_fa + st8_t const tickRate) + Complexity Param 3 Return 1 Cyclo Vg 4 Total 8 + LOC 27 eLOC 23 lLOC 18 Comment 34 Lines 35 + + Function: QXSemaphore_signal + Parameters: (QXSemaphore * const me) + Complexity Param 1 Return 1 Cyclo Vg 4 Total 6 + LOC 23 eLOC 19 lLOC 12 Comment 21 Lines 30 + + Function: QXThread_ctor + Parameters: (QXThread * const me, QXThreadHandler handler, uint_fast8_t + tickRate) + Complexity Param 3 Return 1 Cyclo Vg 1 Total 5 + LOC 13 eLOC 10 lLOC 5 Comment 24 Lines 16 + + Function: QXThread_init_ + Parameters: (QMsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 2 Lines 5 + + Function: QXThread_dispatch_ + Parameters: (QMsm * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 1 Lines 5 + + Function: QXThread_start_ + Parameters: (QActive * const me, uint_fast8_t prio, QEvt const *qSto[], + uint_fast16_t qLen, void *stkSto, uint_fast16_t stkSize, QEv + t const *ie) + Complexity Param 7 Return 1 Cyclo Vg 6 Total 14 + LOC 20 eLOC 17 lLOC 11 Comment 35 Lines 36 + + Function: QXThread_post_ + Parameters: (QActive * const me, QEvt const * const e, uint_fast16_t con + st margin) + Complexity Param 3 Return 1 Cyclo Vg 10 Total 14 + LOC 78 eLOC 64 lLOC 45 Comment 76 Lines 111 + + Function: QXThread_postLIFO_ + Parameters: (QActive * const me, QEvt const * const e) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 5 eLOC 4 lLOC 3 Comment 10 Lines 5 + + Function: QXThread_queueGet + Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) + Complexity Param 2 Return 1 Cyclo Vg 7 Total 10 + LOC 60 eLOC 52 lLOC 35 Comment 50 Lines 80 + + Function: QXThread_block_ + Parameters: (QXThread const * const me) + Complexity Param 1 Return 1 Cyclo Vg 1 Total 3 + LOC 5 eLOC 4 lLOC 3 Comment 9 Lines 6 + + Function: QXThread_unblock_ + Parameters: (QXThread const * const me) + Complexity Param 1 Return 1 Cyclo Vg 3 Total 5 + LOC 8 eLOC 5 lLOC 2 Comment 10 Lines 8 + + Function: QXThread_teArm_ + Parameters: (QXThread * const me, QSignal sig, uint_fast16_t const nTick + s, uint_fast8_t const tickRate) + Complexity Param 4 Return 1 Cyclo Vg 3 Total 8 + LOC 13 eLOC 9 lLOC 7 Comment 23 Lines 30 + + Function: QXThread_teDisarm_ + Parameters: (QXThread * const me) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 11 eLOC 8 lLOC 5 Comment 11 Lines 13 + + Function: QXThread_delay + Parameters: (uint_fast16_t const nTicks, uint_fast8_t const tickRate) + Complexity Param 2 Return 1 Cyclo Vg 1 Total 4 + LOC 18 eLOC 17 lLOC 14 Comment 10 Lines 29 + + Function: QXThread_delayCancel + Parameters: (QXThread * const me) + Complexity Param 1 Return 1 Cyclo Vg 2 Total 4 + LOC 14 eLOC 11 lLOC 7 Comment 2 Lines 16 + + Function: QXK_threadRet_ + Parameters: (void) + Complexity Param 0 Return 1 Cyclo Vg 1 Total 2 + LOC 10 eLOC 9 lLOC 7 Comment 12 Lines 12 + + Total: Functions + LOC 4044 eLOC 3374 lLOC 2187 InCmp 411 CycloCmp 644 + Function Points FP(LOC) 31.4 FP(eLOC) 26.2 FP(lLOC) 17.0 + + ------------------------------------------------------------------------ + + ~~ Project Functional Analysis ~~ + + Total Functions .......: 154 Total Physical Lines ..: 5206 + Total LOC .............: 4044 Total Function Pts LOC : 31.4 + Total eLOC ............: 3374 Total Function Pts eLOC: 26.2 + Total lLOC.............: 2187 Total Function Pts lLOC: 17.0 + Total Cyclomatic Comp. : 644 Total Interface Comp. .: 411 + Total Parameters ......: 257 Total Return Points ...: 154 + Total Comment Lines ...: 3317 Total Blank Lines .....: 638 + ------ ----- ----- ------ ------ ----- + Avg Physical Lines ....: 33.81 + Avg LOC ...............: 26.26 Avg eLOC ..............: 21.91 + Avg lLOC ..............: 14.20 Avg Cyclomatic Comp. ..: 4.18 + Avg Interface Comp. ...: 2.67 Avg Parameters ........: 1.67 + Avg Return Points .....: 1.00 Avg Comment Lines .....: 21.54 + ------ ----- ----- ------ ------ ----- + Max LOC ...............: 406 + Max eLOC ..............: 319 Max lLOC ..............: 197 + Max Cyclomatic Comp. ..: 93 Max Interface Comp. ...: 8 + Max Parameters ........: 7 Max Return Points .....: 1 + Max Comment Lines .....: 79 Max Total Lines .......: 427 + ------ ----- ----- ------ ------ ----- + Min LOC ...............: 3 + Min eLOC ..............: 2 Min lLOC ..............: 1 + Min Cyclomatic Comp. ..: 1 Min Interface Comp. ...: 1 + Min Parameters ........: 0 Min Return Points .....: 1 + Min Comment Lines .....: 1 Min Total Lines .......: 3 + + ------------------------------------------------------------------------ + + ~~ File Summary ~~ + + C Source Files *.c ....: 24 C/C++ Include Files *.h: 17 + C++ Source Files *.c* .: 0 C++ Include Files *.h* : 0 + C# Source Files *.cs ..: 0 Java Source File *.jav*: 0 + Other File Count ......: 0 Total File Count ......: 41 + ________________________________________________________________________ + +@endcode +*/ diff --git a/doxygen/modules.dox b/doxygen/modules.dox index 02e38d67..8dc4e366 100644 --- a/doxygen/modules.dox +++ b/doxygen/modules.dox @@ -5,31 +5,31 @@ Hierarchical Event Processor QEP is a universal, UML-compliant event processor that enables developers to code UML state machines in highly readable ANSI-C, in which every state machine element is mapped to code precisely, unambiguously, and exactly once (traceability). QEP fully supports hierarchical state nesting, which is the fundamental mechanism for reusing behavior across many states instead of repeating the same actions and transitions over and over again. */ - -/*###########################################################################*/ + +/*###########################################################################*/ /*! @defgroup qf QF @brief -Active Object (Actor) Framework +Active Object (Actor) Framework QF is a portable, event-driven, real-time framework for execution of active objects (concurrent state machines) specifically designed for real-time embedded (RTE) systems. */ - -/*###########################################################################*/ + +/*###########################################################################*/ /*! @defgroup qs QS @brief -Software Tracing Instrumentation +Software Tracing Instrumentation QS is software tracing system that enables developers to monitor live event-driven QP applications with minimal target system resources and without stopping or significantly slowing down the code. QS is an ideal tool for testing, troubleshooting, and optimizing QP applications. QS can even be used to support acceptance testing in product manufacturing. */ - -/*###########################################################################*/ -/*! @defgroup qv QV - -@brief -Cooperative Kernel - + +/*###########################################################################*/ +/*! @defgroup qv QV + +@brief +Cooperative Kernel + @description QV is a simple **cooperative** kernel (previously called "Vanilla" kernel). This kernel executes active objects one at a time, with priority-based scheduling performed before processing of each event. Due to naturally short duration of event processing in state machines, the simple QV kernel is often adequate for many real-time systems. @@ -44,14 +44,14 @@ The QV scheduler can also very easily detect when all event queues are empty, at Given the simplicity, portability, and low-resource consumption, the QV scheduler is very attractive. It allows you to partition the problem into active objects and execute these active objects orderly. The task-level response of this scheduler is the longest RTC step in the whole system, but because event-driven active objects don’t block, the RTC steps tend to be very short (typically just a few microseconds). Also, often you can break up longer RTC steps into shorter pieces, by posting an event to self and returning (“Reminder” state pattern). The self-posted event then triggers the continuation of longer processing. - -*/ - -/*###########################################################################*/ + +*/ + +/*###########################################################################*/ /*! @defgroup qk QK @brief -Preemptive Non-Blocking Kernel +Preemptive Non-Blocking Kernel QK is a tiny **preemptive**, priority-based, non-blocking kernel designed specifically for executing active objects. QK runs active objects in the same way as prioritized interrupt controller (such as NVIC in ARM Cortex-M) runs interrupts using the single stack (MSP in Cortex-M). Active objects process their events in run-to-completion fashion and remove themselves from the call stack, the same way as nested interrupts. At the same time high-priority active objects can preempt lower-priority active objects, in the same way as interrupts can preempt each other under a prioritized interrupt controller. QK meets all the requirement of the Rate Monotonic Scheduling (a.k.a. Rate Monotonic Analysis RMA) and can be used in hard real-time systems. @@ -63,10 +63,10 @@ Sometimes it is not practical to break up long RTC steps, and consequently the t */ -/*###########################################################################*/ /*! @defgroup qxk QXK +/*###########################################################################*//*! @defgroup qxk QXK @brief -Preemptive Dual-Mode Blocking RTOS Kernel +Preemptive Dual-Mode Blocking RTOS Kernel QXK is a small, preemptive, priority-based, dual-mode **blocking** kernel that executes active objects like the @ref qk "QK kernel", but can also execute traditional __blocking__ threads (extended threads). In this respect, QXK behaves exactly as a conventional __RTOS__ (Real-Time Operating System). QXK has been designed specifically for mixing event-driven active objects with traditional blocking code, such as commercial middleware (TCP/IP stacks, UDP stacks, embedded file systems, etc.) or legacy software. @@ -89,14 +89,14 @@ Example illustrates: 6 active objects plus two extended threads, QXK blocking de ------------------------------------------------------------------------------ @section qxk_overview QXK Overview - + QXK distinguishes two kinds of threads: **basic**-threads (non-blocking, run-to-completion activations) and **extended**-threads (blocking, typically structrued as endless loops). The basic-threads all nest on the same stack (Main Stack Pointer in ARM Cortex-M). The extended-threads use private per-thread stacks, as in conventional RTOS kernels. Any switching from basic- to extended-thread or extended- to extended-thread requires full context switch. On the other hand, switching from basic-thread to another basic-thread requires only activation of the basic-thread, which is much simpler and faster.
    @subsection qxk_classes Classes in QXK The figure below shows the main classes introduced in the QXK kernel and their relation to the classes of the QP framework. -@image html qxk_classes.gif "Classes of the QXK blocking kernel" +@image html qxk_classes.gif "Classes of the QXK blocking kernel"
    • 0 The abstract ::QActive class represents active objects in QP. This class contains the @c thread object of the underlying kernel (QXK thread-control-block in this case) as well as the event queue and the unique priority of the active object. @@ -212,7 +212,7 @@ As you can see in the list below, QXK provides most feat */ -/*###########################################################################*/ /*! @dir ../include +/*###########################################################################*//*! @dir ../include Platform-independent QP/C API @@ -220,7 +220,7 @@ Platform-independent QP/C API The QP/C include directory needs to be added to the compiler's include path in the applications using QP/C. */ -/*###########################################################################*/ /*! @dir ../source +/*###########################################################################*//*! @dir ../source Platform-independent QP/C implementation diff --git a/doxygen/ports_native.dox b/doxygen/ports_native.dox index 35d7565d..1dc28236 100644 --- a/doxygen/ports_native.dox +++ b/doxygen/ports_native.dox @@ -3,14 +3,14 @@ - @subpage lint (generic C compiler) - @subpage arm-cm (Cortex-M0/M0+/M3/M4/M4F) - - @ref arm-cm_qv (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets) + - @ref arm-cm_qv (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets) - @ref arm-cm_qk (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets) - @ref arm-cm_qxk (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets) - @subpage arm-cr (Cortex-R) - - @ref arm-cr_qv (GNU-ARM, IAR-ARM, TI-CCS toolsets) + - @ref arm-cr_qv (GNU-ARM, IAR-ARM, TI-CCS toolsets) - @ref arm-cr_qk (GNU-ARM, IAR-ARM, TI-CCS toolsets) - @subpage arm7-9 ("classic" ARM) - - @ref arm7-9_qv (GNU-ARM, IAR-ARM toolsets) + - @ref arm7-9_qv (GNU-ARM, IAR-ARM toolsets) - @ref arm7-9_qk (GNU-ARM, IAR-ARM toolsets) - @subpage msp430 ("classic" MSP430 and "extended" MSP430X) - @ref msp430_qv (TI-CCS, IAR toolsets) @@ -20,20 +20,20 @@ /*##########################################################################*/ /*! @page lint PC-Lint -@image html under_construction.jpg +@image html under_construction.jpg */ -/*##########################################################################*/ -/*! @page arm-cm ARM Cortex-M - +/*##########################################################################*/ +/*! @page arm-cm ARM Cortex-M + ------------------------------------------------------------------------------ -@section arm-cm_qv Cooperative QV Kernel -The QV port to ARM Cortex-M has been described in detail in Section 3 of the Quantum Leaps Application Note: QP and ARM Cortex-M with ARM-KEIL. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM. +@section arm-cm_qv Cooperative QV Kernel +The QV port to ARM Cortex-M has been described in detail in Section 3 of the Quantum Leaps Application Note: QP and ARM Cortex-M with ARM-KEIL. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section arm-cm_qk Preemptive Non-Blocking QK Kernel -The QK port to ARM Cortex-M has been described in detail in Section 4 of the Quantum Leaps Application Note: QP and ARM Cortex-M with ARM-KEIL. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM. +The QK port to ARM Cortex-M has been described in detail in Section 4 of the Quantum Leaps Application Note: QP and ARM Cortex-M with ARM-KEIL. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM. ------------------------------------------------------------------------------ @@ -54,7 +54,7 @@ The preemptive, blocking QXK kernel works on ARM Cortex-M as follows: @n > NOTE: Right before starting multitasking, the QXK kernel re-uses the main C-stack as the Main Stack (for interrupts and exceptions), and assigns the provided idle stack to the internal idle thread. -5. You need to explicitly **assign priorities of the all interrupts** used in your application, according to the Application Note: Setting ARM Cortex-M Interrupt Priorities in QP 5.1 and Higher. +5. You need to explicitly **assign priorities of the all interrupts** used in your application, according to the Application Note: Setting ARM Cortex-M Interrupt Priorities in QP 5.1 and Higher. 6. It is strongly recommended that you do not assign the lowest NVIC priority (0xFF) to any interrupt in your application, because it is used by the PendSV handler. For example, with 3 bits of priority implemented in the NVIC, this leaves the following 7 priority levels for you (listed from the lowest to the highest urgency): 0xC0, 0xA0, 0x80, 0x60, 0x40, 0x20, and 0x00 (the highest priority). @n @@ -76,13 +76,13 @@ If you have the Cortex-M4F/M7 CPU and your application is compiled with the VFP @note A QXK thread (both an active object thread and a "naked" blocking thread) that uses the VFP will use 136 more bytes of its private stack space than a thread that does not use the VFP. Also, a thread that uses the VFP will take longer to perform the context switch. -*/ +*/ /*##########################################################################*/ /*! @page arm-cr ARM Cortex-R -@image html under_construction.jpg +@image html under_construction.jpg -@section arm-cr_qk Preemptive QK Kernel +@section arm-cr_qk Preemptive QK Kernel \includelineno ports/arm-cr/qk/iar/qk_port.s @@ -92,9 +92,9 @@ A QXK thread (both an active object thread and a "naked" blocking thread) that u /*##########################################################################*/ /*! @page arm7-9 ARM7/ARM9 -@image html under_construction.jpg +@image html under_construction.jpg -@section arm7-9_qk Preemptive QK Kernel +@section arm7-9_qk Preemptive QK Kernel \includelineno ports/arm7-9/qk/iar/qk_port.s @@ -104,10 +104,10 @@ A QXK thread (both an active object thread and a "naked" blocking thread) that u /*##########################################################################*/ /*! @page msp430 MSP430 -@image html under_construction.jpg +@image html under_construction.jpg + +@section msp430_qk Preemptive QK Kernel -@section msp430_qk Preemptive QK Kernel - @section msp430_qv Cooperative QV Kernel */ diff --git a/doxygen/ports_os.dox b/doxygen/ports_os.dox index ef3ac006..1551fafe 100644 --- a/doxygen/ports_os.dox +++ b/doxygen/ports_os.dox @@ -2,25 +2,25 @@ /*! @page ports_os Ports to Third-Party OS - @subpage posix (Linux, embedded-Linux, BSD, etc.) -- @subpage win32 API (Windows) -- @subpage win32-qv (Windows with QV) +- @subpage win32 API (Windows) +- @subpage win32-qv (Windows with QV) */ /*##########################################################################*/ /*! @page posix POSIX -@image html under_construction.jpg +@image html under_construction.jpg */ -/*##########################################################################*/ -/*! @page win32 Win32 API (Windows) +/*##########################################################################*/ +/*! @page win32 Win32 API (Windows) -@image html under_construction.jpg - -*/ -/*##########################################################################*/ -/*! @page win32-qv Win32-QV (Windows with QV) +@image html under_construction.jpg -@image html under_construction.jpg - -*/ +*/ +/*##########################################################################*/ +/*! @page win32-qv Win32-QV (Windows with QV) + +@image html under_construction.jpg + +*/ diff --git a/doxygen/ports_rtos.dox b/doxygen/ports_rtos.dox index cc7ea3ed..70dad964 100644 --- a/doxygen/ports_rtos.dox +++ b/doxygen/ports_rtos.dox @@ -1,34 +1,41 @@ /*##########################################################################*/ /*! @page ports_rtos Ports to Third-Party RTOS -The main purpose of integrating QP/C with conventional RTOSes is to enable you to incorporate various communication stacks (TCP/IP, USB, CAN, etc.) as well as other middleware, which requires the ability to **block** the task code. +

      The most important reason why you might consider using a traditional RTOS kernel for executing event-driven QP/C applications is compatibility with the existing software. For example, most communication stacks (TCP/IP, USB, CAN, etc.) are designed for a traditional **blocking** kernel. In addition, a lot of legacy code requires blocking mechanisms, such as semaphores or time-delays. A conventional RTOS allows you to run the existing software components as regular "blocking" tasks in parallel to the event-driven QP/C application. +

      + +Another reason you might be interested in running QP/C on top of a conventional RTOS is **safety certification**, which your RTOS kernel might have but the built-in QP kernels currently don't provide. + +@note +You do **not** need to use a traditional RTOS just to achieve preemptive multitasking with QP. The @ref comp_qk "preemptive QK kernel", available as part of the QP package, supports preemptive priority-based multitasking and is fully compatible with Rate Monotonic Scheduling to achieve guaranteed, hard real-time performance. The preemptive, run-to-completion QK kernel perfectly matches the run-to-completion execution semantics of active objects, yet it is simpler, faster, and more efficient than any traditional blocking kernel. + +The QP/C framework can work with virtually any traditional real-time operating +system (RTOS). The currently supported 3rd-party RTOS kernels are: - @subpage embos - @subpage threadx - @subpage ti-rtos - @subpage ucos-ii +- OSEK/VDX RTOS ERIKA Enterprise + +Combined with a conventional RTOS, QP/C takes full advantage of the multitasking capabilities of the RTOS by executing each active object in a separate RTOS task. The QP/C Platform Abstraction Layer (PAL) includes an abstract RTOS interface to enable integration between QP/C and the underlying RTOS. Specifically, the PAL allows adapting most message queue variants as event queues of active objects as well as most memory partitions as QP/C event pools. @attention Starting from version 5.6.0, QP/C includes the conventional, preemptive @ref qxk " blocking QXK kernel", which is recommended as the preferred RTOS kernel for applications that need to mix active objects with traditional blocking code. Due to the tight and optimal integration between QXK and the rest of QP, QXK offers better performance and smaller memory footprint than any @ref ports_rtos "QP port to a 3rd-party RTOS". Additionally, QXK is already included in QP, so you avoid additional licensing costs of 3rd-party kernels. -\n -@note -You do **not** need to use a traditional RTOS just to achieve preemptive multitasking with QP. The @ref comp_qk "preemptive QK kernel", available as part of the QP package, supports preemptive priority-based multitasking and is fully compatible with Rate Monotonic Scheduling to achieve guaranteed, hard real-time performance. The preemptive, run-to-completion QK kernel perfectly matches the run-to-completion execution semantics of active objects, yet it is simpler, faster, and more efficient than any traditional blocking kernel. - - */ /*##########################################################################*/ /*! @page embos embOS -@image html under_construction.jpg +@image html under_construction.jpg */ /*##########################################################################*/ /*! @page threadx ThreadX -@image html under_construction.jpg +@image html under_construction.jpg -*/ +*/ /*##########################################################################*/ /*! @page ti-rtos TI-RTOS Kernel (SYS/BIOS) @@ -37,9 +44,9 @@ You do **not** need to use a traditional RTOS just to achieve preemptive multita @section ti-rtos_about About the QP Port to TI-RTOS The ports/ti-rtos/ directory contains a generic platform-independent QP/C port to TI-RTOS kernel (SYS/BIOS). The provided QP port to TI-RTOS has been designed *generically* to rely exclusively on the existing TI-RTOS API. This means that the port should run without changes on any CPU/compiler platform supported by TI-RTOS. -@attention -The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the 3rd_party/ directory in the QP/C distribution. Therefore, you need to **download and install** TI-RTOS on your machine before you can build any examples. Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: SPRUHU5D) for more information. - +@attention +The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the 3rd_party/ directory in the QP/C distribution. Therefore, you need to **download and install** TI-RTOS on your machine before you can build any examples. Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: SPRUHU5D) for more information. + The QP-TI-RTOS port works as follows: @@ -334,6 +341,6 @@ qpc @note Specifically, the QP source files qf_actq.c and qf_mem.c must **NOT** be included in the build, because this functionality is taken from uC/OS-II. -@image html under_construction.jpg +@image html under_construction.jpg */ diff --git a/doxygen/rsm.bat b/doxygen/rsm.bat index 41a88155..b593d3d5 100644 --- a/doxygen/rsm.bat +++ b/doxygen/rsm.bat @@ -29,7 +29,7 @@ :: along with this program. If not, see . :: :: Contact information: -:: http://www.state-machine.com +:: https://state-machine.com :: mailto:info@state-machine.com :: ========================================================================== setlocal diff --git a/doxygen/sas.dox b/doxygen/sas.dox index ccc8a4a2..1ec35348 100644 --- a/doxygen/sas.dox +++ b/doxygen/sas.dox @@ -6,9 +6,9 @@ - @subpage sas_intro + @ref sas_purpose - + @ref sas_conv + + @ref sas_conv + @ref sas_scope - + @ref sas_audience + + @ref sas_audience + @ref sas_refs - @subpage sas_descr + @ref sas_prod @@ -26,15 +26,15 @@ + @ref sas_constr -@next{sas_intro} +@next{sas_intro} */ /*##########################################################################*/ -/*! @page sas_intro Introduction +/*! @page sas_intro Introduction Embedded software developers from different industries are independently re-discovering patterns for building concurrent software that is safer, more responsive and easier to understand than naked threads and various blocking mechanisms of a traditional Real-Time Operating System (RTOS). These best practices universally favor event-driven, asynchronous, non-blocking, encapsulated state machines instead of naked, blocking RTOS threads. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_purpose Purpose

      The specification of the QP/C @termref{ao} @termref{framework} is to represent a reusable @termref{architecture}, which supports efficient implementation of the @termref{ao} model of computation for deeply embedded applications, such as single-chip microcontrollers.

      @@ -42,7 +42,7 @@ Embedded software developers from different industries are independently re-disc QP/C (Quantum Platform in C) is a lightweight software @termref{framework, framework} for building responsive and modular real-time embedded applications as systems of cooperating, event-driven @termref{ao, active objects} (@termref{ao, actors}). ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_conv Document Conventions
      @@ -54,11 +54,11 @@ Embedded software developers from different industries are independently re-disc Requirement definitions use consistent terminology to indicate whether something is mandatory or desirable. _Shall_ is used to denote **mandatory** behavior. _Should_ is used to denote a **desirable** behavior that should typically take place, but might not happen all the time or might be optional in uncommon cases. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_scope Project Scope ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_audience Intended Audience This SRS document is primarily intended for **embedded software engineers**, who develop applications based on the QP/C framework. @@ -66,34 +66,34 @@ This SRS document is primarily intended for **embedded software engineers**, who This SRS can be also of interest to test engineers, software architects, system engineers, quality-assurance engineers, hardware engineers, as well as managers overseeing the software development. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_refs References - -@next{sas_descr} + +@next{sas_descr} */ /*##########################################################################*/ -/*! @page sas_descr Overall Description - ------------------------------------------------------------------------------- +/*! @page sas_descr Overall Description + +------------------------------------------------------------------------------ @section sas_prod Product Perspective ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_funct Product Functions - @reqref{RQPC101} - @reqref{RQPC102} ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_user User Characteristics The main users of the QP/C framework are **embedded software engineers**, who develop applications based on the QP/C framework. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_assume Assumptions and Dependencies @next{sas} @@ -102,7 +102,7 @@ The main users of the QP/C framework are **embedded software engineers**, who de /*! @page sas Architecture Elements ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_fun Functional Requirements
      @@ -133,7 +133,7 @@ This is a useful thing to have
      @subsection sas_qxk Preemptive Blocking Kernel ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_non-fun Non-functional Requirements
      @@ -156,7 +156,7 @@ This is a useful thing to have @subsection sas_secure Security Requirements ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sas_constr Constraints
      diff --git a/doxygen/sds.dox b/doxygen/sds.dox index 927e47dc..833820a4 100644 --- a/doxygen/sds.dox +++ b/doxygen/sds.dox @@ -6,9 +6,9 @@ - @subpage sds_intro + @ref sds_purpose - + @ref sds_conv + + @ref sds_conv + @ref sds_scope - + @ref sds_audience + + @ref sds_audience + @ref sds_refs - @subpage sds_over + @ref sds_req @@ -34,16 +34,16 @@ - @ref sds_qk - @ref sds_qxk -@next{sds_intro} +@next{sds_intro} */ /*##########################################################################*/ -/*! @page sds_intro Introduction - +/*! @page sds_intro Introduction + @section sds_purpose Purpose QP/C (Quantum Platform in C) is a lightweight software @termref{framework, framework} for building responsive and modular real-time embedded applications as systems of cooperating, event-driven @termref{ao, active objects} (@termref{ao, actors}). ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_conv Document Conventions
      @@ -55,11 +55,11 @@ Requirement definitions use consistent terminology to indicate whether something is mandatory or desirable. _Shall_ is used to denote **mandatory** behavior. _Should_ is used to denote a **desirable** behavior that should typically take place, but might not happen all the time or might be optional in uncommon cases. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_scope Project Scope ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_audience Intended Audience This SRS document is primarily intended for **embedded software engineers**, who develop applications based on the QP/C framework. @@ -67,91 +67,91 @@ This SRS document is primarily intended for **embedded software engineers**, who This SRS can be also of interest to test engineers, software architects, system engineers, quality-assurance engineers, hardware engineers, as well as managers overseeing the software development. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_refs References -@next{sds_over} +@next{sds_over} */ /*##########################################################################*/ -/*! @page sds_over Software Overview +/*! @page sds_over Software Overview ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_req Allocation of Requirements ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_arch Software Architecture -@next{sds_viewpoints} +@next{sds_viewpoints} */ /*##########################################################################*/ -/*! @page sds_viewpoints Design Viewpoints +/*! @page sds_viewpoints Design Viewpoints ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_context Context Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_composition Composition Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_logical Logical Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_dependency Dependency Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_information Information Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_use Patterns Use Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_interface Interface Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_structure Structure Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_interaction Interaction Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_state State Dynamics Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_algorithm Algorithm Viewpoint ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_resource Resource Viewpoint -@next{sds} +@next{sds} */ /*##########################################################################*/ -/*! @page sds Software Module Description +/*! @page sds Software Module Description ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_req Allocation of Requirements ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section sds_arch Software Architecture -@next{sds} +@next{sds} */ \ No newline at end of file diff --git a/doxygen/spec.dox b/doxygen/spec.dox index 228f3541..ded114de 100644 --- a/doxygen/spec.dox +++ b/doxygen/spec.dox @@ -1,13 +1,13 @@ -/*! @page spec Specifications +/*! @page spec Specifications The following documents contain specifications for the QP/C software framework. - -- @subpage srs_toc (Software Requirements Specification) -- @subpage sas_toc (Software Architecture Specification) -- @subpage sds_toc (Software Design Specification, a.k.a. Software Design Description SDD) + +- @subpage srs_toc (Software Requirements Specification) +- @subpage sas_toc (Software Architecture Specification) +- @subpage sds_toc (Software Design Specification, a.k.a. Software Design Description SDD) @note The specification documents are included as an integral part of the "QP/C Reference Manual" for bi-directional @termref{traceabilty, traceabilty} of the @ref srs_toc "requirements" to the @ref sas_toc "architecture", the @ref sds_toc "design", the code, and the tests. Specifically, the electronic, hyper-text format of all these documents enables creating *hyper-links*, so it possible, for example, to simply click on a hyper-link to a requirement to get to its description. - -@next{srs_toc} + +@next{srs_toc} */ diff --git a/doxygen/srs.dox b/doxygen/srs.dox index d2d24f4d..0703992a 100644 --- a/doxygen/srs.dox +++ b/doxygen/srs.dox @@ -8,9 +8,9 @@ + @ref srs_concepts + @ref srs_purpose + @ref srs_scope - + @ref srs_audience + + @ref srs_audience + @ref srs_conv - + @ref srs_refs + + @ref srs_refs - @subpage srs_descr + @ref srs_prod + @ref srs_funct @@ -27,10 +27,10 @@ + @ref srs_constr -@next{srs_intro} +@next{srs_intro} */ /*##########################################################################*/ -/*! @page srs_intro Introduction +/*! @page srs_intro Introduction @tableofcontents @@ -50,7 +50,7 @@ This document describes the requirements of the QP/C software framework, which provides such a reusable software architecture for real-time embedded (RTE) systems. This architecture is based on event-driven, asynchronous, non-blocking, encapsulated @ref srs_ao "active objects". ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_concepts Key Concepts This section introduces the key concepts related to this increasingly popular "reactive approach", and specifically how they apply to the QP/C active object framework. Please refer to the Section @ref srs_refs for more information about the concepts. @@ -101,16 +101,16 @@ In contrast, event-driven active objects don't need to block, because in event-d As suggested in the UML specification and similar as in ROOM, the behavior of each Active Object can be specified by means of a hierarchical state machine (UML statechart), which is a very effective and elegant technique of decomposing event-driven behavior. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_purpose Purpose The purpose of the QP/C @termref{ao} @termref{framework} is to provide a reusable software @termref{architecture} and efficient implementation of the @termref{ao} model of computation for deeply embedded applications, such as single-chip microcontrollers. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_scope Project Scope ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_audience Intended Audience This SRS document is primarily intended for **embedded software engineers**, who develop applications based on the QP/C framework. @@ -118,7 +118,7 @@ This SRS document is primarily intended for **embedded software engineers**, who This SRS can be also of interest to test engineers, software architects, system engineers, quality-assurance engineers, hardware engineers, as well as managers overseeing the software development. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_conv Document Conventions
      @@ -130,33 +130,33 @@ This SRS can be also of interest to test engineers, software architects, system Requirement definitions use consistent terminology to indicate whether something is mandatory or desirable. _Shall_ is used to denote **mandatory** behavior. _Should_ is used to denote a **desirable** behavior that should typically take place, but might not happen all the time or might be optional in uncommon cases. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_refs References -@next{srs_descr} +@next{srs_descr} */ /*##########################################################################*/ -/*! @page srs_descr Overall Description - ------------------------------------------------------------------------------- +/*! @page srs_descr Overall Description + +------------------------------------------------------------------------------ @section srs_prod Product Perspective ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_funct Product Functions - @reqref{RQPC101} - @reqref{RQPC102} ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_user User Characteristics The main users of the QP/C framework are **embedded software engineers**, who develop applications based on the QP/C framework. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_assume Assumptions and Dependencies @next{srs} @@ -165,7 +165,7 @@ The main users of the QP/C framework are **embedded software engineers**, who de /*! @page srs Requirements ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_fun Functional Requirements
      @@ -196,7 +196,7 @@ This is a useful thing to have
      @subsection srs_qxk Preemptive Blocking Kernel ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_non-fun Non-functional Requirements
      @@ -219,7 +219,7 @@ This is a useful thing to have @subsection srs_secure Security Requirements ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section srs_constr Constraints
      diff --git a/doxygen/struct.dox b/doxygen/struct.dox index 790d9b08..932d93ad 100644 --- a/doxygen/struct.dox +++ b/doxygen/struct.dox @@ -1,7 +1,7 @@ /*! @page struct Structure and Features @tableofcontents - + @section files Directories and Files The following annotated directory tree lists the top-level directories provided in the standard QP/C distribution. @@ -29,19 +29,19 @@ The standard QP/C distribution contains many @ref exa "Example Projects", which ------------------------------------------------------------------------------ @section comp Components of QP/C -

      As shown in the diagram below, the QP/C framework has a layered structure. The Target hardware sits at the bottom. The Board Support Package (BSP) above it provides access to the board-specific features, such as the peripherals. The real-time kernel (QV, QK, QXK, or a conventional 3rd-party RTOS) provides the foundation for multitasking, such as task scheduling, context-switching, and inter-task communication. Based on these services, the event-driven framework (QF) supplies the event-driven infrastructure for executing active objects and ensuring thread-safe event-driven exchanges among them. Finally, the event-processor (QEP) implements the hierarchical state machine semantics (based on UML statecharts). The top layer is the application-level code consisting of loosely-coupled active objects. +

      As shown in the diagram below, the QP/C framework has a layered structure. The Target hardware sits at the bottom. The Board Support Package (BSP) above it provides access to the board-specific features, such as the peripherals. The real-time kernel (QV, QK, QXK, or a conventional 3rd-party RTOS) provides the foundation for multitasking, such as task scheduling, context-switching, and inter-task communication. Based on these services, the event-driven framework (QF) supplies the event-driven infrastructure for executing active objects and ensuring thread-safe event-driven exchanges among them. Finally, the event-processor (QEP) implements the hierarchical state machine semantics (based on UML statecharts). The top layer is the application-level code consisting of loosely-coupled active objects.

      -@image html qp_components.jpg "Components of the QP Framework" +@image html qp_components.jpg "Components of the QP Framework" @n
      @subsection comp_qep QEP Hierarchical Event Processor -QEP is a universal, UML-compliant event processor that provides implementation of hierarchical state machines (UML statecharts) in highly readable ANSI-C. The hallmark of QEP implementation strategy is **traceability**, which means that every state machine element is mapped to code precisely, unambiguously, and exactly once. QEP fully supports hierarchical state nesting, which is the fundamental mechanism for reusing behavior across many states instead of repeating the same actions and transitions over and over again. (See @ref qep for detailed documentation). +QEP is a universal, UML-compliant event processor that provides implementation of hierarchical state machines (UML statecharts) in highly readable ANSI-C. The hallmark of QEP implementation strategy is **traceability**, which means that every state machine element is mapped to code precisely, unambiguously, and exactly once. QEP fully supports hierarchical state nesting, which is the fundamental mechanism for reusing behavior across many states instead of repeating the same actions and transitions over and over again. (See @ref qep for detailed documentation).
      @subsection comp_qf QF Active-Object Framework -QF is a lightweight, event-driven, active object framework specifically designed for real-time embedded (RTE) systems. The main job of the framework is to guarantee **thread-safe**, run-to-completion event processing within each active object. This includes direct event posting as well as publish-subscribe event delivery, event queuing, and time events (time-delayed requests for posing events). (See @ref qf for detailed documentation). +QF is a lightweight, event-driven, active object framework specifically designed for real-time embedded (RTE) systems. The main job of the framework is to guarantee **thread-safe**, run-to-completion event processing within each active object. This includes direct event posting as well as publish-subscribe event delivery, event queuing, and time events (time-delayed requests for posing events). (See @ref qf for detailed documentation).
      @subsection comp_qv QV Cooperative Kernel @@ -61,27 +61,27 @@ QXK has most features you might expect of a traditional blocking RTOS kernel and
      @subsection comp_qs QS Software Tracing System -QS is software tracing system that enables developers to monitor live event-driven QP applications with minimal target system resources and without stopping or significantly slowing down the code. QS is an ideal tool for testing, troubleshooting, and optimizing QP applications. QS can even be used to support acceptance testing in product manufacturing. (See @ref qs for detailed documentation). +QS is software tracing system that enables developers to monitor live event-driven QP applications with minimal target system resources and without stopping or significantly slowing down the code. QS is an ideal tool for testing, troubleshooting, and optimizing QP applications. QS can even be used to support acceptance testing in product manufacturing. (See @ref qs for detailed documentation). ------------------------------------------------------------------------------- -@section classes Classes in QP/C +------------------------------------------------------------------------------ +@section classes Classes in QP/C The figure below shows the main classes comprising the QP/C framework and their relation to the application-level code, such as the @ref game example application (shown at the bottom 1/3 of the diagram). -@image html qp_classes.gif "Main Classes in the QP Framework" +@image html qp_classes.gif "Main Classes in the QP Framework"
      • 0 The ::QEvt class represents events without parameters and serves as the base class for derivation of time events and any events with parameters. For example, application-level events `ObjectPosEvt` and `ObjectImageEvt` inherit ::QEvt and add to it some parameters (see [8]).
        • -
      • 1 The abstract ::QHsm class represents a Hierarchical State Machine (HSM) with full support for hierarchical nesting of states, entry/exit actions, initial transitions, and transitions to history in any composite state. This class is designed for ease of manual coding of HSMs in C, but it is also supported by the QM modeling tool. -::QHsm is also the base class for the ::QMsm state machine, which provides a superior efficiency, but requires the use of the QM modeling tool to generate code. +
      • 1 The abstract ::QHsm class represents a Hierarchical State Machine (HSM) with full support for hierarchical nesting of states, entry/exit actions, initial transitions, and transitions to history in any composite state. This class is designed for ease of manual coding of HSMs in C, but it is also supported by the QM modeling tool. +::QHsm is also the base class for the ::QMsm state machine, which provides a superior efficiency, but requires the use of the QM modeling tool to generate code.
        • -
      • 2 The abstract ::QActive class represents an active object that uses the ::QHsm style implementation strategy for state machines. This strategy is tailored to manual coding, but it is also supported by the QM modeling tool. The resulting code is slower than in the ::QMsm-style implementation strategy. The @ref game application provides an example of application-level classes deriving from ::QActive and ::QHsm (see [6] and [7]). +
      • 2 The abstract ::QActive class represents an active object that uses the ::QHsm style implementation strategy for state machines. This strategy is tailored to manual coding, but it is also supported by the QM modeling tool. The resulting code is slower than in the ::QMsm-style implementation strategy. The @ref game application provides an example of application-level classes deriving from ::QActive and ::QHsm (see [6] and [7]).
        • -
      • 3 The abstract ::QMsm class (QM State Machine) derives from ::QHsm and implements the fastest and the most efficient strategy for coding hierarchical state machines, but this strategy is not human-maintainable and requires the use of the QM modeling tool. The class is abstract, meaning that it is not designed to be instantiated directly, but rather only for inheritance. +
      • 3 The abstract ::QMsm class (QM State Machine) derives from ::QHsm and implements the fastest and the most efficient strategy for coding hierarchical state machines, but this strategy is not human-maintainable and requires the use of the QM modeling tool. The class is abstract, meaning that it is not designed to be instantiated directly, but rather only for inheritance.
      • 4 The abstract ::QMActive class represents an active object that uses the ::QMsm state machine implementation strategy. This strategy requires the use of the QM modeling tool to generate state machine code automatically, but the code is faster than in the ::QHsm style implementation strategy and needs less run-time support (smaller event-processor). @@ -102,16 +102,16 @@ The figure below shows the main classes comprising the QP/C framework and their
      ------------------------------------------------------------------------------- -@section sm State Machines +------------------------------------------------------------------------------ +@section sm State Machines -The behavior of each active object in QP/C is specified by means of a hierarchical state machine (UML statechart), which is the most effective and elegant technique of decomposing event-driven behavior. The most important innovation of UML state machines over classical finite state machines (FSMs) is the hierarchical state nesting. The value of state nesting lies in avoiding repetitions, which are inevitable in the traditional "flat" FSM formalism and are the main reason for the "state-transition explosion" in FSMs. The semantics of state nesting allow substates to define only the differences of behavior from the superstates, thus promoting sharing and reusing behavior. +The behavior of each active object in QP/C is specified by means of a hierarchical state machine (UML statechart), which is the most effective and elegant technique of decomposing event-driven behavior. The most important innovation of UML state machines over classical finite state machines (FSMs) is the hierarchical state nesting. The value of state nesting lies in avoiding repetitions, which are inevitable in the traditional "flat" FSM formalism and are the main reason for the "state-transition explosion" in FSMs. The semantics of state nesting allow substates to define only the differences of behavior from the superstates, thus promoting sharing and reusing behavior. -@note -The Quantum Leaps Application Note A Crash Course in UML State Machines introduces the main state machine concepts backed up by examples. +@note +The Quantum Leaps Application Note A Crash Course in UML State Machines introduces the main state machine concepts backed up by examples. @htmlonly
      - +
      Application Note: A Crash Course in UML State Machines
      @@ -124,13 +124,13 @@ Application Note: A Crash Course in UML State Machines The hallmark of the QP/C implementation of UML state machines is **traceability**, which is direct, precise, and unambiguous mapping of every state machine element to human-readable, portable, MISRA-compliant C code. Preserving the traceability from requirements through design to code is essential for mission-critical systems, such as medical devices or avionic systems. ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section coding Coding Standard -The QP/C framework has been developed in strict adherence to the documented Quantum Leaps Coding Standard. +The QP/C framework has been developed in strict adherence to the documented Quantum Leaps Coding Standard. @htmlonly
      - +
      Application Note: Quantum Leaps C/C++ Coding Standard
      @@ -138,7 +138,7 @@ Application Note: Quantum Leaps C/C++ Coding Standard @endhtmlonly ------------------------------------------------------------------------------- +------------------------------------------------------------------------------ @section misra MISRA Compliance

      The QP/C framework complies with most of the Motor Industry Software Reliability Association (MISRA) MISRA-C:2004 rules. @@ -146,14 +146,14 @@ Application Note: Quantum Leaps C/C++ Coding Standard @htmlonly

      - +
      Application Note: QP/C MISRA-C:2004 Compliance Matrix
      @endhtmlonly -All deviations are carefully limited into very specific contexts and are documented with the Application Note: QP/C MISRA-C:2004 Compliance Matrix. +All deviations are carefully limited into very specific contexts and are documented with the Application Note: QP/C MISRA-C:2004 Compliance Matrix. @note MISRA and MISRA C are registered trademarks of MIRA Ltd, held on behalf of the MISRA Consortium. @@ -168,6 +168,6 @@ The QP/C framework comes with extensive support for automatic rule checking by m @sa @ref lint "Lint Port" -@next{exa} -*/ - +@next{exa} +*/ + diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/blinky.h b/examples/arm-cm/blinky_efm32-slstk3401a/blinky.h index 272a3e37..a6d2ca8f 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/blinky.h +++ b/examples/arm-cm/blinky_efm32-slstk3401a/blinky.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #ifndef blinky_h diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/bsp.h b/examples/arm-cm/blinky_efm32-slstk3401a/bsp.h index d5e592d7..3ebf8881 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/bsp.h +++ b/examples/arm-cm/blinky_efm32-slstk3401a/bsp.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/main.c b/examples/arm-cm/blinky_efm32-slstk3401a/main.c index d3d3cfe4..385cdd33 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/main.c +++ b/examples/arm-cm/blinky_efm32-slstk3401a/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qk/bsp.c b/examples/arm-cm/blinky_efm32-slstk3401a/qk/bsp.c index 79d62c2f..bbd04a09 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/qk/bsp.c +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qk/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/Makefile b/examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/Makefile index 844f1e7d..237ce35c 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/Makefile +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/qf_act.dasm b/examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/qf_act.dasm new file mode 100644 index 00000000..16367a56 --- /dev/null +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/qf_act.dasm @@ -0,0 +1,70 @@ + +dbg\qf_act.o: file format elf32-littlearm + + +Disassembly of section .text.QF_add_: + +00000000 : + 0: b538 push {r3, r4, r5, lr} + 2: 4605 mov r5, r0 + 4: 6a84 ldr r4, [r0, #40] ; 0x28 + 6: 1e63 subs r3, r4, #1 + 8: 2b1f cmp r3, #31 + a: d803 bhi.n 14 + c: 4b0a ldr r3, [pc, #40] ; (38 ) + e: f853 3024 ldr.w r3, [r3, r4, lsl #2] + 12: b11b cbz r3, 1c + 14: 2164 movs r1, #100 ; 0x64 + 16: 4809 ldr r0, [pc, #36] ; (3c ) + 18: f7ff fffe bl 0 + 1c: f3ef 8311 mrs r3, BASEPRI + 20: b672 cpsid i + 22: 223f movs r2, #63 ; 0x3f + 24: f382 8811 msr BASEPRI, r2 + 28: b662 cpsie i + 2a: 4a03 ldr r2, [pc, #12] ; (38 ) + 2c: f842 5024 str.w r5, [r2, r4, lsl #2] + 30: f383 8811 msr BASEPRI, r3 + 34: bd38 pop {r3, r4, r5, pc} + 36: bf00 nop + ... + +Disassembly of section .text.QF_remove_: + +00000000 : + 0: b538 push {r3, r4, r5, lr} + 2: 4604 mov r4, r0 + 4: 6a85 ldr r5, [r0, #40] ; 0x28 + 6: 1e6b subs r3, r5, #1 + 8: 2b1f cmp r3, #31 + a: d804 bhi.n 16 + c: 4b0b ldr r3, [pc, #44] ; (3c ) + e: f853 3025 ldr.w r3, [r3, r5, lsl #2] + 12: 4298 cmp r0, r3 + 14: d003 beq.n 1e + 16: 21c8 movs r1, #200 ; 0xc8 + 18: 4809 ldr r0, [pc, #36] ; (40 ) + 1a: f7ff fffe bl 0 + 1e: f3ef 8311 mrs r3, BASEPRI + 22: b672 cpsid i + 24: 223f movs r2, #63 ; 0x3f + 26: f382 8811 msr BASEPRI, r2 + 2a: b662 cpsie i + 2c: 2200 movs r2, #0 + 2e: 4903 ldr r1, [pc, #12] ; (3c ) + 30: f841 2025 str.w r2, [r1, r5, lsl #2] + 34: 6062 str r2, [r4, #4] + 36: f383 8811 msr BASEPRI, r3 + 3a: bd38 pop {r3, r4, r5, pc} + ... + +Disassembly of section .text.QF_bzero: + +00000000 : + 0: b129 cbz r1, e + 2: 1841 adds r1, r0, r1 + 4: 2300 movs r3, #0 + 6: f800 3b01 strb.w r3, [r0], #1 + a: 4281 cmp r1, r0 + c: d1fb bne.n 6 + e: 4770 bx lr diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewd b/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewd index cb562c54..cdfd1002 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewd +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewd @@ -1,4741 +1,4213 @@ - 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0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - + + C-SPY + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + - - diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewp b/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewp index 48b00ad4..c72e870e 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewp +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qk/iar/blinky-qk.ewp @@ -1,3040 +1,3190 @@ - - + - 2 - - Debug - - ARM - - 1 - - General - 3 - - 24 - 1 + 3 + + Debug + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 17 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 24 - 1 + + General + 3 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Release + + ARM + 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 17 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Spy - - ARM - - 1 - - General - 3 - - 24 - 1 + + General + 3 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Spy + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 17 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Application - - $PROJ_DIR$\..\..\blinky.c - - - $PROJ_DIR$\..\..\blinky.h - - - $PROJ_DIR$\..\bsp.c - - - $PROJ_DIR$\..\..\bsp.h - - - $PROJ_DIR$\..\..\main.c - - - $PROJ_DIR$\..\..\..\..\..\include\qstamp.c - - - - efm32pg1b - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_assert.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_cmu.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_emu.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_gpio.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_system.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\iar\startup_efm32pg1b.s - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\system_efm32pg1b.c - - - - QP - - $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_act.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_actq.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_mem.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_time.c - - - $PROJ_DIR$\..\..\..\..\..\source\qk.c - - - $PROJ_DIR$\..\..\..\..\..\source\qk_mutex.c - - - $PROJ_DIR$\..\..\..\..\..\source\qk_pkg.h - - - - QP_port - - $PROJ_DIR$\..\..\..\..\..\ports\arm-cm\qk\iar\qk_port.s - - - - QS - - Debug - Release - - - $PROJ_DIR$\..\..\..\..\..\source\qs.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qs_rx.c - - + + General + 3 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Application + + $PROJ_DIR$\..\..\blinky.c + + + $PROJ_DIR$\..\..\blinky.h + + + $PROJ_DIR$\..\bsp.c + + + $PROJ_DIR$\..\..\bsp.h + + + $PROJ_DIR$\..\..\main.c + + + $PROJ_DIR$\..\..\..\..\..\include\qstamp.c + + + + efm32pg1b + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_assert.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_cmu.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_emu.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_gpio.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_system.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\iar\startup_efm32pg1b.s + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\system_efm32pg1b.c + + + + QP + + $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_act.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_actq.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_mem.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_time.c + + + $PROJ_DIR$\..\..\..\..\..\source\qk.c + + + $PROJ_DIR$\..\..\..\..\..\source\qk_mutex.c + + + $PROJ_DIR$\..\..\..\..\..\source\qk_pkg.h + + + + QP_port + + $PROJ_DIR$\..\..\..\..\..\ports\arm-cm\qk\iar\qk_port.s + + + + QS + + Debug + Release + + + $PROJ_DIR$\..\..\..\..\..\source\qs.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qs_rx.c + + - - diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qv/bsp.c b/examples/arm-cm/blinky_efm32-slstk3401a/qv/bsp.c index a799d059..ae55b7c5 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/qv/bsp.c +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qv/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qv/gnu/Makefile b/examples/arm-cm/blinky_efm32-slstk3401a/qv/gnu/Makefile index 2926bff5..a6427af2 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/qv/gnu/Makefile +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qv/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/Makefile b/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/Makefile index 69337ec4..9d94515e 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/Makefile +++ b/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/bsp.c b/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/bsp.c index 25f0b21a..bc5e2749 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/bsp.c +++ b/examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/win32/Makefile b/examples/arm-cm/blinky_efm32-slstk3401a/win32/Makefile index 25b15628..bb06f900 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/win32/Makefile +++ b/examples/arm-cm/blinky_efm32-slstk3401a/win32/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/win32/bsp.c b/examples/arm-cm/blinky_efm32-slstk3401a/win32/bsp.c index b0b954ef..1732b4a4 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/win32/bsp.c +++ b/examples/arm-cm/blinky_efm32-slstk3401a/win32/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/blinky.h b/examples/arm-cm/blinky_ek-tm4c123gxl/blinky.h index 272a3e37..a6d2ca8f 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/blinky.h +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/blinky.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #ifndef blinky_h diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/bsp.h b/examples/arm-cm/blinky_ek-tm4c123gxl/bsp.h index df705729..3be49ed9 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/bsp.h +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/bsp.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/main.c b/examples/arm-cm/blinky_ek-tm4c123gxl/main.c index d3d3cfe4..385cdd33 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/main.c +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/qk/bsp.c b/examples/arm-cm/blinky_ek-tm4c123gxl/qk/bsp.c index ac85869b..5fab52e0 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/qk/bsp.c +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/qk/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/qk/gnu/Makefile b/examples/arm-cm/blinky_ek-tm4c123gxl/qk/gnu/Makefile index 97841abe..a200a849 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/qk/gnu/Makefile +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/qk/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/qv/bsp.c b/examples/arm-cm/blinky_ek-tm4c123gxl/qv/bsp.c index 68d90054..64b254f5 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/qv/bsp.c +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/qv/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/qv/gnu/Makefile b/examples/arm-cm/blinky_ek-tm4c123gxl/qv/gnu/Makefile index 949d7543..ee869457 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/qv/gnu/Makefile +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/qv/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/Makefile b/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/Makefile index 69337ec4..9d94515e 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/Makefile +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/bsp.c b/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/bsp.c index 43983438..378c31e6 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/bsp.c +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/win32/Makefile b/examples/arm-cm/blinky_ek-tm4c123gxl/win32/Makefile index 25b15628..bb06f900 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/win32/Makefile +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/win32/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/blinky_ek-tm4c123gxl/win32/bsp.c b/examples/arm-cm/blinky_ek-tm4c123gxl/win32/bsp.c index b52993e1..acd7584a 100644 --- a/examples/arm-cm/blinky_ek-tm4c123gxl/win32/bsp.c +++ b/examples/arm-cm/blinky_ek-tm4c123gxl/win32/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/bsp.h b/examples/arm-cm/dpp_efm32-slstk3401a/bsp.h index 14f58580..c3441dc6 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/bsp.h +++ b/examples/arm-cm/dpp_efm32-slstk3401a/bsp.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qk/arm/dpp-qk.uvprojx b/examples/arm-cm/dpp_efm32-slstk3401a/qk/arm/dpp-qk.uvprojx index ff9a6bdc..c0f31d74 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qk/arm/dpp-qk.uvprojx +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qk/arm/dpp-qk.uvprojx @@ -310,7 +310,7 @@ 0 - 1 + 2 0 0 1 @@ -1562,7 +1562,7 @@ 0 - 1 + 2 0 0 1 diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qk/bsp.c b/examples/arm-cm/dpp_efm32-slstk3401a/qk/bsp.c index 8fe14ac0..3aed8f60 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qk/bsp.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qk/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, EFM32-SLSTK3401A board, preemptive QK kernel -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-4-13 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -118,7 +118,7 @@ void SysTick_Handler(void) { #endif //QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */ - QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); // post to Ticker0 */ + QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); /* post to Ticker0 */ /* Perform the debouncing of buttons. The algorithm for debouncing * adapted from the book "Embedded Systems Dictionary" by Jack Ganssle @@ -144,7 +144,7 @@ void SysTick_Handler(void) { QK_ISR_EXIT(); /* inform QK about exiting an ISR */ } /*..........................................................................*/ -void GPIO_EVEN_IRQHandler(void) { /* to be triggered from debugger, NOTE03 */ +void GPIO_EVEN_IRQHandler(void) { /* for testing, NOTE03 */ QK_ISR_ENTRY(); /* inform QK about entering an ISR */ QACTIVE_POST(AO_Table, Q_NEW(QEvt, MAX_PUB_SIG), /* for testing... */ @@ -232,6 +232,12 @@ void BSP_init(void) { } /*..........................................................................*/ void BSP_displayPhilStat(uint8_t n, char const *stat) { + QS_TEST_PROBE_DEF(&BSP_displayPhilStat) + + QS_TEST_PROBE_ID(1, + stat = "Unknown"; + ) + if (stat[0] == 'e') { GPIO->P[LED_PORT].DOUT |= (1U << LED0_PIN); } @@ -473,13 +479,19 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a user command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ void assert_failed(char const *module, int loc); (void)cmdId; - (void)param; + (void)param1; + (void)param2; + (void)param3; QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { @@ -519,6 +531,11 @@ void QS_onCommand(uint8_t cmdId, uint32_t param) { * execution time contributes to the brightness of the User LED. * * NOTE03: -* To trigger GPIO_EVEN_IRQHandler() from debugger: -* IAR EWARM: go to the NVIC_ISPR0 register and write 0x200 to SETPEND. +* GPIO_EVEN_IRQHandler() is for testing various preemption scenarios in QK. +* The general testing strategy is to trigger this IRQ manually from the +* debugger. To do so in IAR, you need to: +* 1. open the Register view +* 2. open NVIC registers +* 3. scroll down to NVIC_ISPR0 register +* 4. write 0x200 to NVIC_ISPR0.SETPEND register */ diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qk/gnu/Makefile b/examples/arm-cm/dpp_efm32-slstk3401a/qk/gnu/Makefile index 0c35911b..14941c04 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qk/gnu/Makefile +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qk/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qk/main.c b/examples/arm-cm/dpp_efm32-slstk3401a/qk/main.c index ac476e3f..72469f34 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qk/main.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qk/main.c @@ -1,13 +1,13 @@ /***************************************************************************** * Product: DPP example -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-13 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. state-machine.com. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -28,8 +28,8 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com -* Email: info@state-machine.com +* https://state-machine.com +* mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" #include "dpp.h" diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/dpp.tcl b/examples/arm-cm/dpp_efm32-slstk3401a/qspy/dpp.tcl deleted file mode 100644 index 42d66449..00000000 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/dpp.tcl +++ /dev/null @@ -1,381 +0,0 @@ -#----------------------------------------------------------------------------- -# Product: QSpyView -- Customization example for DPP application -# Last updated for version 5.6.4 -# Last updated on 2016-04-25 -# -# Q u a n t u m L e a P s -# --------------------------- -# innovating embedded systems -# -# Copyright (C) Quantum Leaps, LLC, All rights reserved. -# -# This program is open source software: you can redistribute it and/or -# modify it under the terms of the GNU General Public License as published -# by the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Alternatively, this program may be distributed and modified under the -# terms of Quantum Leaps commercial licenses, which expressly supersede -# the GNU General Public License and are specifically designed for -# licensees interested in retaining the proprietary status of their code. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# Contact information: -# http://www.state-machine.com -# mailto:info@state-machine.com -#----------------------------------------------------------------------------- - -# command handlers =========================================================== -proc onMyCommand {} { - # do something here, for example: - # - inject an event to the Target - # - send a command to the Target - # - peek memory - # - poke memory - # - exectute system tick in the Target - # - open a dialog box... - # - etc. - - # as an example, the following code sends a command to the Target - variable ::qspy::QS_RX - ::qspy::sendPkt [binary format cci $::qspy::QS_RX(COMMAND) 1 12345] -} - -proc onPause {} { - global theButtonId theBtnState - if {[string equal $theBtnState BTN_UP]} { ;# is DWN? - set theBtnState BTN_DWN - ::qspy::sendEvent 6 6 0 - } else { - set theBtnState BTN_UP - ::qspy::sendEvent 6 7 0 - } - .canv.c itemconfigure $theButtonId -image ::img::$theBtnState -} - -# additinal menu options ===================================================== -.mbar.cust add command -label "MyCommand" -command onMyCommand - - -# specific canvas for DPP ==================================================== -set scriptFolder [file dirname [file normalize [info script]]] - -image create photo ::img::e -file $scriptFolder/img/eating.gif -image create photo ::img::h -file $scriptFolder/img/hungry.gif -image create photo ::img::t -file $scriptFolder/img/thinking.gif -image create photo ::img::BTN_UP -file $scriptFolder/img/BTN_UP.gif -image create photo ::img::BTN_DWN -file $scriptFolder/img/BTN_DWN.gif - -wm geometry .canv =400x260 -.canv.c configure -width 400 -.canv.c configure -height 260 - -set thePhiloId [.canv.c create image 190 57 -image ::img::t] -.canv.c create image 273 100 -image ::img::t -.canv.c create image 237 185 -image ::img::t -.canv.c create image 146 184 -image ::img::t -.canv.c create image 107 100 -image ::img::t - - -set theButtonId [.canv.c create image 200 120 -image ::img::BTN_UP] -set theBtnState BTN_UP -.canv.c bind $theButtonId onPause - -# QS record handlers ========================================================= - -# user record handlers [70..0x7C] -------------------------------------------- -proc ::qspy::rec70 {} { ;# QS_USER - variable thePkt - variable theFmt - binary scan $thePkt xx$theFmt(tstamp)xcxa* \ - tstamp philoNum stat - - dispTxt [format "%010u Philo %1d is %s" $tstamp $philoNum $stat] - - global thePhiloId - set img [string index $stat 0] - .canv.c itemconfigure [expr $thePhiloId + $philoNum] -image ::img::$img -} -#............................................................................. -proc ::qspy::rec71 {} { ;# QS_USER + 1 - variable thePkt - variable theFmt - binary scan $thePkt xx$theFmt(tstamp)xcxi \ - tstamp cmdId param - dispTxt [format "%010u cmd=%d param=%d" $tstamp $cmdId $param] -} - -proc ::qspy::rec72 {} { ;# QS_USER + 2 -} -proc ::qspy::rec73 {} { ;# QS_USER + 3 -} -proc ::qspy::rec74 {} { ;# QS_USER + 4 -} -proc ::qspy::rec75 {} { ;# QS_USER + 5 -} -proc ::qspy::rec76 {} { ;# QS_USER + 6 -} -proc ::qspy::rec77 {} { ;# QS_USER + 7 -} -proc ::qspy::rec78 {} { ;# QS_USER + 8 -} -proc ::qspy::rec79 {} { ;# QS_USER + 9 -} -proc ::qspy::rec80 {} { ;# QS_USER + 10 -} -proc ::qspy::rec81 {} { ;# QS_USER + 11 -} -proc ::qspy::rec82 {} { ;# QS_USER + 12 -} -proc ::qspy::rec83 {} { ;# QS_USER + 13 -} -proc ::qspy::rec84 {} { ;# QS_USER + 14 -} -proc ::qspy::rec85 {} { ;# QS_USER + 15 -} -proc ::qspy::rec86 {} { ;# QS_USER + 16 -} -proc ::qspy::rec87 {} { ;# QS_USER + 17 -} -proc ::qspy::rec88 {} { ;# QS_USER + 18 -} -proc ::qspy::rec89 {} { ;# QS_USER + 19 -} -proc ::qspy::rec90 {} { ;# QS_USER + 20 -} -proc ::qspy::rec91 {} { ;# QS_USER + 21 -} -proc ::qspy::rec92 {} { ;# QS_USER + 22 -} -proc ::qspy::rec93 {} { ;# QS_USER + 23 -} -proc ::qspy::rec94 {} { ;# QS_USER + 24 -} -proc ::qspy::rec95 {} { ;# QS_USER + 25 -} -proc ::qspy::rec96 {} { ;# QS_USER + 26 -} -proc ::qspy::rec97 {} { ;# QS_USER + 27 -} -proc ::qspy::rec98 {} { ;# QS_USER + 28 -} -proc ::qspy::rec99 {} { ;# QS_USER + 29 -} -proc ::qspy::rec100 {} { ;# QS_USER + 30 -} -proc ::qspy::rec101 {} { ;# QS_USER + 31 -} -proc ::qspy::rec102 {} { ;# QS_USER + 32 -} -proc ::qspy::rec103 {} { ;# QS_USER + 33 -} -proc ::qspy::rec104 {} { ;# QS_USER + 34 -} -proc ::qspy::rec105 {} { ;# QS_USER + 35 -} -proc ::qspy::rec106 {} { ;# QS_USER + 36 -} -proc ::qspy::rec107 {} { ;# QS_USER + 37 -} -proc ::qspy::rec108 {} { ;# QS_USER + 38 -} -proc ::qspy::rec109 {} { ;# QS_USER + 39 -} -proc ::qspy::rec110 {} { ;# QS_USER + 40 -} -proc ::qspy::rec111 {} { ;# QS_USER + 41 -} -proc ::qspy::rec112 {} { ;# QS_USER + 42 -} -proc ::qspy::rec113 {} { ;# QS_USER + 43 -} -proc ::qspy::rec114 {} { ;# QS_USER + 44 -} -proc ::qspy::rec115 {} { ;# QS_USER + 45 -} -proc ::qspy::rec116 {} { ;# QS_USER + 46 -} -proc ::qspy::rec117 {} { ;# QS_USER + 47 -} -proc ::qspy::rec118 {} { ;# QS_USER + 48 -} -proc ::qspy::rec119 {} { ;# QS_USER + 49 -} -proc ::qspy::rec120 {} { ;# QS_USER + 50 -} -proc ::qspy::rec121 {} { ;# QS_USER + 51 -} -proc ::qspy::rec122 {} { ;# QS_USER + 52 -} -proc ::qspy::rec123 {} { ;# QS_USER + 53 -} -proc ::qspy::rec124 {} { ;# QS_USER + 54 -} - - -# special record handlers ---------------------------------------------------- -proc ::qspy::recRESET {} { ;# target reset callback -} -proc ::qspy::recINFO {} { ;# target info callback -} - -# standard record handlers [1..54] ------------------------------------------- -proc ::qspy::rec0 {} { ;# QS_EMPTY -} - -# [1] QEP records... -proc ::qspy::rec1 {} { ;# QS_QEP_STATE_ENTRY -} -proc ::qspy::rec2 {} { ;# QS_QEP_STATE_EXIT -} -proc ::qspy::rec3 {} { ;# QS_QEP_STATE_INIT -} -proc ::qspy::rec4 {} { ;# QS_QEP_INIT_TRAN -} -proc ::qspy::rec5 {} { ;# QS_QEP_INTERN_TRAN -} -proc ::qspy::rec6 {} { ;# QS_QEP_TRAN -} -proc ::qspy::rec7 {} { ;# QS_QEP_IGNORED -} -proc ::qspy::rec8 {} { ;# QS_QEP_DISPATCH -} -proc ::qspy::rec9 {} { ;# QS_QEP_UNHANDLED -} - -# [10] QF records... -proc ::qspy::rec10 {} { ;# QS_QF_ACTIVE_ADD -} -proc ::qspy::rec11 {} { ;# QS_QF_ACTIVE_REMOVE -} -proc ::qspy::rec12 {} { ;# QS_QF_ACTIVE_SUBSCRIBE -} -proc ::qspy::rec13 {} { ;# QS_QF_ACTIVE_UNSUBSCRIBE -} -proc ::qspy::rec14 {} { ;# QS_QF_ACTIVE_POST_FIFO -} -proc ::qspy::rec15 {} { ;# QS_QF_ACTIVE_POST_LIFO -} -proc ::qspy::rec16 {} { ;# QS_QF_ACTIVE_GET -} -proc ::qspy::rec17 {} { ;# QS_QF_ACTIVE_GET_LAST -} -proc ::qspy::rec18 {} { ;# QS_QF_EQUEUE_INIT -} -proc ::qspy::rec19 {} { ;# QS_QF_EQUEUE_POST_FIFO -} -proc ::qspy::rec20 {} { ;# QS_QF_EQUEUE_POST_LIFO -} -proc ::qspy::rec21 {} { ;# QS_QF_EQUEUE_GET -} -proc ::qspy::rec22 {} { ;# QS_QF_EQUEUE_GET_LAST -} -proc ::qspy::rec23 {} { ;# QS_QF_MPOOL_INIT -} -proc ::qspy::rec24 {} { ;# QS_QF_MPOOL_GET -} -proc ::qspy::rec25 {} { ;# QS_QF_MPOOL_PUT -} -proc ::qspy::rec26 {} { ;# QS_QF_PUBLISH -} -proc ::qspy::rec27 {} { ;# QS_QF_RESERVED8 -} -proc ::qspy::rec28 {} { ;# QS_QF_NEW -} -proc ::qspy::rec29 {} { ;# QS_QF_GC_ATTEMPT -} -proc ::qspy::rec30 {} { ;# QS_QF_GC -} -proc ::qspy::rec31 {} { ;# QS_QF_TICK -} -proc ::qspy::rec32 {} { ;# QS_QF_TIMEEVT_ARM -} -proc ::qspy::rec33 {} { ;# QS_QF_TIMEEVT_AUTO_DISARM -} -proc ::qspy::rec34 {} { ;# QS_QF_TIMEEVT_DISARM_ATTEMPT -} -proc ::qspy::rec35 {} { ;# QS_QF_TIMEEVT_DISARM -} -proc ::qspy::rec36 {} { ;# QS_QF_TIMEEVT_REARM -} -proc ::qspy::rec37 {} { ;# QS_QF_TIMEEVT_POST -} -proc ::qspy::rec38 {} { ;# QS_QF_TIMEEVT_CTR -} -proc ::qspy::rec39 {} { ;# QS_QF_CRIT_ENTRY -} -proc ::qspy::rec40 {} { ;# QS_QF_CRIT_EXIT -} -proc ::qspy::rec41 {} { ;# QS_QF_ISR_ENTRY -} -proc ::qspy::rec42 {} { ;# QS_QF_ISR_EXIT -} -proc ::qspy::rec43 {} { ;# QS_QF_INT_DISABLE -} -proc ::qspy::rec44 {} { ;# QS_QF_INT_ENABLE -} -proc ::qspy::rec45 {} { ;# QS_QF_ACTIVE_POST_ATTEMPT -} -proc ::qspy::rec46 {} { ;# QS_QF_EQUEUE_POST_ATTEMPT -} -proc ::qspy::rec47 {} { ;# QS_QF_MPOOL_GET_ATTEMPT -} -proc ::qspy::rec48 {} { ;# QS_QF_RESERVED1 -} -proc ::qspy::rec49 {} { ;# QS_QF_RESERVED0 -} - -# [50] QK/QV records -proc ::qspy::rec50 {} { ;# QS_QK_MUTEX_LOCK -} -proc ::qspy::rec51 {} { ;# QS_QK_MUTEX_UNLOCK -} -proc ::qspy::rec52 {} { ;# QS_QVK_SCHEDULE -} -proc ::qspy::rec53 {} { ;# QS_QVK_IDLE -} -proc ::qspy::rec54 {} { ;# QS_QK_RESUME -} - -# [55] Additional QEP records -proc ::qspy::rec55 {} { ;# QS_QEP_TRAN_HIST -} -proc ::qspy::rec56 {} { ;# QS_QEP_TRAN_EP -} -proc ::qspy::rec57 {} { ;# QS_QEP_TRAN_XP -} -proc ::qspy::rec58 {} { ;# QS_QEP_RESERVED1 -} -proc ::qspy::rec59 {} { ;# QS_QEP_RESERVED0 -} - -# Miscellaneous QS records -proc ::qspy::rec60 {} { ;# QS_SIG_DICT -} -proc ::qspy::rec61 {} { ;# QS_OBJ_DICT -} -proc ::qspy::rec62 {} { ;# QS_FUN_DICT -} -proc ::qspy::rec63 {} { ;# QS_USR_DICT -} - -# proc ::qspy::64 ;# QS_TARGET_INFO not used, see proc recINFO - -proc ::qspy::rec65 {} { ;# QS_RESERVED0 -} -proc ::qspy::rec66 {} { ;# QS_RX_STATUS -} -proc ::qspy::rec67 {} { ;# QS_TEST_STATUS -} -proc ::qspy::rec68 {} { ;# QS_PEEK_DATA -} -proc ::qspy::rec69 {} { ;# QS_ASSERT_FAIL -} - diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/qspyview.bat b/examples/arm-cm/dpp_efm32-slstk3401a/qspy/qspyview.bat deleted file mode 100644 index c9eab430..00000000 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/qspyview.bat +++ /dev/null @@ -1 +0,0 @@ -wish C:\qp\qtools\qspy\qspyview\qspyview.tcl dpp.tcl \ No newline at end of file diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/qspyview.lnk b/examples/arm-cm/dpp_efm32-slstk3401a/qspy/qspyview.lnk deleted file mode 100644 index 73a09a77..00000000 Binary files a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/qspyview.lnk and /dev/null differ diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/dpp.tcl b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/dpp.tcl new file mode 100644 index 00000000..19652481 --- /dev/null +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/dpp.tcl @@ -0,0 +1,381 @@ +#----------------------------------------------------------------------------- +# Product: QSpyView -- Customization example for DPP application +# Last updated for version 5.8.3 +# Last updated on 2017-03-06 +# +# Q u a n t u m L e a P s +# --------------------------- +# innovating embedded systems +# +# Copyright (C) Quantum Leaps, LLC, All rights reserved. +# +# This program is open source software: you can redistribute it and/or +# modify it under the terms of the GNU General Public License as published +# by the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# Alternatively, this program may be distributed and modified under the +# terms of Quantum Leaps commercial licenses, which expressly supersede +# the GNU General Public License and are specifically designed for +# licensees interested in retaining the proprietary status of their code. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Contact information: +# https://state-machine.com +# mailto:info@state-machine.com +#----------------------------------------------------------------------------- + +# command handlers =========================================================== +proc onMyCommand {} { + # do something here, for example: + # - inject an event to the Target + # - send a command to the Target + # - peek memory + # - poke memory + # - exectute system tick in the Target + # - open a dialog box... + # - etc. + + # as an example, the following code sends a command to the Target + variable qspy::QS_RX + qspy::sendPkt [binary format cciii $qspy::QS_RX(COMMAND) 1 12345 0 0] +} + +proc onPause {} { + global theButtonId theBtnState + if {[string equal $theBtnState BTN_UP]} { ;# is DWN? + set theBtnState BTN_DWN + qspy::sendEvent 6 6 0 + } else { + set theBtnState BTN_UP + qspy::sendEvent 6 7 0 + } + .canv.c itemconfigure $theButtonId -image ::img::$theBtnState +} + +# additinal menu options ===================================================== +.mbar.cust add command -label "MyCommand" -command onMyCommand + + +# specific canvas for DPP ==================================================== +set scriptFolder [file dirname [file normalize [info script]]] + +image create photo ::img::e -file $scriptFolder/img/eating.gif +image create photo ::img::h -file $scriptFolder/img/hungry.gif +image create photo ::img::t -file $scriptFolder/img/thinking.gif +image create photo ::img::BTN_UP -file $scriptFolder/img/BTN_UP.gif +image create photo ::img::BTN_DWN -file $scriptFolder/img/BTN_DWN.gif + +wm geometry .canv =400x260 +.canv.c configure -width 400 +.canv.c configure -height 260 + +set thePhiloId [.canv.c create image 190 57 -image ::img::t] +.canv.c create image 273 100 -image ::img::t +.canv.c create image 237 185 -image ::img::t +.canv.c create image 146 184 -image ::img::t +.canv.c create image 107 100 -image ::img::t + + +set theButtonId [.canv.c create image 200 120 -image ::img::BTN_UP] +set theBtnState BTN_UP +.canv.c bind $theButtonId onPause + +# QS record handlers ========================================================= + +# user record handlers [70..0x7C] -------------------------------------------- +proc qspy::rec70 {} { ;# QS_USER + variable thePkt + variable theFmt + binary scan $thePkt xx$theFmt(tstamp)xcxa* \ + tstamp philoNum stat + + dispTxt [format "%010u Philo %1d is %s" $tstamp $philoNum $stat] + + global thePhiloId + set img [string index $stat 0] + .canv.c itemconfigure [expr $thePhiloId + $philoNum] -image ::img::$img +} +#............................................................................. +proc qspy::rec71 {} { ;# QS_USER + 1 + variable thePkt + variable theFmt + binary scan $thePkt xx$theFmt(tstamp)xcxi \ + tstamp cmdId param + dispTxt [format "%010u cmd=%d param=%d" $tstamp $cmdId $param] +} + +proc qspy::rec72 {} { ;# QS_USER + 2 +} +proc qspy::rec73 {} { ;# QS_USER + 3 +} +proc qspy::rec74 {} { ;# QS_USER + 4 +} +proc qspy::rec75 {} { ;# QS_USER + 5 +} +proc qspy::rec76 {} { ;# QS_USER + 6 +} +proc qspy::rec77 {} { ;# QS_USER + 7 +} +proc qspy::rec78 {} { ;# QS_USER + 8 +} +proc qspy::rec79 {} { ;# QS_USER + 9 +} +proc qspy::rec80 {} { ;# QS_USER + 10 +} +proc qspy::rec81 {} { ;# QS_USER + 11 +} +proc qspy::rec82 {} { ;# QS_USER + 12 +} +proc qspy::rec83 {} { ;# QS_USER + 13 +} +proc qspy::rec84 {} { ;# QS_USER + 14 +} +proc qspy::rec85 {} { ;# QS_USER + 15 +} +proc qspy::rec86 {} { ;# QS_USER + 16 +} +proc qspy::rec87 {} { ;# QS_USER + 17 +} +proc qspy::rec88 {} { ;# QS_USER + 18 +} +proc qspy::rec89 {} { ;# QS_USER + 19 +} +proc qspy::rec90 {} { ;# QS_USER + 20 +} +proc qspy::rec91 {} { ;# QS_USER + 21 +} +proc qspy::rec92 {} { ;# QS_USER + 22 +} +proc qspy::rec93 {} { ;# QS_USER + 23 +} +proc qspy::rec94 {} { ;# QS_USER + 24 +} +proc qspy::rec95 {} { ;# QS_USER + 25 +} +proc qspy::rec96 {} { ;# QS_USER + 26 +} +proc qspy::rec97 {} { ;# QS_USER + 27 +} +proc qspy::rec98 {} { ;# QS_USER + 28 +} +proc qspy::rec99 {} { ;# QS_USER + 29 +} +proc qspy::rec100 {} { ;# QS_USER + 30 +} +proc qspy::rec101 {} { ;# QS_USER + 31 +} +proc qspy::rec102 {} { ;# QS_USER + 32 +} +proc qspy::rec103 {} { ;# QS_USER + 33 +} +proc qspy::rec104 {} { ;# QS_USER + 34 +} +proc qspy::rec105 {} { ;# QS_USER + 35 +} +proc qspy::rec106 {} { ;# QS_USER + 36 +} +proc qspy::rec107 {} { ;# QS_USER + 37 +} +proc qspy::rec108 {} { ;# QS_USER + 38 +} +proc qspy::rec109 {} { ;# QS_USER + 39 +} +proc qspy::rec110 {} { ;# QS_USER + 40 +} +proc qspy::rec111 {} { ;# QS_USER + 41 +} +proc qspy::rec112 {} { ;# QS_USER + 42 +} +proc qspy::rec113 {} { ;# QS_USER + 43 +} +proc qspy::rec114 {} { ;# QS_USER + 44 +} +proc qspy::rec115 {} { ;# QS_USER + 45 +} +proc qspy::rec116 {} { ;# QS_USER + 46 +} +proc qspy::rec117 {} { ;# QS_USER + 47 +} +proc qspy::rec118 {} { ;# QS_USER + 48 +} +proc qspy::rec119 {} { ;# QS_USER + 49 +} +proc qspy::rec120 {} { ;# QS_USER + 50 +} +proc qspy::rec121 {} { ;# QS_USER + 51 +} +proc qspy::rec122 {} { ;# QS_USER + 52 +} +proc qspy::rec123 {} { ;# QS_USER + 53 +} +proc qspy::rec124 {} { ;# QS_USER + 54 +} + + +# special record handlers ---------------------------------------------------- +proc qspy::recRESET {} { ;# target reset callback +} +proc qspy::recINFO {} { ;# target info callback +} + +# standard record handlers [1..54] ------------------------------------------- +proc qspy::rec0 {} { ;# QS_EMPTY +} + +# [1] QEP records... +proc qspy::rec1 {} { ;# QS_QEP_STATE_ENTRY +} +proc qspy::rec2 {} { ;# QS_QEP_STATE_EXIT +} +proc qspy::rec3 {} { ;# QS_QEP_STATE_INIT +} +proc qspy::rec4 {} { ;# QS_QEP_INIT_TRAN +} +proc qspy::rec5 {} { ;# QS_QEP_INTERN_TRAN +} +proc qspy::rec6 {} { ;# QS_QEP_TRAN +} +proc qspy::rec7 {} { ;# QS_QEP_IGNORED +} +proc qspy::rec8 {} { ;# QS_QEP_DISPATCH +} +proc qspy::rec9 {} { ;# QS_QEP_UNHANDLED +} + +# [10] QF records... +proc qspy::rec10 {} { ;# QS_QF_ACTIVE_ADD +} +proc qspy::rec11 {} { ;# QS_QF_ACTIVE_REMOVE +} +proc qspy::rec12 {} { ;# QS_QF_ACTIVE_SUBSCRIBE +} +proc qspy::rec13 {} { ;# QS_QF_ACTIVE_UNSUBSCRIBE +} +proc qspy::rec14 {} { ;# QS_QF_ACTIVE_POST_FIFO +} +proc qspy::rec15 {} { ;# QS_QF_ACTIVE_POST_LIFO +} +proc qspy::rec16 {} { ;# QS_QF_ACTIVE_GET +} +proc qspy::rec17 {} { ;# QS_QF_ACTIVE_GET_LAST +} +proc qspy::rec18 {} { ;# QS_QF_EQUEUE_INIT +} +proc qspy::rec19 {} { ;# QS_QF_EQUEUE_POST_FIFO +} +proc qspy::rec20 {} { ;# QS_QF_EQUEUE_POST_LIFO +} +proc qspy::rec21 {} { ;# QS_QF_EQUEUE_GET +} +proc qspy::rec22 {} { ;# QS_QF_EQUEUE_GET_LAST +} +proc qspy::rec23 {} { ;# QS_QF_MPOOL_INIT +} +proc qspy::rec24 {} { ;# QS_QF_MPOOL_GET +} +proc qspy::rec25 {} { ;# QS_QF_MPOOL_PUT +} +proc qspy::rec26 {} { ;# QS_QF_PUBLISH +} +proc qspy::rec27 {} { ;# QS_QF_RESERVED8 +} +proc qspy::rec28 {} { ;# QS_QF_NEW +} +proc qspy::rec29 {} { ;# QS_QF_GC_ATTEMPT +} +proc qspy::rec30 {} { ;# QS_QF_GC +} +proc qspy::rec31 {} { ;# QS_QF_TICK +} +proc qspy::rec32 {} { ;# QS_QF_TIMEEVT_ARM +} +proc qspy::rec33 {} { ;# QS_QF_TIMEEVT_AUTO_DISARM +} +proc qspy::rec34 {} { ;# QS_QF_TIMEEVT_DISARM_ATTEMPT +} +proc qspy::rec35 {} { ;# QS_QF_TIMEEVT_DISARM +} +proc qspy::rec36 {} { ;# QS_QF_TIMEEVT_REARM +} +proc qspy::rec37 {} { ;# QS_QF_TIMEEVT_POST +} +proc qspy::rec38 {} { ;# QS_QF_TIMEEVT_CTR +} +proc qspy::rec39 {} { ;# QS_QF_CRIT_ENTRY +} +proc qspy::rec40 {} { ;# QS_QF_CRIT_EXIT +} +proc qspy::rec41 {} { ;# QS_QF_ISR_ENTRY +} +proc qspy::rec42 {} { ;# QS_QF_ISR_EXIT +} +proc qspy::rec43 {} { ;# QS_QF_INT_DISABLE +} +proc qspy::rec44 {} { ;# QS_QF_INT_ENABLE +} +proc qspy::rec45 {} { ;# QS_QF_ACTIVE_POST_ATTEMPT +} +proc qspy::rec46 {} { ;# QS_QF_EQUEUE_POST_ATTEMPT +} +proc qspy::rec47 {} { ;# QS_QF_MPOOL_GET_ATTEMPT +} +proc qspy::rec48 {} { ;# QS_QF_RESERVED1 +} +proc qspy::rec49 {} { ;# QS_QF_RESERVED0 +} + +# [50] QK/QV records +proc qspy::rec50 {} { ;# QS_QK_MUTEX_LOCK +} +proc qspy::rec51 {} { ;# QS_QK_MUTEX_UNLOCK +} +proc qspy::rec52 {} { ;# QS_QVK_SCHEDULE +} +proc qspy::rec53 {} { ;# QS_QVK_IDLE +} +proc qspy::rec54 {} { ;# QS_QK_RESUME +} + +# [55] Additional QEP records +proc qspy::rec55 {} { ;# QS_QEP_TRAN_HIST +} +proc qspy::rec56 {} { ;# QS_QEP_TRAN_EP +} +proc qspy::rec57 {} { ;# QS_QEP_TRAN_XP +} +proc qspy::rec58 {} { ;# QS_QEP_RESERVED1 +} +proc qspy::rec59 {} { ;# QS_QEP_RESERVED0 +} + +# Miscellaneous QS records +proc qspy::rec60 {} { ;# QS_SIG_DICT +} +proc qspy::rec61 {} { ;# QS_OBJ_DICT +} +proc qspy::rec62 {} { ;# QS_FUN_DICT +} +proc qspy::rec63 {} { ;# QS_USR_DICT +} + +# proc qspy::64 ;# QS_TARGET_INFO not used, see proc recINFO + +proc qspy::rec65 {} { ;# QS_RESERVED0 +} +proc qspy::rec66 {} { ;# QS_RX_STATUS +} +proc qspy::rec67 {} { ;# QS_TEST_STATUS +} +proc qspy::rec68 {} { ;# QS_PEEK_DATA +} +proc qspy::rec69 {} { ;# QS_ASSERT_FAIL +} + diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/BTN_DWN.gif b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/BTN_DWN.gif similarity index 100% rename from examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/BTN_DWN.gif rename to examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/BTN_DWN.gif diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/BTN_UP.gif b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/BTN_UP.gif similarity index 100% rename from examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/BTN_UP.gif rename to examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/BTN_UP.gif diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/eating.gif b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/eating.gif similarity index 100% rename from examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/eating.gif rename to examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/eating.gif diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/hungry.gif b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/hungry.gif similarity index 100% rename from examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/hungry.gif rename to examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/hungry.gif diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/thinking.gif b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/thinking.gif similarity index 100% rename from examples/arm-cm/dpp_efm32-slstk3401a/qspy/img/thinking.gif rename to examples/arm-cm/dpp_efm32-slstk3401a/qspyview/img/thinking.gif diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/qspyview.bat b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/qspyview.bat new file mode 100644 index 00000000..d438ee2f --- /dev/null +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/qspyview.bat @@ -0,0 +1,4 @@ +if "%QTOOLS%"=="" ( + set QTOOLS=C:\qp\qtools +) +wish %QTOOLS%\qspy\tcl\qspyview.tcl dpp.tcl \ No newline at end of file diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/qspyview.lnk b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/qspyview.lnk new file mode 100644 index 00000000..e717a45e Binary files /dev/null and b/examples/arm-cm/dpp_efm32-slstk3401a/qspyview/qspyview.lnk differ diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qv/bsp.c b/examples/arm-cm/dpp_efm32-slstk3401a/qv/bsp.c index de417e46..578bffb5 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qv/bsp.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qv/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, EFM32-SLSTK3401A board, cooperative QV kernel -* Last Updated for Version: 5.6.5 -* Date of the Last Update: 2016-05-08 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-04-14 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -114,7 +114,8 @@ void SysTick_Handler(void) { } #endif - QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */ + //QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */ + QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); /* post to Ticker0 */ /* Perform the debouncing of buttons. The algorithm for debouncing * adapted from the book "Embedded Systems Dictionary" by Jack Ganssle @@ -139,7 +140,7 @@ void SysTick_Handler(void) { } /*..........................................................................*/ -void GPIO_EVEN_IRQHandler(void) { +void GPIO_EVEN_IRQHandler(void) { /* for testing, NOTE03 */ QACTIVE_POST(AO_Table, Q_NEW(QEvt, MAX_PUB_SIG), /* for testing... */ &l_GPIO_EVEN_IRQHandler); } @@ -462,13 +463,19 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a user command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ void assert_failed(char const *module, int loc); (void)cmdId; - (void)param; + (void)param1; + (void)param2; + (void)param3; QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { @@ -512,4 +519,13 @@ void QS_onCommand(uint8_t cmdId, uint32_t param) { * of the LED is proportional to the frequency of invcations of the idle loop. * Please note that the LED is toggled with interrupts locked, so no interrupt * execution time contributes to the brightness of the User LED. +* +* NOTE03: +* GPIO_EVEN_IRQHandler() is for testing various preemption scenarios in QV. +* The general testing strategy is to trigger this IRQ manually from the +* debugger. To do so in IAR, you need to: +* 1. open the Register view +* 2. open NVIC registers +* 3. scroll down to NVIC_ISPR0 register +* 4. write 0x200 to NVIC_ISPR0.SETPEND register */ diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qv/gnu/Makefile b/examples/arm-cm/dpp_efm32-slstk3401a/qv/gnu/Makefile index 46a5e68c..e3fed6ac 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qv/gnu/Makefile +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qv/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qv/main.c b/examples/arm-cm/dpp_efm32-slstk3401a/qv/main.c index 09238fd0..72469f34 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qv/main.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qv/main.c @@ -1,13 +1,13 @@ /***************************************************************************** * Product: DPP example -* Last Updated for Version: 5.6.2 -* Date of the Last Update: 2016-03-23 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-13 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. state-machine.com. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -28,13 +28,16 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com -* Email: info@state-machine.com +* https://state-machine.com +* mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" #include "dpp.h" #include "bsp.h" +static QTicker l_ticker0; +QActive *the_Ticker0 = &l_ticker0; + /*..........................................................................*/ int main() { static QEvt const *tableQueueSto[N_PHILO]; @@ -45,6 +48,7 @@ int main() { Philo_ctor(); /* instantiate all Philosopher active objects */ Table_ctor(); /* instantiate the Table active object */ + QTicker_ctor(&l_ticker0, 0U); /* ticker AO for tick rate 0 */ QF_init(); /* initialize the framework and the underlying RT kernel */ BSP_init(); /* initialize the Board Support Package */ @@ -64,18 +68,20 @@ int main() { /* initialize event pools... */ QF_poolInit(smlPoolSto, sizeof(smlPoolSto), sizeof(smlPoolSto[0])); + QACTIVE_START(the_Ticker0, 1U, 0, 0, 0, 0, 0); + /* start the active objects... */ for (n = 0U; n < N_PHILO; ++n) { QACTIVE_START(AO_Philo[n], /* AO to start */ - (uint_fast8_t)(n + 1), /* QP priority of the AO */ + (uint_fast8_t)(n + 2), /* QP priority of the AO */ philoQueueSto[n], /* event queue storage */ Q_DIM(philoQueueSto[n]), /* queue length [events] */ (void *)0, /* stack storage (not used) */ 0U, /* size of the stack [bytes] */ - (QEvt *)0); /* initialization event */ + (QEvt *)0); /* initialization event */ } QACTIVE_START(AO_Table, /* AO to start */ - (uint_fast8_t)(N_PHILO + 1), /* QP priority of the AO */ + (uint_fast8_t)(N_PHILO + 2), /* QP priority of the AO */ tableQueueSto, /* event queue storage */ Q_DIM(tableQueueSto), /* queue length [events] */ (void *)0, /* stack storage (not used) */ diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/bsp.c b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/bsp.c index eadfcd86..42a5894e 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/bsp.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, EFM32-SLSTK3401A board, preemptive QXK kernel -* Last Updated for Version: 5.7.2 -* Date of the Last Update: 2016-09-29 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-04-14 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -48,7 +48,7 @@ Q_DEFINE_THIS_FILE * DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE! */ enum KernelUnawareISRs { /* see NOTE00 */ - UART0_PRIO, + USART0_RX_PRIO, /* ... */ MAX_KERNEL_UNAWARE_CMSIS_PRI /* keep always last */ }; @@ -118,7 +118,8 @@ void SysTick_Handler(void) { } #endif - QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */ + //QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */ + QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); // post to Ticker0 */ /* Perform the debouncing of buttons. The algorithm for debouncing * adapted from the book "Embedded Systems Dictionary" by Jack Ganssle @@ -144,15 +145,7 @@ void SysTick_Handler(void) { QXK_ISR_EXIT(); /* inform QXK about exiting an ISR */ } /*..........................................................................*/ -/* The following IRQ handler is for testing various preemption scenarios -* in QXK. The general testing strategy is to trigger this IRQ manually -* from the debugger. To do so in IAR, you need to: -* 1. open the Register view -* 2. open NVIC registers -* 3. scroll down to NVIC_ISPR0 register -* 4. write 0x200 to NVIC_ISPR0.SETPEND register -*/ -void GPIO_EVEN_IRQHandler(void) { +void GPIO_EVEN_IRQHandler(void) { /* for testing, NOTE03 */ QXK_ISR_ENTRY(); /* inform QXK about entering an ISR */ // QACTIVE_POST(AO_Table, Q_NEW(QEvt, TEST_SIG), /* for testing... */ @@ -301,7 +294,7 @@ void QF_onStartup(void) { * Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority(). * DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE! */ - NVIC_SetPriority(USART0_RX_IRQn, UART0_PRIO); + NVIC_SetPriority(USART0_RX_IRQn, USART0_RX_PRIO); NVIC_SetPriority(SysTick_IRQn, SYSTICK_PRIO); NVIC_SetPriority(GPIO_EVEN_IRQn, GPIO_EVEN_PRIO); /* ... */ @@ -486,13 +479,19 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a user command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ void assert_failed(char const *module, int loc); (void)cmdId; - (void)param; - QS_BEGIN(COMMAND_STAT, (void *)0) /* application-specific record begin */ + (void)param1; + (void)param2; + (void)param3; + QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { @@ -530,4 +529,13 @@ void QS_onCommand(uint8_t cmdId, uint32_t param) { * of the LED is proportional to the frequency of invcations of the idle loop. * Please note that the LED is toggled with interrupts locked, so no interrupt * execution time contributes to the brightness of the User LED. +* +* NOTE03: +* GPIO_EVEN_IRQHandler() is for testing various preemption scenarios in QXK. +* The general testing strategy is to trigger this IRQ manually from the +* debugger. To do so in IAR, you need to: +* 1. open the Register view +* 2. open NVIC registers +* 3. scroll down to NVIC_ISPR0 register +* 4. write 0x200 to NVIC_ISPR0.SETPEND register */ diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/gnu/Makefile b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/gnu/Makefile index f7552ef2..500659bf 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/gnu/Makefile +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/iar/dpp-qxk.ewd b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/iar/dpp-qxk.ewd index 3e40dff6..f6eedd1b 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/iar/dpp-qxk.ewd +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/iar/dpp-qxk.ewd @@ -1,4741 +1,4213 @@ - - + - 2 - - Debug - - ARM - - 1 - - C-SPY - 2 - - 28 - 1 + 3 + + Debug + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 1 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - - CMSISDAP_ID - 2 - - 4 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 1 - - - 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- - $PROJ_DIR$\..\test.c - - - - efm32pg1b - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_assert.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_cmu.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_emu.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_gpio.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_system.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_usart.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\iar\startup_efm32pg1b.s - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\system_efm32pg1b.c - - - - QP - - $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_act.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_actq.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_mem.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_time.c - - - $PROJ_DIR$\..\..\..\..\..\source\qxk.c - - - $PROJ_DIR$\..\..\..\..\..\include\qxk.h - - - $PROJ_DIR$\..\..\..\..\..\source\qxk_mutex.c - - - $PROJ_DIR$\..\..\..\..\..\source\qxk_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qxk_sema.c - - - $PROJ_DIR$\..\..\..\..\..\source\qxk_xthr.c - - - $PROJ_DIR$\..\..\..\..\..\include\qxthread.h - - - - QP_port - - $PROJ_DIR$\..\..\..\..\..\ports\arm-cm\qxk\iar\qxk_port.s - - - - QS - - Debug - Release - - - $PROJ_DIR$\..\..\..\..\..\source\qs.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qs_rx.c - - + + General + 3 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Application + + $PROJ_DIR$\..\bsp.c + + + $PROJ_DIR$\..\..\bsp.h + + + $PROJ_DIR$\..\..\dpp.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\..\philo.c + + + $PROJ_DIR$\..\..\..\..\..\include\qstamp.c + + + $PROJ_DIR$\..\..\table.c + + + $PROJ_DIR$\..\test.c + + + + efm32pg1b + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_assert.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_cmu.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_emu.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_gpio.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_system.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\em_usart.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\iar\startup_efm32pg1b.s + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b\system_efm32pg1b.c + + + + QP + + $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_act.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_actq.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_mem.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_time.c + + + $PROJ_DIR$\..\..\..\..\..\source\qxk.c + + + $PROJ_DIR$\..\..\..\..\..\include\qxk.h + + + $PROJ_DIR$\..\..\..\..\..\source\qxk_mutex.c + + + $PROJ_DIR$\..\..\..\..\..\source\qxk_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qxk_sema.c + + + $PROJ_DIR$\..\..\..\..\..\source\qxk_xthr.c + + + $PROJ_DIR$\..\..\..\..\..\include\qxthread.h + + + + QP_port + + $PROJ_DIR$\..\..\..\..\..\ports\arm-cm\qxk\iar\qxk_port.s + + + + QS + + Debug + Release + + + $PROJ_DIR$\..\..\..\..\..\source\qs.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qs_rx.c + + - - diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/main.c b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/main.c index fd50b89f..6fafb449 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/main.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/main.c @@ -1,13 +1,13 @@ /***************************************************************************** * Product: DPP example extened for QXK -* Last Updated for Version: 5.7.2 -* Date of the Last Update: 2016-09-28 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-13 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -28,13 +28,16 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" #include "dpp.h" #include "bsp.h" +static QTicker l_ticker0; +QActive *the_Ticker0 = &l_ticker0; + /*..........................................................................*/ int main() { static QEvt const *tableQueueSto[N_PHILO]; @@ -52,6 +55,7 @@ int main() { Philo_ctor(); /* instantiate all Philosopher active objects */ Table_ctor(); /* instantiate the Table active object */ + QTicker_ctor(&l_ticker0, 0U); /* ticker AO for tick rate 0 */ Test1_ctor(); /* instantiate the Test1 extended thread */ Test2_ctor(); /* instantiate the Test2 extended thread */ @@ -73,9 +77,11 @@ int main() { /* initialize event pools... */ QF_poolInit(smlPoolSto, sizeof(smlPoolSto), sizeof(smlPoolSto[0])); + QACTIVE_START(the_Ticker0, 1U, 0, 0, 0, 0, 0); + /* start the extended thread */ QXTHREAD_START(&XT_Test1->super, /* Thread to start */ - (uint_fast8_t)1U, /* QP priority of the thread */ + (uint_fast8_t)2U, /* QP priority of the thread */ test1QueueSto, /* message queue storage */ Q_DIM(test1QueueSto), /* message length [events] */ test1StackSto, /* stack storage */ @@ -85,15 +91,15 @@ int main() { /* start the Philo active objects... */ for (n = 0U; n < N_PHILO; ++n) { QACTIVE_START(AO_Philo[n], /* AO to start */ - (uint_fast8_t)(n + 2), /* QP priority of the AO */ + (uint_fast8_t)(n + 3), /* QP priority of the AO */ philoQueueSto[n], /* event queue storage */ Q_DIM(philoQueueSto[n]), /* queue length [events] */ (void *)0, /* stack storage (not used) */ 0U, /* size of the stack [bytes] */ - (QEvt *)0); /* initialization event */ + (QEvt *)0); /* initialization event */ } QXTHREAD_START(&XT_Test2->super, /* Thread to start */ - (uint_fast8_t)(N_PHILO + 2), /* QP priority of the thread */ + (uint_fast8_t)(N_PHILO + 3), /* QP priority of the thread */ test2QueueSto, /* message queue storage */ Q_DIM(test2QueueSto), /* message length [events] */ test2StackSto, /* stack storage */ @@ -101,7 +107,7 @@ int main() { (QEvt *)0); /* initialization event */ QACTIVE_START(AO_Table, /* AO to start */ - (uint_fast8_t)(N_PHILO + 3), /* QP priority of the AO */ + (uint_fast8_t)(N_PHILO + 4), /* QP priority of the AO */ tableQueueSto, /* event queue storage */ Q_DIM(tableQueueSto), /* queue length [events] */ (void *)0, /* stack storage (not used) */ diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/test.c b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/test.c index 9be3a3ab..644027fb 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qxk/test.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qxk/test.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/Makefile b/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/Makefile index 98a2691a..55b0facf 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/Makefile +++ b/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/bsp.c b/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/bsp.c index da9e8c31..927bab77 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/bsp.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, Win32-GUI -* Last updated for version 5.6.5 -* Last updated on 2016-05-13 +* Last updated for version 5.9.0 +* Last updated on 2017-04-14 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -493,12 +493,18 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a uesr command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ (void)cmdId; - (void)param; - QS_BEGIN(COMMAND_STAT, (void *)0) /* application-specific record begin */ + (void)param1; + (void)param2; + (void)param3; + QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/main.c b/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/main.c index 04b8c615..4429712d 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/main.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/win32-qv/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/win32/Makefile b/examples/arm-cm/dpp_efm32-slstk3401a/win32/Makefile index d2ad2132..49f3ff02 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/win32/Makefile +++ b/examples/arm-cm/dpp_efm32-slstk3401a/win32/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/win32/bsp.c b/examples/arm-cm/dpp_efm32-slstk3401a/win32/bsp.c index da9e8c31..eb21c17c 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/win32/bsp.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/win32/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, Win32-GUI -* Last updated for version 5.6.5 -* Last updated on 2016-05-13 +* Last updated for version 5.9.0 +* Last updated on 2017-04-15 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -493,12 +493,18 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a uesr command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ (void)cmdId; - (void)param; - QS_BEGIN(COMMAND_STAT, (void *)0) /* application-specific record begin */ + (void)param1; + (void)param2; + (void)param3; + QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/win32/main.c b/examples/arm-cm/dpp_efm32-slstk3401a/win32/main.c index 04b8c615..4429712d 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/win32/main.c +++ b/examples/arm-cm/dpp_efm32-slstk3401a/win32/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/bsp.h b/examples/arm-cm/dpp_ek-tm4c123gxl/bsp.h index df705729..3be49ed9 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/bsp.h +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/bsp.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/lint/lin.bat b/examples/arm-cm/dpp_ek-tm4c123gxl/lint/lin.bat index 2c5443fd..f40a3662 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/lint/lin.bat +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/lint/lin.bat @@ -29,7 +29,7 @@ :: along with this program. If not, see . :: :: Contact information: -:: Web : http://www.state-machine.com +:: Web : https://state-machine.com :: Email: info@state-machine.com :: =========================================================================== setlocal diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/lint/options.lnt b/examples/arm-cm/dpp_ek-tm4c123gxl/lint/options.lnt index 7ec925d7..5b0e42c9 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/lint/options.lnt +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/lint/options.lnt @@ -1,83 +1,83 @@ -////////////////////////////////////////////////////////////////////////////// -// Product: PC-Lint 9.x options for linting QP/C applications, GNU-ARM -// Last Updated for Version: 5.6.0 -// Date of the Last Update: 2015-12-19 -// -// Q u a n t u m L e a P s -// --------------------------- -// innovating embedded systems -// -// Copyright (C) Quantum Leaps, LLC. All rights reserved. -// -// This program is open source software: you can redistribute it and/or -// modify it under the terms of the GNU General Public License as published -// by the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// Alternatively, this program may be distributed and modified under the -// terms of Quantum Leaps commercial licenses, which expressly supersede -// the GNU General Public License and are specifically designed for -// licensees interested in retaining the proprietary status of their code. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// -// Contact information: -// http://www.state-machine.com -// mailto:info@state-machine.com -////////////////////////////////////////////////////////////////////////////// - -// the location of the GNU-ARM includes (need to adjust!!!) --iC:\tools\gnu_arm-eabi\arm-eabi\include - -// define ARM Architecture --D__ARM_ARCH=7 - -// the location of the QTools lint directory (need to adjust!!!) --iC:\tools\qtools\lint - -// the location of the QPC framework (need to adjust!!!) --i..\..\..\..\include // QP/C includes --i..\..\..\..\ports\arm-cm\qk\gnu // QP/C port includes --i..\..\..\..\3rd_partyCMSIS\Include // CMSIS directory - -co-gnu-arm.lnt // GNU-ARM compiler -au-misra2.lnt // MISRA-C:2004 rules -au-ds.lnt // Dan Saks recommendations -qpc.lnt // QP/C options -//-strong(AXJ) // Strong type checking - -// library headers --wlib(1) // ignore warnings from library headers -+libclass(angle) // consider only <...> headers as library -//-vf // print names of all header & source files - --emacro(923, UINT2PTR_CAST) // cast from unsigned int to pointer --emacro(946, PHILO_ID) // MISRA04-17.2(req), subtraction of pointers --emacro(947, PHILO_ID) // MISRA04-17.2(req), subtraction of pointers --emacro(960, PHILO_ID) // MISRA04-17.4(req), pointer arithmetic --estring(961, // MISRA04-19.7(adv) Function-like macro - QF_SET_BASEPRI, - PHILO_ID, - RIGHT, - LEFT) --esym(960, // MISRA04-19.4(req), disallowed macro definition - QF_SET_BASEPRI, - THINK_TIME, - EAT_TIME) --emacro(717, // do ... while(0); - QK_ISR_ENTRY, - QK_ISR_EXIT) --esym(522, Q_onAssert) // Highest operation, function lacks side-effects - -// not referenced symbols --e714 // symbol '...' not referenced --e755 // global macro '...' not referenced --e756 // global typedef '...' not referenced --e757 // global declarator '...' not referenced --e768 // struct member '...' not referenced +////////////////////////////////////////////////////////////////////////////// +// Product: PC-Lint 9.x options for linting QP/C applications, GNU-ARM +// Last Updated for Version: 5.6.0 +// Date of the Last Update: 2015-12-19 +// +// Q u a n t u m L e a P s +// --------------------------- +// innovating embedded systems +// +// Copyright (C) Quantum Leaps, LLC. All rights reserved. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// http://www.state-machine.com +// mailto:info@state-machine.com +////////////////////////////////////////////////////////////////////////////// + +// the location of the GNU-ARM includes (need to adjust!!!) +-iC:\tools\gnu_arm-eabi\arm-eabi\include + +// define ARM Architecture +-D__ARM_ARCH=7 + +// the location of the QTools lint directory (need to adjust!!!) +-iC:\tools\qtools\lint + +// the location of the QPC framework (need to adjust!!!) +-i..\..\..\..\include // QP/C includes +-i..\..\..\..\ports\arm-cm\qk\gnu // QP/C port includes +-i..\..\..\..\3rd_partyCMSIS\Include // CMSIS directory + +co-gnu-arm.lnt // GNU-ARM compiler +au-misra2.lnt // MISRA-C:2004 rules +au-ds.lnt // Dan Saks recommendations +qpc.lnt // QP/C options +//-strong(AXJ) // Strong type checking + +// library headers +-wlib(1) // ignore warnings from library headers ++libclass(angle) // consider only <...> headers as library +//-vf // print names of all header & source files + +-emacro(923, UINT2PTR_CAST) // cast from unsigned int to pointer +-emacro(946, PHILO_ID) // MISRA04-17.2(req), subtraction of pointers +-emacro(947, PHILO_ID) // MISRA04-17.2(req), subtraction of pointers +-emacro(960, PHILO_ID) // MISRA04-17.4(req), pointer arithmetic +-estring(961, // MISRA04-19.7(adv) Function-like macro + QF_SET_BASEPRI, + PHILO_ID, + RIGHT, + LEFT) +-esym(960, // MISRA04-19.4(req), disallowed macro definition + QF_SET_BASEPRI, + THINK_TIME, + EAT_TIME) +-emacro(717, // do ... while(0); + QK_ISR_ENTRY, + QK_ISR_EXIT) +-esym(522, Q_onAssert) // Highest operation, function lacks side-effects + +// not referenced symbols +-e714 // symbol '...' not referenced +-e755 // global macro '...' not referenced +-e756 // global typedef '...' not referenced +-e757 // global declarator '...' not referenced +-e768 // struct member '...' not referenced diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/arm/New File.txt b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/arm/New File.txt new file mode 100644 index 00000000..e69de29b diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/arm/dpp-qk.uvoptx b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/arm/dpp-qk.uvoptx deleted file mode 100644 index ba9da50d..00000000 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/arm/dpp-qk.uvoptx +++ /dev/null @@ -1,992 +0,0 @@ - - - - 1.0 - -
      ### uVision Project, (C) Keil Software
      - - - *.c - *.s*; *.src; *.a* - *.obj - *.lib - *.txt; *.h; *.inc - *.plm - *.cpp - 0 - - - - 0 - 0 - - - - dpp-dbg - 0x4 - ARM-ADS - - 12000000 - - 1 - 1 - 1 - 0 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\dbg\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 1 - 0 - 1 - - 4 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - 1 - 0 - 0 - 8 - - - - - - - - - - - BIN\lmidk-agdi.dll - - - - 0 - DLGUARM - - - 0 - ARMRTXEVENTFLAGS - -L70 -Z18 -C0 -M0 -T1 - - - 0 - UL2CM3 - UL2CM3(-O207 -S0 -C0 -FO7 -FN1 -FC1000 -FD20000000 -FF0TM4C123_256 -FL040000 -FS00 -FP0($$Device:TM4C123GH6PM$Flash\TM4C123_256.FLM) - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - - - - 0 - lmidk-agdi - -U0E2006F4 -O4622 -S4 -FO61 - - - - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - - - 0 - - - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - - - 0 - - - - - dpp-rel - 0x4 - ARM-ADS - - 12000000 - - 1 - 1 - 1 - 0 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\rel\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 1 - 0 - 0 - - 4 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - 1 - 0 - 0 - 8 - - - - - - - - - - - BIN\lmidk-agdi.dll - - - - 0 - DLGUARM - ÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÈ`» -´­­ª¤ô - - - 0 - ARMRTXEVENTFLAGS - -L70 -Z18 -C0 -M0 -T1 - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - - - - 0 - lmidk-agdi - -U0E10259B -O4622 -S4 -FO61 - - - 0 - UL2CM3 - -O207 -S0 -C0 -FO7 -FN1 -FC1000 -FD20000000 -FF0TM4C123_256 -FL040000 -FS00 -FP0($$Device:TM4C123GH6PM$Flash\TM4C123_256.FLM) - - - - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - - - 0 - - - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - - - 0 - - - - - dpp-spy - 0x4 - ARM-ADS - - 12000000 - - 1 - 1 - 1 - 0 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\spy\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 1 - 0 - 0 - - 4 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - 1 - 0 - 0 - 8 - - - - - - - - - - - BIN\lmidk-agdi.dll - - - - 0 - ARMRTXEVENTFLAGS - -L70 -Z18 -C0 -M0 -T1 - - - 0 - UL2CM3 - UL2CM3(-O207 -S0 -C0 -FO7 -FN1 -FC1000 -FD20000000 -FF0TM4C123_256 -FL040000 -FS00 -FP0($$Device:TM4C123GH6PM$Flash\TM4C123_256.FLM) - - - 0 - DLGTARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) - - - 0 - ARMDBGFLAGS - - - - 0 - lmidk-agdi - -U0E2006F4 -O4622 -S4 -FO61 - - - - - - 1 - 2 - 0x20000200 - 0 - - - - - 2 - 0 - 0x400 - 0 - - - - 0 - - - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - - - 0 - - - - - Applicatioin - 1 - 0 - 0 - 0 - - 1 - 1 - 1 - 0 - 0 - 0 - ..\bsp.c - bsp.c - 0 - 0 - - - 1 - 2 - 5 - 0 - 0 - 0 - ..\..\dpp.h - dpp.h - 0 - 0 - - - 1 - 3 - 5 - 0 - 0 - 0 - ..\..\bsp.h - bsp.h - 0 - 0 - - - 1 - 4 - 1 - 0 - 0 - 0 - ..\..\philo.c - philo.c - 0 - 0 - - - 1 - 5 - 1 - 0 - 0 - 0 - ..\..\table.c - table.c - 0 - 0 - - - 1 - 6 - 1 - 0 - 0 - 0 - ..\..\..\..\..\include\qstamp.c - qstamp.c - 0 - 0 - - - 1 - 7 - 1 - 0 - 0 - 0 - ..\main.c - main.c - 0 - 0 - - - - - ek-tm4c123gxl - 0 - 0 - 0 - 0 - - 2 - 8 - 1 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.c - system_TM4C123GH6PM.c - 0 - 0 - - - 2 - 9 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\ek-tm4c123gxl\TM4C123GH6PM.h - TM4C123GH6PM.h - 0 - 0 - - - 2 - 10 - 2 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\ek-tm4c123gxl\arm\startup_TM4C123GH6PM.s - startup_TM4C123GH6PM.s - 0 - 0 - - - 2 - 11 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\ek-tm4c123gxl\gpio.h - gpio.h - 0 - 0 - - - 2 - 12 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\ek-tm4c123gxl\rom.h - rom.h - 0 - 0 - - - 2 - 13 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\ek-tm4c123gxl\sysctl.h - sysctl.h - 0 - 0 - - - 2 - 14 - 5 - 0 - 0 - 0 - ..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.h - system_TM4C123GH6PM.h - 0 - 0 - - - - - QP - 0 - 0 - 0 - 0 - - 3 - 15 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qep_hsm.c - qep_hsm.c - 0 - 0 - - - 3 - 16 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qep_msm.c - qep_msm.c - 0 - 0 - - - 3 - 17 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_act.c - qf_act.c - 0 - 0 - - - 3 - 18 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_actq.c - qf_actq.c - 0 - 0 - - - 3 - 19 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_defer.c - qf_defer.c - 0 - 0 - - - 3 - 20 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_dyn.c - qf_dyn.c - 0 - 0 - - - 3 - 21 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_mem.c - qf_mem.c - 0 - 0 - - - 3 - 22 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_ps.c - qf_ps.c - 0 - 0 - - - 3 - 23 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_qact.c - qf_qact.c - 0 - 0 - - - 3 - 24 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_qeq.c - qf_qeq.c - 0 - 0 - - - 3 - 25 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_qmact.c - qf_qmact.c - 0 - 0 - - - 3 - 26 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qf_time.c - qf_time.c - 0 - 0 - - - 3 - 27 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qk.c - qk.c - 0 - 0 - - - 3 - 28 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qk_mutex.c - qk_mutex.c - 0 - 0 - - - - - QP_port - 1 - 0 - 0 - 0 - - 4 - 29 - 2 - 0 - 0 - 0 - ..\..\..\..\..\ports\arm-cm\qk\arm\qk_port.s - qk_port.s - 0 - 0 - - - - - QS - 1 - 0 - 0 - 0 - - 5 - 30 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qs.c - qs.c - 0 - 0 - - - 5 - 31 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qs_64bit.c - qs_64bit.c - 0 - 0 - - - 5 - 32 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qs_fp.c - qs_fp.c - 0 - 0 - - - 5 - 33 - 1 - 0 - 0 - 0 - ..\..\..\..\..\source\qs_rx.c - qs_rx.c - 0 - 0 - - - -       diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/bsp.c b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/bsp.c index 56d9a424..b218cc18 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/bsp.c +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, EK-TM4C123GXL board, preemptive QK kernel -* Last Updated for Version: 5.6.2 -* Date of the Last Update: 2016-03-30 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-04-14 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -403,18 +403,7 @@ uint8_t QS_onStartup(void const *arg) { QS_tickTime_ = QS_tickPeriod_; /* to start the timestamp at zero */ /* setup the QS filters... */ - QS_FILTER_ON(QS_QEP_STATE_ENTRY); - QS_FILTER_ON(QS_QEP_STATE_EXIT); - QS_FILTER_ON(QS_QEP_STATE_INIT); - QS_FILTER_ON(QS_QEP_INIT_TRAN); - QS_FILTER_ON(QS_QEP_INTERN_TRAN); - QS_FILTER_ON(QS_QEP_TRAN); - QS_FILTER_ON(QS_QEP_IGNORED); - QS_FILTER_ON(QS_QEP_DISPATCH); - QS_FILTER_ON(QS_QEP_UNHANDLED); - - QS_FILTER_ON(PHILO_STAT); - QS_FILTER_ON(COMMAND_STAT); + QS_FILTER_ON(QS_ALL_RECORDS); return (uint8_t)1; /* return success */ } @@ -456,13 +445,19 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a user command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ void assert_failed(char const *module, int loc); (void)cmdId; - (void)param; - QS_BEGIN(COMMAND_STAT, (void *)0) /* application-specific record begin */ + (void)param1; + (void)param2; + (void)param3; + QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/gnu/Makefile b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/gnu/Makefile index 86f91114..66a2ee15 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/gnu/Makefile +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/main.c b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/main.c index 09238fd0..d02ab7a1 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qk/main.c +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qk/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/dpp.tcl b/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/dpp.tcl deleted file mode 100644 index 42d66449..00000000 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/dpp.tcl +++ /dev/null @@ -1,381 +0,0 @@ -#----------------------------------------------------------------------------- -# Product: QSpyView -- Customization example for DPP application -# Last updated for version 5.6.4 -# Last updated on 2016-04-25 -# -# Q u a n t u m L e a P s -# --------------------------- -# innovating embedded systems -# -# Copyright (C) Quantum Leaps, LLC, All rights reserved. -# -# This program is open source software: you can redistribute it and/or -# modify it under the terms of the GNU General Public License as published -# by the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# Alternatively, this program may be distributed and modified under the -# terms of Quantum Leaps commercial licenses, which expressly supersede -# the GNU General Public License and are specifically designed for -# licensees interested in retaining the proprietary status of their code. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . -# -# Contact information: -# http://www.state-machine.com -# mailto:info@state-machine.com -#----------------------------------------------------------------------------- - -# command handlers =========================================================== -proc onMyCommand {} { - # do something here, for example: - # - inject an event to the Target - # - send a command to the Target - # - peek memory - # - poke memory - # - exectute system tick in the Target - # - open a dialog box... - # - etc. - - # as an example, the following code sends a command to the Target - variable ::qspy::QS_RX - ::qspy::sendPkt [binary format cci $::qspy::QS_RX(COMMAND) 1 12345] -} - -proc onPause {} { - global theButtonId theBtnState - if {[string equal $theBtnState BTN_UP]} { ;# is DWN? - set theBtnState BTN_DWN - ::qspy::sendEvent 6 6 0 - } else { - set theBtnState BTN_UP - ::qspy::sendEvent 6 7 0 - } - .canv.c itemconfigure $theButtonId -image ::img::$theBtnState -} - -# additinal menu options ===================================================== -.mbar.cust add command -label "MyCommand" -command onMyCommand - - -# specific canvas for DPP ==================================================== -set scriptFolder [file dirname [file normalize [info script]]] - -image create photo ::img::e -file $scriptFolder/img/eating.gif -image create photo ::img::h -file $scriptFolder/img/hungry.gif -image create photo ::img::t -file $scriptFolder/img/thinking.gif -image create photo ::img::BTN_UP -file $scriptFolder/img/BTN_UP.gif -image create photo ::img::BTN_DWN -file $scriptFolder/img/BTN_DWN.gif - -wm geometry .canv =400x260 -.canv.c configure -width 400 -.canv.c configure -height 260 - -set thePhiloId [.canv.c create image 190 57 -image ::img::t] -.canv.c create image 273 100 -image ::img::t -.canv.c create image 237 185 -image ::img::t -.canv.c create image 146 184 -image ::img::t -.canv.c create image 107 100 -image ::img::t - - -set theButtonId [.canv.c create image 200 120 -image ::img::BTN_UP] -set theBtnState BTN_UP -.canv.c bind $theButtonId onPause - -# QS record handlers ========================================================= - -# user record handlers [70..0x7C] -------------------------------------------- -proc ::qspy::rec70 {} { ;# QS_USER - variable thePkt - variable theFmt - binary scan $thePkt xx$theFmt(tstamp)xcxa* \ - tstamp philoNum stat - - dispTxt [format "%010u Philo %1d is %s" $tstamp $philoNum $stat] - - global thePhiloId - set img [string index $stat 0] - .canv.c itemconfigure [expr $thePhiloId + $philoNum] -image ::img::$img -} -#............................................................................. -proc ::qspy::rec71 {} { ;# QS_USER + 1 - variable thePkt - variable theFmt - binary scan $thePkt xx$theFmt(tstamp)xcxi \ - tstamp cmdId param - dispTxt [format "%010u cmd=%d param=%d" $tstamp $cmdId $param] -} - -proc ::qspy::rec72 {} { ;# QS_USER + 2 -} -proc ::qspy::rec73 {} { ;# QS_USER + 3 -} -proc ::qspy::rec74 {} { ;# QS_USER + 4 -} -proc ::qspy::rec75 {} { ;# QS_USER + 5 -} -proc ::qspy::rec76 {} { ;# QS_USER + 6 -} -proc ::qspy::rec77 {} { ;# QS_USER + 7 -} -proc ::qspy::rec78 {} { ;# QS_USER + 8 -} -proc ::qspy::rec79 {} { ;# QS_USER + 9 -} -proc ::qspy::rec80 {} { ;# QS_USER + 10 -} -proc ::qspy::rec81 {} { ;# QS_USER + 11 -} -proc ::qspy::rec82 {} { ;# QS_USER + 12 -} -proc ::qspy::rec83 {} { ;# QS_USER + 13 -} -proc ::qspy::rec84 {} { ;# QS_USER + 14 -} -proc ::qspy::rec85 {} { ;# QS_USER + 15 -} -proc ::qspy::rec86 {} { ;# QS_USER + 16 -} -proc ::qspy::rec87 {} { ;# QS_USER + 17 -} -proc ::qspy::rec88 {} { ;# QS_USER + 18 -} -proc ::qspy::rec89 {} { ;# QS_USER + 19 -} -proc ::qspy::rec90 {} { ;# QS_USER + 20 -} -proc ::qspy::rec91 {} { ;# QS_USER + 21 -} -proc ::qspy::rec92 {} { ;# QS_USER + 22 -} -proc ::qspy::rec93 {} { ;# QS_USER + 23 -} -proc ::qspy::rec94 {} { ;# QS_USER + 24 -} -proc ::qspy::rec95 {} { ;# QS_USER + 25 -} -proc ::qspy::rec96 {} { ;# QS_USER + 26 -} -proc ::qspy::rec97 {} { ;# QS_USER + 27 -} -proc ::qspy::rec98 {} { ;# QS_USER + 28 -} -proc ::qspy::rec99 {} { ;# QS_USER + 29 -} -proc ::qspy::rec100 {} { ;# QS_USER + 30 -} -proc ::qspy::rec101 {} { ;# QS_USER + 31 -} -proc ::qspy::rec102 {} { ;# QS_USER + 32 -} -proc ::qspy::rec103 {} { ;# QS_USER + 33 -} -proc ::qspy::rec104 {} { ;# QS_USER + 34 -} -proc ::qspy::rec105 {} { ;# QS_USER + 35 -} -proc ::qspy::rec106 {} { ;# QS_USER + 36 -} -proc ::qspy::rec107 {} { ;# QS_USER + 37 -} -proc ::qspy::rec108 {} { ;# QS_USER + 38 -} -proc ::qspy::rec109 {} { ;# QS_USER + 39 -} -proc ::qspy::rec110 {} { ;# QS_USER + 40 -} -proc ::qspy::rec111 {} { ;# QS_USER + 41 -} -proc ::qspy::rec112 {} { ;# QS_USER + 42 -} -proc ::qspy::rec113 {} { ;# QS_USER + 43 -} -proc ::qspy::rec114 {} { ;# QS_USER + 44 -} -proc ::qspy::rec115 {} { ;# QS_USER + 45 -} -proc ::qspy::rec116 {} { ;# QS_USER + 46 -} -proc ::qspy::rec117 {} { ;# QS_USER + 47 -} -proc ::qspy::rec118 {} { ;# QS_USER + 48 -} -proc ::qspy::rec119 {} { ;# QS_USER + 49 -} -proc ::qspy::rec120 {} { ;# QS_USER + 50 -} -proc ::qspy::rec121 {} { ;# QS_USER + 51 -} -proc ::qspy::rec122 {} { ;# QS_USER + 52 -} -proc ::qspy::rec123 {} { ;# QS_USER + 53 -} -proc ::qspy::rec124 {} { ;# QS_USER + 54 -} - - -# special record handlers ---------------------------------------------------- -proc ::qspy::recRESET {} { ;# target reset callback -} -proc ::qspy::recINFO {} { ;# target info callback -} - -# standard record handlers [1..54] ------------------------------------------- -proc ::qspy::rec0 {} { ;# QS_EMPTY -} - -# [1] QEP records... -proc ::qspy::rec1 {} { ;# QS_QEP_STATE_ENTRY -} -proc ::qspy::rec2 {} { ;# QS_QEP_STATE_EXIT -} -proc ::qspy::rec3 {} { ;# QS_QEP_STATE_INIT -} -proc ::qspy::rec4 {} { ;# QS_QEP_INIT_TRAN -} -proc ::qspy::rec5 {} { ;# QS_QEP_INTERN_TRAN -} -proc ::qspy::rec6 {} { ;# QS_QEP_TRAN -} -proc ::qspy::rec7 {} { ;# QS_QEP_IGNORED -} -proc ::qspy::rec8 {} { ;# QS_QEP_DISPATCH -} -proc ::qspy::rec9 {} { ;# QS_QEP_UNHANDLED -} - -# [10] QF records... -proc ::qspy::rec10 {} { ;# QS_QF_ACTIVE_ADD -} -proc ::qspy::rec11 {} { ;# QS_QF_ACTIVE_REMOVE -} -proc ::qspy::rec12 {} { ;# QS_QF_ACTIVE_SUBSCRIBE -} -proc ::qspy::rec13 {} { ;# QS_QF_ACTIVE_UNSUBSCRIBE -} -proc ::qspy::rec14 {} { ;# QS_QF_ACTIVE_POST_FIFO -} -proc ::qspy::rec15 {} { ;# QS_QF_ACTIVE_POST_LIFO -} -proc ::qspy::rec16 {} { ;# QS_QF_ACTIVE_GET -} -proc ::qspy::rec17 {} { ;# QS_QF_ACTIVE_GET_LAST -} -proc ::qspy::rec18 {} { ;# QS_QF_EQUEUE_INIT -} -proc ::qspy::rec19 {} { ;# QS_QF_EQUEUE_POST_FIFO -} -proc ::qspy::rec20 {} { ;# QS_QF_EQUEUE_POST_LIFO -} -proc ::qspy::rec21 {} { ;# QS_QF_EQUEUE_GET -} -proc ::qspy::rec22 {} { ;# QS_QF_EQUEUE_GET_LAST -} -proc ::qspy::rec23 {} { ;# QS_QF_MPOOL_INIT -} -proc ::qspy::rec24 {} { ;# QS_QF_MPOOL_GET -} -proc ::qspy::rec25 {} { ;# QS_QF_MPOOL_PUT -} -proc ::qspy::rec26 {} { ;# QS_QF_PUBLISH -} -proc ::qspy::rec27 {} { ;# QS_QF_RESERVED8 -} -proc ::qspy::rec28 {} { ;# QS_QF_NEW -} -proc ::qspy::rec29 {} { ;# QS_QF_GC_ATTEMPT -} -proc ::qspy::rec30 {} { ;# QS_QF_GC -} -proc ::qspy::rec31 {} { ;# QS_QF_TICK -} -proc ::qspy::rec32 {} { ;# QS_QF_TIMEEVT_ARM -} -proc ::qspy::rec33 {} { ;# QS_QF_TIMEEVT_AUTO_DISARM -} -proc ::qspy::rec34 {} { ;# QS_QF_TIMEEVT_DISARM_ATTEMPT -} -proc ::qspy::rec35 {} { ;# QS_QF_TIMEEVT_DISARM -} -proc ::qspy::rec36 {} { ;# QS_QF_TIMEEVT_REARM -} -proc ::qspy::rec37 {} { ;# QS_QF_TIMEEVT_POST -} -proc ::qspy::rec38 {} { ;# QS_QF_TIMEEVT_CTR -} -proc ::qspy::rec39 {} { ;# QS_QF_CRIT_ENTRY -} -proc ::qspy::rec40 {} { ;# QS_QF_CRIT_EXIT -} -proc ::qspy::rec41 {} { ;# QS_QF_ISR_ENTRY -} -proc ::qspy::rec42 {} { ;# QS_QF_ISR_EXIT -} -proc ::qspy::rec43 {} { ;# QS_QF_INT_DISABLE -} -proc ::qspy::rec44 {} { ;# QS_QF_INT_ENABLE -} -proc ::qspy::rec45 {} { ;# QS_QF_ACTIVE_POST_ATTEMPT -} -proc ::qspy::rec46 {} { ;# QS_QF_EQUEUE_POST_ATTEMPT -} -proc ::qspy::rec47 {} { ;# QS_QF_MPOOL_GET_ATTEMPT -} -proc ::qspy::rec48 {} { ;# QS_QF_RESERVED1 -} -proc ::qspy::rec49 {} { ;# QS_QF_RESERVED0 -} - -# [50] QK/QV records -proc ::qspy::rec50 {} { ;# QS_QK_MUTEX_LOCK -} -proc ::qspy::rec51 {} { ;# QS_QK_MUTEX_UNLOCK -} -proc ::qspy::rec52 {} { ;# QS_QVK_SCHEDULE -} -proc ::qspy::rec53 {} { ;# QS_QVK_IDLE -} -proc ::qspy::rec54 {} { ;# QS_QK_RESUME -} - -# [55] Additional QEP records -proc ::qspy::rec55 {} { ;# QS_QEP_TRAN_HIST -} -proc ::qspy::rec56 {} { ;# QS_QEP_TRAN_EP -} -proc ::qspy::rec57 {} { ;# QS_QEP_TRAN_XP -} -proc ::qspy::rec58 {} { ;# QS_QEP_RESERVED1 -} -proc ::qspy::rec59 {} { ;# QS_QEP_RESERVED0 -} - -# Miscellaneous QS records -proc ::qspy::rec60 {} { ;# QS_SIG_DICT -} -proc ::qspy::rec61 {} { ;# QS_OBJ_DICT -} -proc ::qspy::rec62 {} { ;# QS_FUN_DICT -} -proc ::qspy::rec63 {} { ;# QS_USR_DICT -} - -# proc ::qspy::64 ;# QS_TARGET_INFO not used, see proc recINFO - -proc ::qspy::rec65 {} { ;# QS_RESERVED0 -} -proc ::qspy::rec66 {} { ;# QS_RX_STATUS -} -proc ::qspy::rec67 {} { ;# QS_TEST_STATUS -} -proc ::qspy::rec68 {} { ;# QS_PEEK_DATA -} -proc ::qspy::rec69 {} { ;# QS_ASSERT_FAIL -} - diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/qspyview.bat b/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/qspyview.bat deleted file mode 100644 index c9eab430..00000000 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/qspyview.bat +++ /dev/null @@ -1 +0,0 @@ -wish C:\qp\qtools\qspy\qspyview\qspyview.tcl dpp.tcl \ No newline at end of file diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/qspyview.lnk b/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/qspyview.lnk deleted file mode 100644 index 73a09a77..00000000 Binary files a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/qspyview.lnk and /dev/null differ diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/dpp.tcl b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/dpp.tcl new file mode 100644 index 00000000..2ca4b5e3 --- /dev/null +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/dpp.tcl @@ -0,0 +1,381 @@ +#----------------------------------------------------------------------------- +# Product: QSpyView -- Customization example for DPP application +# Last updated for version 5.8.3 +# Last updated on 2017-03-06 +# +# Q u a n t u m L e a P s +# --------------------------- +# innovating embedded systems +# +# Copyright (C) Quantum Leaps, LLC, All rights reserved. +# +# This program is open source software: you can redistribute it and/or +# modify it under the terms of the GNU General Public License as published +# by the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# Alternatively, this program may be distributed and modified under the +# terms of Quantum Leaps commercial licenses, which expressly supersede +# the GNU General Public License and are specifically designed for +# licensees interested in retaining the proprietary status of their code. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Contact information: +# https://state-machine.com +# mailto:info@state-machine.com +#----------------------------------------------------------------------------- + +# command handlers =========================================================== +proc onMyCommand {} { + # do something here, for example: + # - inject an event to the Target + # - send a command to the Target + # - peek memory + # - poke memory + # - exectute system tick in the Target + # - open a dialog box... + # - etc. + + # as an example, the following code sends a command to the Target + variable qspy::QS_RX + qspy::sendPkt [binary format cciii $qspy::QS_RX(COMMAND) 1 12345 0 0] +} + +proc onPause {} { + global theButtonId theBtnState + if {[string equal $theBtnState BTN_UP]} { ;# is DWN? + set theBtnState BTN_DWN + qspy::sendEvent 8 6 0 + } else { + set theBtnState BTN_UP + qspy::sendEvent 8 7 0 + } + .canv.c itemconfigure $theButtonId -image ::img::$theBtnState +} + +# additinal menu options ===================================================== +.mbar.cust add command -label "MyCommand" -command onMyCommand + + +# specific canvas for DPP ==================================================== +set scriptFolder [file dirname [file normalize [info script]]] + +image create photo ::img::e -file $scriptFolder/img/eating.gif +image create photo ::img::h -file $scriptFolder/img/hungry.gif +image create photo ::img::t -file $scriptFolder/img/thinking.gif +image create photo ::img::BTN_UP -file $scriptFolder/img/BTN_UP.gif +image create photo ::img::BTN_DWN -file $scriptFolder/img/BTN_DWN.gif + +wm geometry .canv =400x260 +.canv.c configure -width 400 +.canv.c configure -height 260 + +set thePhiloId [.canv.c create image 190 57 -image ::img::t] +.canv.c create image 273 100 -image ::img::t +.canv.c create image 237 185 -image ::img::t +.canv.c create image 146 184 -image ::img::t +.canv.c create image 107 100 -image ::img::t + + +set theButtonId [.canv.c create image 200 120 -image ::img::BTN_UP] +set theBtnState BTN_UP +.canv.c bind $theButtonId onPause + +# QS record handlers ========================================================= + +# user record handlers [70..0x7C] -------------------------------------------- +proc qspy::rec70 {} { ;# QS_USER + variable thePkt + variable theFmt + binary scan $thePkt xx$theFmt(tstamp)xcxa* \ + tstamp philoNum stat + + dispTxt [format "%010u Philo %1d is %s" $tstamp $philoNum $stat] + + global thePhiloId + set img [string index $stat 0] + .canv.c itemconfigure [expr $thePhiloId + $philoNum] -image ::img::$img +} +#............................................................................. +proc qspy::rec71 {} { ;# QS_USER + 1 + variable thePkt + variable theFmt + binary scan $thePkt xx$theFmt(tstamp)xcxi \ + tstamp cmdId param + dispTxt [format "%010u cmd=%d param=%d" $tstamp $cmdId $param] +} + +proc qspy::rec72 {} { ;# QS_USER + 2 +} +proc qspy::rec73 {} { ;# QS_USER + 3 +} +proc qspy::rec74 {} { ;# QS_USER + 4 +} +proc qspy::rec75 {} { ;# QS_USER + 5 +} +proc qspy::rec76 {} { ;# QS_USER + 6 +} +proc qspy::rec77 {} { ;# QS_USER + 7 +} +proc qspy::rec78 {} { ;# QS_USER + 8 +} +proc qspy::rec79 {} { ;# QS_USER + 9 +} +proc qspy::rec80 {} { ;# QS_USER + 10 +} +proc qspy::rec81 {} { ;# QS_USER + 11 +} +proc qspy::rec82 {} { ;# QS_USER + 12 +} +proc qspy::rec83 {} { ;# QS_USER + 13 +} +proc qspy::rec84 {} { ;# QS_USER + 14 +} +proc qspy::rec85 {} { ;# QS_USER + 15 +} +proc qspy::rec86 {} { ;# QS_USER + 16 +} +proc qspy::rec87 {} { ;# QS_USER + 17 +} +proc qspy::rec88 {} { ;# QS_USER + 18 +} +proc qspy::rec89 {} { ;# QS_USER + 19 +} +proc qspy::rec90 {} { ;# QS_USER + 20 +} +proc qspy::rec91 {} { ;# QS_USER + 21 +} +proc qspy::rec92 {} { ;# QS_USER + 22 +} +proc qspy::rec93 {} { ;# QS_USER + 23 +} +proc qspy::rec94 {} { ;# QS_USER + 24 +} +proc qspy::rec95 {} { ;# QS_USER + 25 +} +proc qspy::rec96 {} { ;# QS_USER + 26 +} +proc qspy::rec97 {} { ;# QS_USER + 27 +} +proc qspy::rec98 {} { ;# QS_USER + 28 +} +proc qspy::rec99 {} { ;# QS_USER + 29 +} +proc qspy::rec100 {} { ;# QS_USER + 30 +} +proc qspy::rec101 {} { ;# QS_USER + 31 +} +proc qspy::rec102 {} { ;# QS_USER + 32 +} +proc qspy::rec103 {} { ;# QS_USER + 33 +} +proc qspy::rec104 {} { ;# QS_USER + 34 +} +proc qspy::rec105 {} { ;# QS_USER + 35 +} +proc qspy::rec106 {} { ;# QS_USER + 36 +} +proc qspy::rec107 {} { ;# QS_USER + 37 +} +proc qspy::rec108 {} { ;# QS_USER + 38 +} +proc qspy::rec109 {} { ;# QS_USER + 39 +} +proc qspy::rec110 {} { ;# QS_USER + 40 +} +proc qspy::rec111 {} { ;# QS_USER + 41 +} +proc qspy::rec112 {} { ;# QS_USER + 42 +} +proc qspy::rec113 {} { ;# QS_USER + 43 +} +proc qspy::rec114 {} { ;# QS_USER + 44 +} +proc qspy::rec115 {} { ;# QS_USER + 45 +} +proc qspy::rec116 {} { ;# QS_USER + 46 +} +proc qspy::rec117 {} { ;# QS_USER + 47 +} +proc qspy::rec118 {} { ;# QS_USER + 48 +} +proc qspy::rec119 {} { ;# QS_USER + 49 +} +proc qspy::rec120 {} { ;# QS_USER + 50 +} +proc qspy::rec121 {} { ;# QS_USER + 51 +} +proc qspy::rec122 {} { ;# QS_USER + 52 +} +proc qspy::rec123 {} { ;# QS_USER + 53 +} +proc qspy::rec124 {} { ;# QS_USER + 54 +} + + +# special record handlers ---------------------------------------------------- +proc qspy::recRESET {} { ;# target reset callback +} +proc qspy::recINFO {} { ;# target info callback +} + +# standard record handlers [1..54] ------------------------------------------- +proc qspy::rec0 {} { ;# QS_EMPTY +} + +# [1] QEP records... +proc qspy::rec1 {} { ;# QS_QEP_STATE_ENTRY +} +proc qspy::rec2 {} { ;# QS_QEP_STATE_EXIT +} +proc qspy::rec3 {} { ;# QS_QEP_STATE_INIT +} +proc qspy::rec4 {} { ;# QS_QEP_INIT_TRAN +} +proc qspy::rec5 {} { ;# QS_QEP_INTERN_TRAN +} +proc qspy::rec6 {} { ;# QS_QEP_TRAN +} +proc qspy::rec7 {} { ;# QS_QEP_IGNORED +} +proc qspy::rec8 {} { ;# QS_QEP_DISPATCH +} +proc qspy::rec9 {} { ;# QS_QEP_UNHANDLED +} + +# [10] QF records... +proc qspy::rec10 {} { ;# QS_QF_ACTIVE_ADD +} +proc qspy::rec11 {} { ;# QS_QF_ACTIVE_REMOVE +} +proc qspy::rec12 {} { ;# QS_QF_ACTIVE_SUBSCRIBE +} +proc qspy::rec13 {} { ;# QS_QF_ACTIVE_UNSUBSCRIBE +} +proc qspy::rec14 {} { ;# QS_QF_ACTIVE_POST_FIFO +} +proc qspy::rec15 {} { ;# QS_QF_ACTIVE_POST_LIFO +} +proc qspy::rec16 {} { ;# QS_QF_ACTIVE_GET +} +proc qspy::rec17 {} { ;# QS_QF_ACTIVE_GET_LAST +} +proc qspy::rec18 {} { ;# QS_QF_EQUEUE_INIT +} +proc qspy::rec19 {} { ;# QS_QF_EQUEUE_POST_FIFO +} +proc qspy::rec20 {} { ;# QS_QF_EQUEUE_POST_LIFO +} +proc qspy::rec21 {} { ;# QS_QF_EQUEUE_GET +} +proc qspy::rec22 {} { ;# QS_QF_EQUEUE_GET_LAST +} +proc qspy::rec23 {} { ;# QS_QF_MPOOL_INIT +} +proc qspy::rec24 {} { ;# QS_QF_MPOOL_GET +} +proc qspy::rec25 {} { ;# QS_QF_MPOOL_PUT +} +proc qspy::rec26 {} { ;# QS_QF_PUBLISH +} +proc qspy::rec27 {} { ;# QS_QF_RESERVED8 +} +proc qspy::rec28 {} { ;# QS_QF_NEW +} +proc qspy::rec29 {} { ;# QS_QF_GC_ATTEMPT +} +proc qspy::rec30 {} { ;# QS_QF_GC +} +proc qspy::rec31 {} { ;# QS_QF_TICK +} +proc qspy::rec32 {} { ;# QS_QF_TIMEEVT_ARM +} +proc qspy::rec33 {} { ;# QS_QF_TIMEEVT_AUTO_DISARM +} +proc qspy::rec34 {} { ;# QS_QF_TIMEEVT_DISARM_ATTEMPT +} +proc qspy::rec35 {} { ;# QS_QF_TIMEEVT_DISARM +} +proc qspy::rec36 {} { ;# QS_QF_TIMEEVT_REARM +} +proc qspy::rec37 {} { ;# QS_QF_TIMEEVT_POST +} +proc qspy::rec38 {} { ;# QS_QF_TIMEEVT_CTR +} +proc qspy::rec39 {} { ;# QS_QF_CRIT_ENTRY +} +proc qspy::rec40 {} { ;# QS_QF_CRIT_EXIT +} +proc qspy::rec41 {} { ;# QS_QF_ISR_ENTRY +} +proc qspy::rec42 {} { ;# QS_QF_ISR_EXIT +} +proc qspy::rec43 {} { ;# QS_QF_INT_DISABLE +} +proc qspy::rec44 {} { ;# QS_QF_INT_ENABLE +} +proc qspy::rec45 {} { ;# QS_QF_ACTIVE_POST_ATTEMPT +} +proc qspy::rec46 {} { ;# QS_QF_EQUEUE_POST_ATTEMPT +} +proc qspy::rec47 {} { ;# QS_QF_MPOOL_GET_ATTEMPT +} +proc qspy::rec48 {} { ;# QS_QF_RESERVED1 +} +proc qspy::rec49 {} { ;# QS_QF_RESERVED0 +} + +# [50] QK/QV records +proc qspy::rec50 {} { ;# QS_QK_MUTEX_LOCK +} +proc qspy::rec51 {} { ;# QS_QK_MUTEX_UNLOCK +} +proc qspy::rec52 {} { ;# QS_QVK_SCHEDULE +} +proc qspy::rec53 {} { ;# QS_QVK_IDLE +} +proc qspy::rec54 {} { ;# QS_QK_RESUME +} + +# [55] Additional QEP records +proc qspy::rec55 {} { ;# QS_QEP_TRAN_HIST +} +proc qspy::rec56 {} { ;# QS_QEP_TRAN_EP +} +proc qspy::rec57 {} { ;# QS_QEP_TRAN_XP +} +proc qspy::rec58 {} { ;# QS_QEP_RESERVED1 +} +proc qspy::rec59 {} { ;# QS_QEP_RESERVED0 +} + +# Miscellaneous QS records +proc qspy::rec60 {} { ;# QS_SIG_DICT +} +proc qspy::rec61 {} { ;# QS_OBJ_DICT +} +proc qspy::rec62 {} { ;# QS_FUN_DICT +} +proc qspy::rec63 {} { ;# QS_USR_DICT +} + +# proc qspy::64 ;# QS_TARGET_INFO not used, see proc recINFO + +proc qspy::rec65 {} { ;# QS_RESERVED0 +} +proc qspy::rec66 {} { ;# QS_RX_STATUS +} +proc qspy::rec67 {} { ;# QS_TEST_STATUS +} +proc qspy::rec68 {} { ;# QS_PEEK_DATA +} +proc qspy::rec69 {} { ;# QS_ASSERT_FAIL +} + diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/BTN_DWN.gif b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/BTN_DWN.gif similarity index 100% rename from examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/BTN_DWN.gif rename to examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/BTN_DWN.gif diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/BTN_UP.gif b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/BTN_UP.gif similarity index 100% rename from examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/BTN_UP.gif rename to examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/BTN_UP.gif diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/eating.gif b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/eating.gif similarity index 100% rename from examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/eating.gif rename to examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/eating.gif diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/hungry.gif b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/hungry.gif similarity index 100% rename from examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/hungry.gif rename to examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/hungry.gif diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/thinking.gif b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/thinking.gif similarity index 100% rename from examples/arm-cm/dpp_ek-tm4c123gxl/qspy/img/thinking.gif rename to examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/img/thinking.gif diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/qspyview.bat b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/qspyview.bat new file mode 100644 index 00000000..8e467b02 --- /dev/null +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/qspyview.bat @@ -0,0 +1 @@ +wish C:\qp\qtools\qspy\tcl\qspyview.tcl dpp.tcl \ No newline at end of file diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/qspyview.lnk b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/qspyview.lnk new file mode 100644 index 00000000..bc901565 Binary files /dev/null and b/examples/arm-cm/dpp_ek-tm4c123gxl/qspyview/qspyview.lnk differ diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/arm/dpp-qv.uvprojx b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/arm/dpp-qv.uvprojx index e4a23403..6ab93d24 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/arm/dpp-qv.uvprojx +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/arm/dpp-qv.uvprojx @@ -10,7 +10,7 @@ dpp-dbg 0x4 ARM-ADS - 5060020::V5.06 (build 20)::ARMCC + 5060183::V5.06 update 2 (build 183)::ARMCC TM4C123GH6PM diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/bsp.c b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/bsp.c index 35250328..a8ad5a28 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/bsp.c +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, EK-TM4C123GXL board, cooperative QV kernel -* Last Updated for Version: 5.5.0 -* Date of the Last Update: 2015-08-20 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-04-14 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -435,13 +435,19 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a user command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ void assert_failed(char const *module, int loc); (void)cmdId; - (void)param; - QS_BEGIN(COMMAND_STAT, (void *)0) /* application-specific record begin */ + (void)param1; + (void)param2; + (void)param3; + QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/gnu/Makefile b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/gnu/Makefile index f829ce13..2585c50c 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/gnu/Makefile +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/main.c b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/main.c index 50b92598..04d8d2bb 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qv/main.c +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qv/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/bsp.c b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/bsp.c index bfb028d6..8afc5be7 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/bsp.c +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/bsp.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: DPP example, EK-TM4C123GXL board, preemptive QXK kernel -* Last Updated for Version: 5.7.2 -* Date of the Last Update: 2016-09-29 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-04-14 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" @@ -429,6 +429,8 @@ uint8_t QS_onStartup(void const *arg) { QS_FILTER_ON(PAUSED_STAT); QS_FILTER_ON(COMMAND_STAT); + QS_FILTER_ON(QS_ALL_RECORDS); //??? + return (uint8_t)1; /* return success */ } /*..........................................................................*/ @@ -469,13 +471,19 @@ void QS_onReset(void) { } /*..........................................................................*/ /*! callback function to execute a user command (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param) { +void QS_onCommand(uint8_t cmdId, + uint32_t param1, uint32_t param2, uint32_t param3) +{ void assert_failed(char const *module, int loc); (void)cmdId; - (void)param; - QS_BEGIN(COMMAND_STAT, (void *)0) /* application-specific record begin */ + (void)param1; + (void)param2; + (void)param3; + QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */ QS_U8(2, cmdId); - QS_U32(8, param); + QS_U32(8, param1); + QS_U32(8, param2); + QS_U32(8, param3); QS_END() if (cmdId == 10U) { diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/gnu/Makefile b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/gnu/Makefile index 6cac86a7..d5036cd6 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/gnu/Makefile +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/gnu/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/main.c b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/main.c index fd50b89f..c13da9e2 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/main.c +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/test.c b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/test.c index 9be3a3ab..644027fb 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/test.c +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/test.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/ti/.cproject b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/ti/.cproject index c7cbea7c..662c60c0 100644 --- a/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/ti/.cproject +++ b/examples/arm-cm/dpp_ek-tm4c123gxl/qxk/ti/.cproject @@ -25,21 +25,21 @@ - @@ -384,6 +387,9 @@ 0 + + + 0 @@ -466,7 +472,7 @@ 1 0 0 - 3 + 8 @@ -572,12 +578,15 @@ 0 + + + 0 Application - 1 + 0 0 0 0 @@ -586,7 +595,6 @@ 1 1 0 - 0 0 0 ..\bsp.c @@ -599,7 +607,6 @@ 2 1 0 - 0 0 0 ..\main.c @@ -612,7 +619,6 @@ 3 5 0 - 0 0 0 ..\os_cfg.h @@ -625,7 +631,6 @@ 4 5 0 - 0 0 0 ..\README.txt @@ -638,7 +643,6 @@ 5 5 0 - 0 0 0 ..\app_cfg.h @@ -651,7 +655,6 @@ 6 5 0 - 0 0 0 ..\bsp.h @@ -664,7 +667,6 @@ 7 5 0 - 0 0 0 ..\dpp.h @@ -677,7 +679,6 @@ 8 1 0 - 0 0 0 ..\philo.c @@ -690,7 +691,6 @@ 9 1 0 - 0 0 0 ..\table.c @@ -703,7 +703,6 @@ 10 1 0 - 0 0 0 ..\..\..\..\..\include\qstamp.c @@ -715,7 +714,7 @@ ek-tm4c123gxl - 1 + 0 0 0 0 @@ -724,7 +723,6 @@ 11 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\ek-tm4c123gxl\gpio.h @@ -737,7 +735,6 @@ 12 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\ek-tm4c123gxl\rom.h @@ -750,7 +747,6 @@ 13 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\ek-tm4c123gxl\sysctl.h @@ -763,7 +759,6 @@ 14 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.c @@ -776,7 +771,6 @@ 15 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.h @@ -789,7 +783,6 @@ 16 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\ek-tm4c123gxl\TM4C123GH6PM.h @@ -802,7 +795,6 @@ 17 2 0 - 0 0 0 ..\..\..\..\..\3rd_party\ek-tm4c123gxl\arm\startup_TM4C123GH6PM.s @@ -823,7 +815,6 @@ 18 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os.h @@ -836,7 +827,6 @@ 19 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_core.c @@ -849,7 +839,6 @@ 20 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_flag.c @@ -862,7 +851,6 @@ 21 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_mbox.c @@ -875,7 +863,6 @@ 22 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_mem.c @@ -888,7 +875,6 @@ 23 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_mutex.c @@ -901,7 +887,6 @@ 24 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_q.c @@ -914,7 +899,6 @@ 25 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_sem.c @@ -927,7 +911,6 @@ 26 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_task.c @@ -940,7 +923,6 @@ 27 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_time.c @@ -953,7 +935,6 @@ 28 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\os_tmr.c @@ -966,7 +947,6 @@ 29 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Source\ucos_ii.h @@ -987,7 +967,6 @@ 30 5 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\ARM\os_cpu.h @@ -1000,7 +979,6 @@ 31 2 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\ARM\os_cpu_a.asm @@ -1013,7 +991,6 @@ 32 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\ARM\os_cpu_c.c @@ -1026,7 +1003,6 @@ 33 1 0 - 0 0 0 ..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\ARM\os_dbg.c @@ -1038,7 +1014,7 @@ QP - 1 + 0 0 0 0 @@ -1047,7 +1023,6 @@ 34 1 0 - 0 0 0 ..\..\..\..\..\source\qep_hsm.c @@ -1060,7 +1035,6 @@ 35 1 0 - 0 0 0 ..\..\..\..\..\source\qep_msm.c @@ -1073,7 +1047,6 @@ 36 1 0 - 0 0 0 ..\..\..\..\..\source\qf_act.c @@ -1086,7 +1059,6 @@ 37 1 0 - 0 0 0 ..\..\..\..\..\source\qf_defer.c @@ -1099,7 +1071,6 @@ 38 1 0 - 0 0 0 ..\..\..\..\..\source\qf_dyn.c @@ -1112,7 +1083,6 @@ 39 5 0 - 0 0 0 ..\..\..\..\..\source\qf_pkg.h @@ -1125,7 +1095,6 @@ 40 1 0 - 0 0 0 ..\..\..\..\..\source\qf_ps.c @@ -1138,7 +1107,6 @@ 41 1 0 - 0 0 0 ..\..\..\..\..\source\qf_qact.c @@ -1151,7 +1119,6 @@ 42 1 0 - 0 0 0 ..\..\..\..\..\source\qf_qeq.c @@ -1164,7 +1131,6 @@ 43 1 0 - 0 0 0 ..\..\..\..\..\source\qf_qmact.c @@ -1177,7 +1143,6 @@ 44 1 0 - 0 0 0 ..\..\..\..\..\source\qf_time.c @@ -1189,7 +1154,7 @@ QP_port - 1 + 0 0 0 0 @@ -1198,7 +1163,6 @@ 45 1 0 - 0 0 0 ..\..\..\..\..\ports\ucos-ii\qf_port.c @@ -1210,7 +1174,7 @@ QS - 1 + 0 0 0 0 @@ -1219,7 +1183,6 @@ 46 1 0 - 0 0 0 ..\..\..\..\..\source\qs.c @@ -1232,7 +1195,6 @@ 47 1 0 - 0 0 0 ..\..\..\..\..\source\qs_fp.c diff --git a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/arm/dpp.uvprojx b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/arm/dpp.uvprojx index 5a2f19a9..9c265b01 100644 --- a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/arm/dpp.uvprojx +++ b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/arm/dpp.uvprojx @@ -10,12 +10,12 @@ dpp-dbg 0x4 ARM-ADS - 5060020::V5.06 (build 20)::ARMCC + 5060183::V5.06 update 2 (build 183)::ARMCC TM4C123GH6PM Texas Instruments - Keil.TM4C_DFP.1.0.0 + Keil.TM4C_DFP.1.1.0 http://www.keil.com/pack/ IROM(0x00000000,0x040000) IRAM(0x20000000,0x008000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE @@ -125,47 +125,6 @@ 0 16 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - - - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - - 0 - 3 - - - - - - - - - - - - - - BIN\lmidk-agdi.dll - @@ -369,6 +328,8 @@ 0 0 0 + 0 + 0 __FPU_PRESENT @@ -708,6 +669,8 @@ 0 0 0 + 0 + 0 @@ -758,7 +721,7 @@ TM4C123GH6PM Texas Instruments - Keil.TM4C_DFP.1.0.0 + Keil.TM4C_DFP.1.1.0 http://www.keil.com/pack/ IROM(0x00000000,0x040000) IRAM(0x20000000,0x008000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE @@ -868,47 +831,6 @@ 0 16 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - - - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - - 0 - 3 - - - - - - - - - - - - - - BIN\lmidk-agdi.dll - @@ -1112,6 +1034,8 @@ 0 0 0 + 0 + 0 NDEBUG __FPU_PRESENT @@ -1451,6 +1375,8 @@ 0 0 0 + 0 + 0 @@ -1496,12 +1422,12 @@ dpp-spy 0x4 ARM-ADS - 5060020::V5.06 (build 20)::ARMCC + 5060183::V5.06 update 2 (build 183)::ARMCC TM4C123GH6PM Texas Instruments - Keil.TM4C_DFP.1.0.0 + Keil.TM4C_DFP.1.1.0 http://www.keil.com/pack/ IROM(0x00000000,0x040000) IRAM(0x20000000,0x008000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE @@ -1611,47 +1537,6 @@ 0 16 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - - - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - - 0 - 3 - - - - - - - - - - - - - - BIN\lmidk-agdi.dll - @@ -1855,6 +1740,8 @@ 0 0 0 + 0 + 0 Q_SPY __FPU_PRESENT diff --git a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.c b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.c index 4ab31cf9..d25716f3 100644 --- a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.c +++ b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.h b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.h index 282c6576..4829211e 100644 --- a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.h +++ b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/bsp.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewd b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewd index 2a6c55b5..d4075c8f 100644 --- a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewd +++ b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewd @@ -1,4462 +1,4213 @@ - - + - 2 - - Debug - - ARM - - 1 - - C-SPY - 2 - - 26 - 1 + 3 + + Debug + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 1 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - - CMSISDAP_ID - 2 - - 2 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - IARROM_ID - 2 - - 1 - 1 - 1 - - - - - - - - - IJET_ID - 2 - - 6 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 15 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - LMIFTDI_ID - 2 - - 2 - 1 - 1 - - - - - - - - - - MACRAIGOR_ID - 2 - - 3 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - PEMICRO_ID - 2 - - 1 - 1 - 1 - - - - - - - - - - - - - - - - - - - RDI_ID - 2 - - 2 - 1 - 1 - - - - - - - - - - - - - - - - STLINK_ID - 2 - - 2 - 1 - 1 - - - - - - - - - - - THIRDPARTY_ID - 2 - - 0 - 1 - 1 - - - - - - - - XDS100_ID - 2 - - 4 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - - - Release - - ARM - - 0 - - C-SPY - 2 - - 26 - 1 + + C-SPY + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + Release + + ARM + 0 - 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- 0 - 1 - 0 - - - - - - - - XDS100_ID - 2 - - 4 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - - - Spy - - ARM - - 1 - - C-SPY - 2 - - 26 - 1 + + C-SPY + 2 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 0 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 0 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 0 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 0 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 0 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 0 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 0 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + Spy + + ARM + 1 - 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- 0 - 1 - 1 - - - - - - - - XDS100_ID - 2 - - 4 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - + + C-SPY + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + - - diff --git a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewp b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewp index bd5bdb45..19b62a8c 100644 --- a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewp +++ b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/iar/dpp.ewp @@ -1,3094 +1,3256 @@ - - + - 2 - - Debug - - ARM - - 1 - - General - 3 - - 24 - 1 + 3 + + Debug + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 16 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 24 - 1 + + General + 3 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Release + + ARM + 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Spy - - ARM - - 1 - - General - 3 - - 24 - 1 + + General + 3 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Spy + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 16 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Application - - $PROJ_DIR$\..\app_cfg.h - - - $PROJ_DIR$\..\bsp.c - - - $PROJ_DIR$\..\bsp.h - - - $PROJ_DIR$\..\dpp.h - - - $PROJ_DIR$\..\main.c - - - $PROJ_DIR$\..\os_cfg.h - - - $PROJ_DIR$\..\philo.c - - - $PROJ_DIR$\..\..\..\..\..\include\qstamp.c - - - $PROJ_DIR$\..\table.c - - - - ek-tm4c123gxl - - $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\gpio.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\rom.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\iar\startup_TM4C123GH6PM.s - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\sysctl.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\TM4C123GH6PM.h - - - - QP - - $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_act.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_time.c - - - - QP_port - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\app_cfg.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\os_cfg.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qep_port.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.c - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qs_port.h - - - - QS - - Debug - Release - - - $PROJ_DIR$\..\..\..\..\..\source\qs.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qs_rx.c - - - - uCOS-II - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_core.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_flag.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mbox.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mem.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mutex.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_q.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_sem.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_task.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_time.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_tmr.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\ucos_ii.h - - - - uCOS-II_Port - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_a.asm - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_c.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_dbg.c - - + + General + 3 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Application + + $PROJ_DIR$\..\app_cfg.h + + + $PROJ_DIR$\..\bsp.c + + + $PROJ_DIR$\..\bsp.h + + + $PROJ_DIR$\..\dpp.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\os_cfg.h + + + $PROJ_DIR$\..\philo.c + + + $PROJ_DIR$\..\..\..\..\..\include\qstamp.c + + + $PROJ_DIR$\..\table.c + + + + ek-tm4c123gxl + + $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\gpio.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\rom.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\iar\startup_TM4C123GH6PM.s + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\sysctl.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\system_TM4C123GH6PM.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\ek-tm4c123gxl\TM4C123GH6PM.h + + + + QP + + $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_act.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_time.c + + + + QP_port + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\app_cfg.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\os_cfg.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qep_port.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.c + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qs_port.h + + + + QS + + Debug + Release + + + $PROJ_DIR$\..\..\..\..\..\source\qs.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qs_rx.c + + + + uCOS-II + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_core.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_flag.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mbox.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mem.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mutex.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_q.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_sem.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_task.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_time.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_tmr.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\ucos_ii.h + + + + uCOS-II_Port + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_a.asm + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_cpu_c.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M4\Generic\IAR\os_dbg.c + + - - diff --git a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/main.c b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/main.c index 9bda82e4..db148264 100644 --- a/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/main.c +++ b/examples/ucos-ii/arm-cm/dpp_ek-tm4c123gxl/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.c b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.c index 5d6ff52e..6011dbec 100644 --- a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.c +++ b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.h b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.h index 282c6576..4829211e 100644 --- a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.h +++ b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/bsp.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/iar/dpp.ewd b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/iar/dpp.ewd index 58aafe39..6cdb18b4 100644 --- a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/iar/dpp.ewd +++ b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/iar/dpp.ewd @@ -1,4462 +1,4213 @@ - - + - 2 - - Debug - - ARM - - 1 - - C-SPY - 2 - - 26 - 1 + 3 + + Debug + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 1 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - - CMSISDAP_ID - 2 - - 2 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - IARROM_ID - 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0 - - - $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin - 0 - - - $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin - 0 - - - $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin - 0 - - - $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin - 1 - - - $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin - 0 - - - - - Release - - ARM - - 0 - - C-SPY - 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 24 - 1 + + General + 3 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Release + + ARM + 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 16 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Spy - - ARM - - 1 - - General - 3 - - 24 - 1 + + General + 3 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Spy + + ARM + 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 31 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 9 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - 0 - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" - - - - - ILINK - 0 - - 16 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - Coder - 0 - - - - - Application - - $PROJ_DIR$\..\app_cfg.h - - - $PROJ_DIR$\..\bsp.c - - - $PROJ_DIR$\..\bsp.h - - - $PROJ_DIR$\..\dpp.h - - - $PROJ_DIR$\..\main.c - - - $PROJ_DIR$\..\os_cfg.h - - - $PROJ_DIR$\..\philo.c - - - $PROJ_DIR$\..\..\..\..\..\include\qstamp.c - - - $PROJ_DIR$\..\table.c - - - - nucleo-l152re - - $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\iar\startup_stm32l1xx.s - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\stm32l1xx.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\system_stm32l1xx.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\system_stm32l1xx.h - - - - QP - - $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_act.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h - - - $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c - - - $PROJ_DIR$\..\..\..\..\..\source\qf_time.c - - - - QP_port - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\app_cfg.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\os_cfg.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qep_port.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.c - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.h - - - $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qs_port.h - - - - QS - - Debug - Release - - - $PROJ_DIR$\..\..\..\..\..\source\qs.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c - - - $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h - - - - uCOS-II_Port - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_cpu.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_cpu_a.asm - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_cpu_c.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_dbg.c - - - - uCOS-II_Source - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os.h - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_core.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_flag.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mbox.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mem.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mutex.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_q.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_sem.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_task.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_time.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_tmr.c - - - $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\ucos_ii.h - - + + General + 3 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + cmd /c "if exist $OBJ_DIR$\qstamp.o del $OBJ_DIR$\qstamp.o" + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + Coder + 0 + + + + + Application + + $PROJ_DIR$\..\app_cfg.h + + + $PROJ_DIR$\..\bsp.c + + + $PROJ_DIR$\..\bsp.h + + + $PROJ_DIR$\..\dpp.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\os_cfg.h + + + $PROJ_DIR$\..\philo.c + + + $PROJ_DIR$\..\..\..\..\..\include\qstamp.c + + + $PROJ_DIR$\..\table.c + + + + nucleo-l152re + + $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\iar\startup_stm32l1xx.s + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\stm32l1xx.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\system_stm32l1xx.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\nucleo-l152re\system_stm32l1xx.h + + + + QP + + $PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qep_msm.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_act.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_defer.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h + + + $PROJ_DIR$\..\..\..\..\..\source\qf_ps.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c + + + $PROJ_DIR$\..\..\..\..\..\source\qf_time.c + + + + QP_port + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\app_cfg.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\os_cfg.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qep_port.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.c + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qf_port.h + + + $PROJ_DIR$\..\..\..\..\..\ports\ucos-ii\qs_port.h + + + + QS + + Debug + Release + + + $PROJ_DIR$\..\..\..\..\..\source\qs.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_fp.c + + + $PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h + + + + uCOS-II_Port + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_cpu.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_cpu_a.asm + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_cpu_c.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\os_dbg.c + + + + uCOS-II_Source + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os.h + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_core.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_flag.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mbox.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mem.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_mutex.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_q.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_sem.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_task.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_time.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\os_tmr.c + + + $PROJ_DIR$\..\..\..\..\..\3rd_party\uCOS-II\Source\ucos_ii.h + + - - diff --git a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/main.c b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/main.c index 3eac7d2b..90a7ac48 100644 --- a/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/main.c +++ b/examples/ucos-ii/arm-cm/dpp_nucleo-l152re/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32-qv/dpp-gui/README.txt b/examples/win32-qv/dpp-gui/README.txt new file mode 100644 index 00000000..a4fad98e --- /dev/null +++ b/examples/win32-qv/dpp-gui/README.txt @@ -0,0 +1,10 @@ +The Win32-QV GUI emulation of the Dining Philosopers Problem (DPP) example +for the EFM32-SLSTK3401A board from Silicon Labs is now located in the +directory: + +examples\arm-cm\dpp_efm32-slstk3401a\win32-qv\ + + +This co-location of the Win32 emulation with the embedded code running +on the actual board demonstrates better the "dual targeting" development +approach. \ No newline at end of file diff --git a/examples/win32-qv/dpp/Makefile b/examples/win32-qv/dpp/Makefile index 11748e59..eec137e8 100644 --- a/examples/win32-qv/dpp/Makefile +++ b/examples/win32-qv/dpp/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/win32-qv/dpp/bsp.c b/examples/win32-qv/dpp/bsp.c index d58743e5..8d1436af 100644 --- a/examples/win32-qv/dpp/bsp.c +++ b/examples/win32-qv/dpp/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32-qv/dpp/bsp.h b/examples/win32-qv/dpp/bsp.h index 55bd35ba..cc3c352e 100644 --- a/examples/win32-qv/dpp/bsp.h +++ b/examples/win32-qv/dpp/bsp.h @@ -29,7 +29,7 @@ * * Contact information: * Quantum Leaps Web sites: http://www.quantum-leaps.com -* http://www.state-machine.com +* https://state-machine.com * e-mail: info@quantum-leaps.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/win32-qv/dpp/main.c b/examples/win32-qv/dpp/main.c index 5a4a28c4..515fc000 100644 --- a/examples/win32-qv/dpp/main.c +++ b/examples/win32-qv/dpp/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32-qv/reminder2/bsp.c b/examples/win32-qv/reminder2/bsp.c index b4ff9941..d47736d8 100644 --- a/examples/win32-qv/reminder2/bsp.c +++ b/examples/win32-qv/reminder2/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32-qv/reminder2/reminder2.c b/examples/win32-qv/reminder2/reminder2.c index ca1a4035..05cbe243 100644 --- a/examples/win32-qv/reminder2/reminder2.c +++ b/examples/win32-qv/reminder2/reminder2.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/calc/main.c b/examples/win32/calc/main.c index 31b30351..82f5c81b 100644 --- a/examples/win32/calc/main.c +++ b/examples/win32/calc/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@quantum-leaps.com *****************************************************************************/ #include "qep_port.h" diff --git a/examples/win32/calc1/Makefile b/examples/win32/calc1/Makefile index dd3e9df3..514a1cc8 100644 --- a/examples/win32/calc1/Makefile +++ b/examples/win32/calc1/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/win32/calc1/main.c b/examples/win32/calc1/main.c index 975200a4..c2fd03f0 100644 --- a/examples/win32/calc1/main.c +++ b/examples/win32/calc1/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@quantum-leaps.com *****************************************************************************/ #include "qep_port.h" diff --git a/examples/win32/calc1_sub/.calc1_sub b/examples/win32/calc1_sub/.calc1_sub new file mode 100644 index 00000000..0798e405 --- /dev/null +++ b/examples/win32/calc1_sub/.calc1_sub @@ -0,0 +1,61 @@ + + + + + + 1 + 0 + 3 + 0 + + + 0,0,800,496,* + + + 2032128 + 0 + + + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + diff --git a/examples/win32/calc1_sub/calc1_sub.c b/examples/win32/calc1_sub/calc1_sub.c index 8ef5a22f..a77cb170 100644 --- a/examples/win32/calc1_sub/calc1_sub.c +++ b/examples/win32/calc1_sub/calc1_sub.c @@ -14,7 +14,7 @@ * This license is available only for evaluation purposes and * the generated code is still licensed under the terms of GPL. * Please submit request for extension of the evaluaion period at: -* http://www.state-machine.com/licensing/index.html#RequestForm +* https://state-machine.com/licensing/index.html#RequestForm *****************************************************************************/ /*${.::calc1_sub.c} ........................................................*/ #include "qep_port.h" /* QEP/C interface */ diff --git a/examples/win32/calc1_sub/calc1_sub.h b/examples/win32/calc1_sub/calc1_sub.h index 2614c6ab..2afd1575 100644 --- a/examples/win32/calc1_sub/calc1_sub.h +++ b/examples/win32/calc1_sub/calc1_sub.h @@ -14,7 +14,7 @@ * This license is available only for evaluation purposes and * the generated code is still licensed under the terms of GPL. * Please submit request for extension of the evaluaion period at: -* http://www.state-machine.com/licensing/index.html#RequestForm +* https://state-machine.com/licensing/index.html#RequestForm *****************************************************************************/ /*${.::calc1_sub.h} ........................................................*/ #ifndef calc1_sub_h diff --git a/examples/win32/calc1_sub/main.c b/examples/win32/calc1_sub/main.c index d177ddec..fa08f462 100644 --- a/examples/win32/calc1_sub/main.c +++ b/examples/win32/calc1_sub/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@quantum-leaps.com *****************************************************************************/ #include "qep_port.h" diff --git a/examples/win32/comp/bsp.c b/examples/win32/comp/bsp.c index b4ff9941..d47736d8 100644 --- a/examples/win32/comp/bsp.c +++ b/examples/win32/comp/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/comp/clock.h b/examples/win32/comp/clock.h index 451524e6..a6c30c38 100644 --- a/examples/win32/comp/clock.h +++ b/examples/win32/comp/clock.h @@ -29,7 +29,7 @@ * * Contact information: * Quantum Leaps Web sites: http://www.quantum-leaps.com -* http://www.state-machine.com +* https://state-machine.com * e-mail: info@quantum-leaps.com *****************************************************************************/ #ifndef clock_h diff --git a/examples/win32/comp_qm/bsp.c b/examples/win32/comp_qm/bsp.c index 849f2d4f..a9589feb 100644 --- a/examples/win32/comp_qm/bsp.c +++ b/examples/win32/comp_qm/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/comp_qm/bsp.h b/examples/win32/comp_qm/bsp.h index 8d37ca7a..7156f58c 100644 --- a/examples/win32/comp_qm/bsp.h +++ b/examples/win32/comp_qm/bsp.h @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web: http://www.state-machine.com +* Web: https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/win32/comp_qm/main.c b/examples/win32/comp_qm/main.c index 7bef16f9..89c7ba21 100644 --- a/examples/win32/comp_qm/main.c +++ b/examples/win32/comp_qm/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/defer/bsp.c b/examples/win32/defer/bsp.c index b4ff9941..d47736d8 100644 --- a/examples/win32/defer/bsp.c +++ b/examples/win32/defer/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/dpp-gui/README.txt b/examples/win32/dpp-gui/README.txt new file mode 100644 index 00000000..e1752535 --- /dev/null +++ b/examples/win32/dpp-gui/README.txt @@ -0,0 +1,10 @@ +The Win32 GUI emulation of the Dining Philosopers Problem (DPP) example +for the EFM32-SLSTK3401A board from Silicon Labs is now located in the +directory: + +examples\arm-cm\dpp_efm32-slstk3401a\win32\ + + +This co-location of the Win32 emulation with the embedded code running +on the actual board demonstrates better the "dual targeting" development +approach. \ No newline at end of file diff --git a/examples/win32/dpp/.dpp b/examples/win32/dpp/.dpp new file mode 100644 index 00000000..6c205742 --- /dev/null +++ b/examples/win32/dpp/.dpp @@ -0,0 +1,62 @@ + + + GPL + + + 1 + 0 + 3 + 0 + + + 0,0,596,300 + 0,0,789,618,* + + + 2032128 + 0 + + + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + 0 + + + + + 0 + + + diff --git a/examples/win32/dpp/Makefile b/examples/win32/dpp/Makefile index 76441603..e318fb80 100644 --- a/examples/win32/dpp/Makefile +++ b/examples/win32/dpp/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/examples/win32/dpp/bsp.c b/examples/win32/dpp/bsp.c index d58743e5..8d1436af 100644 --- a/examples/win32/dpp/bsp.c +++ b/examples/win32/dpp/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/dpp/bsp.h b/examples/win32/dpp/bsp.h index 55bd35ba..cc3c352e 100644 --- a/examples/win32/dpp/bsp.h +++ b/examples/win32/dpp/bsp.h @@ -29,7 +29,7 @@ * * Contact information: * Quantum Leaps Web sites: http://www.quantum-leaps.com -* http://www.state-machine.com +* https://state-machine.com * e-mail: info@quantum-leaps.com *****************************************************************************/ #ifndef bsp_h diff --git a/examples/win32/dpp/dpp.h b/examples/win32/dpp/dpp.h index b258597c..27e39c8a 100644 --- a/examples/win32/dpp/dpp.h +++ b/examples/win32/dpp/dpp.h @@ -52,7 +52,7 @@ typedef struct { /*${AOs::Philo_ctor} .......................................................*/ void Philo_ctor(void); -extern QMActive * const AO_Philo[N_PHILO]; +extern QActive * const AO_Philo[N_PHILO]; /*${AOs::Table_ctor} .......................................................*/ diff --git a/examples/win32/dpp/dpp.qm b/examples/win32/dpp/dpp.qm index 4cc4237f..a2a98145 100644 --- a/examples/win32/dpp/dpp.qm +++ b/examples/win32/dpp/dpp.qm @@ -1,5 +1,5 @@ - + Dining Philosopher Problem example NOTE: Requries QP5. @@ -321,7 +321,7 @@ me->fork[n] = FREE; - + uint8_t n; @@ -404,7 +404,7 @@ static Philo l_philo[N_PHILO]; /* storage for all Philos */ #define PHILO_ID(me_) ((uint8_t)((me_) - l_philo)) /* Global objects ----------------------------------------------------------*/ -QMActive * const AO_Philo[N_PHILO] = { /* "opaque" pointers to Philo AO */ +QActive * const AO_Philo[N_PHILO] = { /* "opaque" pointers to Philo AO */ &l_philo[0].super, &l_philo[1].super, &l_philo[2].super, @@ -435,7 +435,7 @@ $declare(AOs::Table) static Table l_table; /* the single instance of the Table active object */ /* Global-scope objects ----------------------------------------------------*/ -QMActive * const AO_Table = &l_table.super; /* "opaque" AO pointer */ +QActive * const AO_Table = &l_table.super; /* "opaque" AO pointer */ /*..........................................................................*/ $define(AOs::Table_ctor) diff --git a/examples/win32/dpp/main.c b/examples/win32/dpp/main.c index 5a4a28c4..515fc000 100644 --- a/examples/win32/dpp/main.c +++ b/examples/win32/dpp/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/dpp/philo.c b/examples/win32/dpp/philo.c index 67c2ac69..a1b5bba9 100644 --- a/examples/win32/dpp/philo.c +++ b/examples/win32/dpp/philo.c @@ -55,7 +55,7 @@ static Philo l_philo[N_PHILO]; /* storage for all Philos */ #define PHILO_ID(me_) ((uint8_t)((me_) - l_philo)) /* Global objects ----------------------------------------------------------*/ -QMActive * const AO_Philo[N_PHILO] = { /* "opaque" pointers to Philo AO */ +QActive * const AO_Philo[N_PHILO] = { /* "opaque" pointers to Philo AO */ &l_philo[0].super, &l_philo[1].super, &l_philo[2].super, diff --git a/examples/win32/dpp/table.c b/examples/win32/dpp/table.c index fe8b1a84..b117cf59 100644 --- a/examples/win32/dpp/table.c +++ b/examples/win32/dpp/table.c @@ -53,7 +53,7 @@ static QState Table_paused(Table * const me, QEvt const * const e); static Table l_table; /* the single instance of the Table active object */ /* Global-scope objects ----------------------------------------------------*/ -QMActive * const AO_Table = &l_table.super; /* "opaque" AO pointer */ +QActive * const AO_Table = &l_table.super; /* "opaque" AO pointer */ /*..........................................................................*/ /*${AOs::Table_ctor} .......................................................*/ diff --git a/examples/win32/history_qhsm/main.c b/examples/win32/history_qhsm/main.c index b5a826e9..da57c94b 100644 --- a/examples/win32/history_qhsm/main.c +++ b/examples/win32/history_qhsm/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qep_port.h" diff --git a/examples/win32/history_qmsm/history.c b/examples/win32/history_qmsm/history.c index 0c39d8bf..25bf8b82 100644 --- a/examples/win32/history_qmsm/history.c +++ b/examples/win32/history_qmsm/history.c @@ -14,7 +14,7 @@ * This license is available only for evaluation purposes and * the generated code is still licensed under the terms of GPL. * Please submit request for extension of the evaluaion period at: -* http://www.state-machine.com/licensing/index.html#RequestForm +* https://state-machine.com/licensing/index.html#RequestForm *****************************************************************************/ /*${.::history.c} ..........................................................*/ #include "qpc.h" diff --git a/examples/win32/history_qmsm/history.h b/examples/win32/history_qmsm/history.h index 8f955a98..8d5cba27 100644 --- a/examples/win32/history_qmsm/history.h +++ b/examples/win32/history_qmsm/history.h @@ -14,7 +14,7 @@ * This license is available only for evaluation purposes and * the generated code is still licensed under the terms of GPL. * Please submit request for extension of the evaluaion period at: -* http://www.state-machine.com/licensing/index.html#RequestForm +* https://state-machine.com/licensing/index.html#RequestForm *****************************************************************************/ /*${.::history.h} ..........................................................*/ #ifndef history_h diff --git a/examples/win32/history_qmsm/main.c b/examples/win32/history_qmsm/main.c index 5c65083f..e02c263b 100644 --- a/examples/win32/history_qmsm/main.c +++ b/examples/win32/history_qmsm/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qep_port.h" diff --git a/examples/win32/qhsmtst/main.c b/examples/win32/qhsmtst/main.c index e70c2b5a..61038b53 100644 --- a/examples/win32/qhsmtst/main.c +++ b/examples/win32/qhsmtst/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/qmsmtst/main.c b/examples/win32/qmsmtst/main.c index 17d9a031..f3352cce 100644 --- a/examples/win32/qmsmtst/main.c +++ b/examples/win32/qmsmtst/main.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/qmsmtst/qmsmtst.c b/examples/win32/qmsmtst/qmsmtst.c index a694bb9f..651b974f 100644 --- a/examples/win32/qmsmtst/qmsmtst.c +++ b/examples/win32/qmsmtst/qmsmtst.c @@ -14,7 +14,7 @@ * This license is available only for evaluation purposes and * the generated code is still licensed under the terms of GPL. * Please submit request for extension of the evaluaion period at: -* http://www.state-machine.com/licensing/index.html#RequestForm +* https://state-machine.com/licensing/index.html#RequestForm *****************************************************************************/ /*${.::qmsmtst.c} ..........................................................*/ #include "qpc.h" diff --git a/examples/win32/qmsmtst/qmsmtst.h b/examples/win32/qmsmtst/qmsmtst.h index 76bc6ab8..b2e2ef32 100644 --- a/examples/win32/qmsmtst/qmsmtst.h +++ b/examples/win32/qmsmtst/qmsmtst.h @@ -14,7 +14,7 @@ * This license is available only for evaluation purposes and * the generated code is still licensed under the terms of GPL. * Please submit request for extension of the evaluaion period at: -* http://www.state-machine.com/licensing/index.html#RequestForm +* https://state-machine.com/licensing/index.html#RequestForm *****************************************************************************/ /*${.::qmsmtst.h} ..........................................................*/ #ifndef qmsmtst_h diff --git a/examples/win32/reminder/bsp.c b/examples/win32/reminder/bsp.c index b4ff9941..d47736d8 100644 --- a/examples/win32/reminder/bsp.c +++ b/examples/win32/reminder/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/reminder/reminder.c b/examples/win32/reminder/reminder.c index bbfaa34a..c41fa3ff 100644 --- a/examples/win32/reminder/reminder.c +++ b/examples/win32/reminder/reminder.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/reminder2/bsp.c b/examples/win32/reminder2/bsp.c index b4ff9941..d47736d8 100644 --- a/examples/win32/reminder2/bsp.c +++ b/examples/win32/reminder2/bsp.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/examples/win32/reminder2/reminder2.c b/examples/win32/reminder2/reminder2.c index ca1a4035..05cbe243 100644 --- a/examples/win32/reminder2/reminder2.c +++ b/examples/win32/reminder2/reminder2.c @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* Web : http://www.state-machine.com +* Web : https://state-machine.com * Email: info@state-machine.com *****************************************************************************/ #include "qpc.h" diff --git a/include/au-ds.lnt b/include/au-ds.lnt index 624a2750..cb40dc9b 100644 --- a/include/au-ds.lnt +++ b/include/au-ds.lnt @@ -1,21 +1,21 @@ -// au-ds.lnt -- Author options - Dan Saks - -/* - This options file can be used to explicitly activate those - checks advocated by Dan Saks in his series of presentations on - "C++ Gotchas". - - You can use this file directly when linting your programs as in: - - lin au-ds files - - */ - -+fsc // consider string constants as const char * -+e1933 // turn on "virtual call from member detection" - -// The rationale for the following two options are fully described -// in Dan Sak's article "const T vs. T const". Visit his web site -// at www.dansaks.com and click "Published Articles". -// --fqb +e963 // require T const rather than const T +// au-ds.lnt -- Author options - Dan Saks + +/* + This options file can be used to explicitly activate those + checks advocated by Dan Saks in his series of presentations on + "C++ Gotchas". + + You can use this file directly when linting your programs as in: + + lin au-ds files + + */ + ++fsc // consider string constants as const char * ++e1933 // turn on "virtual call from member detection" + +// The rationale for the following two options are fully described +// in Dan Sak's article "const T vs. T const". Visit his web site +// at www.dansaks.com and click "Published Articles". +// +-fqb +e963 // require T const rather than const T diff --git a/include/au-misra2.lnt b/include/au-misra2.lnt index eb9f3c9d..e5f3c3c4 100644 --- a/include/au-misra2.lnt +++ b/include/au-misra2.lnt @@ -1,1689 +1,1689 @@ -/* Date Stamp */ -d"_lint_au_misra2_lnt=au-misra2.lnt modified 13-Jun-2014" -/* To document usage use: -message( "Using " _lint_au_misra2_lnt ) */ -// --------------------------------------------------------------------- -// This file is provided by Gimpel Software (www.gimpel.com) for use with -// its products PC-lint and FlexeLint. -// -// Redistribution and use of this file, with or without modification, is -// permitted provided that any such redistribution retains this notice. -// --------------------------------------------------------------------- - -// au-misra2.lnt -- Author options - MISRA C 2004 - -/* - This options file can be used to explicitly activate those - checks advocated by the Motor Industry Software Reliability - Association. - - You can use this file directly when linting your programs as in: - - lin au-misra2 files - - Gimpel Software relies on the document, "MISRA-C:2004 - Guidelines for the use of the C language in critical systems", - copyright 2004 by MIRA Limited, as the primary source for this - file. Gimpel Software makes no warranty as to the completeness - or applicability of this options file and reserves the right to - amend or alter the official contents of such at any time. - - "MISRA" is a registered trademark of MIRA Limited, held on - behalf of the MISRA Consortium. - - */ - -misra(2) - +e960 /* enable special MISRA 2 messages */ - +elib(960) - +e961 /* enable special MISRA 2 messages */ - +elib(961) - -/* Rule 1.1 (req) **********************************/ - - -A(C90) /* strict ANSI */ - +e950 /* flag non-ANSI word or construct */ - +elib(950) - -append(950,[MISRA 2004 Rule 1.1, required]) - -/* Rule 1.2 (req) **********************************/ - - /* Avoid the use of undefined or unspecified behavior as described - in ISO C, Appendix A.6.1 and Appendix A.6.2 */ - - /* Source file not ending in a new-line character, ending in - new-line character immediately preceded by a backslash - character, or ending in a partial preprocessing token or - comment (ISO C, Appendix A.6.2, point 1). - */ - +e406 /* unclosed comment */ - +elib(406) - -append(406,[MISRA 2004 Rule 1.2, required]) - - /* Non-standard character usage (ISO C, Appendix A.6.2, point 2). - */ - +e27 /* illegal character */ - +elib(27) - -append(27,[MISRA 2004 Rule 1.2, required]) - - /* Unclosed quotes (ISO C, Appendix A.6.2, point 4). - */ - +e2 /* unclose quote */ - +elib(2) - -append(2,[MISRA 2004 Rule 1.2, required]) - - /* Repeated label within a function (ISO C, Appendix A.6.2, point - 5). - */ - +e31 /* symbol redefinition */ - +elib(31) - -append(31,[MISRA 2004 Rule 1.2, required]) - - /* Non-visible identifier used (ISO C, Appendix A.6.2, point 6). - */ - +e40 /* undeclared identifier */ - +elib(40) - -append(40,[MISRA 2004 Rule 1.2, required]) - - /* Identifiers for the same entity differ beyond the minimal - significant characters (ISO C, Appendix A.6.2, point 7). - See Rules 1.4 and 5.1 - */ - - /* The same identifier has both internal and external linkage in - the same translation unit (ISO C, Appendix A.6.2, point 8). - */ - +e401 /* symbol not previously declared static */ - +elib(401) - -append(401,[MISRA 2004 Rule 1.2, required]) - - /* Multiple definitions for the same externally linked identifier - (ISO C, Appendix A.6.2, point 9). - */ - +e31 /* symbol redefinition */ - +elib(31) - - /* Using automatic storage data via a pointer after the data's - lifetime (ISO C, Appendix A.6.2, point 10). - */ - +e604 /* returning address of auto variable */ - +elib(604) - -append(604,[MISRA 2004 Rule 1.2, required]) - +e934 /* taking address of near auto variable */ - +elib(934) - -append(934,[MISRA 2004 Rule 1.2, required]) - - /* Incompatible redeclarations (ISO C, Appendix A.6.2, point 11). - See Rule 8.3 - */ - - /* Non-standard escape sequence (ISO C, Appendix A.6.2, point 12). - See Rule 4.1 - */ - - /* Non-standard character in header name (ISO C, Appendix A.6.2, - point 15). - See Rule 19.2 - */ - - /* No complete type available (ISO C, Appendix A.6.2, point 16). - */ - +e86 /* structure has no data elements */ - +elib(86) - -append(86,[MISRA 2004 Rule 1.2, required]) - - /* Using or converting a void expression (ISO C, Appendix A.6.2, - point 17). - */ - +e64 /* type mismatch */ - +elib(64) - -append(64,[MISRA 2004 Rule 1.2, required]) - +e67 /* cannot cast between types */ - +elib(67) - -append(67,[MISRA 2004 Rule 1.2, required]) - +e144 /* non-existent return value */ - +elib(144) - -append(144,[MISRA 2004 Rule 1.2, required]) - - /* Modifying an object more than once or modifying and accessing - between two sequence points (ISO C, Appendix A.6.2, point 18). - See Rule 12.2 - */ - - /* Invalid arithmetic operations or unrepresentable results - (ISO C, Appendix A.6.2, point 19). - */ - +e54 /* division by 0 */ - +elib(54) - -append(54,[MISRA 2004 Rule 1.2, required]) - +e414 /* possible division by 0 */ - +elib(414) - -append(414,[MISRA 2004 Rule 1.2, required]) - +e795 /* conceivable division by 0 */ - +elib(795) - -append(795,[MISRA 2004 Rule 1.2, required]) - /* Also, see Rule 12.11 */ - - /* Passing a void argument to a function (ISO C, Appendix A.6.2, - point 20). - */ - +e64 /* type mismatch */ - +elib(64) - - /* Incompatible function redeclaration (ISO C, Appendix A.6.2, - point 22). - See Rule 8.3 - */ - - /* An invalid array reference, null pointer reference, or - reference to an object declared with automatic storage duration in - a terminated block occurs (ISO C, Appendix A.6.2, point 24). - */ - +e64 /* type mismatch */ - +elib(64) - +e413 /* likely use of null pointer */ - +elib(413) - -append(413,[MISRA 2004 Rule 1.2, required]) - +e415 /* out-of-bounds pointer */ - +elib(415) - -append(415,[MISRA 2004 Rule 1.2, required]) - +e416 /* out-of-bounds pointer */ - +elib(416) - -append(416,[MISRA 2004 Rule 1.2, required]) - +e428 /* negative subscript */ - +elib(428) - -append(428,[MISRA 2004 Rule 1.2, required]) - /* Also, see Rule 17.6 */ - - /* A pointer to a function is converted to a pointer to an object - or a pointer to an object is converted to a pointer to a function - (ISO C, Appendix A.6.2, point 26). - */ - +e64 /* type mismatch */ - +elib(64) - +e740 /* unusual pointer cast */ - +elib(740) - -append(740,[MISRA 2004 Rule 1.2, required]) - /* Also, see Rule 11.2 */ - - /* A pointer is converted to other than an integral or pointer - type (ISO C, Appendix A.6.2, point 27). - */ - +e64 /* type mismatch */ - +elib(64) - +e71 /* cannot cast */ - +elib(71) - +esym(920,pointer) /* cast to void */ - -append(920,[MISRA 2004 Rule 1.2, required]) - - /* An expression is shifted by a negative number or by an amount - greater than or equal to the width in bits of the expression being - shifted (ISO C, Appendix A.6.2, point 30). - */ - +e504 /* unusual shift */ - +elib(504) - -append(504,[MISRA 2004 Rule 1.2, required]) - - /* An identifier for an object is declared with no linkage and the - type of the object is incomplete after its declarator, or after its - init-declarator if it has an initializer (ISO C, Appendix - A.6.2, point 33). - */ - +e86 /* structure has no data elements */ - +elib(86) - - /* Declaring a function at block scope with a storage-class - specifier other than extern (ISO C, Appendix A.6.2, point 34). - */ - +e629 /* static class for function */ - +elib(629) - -append(629,[MISRA 2004 Rule 1.2, required]) - - /* A bit-field is declared with a type other than int, signed int, - or unsigned int (ISO C, Appendix A.6.2, point 35). - See Rule 6.4 - */ - - /* Attempting to modify an object with const-qualified type by - means of an lvalue with non-const-qualified type (ISO C, - Appendix A.6.2, point 36). - */ - +e158 /* assignment increases capability */ - +elib(158) - -append(158,[MISRA 2004 Rule 1.2, required]) - - /* Attempting to refer to an object with volatile-qualified type - by means of an lvalue with non-volatile-qualified type (ISO C, - Appendix A.6.2, point 37). - */ - +e158 /* assignment increases capability */ - +elib(158) - - /* Using the value of uninitialized automatic object (ISO C, - Appendix A.6.2, point 38). - See Rule 9.1 - */ - - /* An object with aggregate or union type with static storage - duration has a non-brace-enclosed initializer, or an object - with aggregate or union type with automatic storage duration - has either a single expression initializer with a type other - than that of the object or a non-brace-enclosed initializer - (ISO C, Appendix A.6.2, point 39). - Also, see Rule 9.2 - */ - +e64 /* type mismatch */ - +elib(64) - - /* The value of a function is used, but no value was returned - (ISO C, Appendix A.6.2, point 40). - See Rule 16.8 - */ - - /* A function that accepts a variable number of arguments is - defined without a parameter type list that ends with the - ellipsis notation (ISO C, Appendix A.6.2, point 41). - See Rule 8.3 - */ - - /* An identifier for an object with internal linkage and an - incomplete type is declared with a tentative definition (ISO C, - Appendix A.6.2, point 42). - */ - +e86 /* structure has no data elements */ - +elib(86) - - /* Non-standard #include preprocessing directive (ISO C, Appendix - A.6.2, point 44). - See Rule 19.3 - */ - - /* Non-standard #line directive (ISO C, Appendix A.6.2, point 49). - */ - +"estring(10,a numeric constant)" - - /* #defining or #undefing any of: defined, __LINE__, __FILE__, - __DATE__, __TIME__, or __STDC__ (ISO C, Appendix A.6.2, point 50). - */ - +e136 /* illegal macro name */ - +elib(136) - -append(136,[MISRA 2004 Rule 1.2, required]) - - /* Format-argument mismatch in an fprintf or fscanf type of - function (ISO C, Appendix A.6.2, point 75). - */ - +e558 /* too few arguments */ - +elib(558) - -append(558,[MISRA 2004 Rule 1.2, required]) - +e719 /* too many arguments */ - +elib(719) - -append(719,[MISRA 2004 Rule 1.2, required]) - - /* A %% conversion specification for the fprintf or fscanf - function contains characters between the pair of % characters - (ISO C, Appendix A.6.2, point 77). - */ - +e557 /* unrecognized format */ - +elib(557) - -append(557,[MISRA 2004 Rule 1.2, required]) - - /* An aggregate or union, or a pointer to an aggregate or union is - an argument to the fprintf function, except for the conversion - specifiers %s (for an array of character type) or %p (for a pointer - to void) (ISO C, Appendix A.6.2, point 81). - */ - +e437 /* passing struct to ellipsis */ - +elib(437) - -append(437,[MISRA 2004 Rule 1.2, required]) - - /* Referring to deallocated space (ISO C, Appendix A.6.2, point - 87). - */ - +e449 /* previously deallocated pointer */ - +elib(449) - -append(449,[MISRA 2004 Rule 1.2, required]) - - /* Misuse of free or realloc (ISO C, Appendix A.6.2, point 88). - */ - +esym(424,free) /* inappropriate deallocation */ - -append(424,[MISRA 2004 Rule 1.2, required]) - - /* An array written to by a copying or concatenation function is - too small (ISO C, Appendix A.6.2, point 91). - */ - +e419 /* data overrun */ - +elib(419) - -append(419,[MISRA 2004 Rule 1.2, required]) - - /* Order of evaluation (ISO C, Appendix A.6.1, point 7). - */ - +e564 /* variable depends on order of evaluation */ - +elib(564) - -append(564,[MISRA 2004 Rule 1.2, required]) - - /* Side effects order (ISO C, Appendix A.6.1, point 8). - */ - +e931 /* both sides of an expression have side-effects */ - +elib(931) - -append(931,[MISRA 2004 Rule 1.2, required]) - - /* Function argument evaluation (ISO C, Appendix A.6.1, point 9). - */ - +e564 /* variable depends on order of evaluation */ - +elib(564) - - /* The order in which # and ## operations are evaluated during - macro substitution (ISO C, Appendix A.6.1, point 12). - */ - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 19.12, - multiple use of '#/##' operators in macro definition - */ - - /* Whether setjmp is a macro or an external identifier (ISO C, - Appendix A.6.1, point 14). - See Rule 20.1 - */ - -/* Rule 1.3 (req) **********************************/ - - /* This is an environmental requirement on inter-language - interfacing and is not statically checkable - */ - -/* Rule 1.4 (req) **********************************/ - - -idlen(31) /* flag names identical in the first 31 characters */ - +e621 /* Identifier clash - length set by -idlen */ - +elib(621) - -append(621,[MISRA 2004 Rule 1.4, required]) - -/* Rule 1.5 (adv) **********************************/ - - /* This is an environmental requirement involving the floating - point hardware and is not statically checkable - */ - -/* Rule 2.1 (req) **********************************/ - - +e586 /* to activate the deprecation message */ - +elib(586) - -deprecate(keyword,asm,[MISRA 2004 Rule 2.1, required]) - -/* Rule 2.2 (req) **********************************/ - - -A(C90) /* strict ANSI */ - +e950 /* flag non-ANSI word or construct */ - +elib(950) - -append(950,[MISRA 2004 Rule 2.2, required]) - -/* Rule 2.3 (req) **********************************/ - - -fnc /* flag nested comments */ - +e602 /* comment within comment */ - +elib(602) - -append(602,[MISRA 2004 Rule 2.3, required]) - -/* Rule 2.4 (adv) **********************************/ - - /* This requirement (that there be no commented-out code) is, in - principle, not statically checkable. The reason given for the - requirement is that comments do not nest. Thus a commented - out section of code that happens to use slash-star commenting - could inadvertently introduce unwanted code. Rule 2.3, however, - addresses the nested comment issue and hence the major concern - that this requirement seeks to address is indeed checkable. - */ - -fnc /* flag nested comments */ - +e602 /* comment within comment */ - +elib(602) - -append(602,[MISRA 2004 Rule 2.4, advisory]) - -/* Rule 3.1 (req) **********************************/ - - /* This is a documentation requirement and as such is not statically - checkable. - */ - -/* Rule 3.2 (req) **********************************/ - - /* As stated in the description of the requirement, this is a - documentation requirement denoting the characters that may be - placed in string and character literals. It is not statically - checkable. - */ - -/* Rule 3.3 (adv) **********************************/ - - /* This is a requirement on the hardware implementation of - integer division and/or the program's understanding of it. - It is not statically checkable. - */ - -/* Rule 3.4 (req) **********************************/ - - /* This rule requires that all uses of the pragma directive - be documented. To assist in this documentation - effort we can report on unknown pragmas. By default, all - pragmas are unknown except two, push_macro and pop_macro. - These have been approved by the C standards committee but - nonetheless may be disabled (and thus reported upon as unknown) - by use of the -pragma option. These and other pragmas can be - later added using the +pragma option. - */ - +e975 /* report on unknown macros */ - -pragma( push_macro ) /* disable push_macro */ - -pragma( pop_macro ) /* disable pop_macro */ - -append(975,[MISRA 2004 Rule 3.4, required]) - - -/* Rule 3.5 (req) **********************************/ - - /* This rule is a documentation requirement when bit fields - are being used. As such, it is not statically checkable. - */ - -/* Rule 3.6 (req) **********************************/ - - /* PC-lint and FlexeLint analyze auto-generated code in precisely - the same manner as non-auto-generated code. - */ - -/* Rule 4.1 (req) **********************************/ - - +e606 /* non-ANSI escape sequence */ - +elib(606) - -append(606,[MISRA 2004 Rule 4.1, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 4.1, - Prohibited escape sequence used - */ - -/* Rule 4.2 (req) **********************************/ - - -ftg /* inhibit use of trigraphs */ - +e584 /* activate trigraph detected message */ - +elib(584) - -append(584,[MISRA 2004 Rule 4.2, required]) - +e739 /* activate trigraph in string message */ - +elib(739) - -append(739,[MISRA 2004 Rule 4.2, required]) - -/* Rule 5.1 (req) **********************************/ - - -idlen(31) /* flag names identical in the first 31 characters */ - +e621 /* Identifier clash - length set by -idlen */ - +elib(621) - -append(621,[MISRA 2004 Rule 5.1, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 5.1, - Identifier exceeds 31 characters - */ - -/* Rule 5.2 (req) **********************************/ - - +e578 /* enable reports of name hiding */ - +elib(578) - -append(578,[MISRA 2004 Rule 5.2, required]) - -/* Rule 5.3 (req) **********************************/ - - +e578 /* enable reports of name hiding */ - +elib(578) - -append(578,[MISRA 2004 Rule 5.3, required]) - +e623 /* redefining the storage class of symbol */ - +elib(623) - -append(623,[MISRA 2004 Rule 5.3, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 5.3, - Typedef is not a unique declarator. - */ - -/* Rule 5.4 (req) **********************************/ - - +e578 /* Declaration of Symbol hides Symbol */ - +elib(578) - -append(578,[MISRA 2004 Rule 5.4, required]) - +e14 /* Symbol previously defined */ - +elib(14) - -append(14,[MISRA 2004 Rule 5.4, required]) - +e15 /* Symbol redeclared */ - +elib(15) - -append(15,[MISRA 2004 Rule 5.4, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 5.4, - Tag is not a unique declarator - */ - -/* Rule 5.5 (adv) **********************************/ - - +e578 /* Declaration of Symbol hides Symbol */ - +elib(578) - -append(578,[MISRA 2004 Rule 5.5, advisory]) - +e580 /* enable reports of name hiding */ - +elib(580) - -append(580,[MISRA 2004 Rule 5.5, advisory]) - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 5.5, - Identifier with static storage is reused. - */ - -/* Rule 5.6 (adv) **********************************/ - - +e578 /* enable reports of name hiding */ - +elib(578) - -append(578,[MISRA 2004 Rule 5.6, advisory]) - +e580 /* enable reports of name hiding */ - +elib(580) - -append(580,[MISRA 2004 Rule 5.6, advisory]) - -/* Rule 5.7 (adv) **********************************/ - - +e578 /* enable reports of name hiding */ - +elib(578) - -append(578,[MISRA 2004 Rule 5.7, advisory]) - +e580 /* enable reports of name hiding */ - +elib(580) - -append(580,[MISRA 2004 Rule 5.7, advisory]) - -/* Rule 6.1 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 6.1, - Disallowed use of non-character value, or - Plain char mixed with type other than plain char, or - Plain char used with prohibited operator, or - Disallowed cast of plain char - */ - -/* Rule 6.2 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 6.2, - Disallowed use of non-numeric value - */ - -/* Rule 6.3 (adv) **********************************/ - - +e970 /* flag modifiers used outside of typedefs */ - +elib(970) - -append(970,[MISRA 2004 Rule 6.3, advisory]) - // For the duration, we are presuming MISRA does not want - // diagnostics for the bool type. - -esym(970,bool) - -/* Rule 6.4 (req) **********************************/ - - +e46 /* field type should be int */ - +elib(46) - -append(46,[MISRA 2004 Rule 6.4, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 6.4, - Bit field must be explicitly signed int or unsigned int - */ - -/* Rule 6.5 (req) **********************************/ - - +e806 /* small bit field is signed rather than unsigned */ - +elib(806) - -append(806,[MISRA 2004 Rule 6.5, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 6.5, - Signed bit field is too small - */ - -/* Rule 7.1 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 7.1, - Octal constant or octal escape sequence used - */ - -/* Rule 8.1 (req) **********************************/ - - +e718 /* Symbol undeclared */ - +elib(718) - -append(718,[MISRA 2004 Rule 8.1, required]) - +e746 /* Call to function not made in the - presence of a prototype - */ - +elib(746) - -append(746,[MISRA 2004 Rule 8.1, required]) - +e937 /* old-style function declaration */ - +elib(937) - -append(937,[MISRA 2004 Rule 8.1, required]) - +e957 /* function defined without a prototype - in scope - */ - +elib(957) - -append(957,[MISRA 2004 Rule 8.1, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 8.1, - no prototype for function - */ - -/* Rule 8.2 (req) **********************************/ - - +e601 /* object has no explicit type */ - +elib(601) - -append(601,[MISRA 2004 Rule 8.2, required]) - +e808 /* object type defaults to int */ - +elib(808) - -append(808,[MISRA 2004 Rule 8.2, required]) - +e745 /* function has no explicit type */ - +elib(745) - -append(745,[MISRA 2004 Rule 8.2, required]) - +e939 /* return type defaults to int */ - +elib(939) - -append(939,[MISRA 2004 Rule 8.2, required]) - -/* Rule 8.3 (req) **********************************/ - - -fvr /* varying return mode not allowed */ - -strong() /* enable strong typing for - declarations */ - +e18 /* symbol redeclared */ - +elib(18) - -append(18,[Encompasses MISRA 2004 Rule 8.3, required]) - +e516 /* argument type conflict */ - +elib(516) - -append(516,[MISRA 2004 Rule 8.3, required]) - +e532 /* return mode of symbol inconsistent */ - +elib(532) - -append(532,[MISRA 2004 Rule 8.3, required]) - -/* Rule 8.4 (req) **********************************/ - - +e15 /* symbol redeclared */ - +elib(15) - -append(15,[MISRA 2004 Rule 8.4, required]) - +e18 /* symbol redeclared */ - +elib(18) - -append(18,[Encompasses MISRA 2004 Rule 8.4, required]) - +e64 /* flag type mismatch */ - +elib(64) - -append(64,[MISRA 2004 Rule 8.4, required]) - -/* Rule 8.5 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 8.5, - no object/function definitions in header files - */ - -/* Rule 8.6 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 8.6, - function not declared at file scope - */ - -/* Rule 8.7 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 8.7, - Could define variable at block scope - */ - -/* Rule 8.8 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 8.8, - Object/function previously declared in location - */ - -/* Rule 8.9 (req) **********************************/ - - +e14 /* Symbol previously defined */ - +elib(14) - -append(14,[MISRA 2004 Rule 8.9, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 8.9, - undefined symbol - */ - -/* Rule 8.10 (req) *********************************/ - - +e765 /* symbol could be made static */ - +elib(765) - -append(765,[MISRA 2004 Rule 8.10, required]) - -/* Rule 8.11 (req) *********************************/ - - +e401 /* symbol not previously declared static */ - +elib(401) - -append(401,[MISRA 2004 Rule 8.11, required]) - +e512 /* symbol previously used as static */ - +elib(512) - -append(512,[MISRA 2004 Rule 8.11, required]) - +e839 /* symbol previously declared as static */ - +elib(839) - -append(839,[MISRA 2004 Rule 8.11, required]) - -/* Rule 8.12 (req) *********************************/ - - +e85 /* Array has 0 dimension */ - +elib(85) - -append(85,[MISRA 2004 Rule 8.12, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 8.12, - extern array declared without size or initializer - */ - -/* Rule 9.1 (req) **********************************/ - - +e644 /* Symbol may not have been initialized */ - +elib(644) - -append(644,[MISRA 2004 Rule 9.1, required]) - +e771 /* Symbol conceivably not initialized */ - +elib(771) - -append(771,[MISRA 2004 Rule 9.1, required]) - +e530 /* Symbol not initialized */ - +elib(530) - -append(530,[MISRA 2004 Rule 9.1, required]) - -/* Rule 9.2 (req) **********************************/ - - +e785 /* too few initializers for aggregate */ - +elib(785) - -append(785,[MISRA 2004 Rule 9.2, required]) - +e940 /* omitted braces within an initializer */ - +elib(940) - -append(940,[MISRA 2004 Rule 9.2, required]) - -/* Rule 9.3 (req) **********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 9.3, - should initialize either all enum members or only the first - */ - -/* Rule 10.1 (req) *********************************/ - - +e524 /* loss of precision */ - +elib(524) - -append(524,[MISRA 2004 Rule 10.1]) - +e653 /* possible loss of fraction */ - +elib(653) - -append(653,[MISRA 2004 Rule 10.1, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 10.1, - Prohibited Implicit Conversion, or - Implicit conversion from integer to floating point type, or - Implicit conversion of integer to smaller type, or - Implicit conversion changes signedness, or - Implicit conversion of complex integer expression - */ - -/* Rule 10.2 (req) *********************************/ - - +e747 /* significant prototype coercion */ - +elib(747) - -append(747,[MISRA 2004 Rule 10.2, required]) - +e918 /* prototype coercion of pointers */ - +elib(918) - -append(918,[MISRA 2004 Rule 10.2, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 10.2, - Prohibited Implicit Conversion, or - Implicit conversion from floating point to integer type, or - Implicit conversion of floating point to smaller type, or - Implicit conversion of complex floating point expression - */ - -/* Rule 10.3 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 10.3, - Prohibited cast of complex integer expression - */ - -/* Rule 10.4 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 10.4, - Prohibited cast of complex floating-point expression: Casting - to larger type - */ - -/* Rule 10.5 (req) *********************************/ - - +e701 /* shift left of signed quantity */ - +elib(701) - -append(701,[MISRA 2004 Rule 10.5, required]) - +e702 /* shift right of signed quantity */ - +elib(702) - -append(702,[MISRA 2004 Rule 10.5, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 10.5, - Operators '~' and '<<' require recasting to underlying type for - sub-integers - */ - -/* Rule 10.6 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 10.6, - Unsigned integer literals require a 'U' suffix - */ - -/* Rule 11.1 (req) *********************************/ - - +esym(68,pointer) /* cannot cast to/from pointer */ - -append(68,[MISRA 2004 Rule 11.1, required]) - +esym(922,pointer) /* cast to/from pointer */ - -append(922,[MISRA 2004 Rule 11.1, required]) - +e923 /* cast pointer/non-pointer */ - +elib(923) - -append(923,[Encompasses MISRA 2004 Rule 11.1, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 11.1, - Conversions involving function pointers must be to/from integral types - */ - -/* Rule 11.2 (req) *********************************/ - - +esym(68,pointer) /* Cannot cast from pointer to float */ - -append(68,[MISRA 2004 Rule 11.2, required]) - +e71 /* Cannot cast between types */ - +elib(71) - -append(71,[MISRA 2004 Rule 11.2, required]) - +esym(920,pointer) /* cast to void */ - -append(920,[MISRA 2004 Rule 11.2, required]) - -/* Rule 11.3 (adv) *********************************/ - - +e923 /* cast pointer/non-pointer */ - +elib(923) - -append(923,[MISRA 2004 Rule 11.3, advisory]) - -/* Rule 11.4 (adv) *********************************/ - - +e926 /* cast from pointer to pointer */ - +elib(926) - -append(926,[MISRA 2004 Rule 11.4, advisory]) - +e927 /* cast from pointer to pointer */ - +elib(927) - -append(927,[MISRA 2004 Rule 11.4, advisory]) - +e928 /* cast from pointer to pointer */ - +elib(928) - -append(928,[MISRA 2004 Rule 11.4, advisory]) - +e929 /* cast from pointer to pointer */ - +elib(929) - -append(929,[MISRA 2004 Rule 11.4, advisory]) - -/* Rule 11.5 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 11.5, - Attempt to cast away const/volatile from a pointer or reference - */ - -/* Rule 12.1 (adv) *********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 12.1, - dependence placed on C's operator precedence - */ - +e834 /* confusing operator sequence (same precedence) */ - +elib(834) - -append(834,[MISRA 2004 Rule 12.1, advisory]) - -/* Rule 12.2 (req) *********************************/ - - +e564 /* order of evaluation */ - +elib(564) - -append(564,[MISRA 2004 Rule 12.2, required]) - +e864 /* order of evaluation */ - +elib(864) - -append(864,[MISRA 2004 Rule 12.2, required]) - +e931 /* order of evaluation */ - +elib(931) - -append(931,[MISRA 2004 Rule 12.2, required]) - -/* Rule 12.3 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.3, - 'sizeof' used on expressions with side effect - */ - -/* Rule 12.4 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.4, - side effects on right hand side of logical operator - */ - -/* Rule 12.5 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.5, - Non-primary expression used with logical operator - */ - -/* Rule 12.6 (adv) *********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 12.6, - Boolean expression used with non-permitted operator, or - Boolean expression required for operator - */ - -/* Rule 12.7 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.7, - Bitwise operator applied to signed underlying type - */ - -/* Rule 12.8 (req) *********************************/ - - +e572 /* excessive shift value */ - +elib(572) - -append(572,[MISRA 2004 Rule 12.8, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.8, - out of bounds value for right hand side of shift operator - */ - -/* Rule 12.9 (req) *********************************/ - - +e501 /* expected signed type */ - +elib(501) - -append(501,[MISRA 2004 Rule 12.9, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.9, - Prohibited operator applied to unsigned underlying type - */ - -/* Rule 12.10 (req) ********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.10, - comma operator used - */ - -/* Rule 12.11 (adv) ********************************/ - - +e648 /* overflow in computing constant */ - +elib(648) - -append(648,[MISRA 2004 Rule 12.11, advisory]) - -/* Rule 12.12 (req) ********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 12.12, - Bit representation of a floating point type used - */ - -/* Rule 12.13 (adv) ********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 12.13, - Increment or decrement combined with another operator - */ - -/* Rule 13.1 (req) *********************************/ - - +e720 /* Boolean test of assignment */ - +elib(720) - -append(720,[MISRA 2004 Rule 13.1, required]) - +e820 /* Boolean test of parenthesized - assignment - */ - +elib(820) - -append(820,[MISRA 2004 Rule 13.1, required,]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 13.1, - assignment operator used in boolean expression - */ - -/* Rule 13.2 (adv) *********************************/ - - +e640 /* Non-Boolean in Boolean context */ - +elib(640) - -append(640,[MISRA 2004 Rule 13.2, advisory]) - +e720 /* Boolean test of assignment */ - +elib(720) - -append(720,[MISRA 2004 Rule 13.2, advisory]) - -/* Rule 13.3 (req) *********************************/ - - /* PC-lint and FlexeLint partially support this rule with the - following options. - */ - +e777 /* testing floats for equality */ - +elib(777) - -append(777,[MISRA 2004 Rule 13.3, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 13.3, - floating point test for equality or inequality - */ - -/* Rule 13.4 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 13.4, - floating point variable used as loop counter - */ - -/* Rule 13.5 (req) *********************************/ - - +e440 /* Compare 2nd 'for' expression with the 3rd */ - +elib(440) - -append(440,[MISRA 2004 Rule 13.5, required]) - +e443 /* Compare 1st 'for' expression with the 3rd */ - +elib(443) - -append(443,[MISRA 2004 Rule 13.5, required]) - -/* Rule 13.6 (req) *********************************/ - - +e850 /* detect loop variables modified within the loop */ - +elib(850) - -append(850,[MISRA 2004 Rule 13.6, required]) - -/* Rule 13.7 (req) *********************************/ - - +e506 /* constant value boolean */ - +elib(506) - -append(506,[MISRA 2004 Rule 13.7, required]) - +e650 /* constant out of range */ - +elib(650) - -append(650,[MISRA 2004 Rule 13.7, required]) - +e685 /* always evaluates to true/false */ - +elib(685) - -append(685,[MISRA 2004 Rule 13.7, required]) - +e774 /* always evaluates to true/false */ - +elib(774) - -append(774,[MISRA 2004 Rule 13.7, required]) - +esym(845,&&,||) /* argument is certain to be 0 */ - -append(845,[MISRA 2004 Rule 13.7, required]) - -/* Rule 14.1 (req) *********************************/ - - +e506 /* constant value boolean */ - +elib(506) - -append(506,[MISRA 2004 Rule 14.1, required]) - +e527 /* unreachable */ - +elib(527) - -append(527,[MISRA 2004 Rule 14.1, required]) - +e681 /* loop not entered */ - +elib(681) - -append(681,[MISRA 2004 Rule 14.1, required]) - +e827 /* loop not reachable */ - +elib(827) - -append(827,[MISRA 2004 Rule 14.1, required]) - -/* Rule 14.2 (req) *********************************/ - - +e505 /* redundant left argument to comma */ - +elib(505) - -append(505,[MISRA 2004 Rule 14.2, required]) - +e522 /* no side-effects */ - +elib(522) - -append(522,[MISRA 2004 Rule 14.2, required]) - -/* Rule 14.3 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 14.3, - null statement not in line by itself - */ - -/* Rule 14.4 (req) *********************************/ - - +e801 /* use of 'goto' is deprecated */ - +elib(801) - -append(801,[MISRA 2004 Rule 14.4, required]) - -/* Rule 14.5 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 14.5, - continue statement detected - */ - -/* Rule 14.6 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 14.6, - more than one 'break' terminates loop - */ - -/* Rule 14.7 (req) *********************************/ - - +e904 /* return before function end */ - +elib(904) - -append(904,[MISRA 2004 Rule 14.7, required]) - -/* Rule 14.8 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 14.8, - left brace expected for switch, for, do and while - */ - -/* Rule 14.9 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 14.9, - left brace expected for if, else and else if - */ - -/* Rule 14.10 (req) ********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 14.10, - no 'else' at end of 'if ... else if' chain - */ - -/* Rule 15.0 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 15.0, - departure from MISRA C switch syntax - */ - - /* Additionally, for complete compliance, avoid the use of the - -fallthrough option. We anticipate automating alerts of such - uses in the future. - */ - -/* Rule 15.1 (req) *********************************/ - - +e44 /* Need a switch */ - +elib(44) - -append(44,[MISRA 2004 Rule 15.1, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 15.1, - most closely enclosing compound statement of a case/default - is not of a switch - */ - -/* Rule 15.2 (req) *********************************/ - - +e616 /* control flows into case/default */ - +elib(616) - -append(616,[MISRA 2004 Rule 15.2, required]) - +e825 /* control flows into case/default without - -fallthrough comment - */ - +elib(825) - -append(825,[MISRA 2004 Rule 15.2, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 15.2, - missing unconditional break from switch case - */ - -/* Rule 15.3 (req) *********************************/ - - +e744 /* switch statement has no default */ - +elib(744) - -append(744,[MISRA 2004 Rule 15.3, required]) - - /* we also generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 15.3, - case label follows default in switch statement - */ - -/* Rule 15.4 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 15.4, - boolean value in switch statement - */ - -/* Rule 15.5 (req) *********************************/ - - +e764 /* switch does not have a case */ - +elib(764) - -append(764,[MISRA 2004 Rule 15.5, required]) - -/* Rule 16.1 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 16.1, - function has variable number of arguments - */ - -/* Rule 16.2 (req) *********************************/ - - +stack() - -e974 - +estring(974,*recursive*) /* worst case function stack usage */ - -append(974,[MISRA 2004 Rule 16.2, required]) - /* we also generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 16.2, - function is recursive */ - -/* Rule 16.3 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 16.3, - all parameters shall have identifiers - */ - -/* Rule 16.4 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 16.4, - Function parameter list differs from prior declaration - */ - -/* Rule 16.5 (req) *********************************/ - - +e937 /* old-style function declaration */ - +elib(937) - -append(937,[MISRA 2004 Rule 16.5, required]) - -/* Rule 16.6 (req) *********************************/ - - +e118 /* too few arguments for prototype */ - +elib(118) - -append(118,[MISRA 2004 Rule 16.6, required]) - +e119 /* too many arguments for prototype */ - +elib(119) - -append(119,[MISRA 2004 Rule 16.6, required]) - -/* Rule 16.7 (adv) *********************************/ - - +e818 /* use const on paramaters where appropriate */ - +elib(818) - -append(818,[MISRA 2004 Rule 16.7, advisory]) - -/* Rule 16.8 (req) *********************************/ - - +e533 /* function should return a value */ - +elib(533) - -append(533,[MISRA 2004 Rule 16.8, required]) - -/* Rule 16.9 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 16.9, - Function identifier used without '&' or parenthesized parameter - list - */ - -e546 - -/* Rule 16.10 (req) ********************************/ - - +e534 /* ignoring return value of function */ - +elib(534) - -append(534,[Encompasses MISRA 2004 Rule 16.10, required]) - -/* Rule 17.1 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 17.1, - pointer arithmetic used on non-array - */ - -/* Rule 17.2 (req) *********************************/ - - +e946 /* relational or subtract operator applied to pointers */ - +elib(946) - -append(946,[MISRA 2004 Rule 17.2, required]) - +e947 /* relational or subtract operator applied to pointers */ - +elib(947) - -append(947,[MISRA 2004 Rule 17.2, required]) - -/* Rule 17.3 (req) *********************************/ - - +e946 /* relational or subtract operator applied to pointers */ - +elib(946) - -append(946,[MISRA 2004 Rule 17.3, required]) - +e947 /* relational or subtract operator applied to pointers */ - +elib(947) - -append(947,[MISRA 2004 Rule 17.3, required]) - -/* Rule 17.4 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 17.4, - Pointer arithmetic other than array indexing used, or - Pointer arithmetic by increment or decrement used - */ - -/* Rule 17.5 (adv) *********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 17.5, - More than two pointer indirection levels used - */ - -/* Rule 17.6 (req) *********************************/ - - +e604 /* returning address of auto variable */ - +elib(604) - -append(604,[MISRA 2004 Rule 17.6, required]) - +e684 /* passing address of auto variable to caller space */ - +elib(684) - -append(684,[MISRA 2004 Rule 17.6, required]) - +e733 /* assigning address of auto to outer scope symbol */ - +elib(733) - -append(733,[MISRA 2004 Rule 17.6, required]) - +e789 /* assigning address of auto to static */ - +elib(789) - -append(789,[MISRA 2004 Rule 17.6, required]) - -/* Rule 18.1 (req) *********************************/ - - +e43 /* vacuous type for variable */ - +elib(43) - -append(43,[MISRA 2004 Rule 18.1, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 18.1, - Undefined type or Expression of undefined type - */ - -/* Rule 18.2 (req) *********************************/ - - /* not currently supported */ - -/* Rule 18.3 (req) *********************************/ - - /* Determining whether areas of memory are - being reused for 'unrelated' purposes is not - statically checkable. - */ - -/* Rule 18.4 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 18.4, - unions shall not be used - */ - -/* Rule 19.1 (adv) *********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 19.1, - only preprocessor statements and comments before '#include' - */ - -/* Rule 19.2 (adv) *********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 19.2, - header file name with non-standard character - */ - /* Note: If your system requires the '\' be used as a directory - separator, uncomment the following option. - */ - // -estring(961,\) - -/* Rule 19.3 (req) *********************************/ - - +e12 /* Need < or " after #include */ - +elib(12) - -append(12,[MISRA 2004 Rule 19.3, required]) - -/* Rule 19.4 (req) *********************************/ - - +e773 /* expression-like macro not parenthesized */ - +elib(773) - -append(773,[MISRA 2004 Rule 19.4, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 19.4, - Disallowed definition for macro - */ - -/* Rule 19.5 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 19.5, - '#define/#undef' used within a block - */ - -/* Rule 19.6 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 19.6, - use of '#undef' is discouraged - */ - -/* Rule 19.7 (adv) *********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 19.7, - Function-like macro defined - */ - -/* Rule 19.8 (req) *********************************/ - - +e131 /* syntax error in call of macro */ - +elib(131) - -append(131,[MISRA 2004 Rule 19.8, required]) - -/* Rule 19.9 (req) *********************************/ - - +e436 /* preprocessor directive in invocation of macro */ - +elib(436) - -append(436,[MISRA 2004 Rule 19.9, required]) - -/* Rule 19.10 (req) ********************************/ - - +e9022 /* unparenthesized macro parameter in definition of macro */ - +elib(9022) - -append(9022,[MISRA 2004 Rule 19.10, required]) - -/* Rule 19.11 (req) ********************************/ - - +e553 /* undefined preprocessor variable */ - +elib(553) - -append(553,[MISRA 2004 Rule 19.11, required]) - -/* Rule 19.12 (req) ********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 19.12, - multiple use of '#/##' operators in macro definition - */ - -/* Rule 19.13 (adv) ********************************/ - - /* we generate note 961 as follows: - Note 961: Violates MISRA 2004 Advisory Rule 19.13, - '#/##' operators used - */ - -/* Rule 19.14 (req) ********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 19.14, - non-standard use of 'defined' preprocessor statement - */ - -/* Rule 19.15 (req) ********************************/ - - +e451 /* Header repeatedly included without guard */ - +elib(451) - -append(451,[MISRA 2004 Rule 19.15, required]) - -/* Rule 19.16 (req) ********************************/ - - +e544 /* endif or else not followed by EOL */ - +elib(544) - -append(544,[MISRA 2004 Rule 19.16, required]) - +e16 /* # directive not followed by recognizable word */ - +elib(16) - -append(16,[MISRA 2004 Rule 19.16, required]) - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 19.16, - all preprocessing directives must be valid - */ - - /* other parts of this rule such as a syntax check - of the disabled portions of the code do not seem to be - statically checkable - */ - -/* Rule 19.17 (req) ********************************/ - - +e405 /* #if not closed off */ - +elib(405) - -append(405,[MISRA 2004 Rule 19.17, required]) - -/* Rule 20.1 (req) *********************************/ - - +e683 /* complain about #define standard functions */ - +elib(683) - -append(683,[MISRA 2004 Rule 20.1, required]) - /* Undefining standard library macros is covered by rule 19.6. */ - /* Defining/redefining reserved/standard identifiers is covered - by rule 20.2. - */ - -/* Rule 20.2 (req) *********************************/ - - /* we generate note 960 as follows: - Note 960: Violates MISRA 2004 Required Rule 20.2, - Re-use of reserved identifier - */ - -/* Rule 20.3 (req) *********************************/ - - /* The arguments to over 100 calls to standard library functions - are monitored; users can specify additional constraints for - other functions. - */ - -/* Rule 20.4 (req) *********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( function, calloc, [MISRA 2004 Rule 20.4, required] ) - -deprecate( function, malloc, [MISRA 2004 Rule 20.4, required] ) - -deprecate( function, realloc, [MISRA 2004 Rule 20.4, required] ) - -deprecate( function, free, [MISRA 2004 Rule 20.4, required] ) - -/* Rule 20.5 (req) *********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( variable, errno, [MISRA 2004 Rule 20.5, required] ) - -deprecate( macro, errno, [MISRA 2004 Rule 20.5, required] ) - -/* Rule 20.6 (req) *********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( macro, offsetof, [MISRA 2004 Rule 20.6, rquired] ) - -/* Rule 20.7 (req) *********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( function, longjmp, [MISRA 2004 Rule 20.7, required] ) - -deprecate( macro, setjmp, [MISRA 2004 Rule 20.7, required] ) - -/* Rule 20.8 (req) *********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( function, signal, [MISRA 2004 Rule 20.8, required] ) - -deprecate( function, raise, [MISRA 2004 Rule 20.8, required] ) - +e829 /* warn on header usage */ - +elib(829) - -headerwarn(signal.h) - -append(829(signal.h),[MISRA 2004 Rule 20.8, required]) - -deprecate( macro, SIG_DFL, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIG_ERR, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIG_IGN, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIGABRT, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIGFPE, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIGILL, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIGINT, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIGSEGV, [MISRA 2004 Rule 20.8, required] ) - -deprecate( macro, SIGTERM, [MISRA 2004 Rule 20.8, required] ) - -/* Rule 20.9 (req) *********************************/ - - +e829 /* warn on header usage */ - +elib(829) - -headerwarn(stdio.h) - -append(829(stdio.h),[MISRA 2004 Rule 20.9, required]) - -deprecate( macro, _IOFBF, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, _IOLBF, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, _IONBF, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, BUFSIZ, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, EOF, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, FOPEN_MAX, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, FILENAME_MAX, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, L_tmpnam, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, SEEK_CUR, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, SEEK_END, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, SEEK_SET, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, TMP_MAX, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, stdin, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, stdout, [MISRA 2004 Rule 20.9, required] ) - -deprecate( macro, stderr, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, clearerr, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fclose, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, feof, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, ferror, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fflush, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fgetc, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fopen, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fprintf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fputc, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fputs, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fread, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, freopen, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fscanf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fseek, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fsetpos, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, ftell, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, fwrite, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, getc, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, getchar, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, gets, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, perror, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, printf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, putc, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, putchar, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, puts, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, remove, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, rename, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, rewind, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, scanf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, setbuf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, setvbuf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, sprintf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, sscanf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, tmpfile, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, tmpnam, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, ungetc, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, vfprintf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, vprintf, [MISRA 2004 Rule 20.9, required] ) - -deprecate( function, vsprintf, [MISRA 2004 Rule 20.9, required] ) - -/* Rule 20.10 (req) ********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( function, atof, [MISRA 2004 Rule 20.10, required] ) - -deprecate( function, atoi, [MISRA 2004 Rule 20.10, required] ) - -deprecate( function, atol, [MISRA 2004 Rule 20.10, required] ) - -/* Rule 20.11 (req) ********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( function, abort, [MISRA 2004 Rule 20.11, required] ) - -deprecate( function, exit, [MISRA 2004 Rule 20.11, required] ) - -deprecate( function, getenv, [MISRA 2004 Rule 20.11, required] ) - -deprecate( function, system, [MISRA 2004 Rule 20.11, required] ) - -/* Rule 20.12 (req) ********************************/ - - +e586 /* Symbol is deprecated */ - +elib(586) - -deprecate( function, time, [MISRA 2004 Rule 20.12, required] ) - -deprecate( function, strftime, [MISRA 2004 Rule 20.12, required] ) - -deprecate( function, clock, [MISRA 2004 Rule 20.12, required] ) - -deprecate( function, difftime, [MISRA 2004 Rule 20.12, required] ) - -deprecate( function, mktime, [MISRA 2004 Rule 20.12, required] ) - -/* Rule 21.1 (req) *********************************/ - - /* achieved by using PC-lint/FlexeLint */ +/* Date Stamp */ -d"_lint_au_misra2_lnt=au-misra2.lnt modified 13-Jun-2014" +/* To document usage use: -message( "Using " _lint_au_misra2_lnt ) */ +// --------------------------------------------------------------------- +// This file is provided by Gimpel Software (www.gimpel.com) for use with +// its products PC-lint and FlexeLint. +// +// Redistribution and use of this file, with or without modification, is +// permitted provided that any such redistribution retains this notice. +// --------------------------------------------------------------------- + +// au-misra2.lnt -- Author options - MISRA C 2004 + +/* + This options file can be used to explicitly activate those + checks advocated by the Motor Industry Software Reliability + Association. + + You can use this file directly when linting your programs as in: + + lin au-misra2 files + + Gimpel Software relies on the document, "MISRA-C:2004 + Guidelines for the use of the C language in critical systems", + copyright 2004 by MIRA Limited, as the primary source for this + file. Gimpel Software makes no warranty as to the completeness + or applicability of this options file and reserves the right to + amend or alter the official contents of such at any time. + + "MISRA" is a registered trademark of MIRA Limited, held on + behalf of the MISRA Consortium. + + */ + -misra(2) + +e960 /* enable special MISRA 2 messages */ + +elib(960) + +e961 /* enable special MISRA 2 messages */ + +elib(961) + +/* Rule 1.1 (req) **********************************/ + + -A(C90) /* strict ANSI */ + +e950 /* flag non-ANSI word or construct */ + +elib(950) + -append(950,[MISRA 2004 Rule 1.1, required]) + +/* Rule 1.2 (req) **********************************/ + + /* Avoid the use of undefined or unspecified behavior as described + in ISO C, Appendix A.6.1 and Appendix A.6.2 */ + + /* Source file not ending in a new-line character, ending in + new-line character immediately preceded by a backslash + character, or ending in a partial preprocessing token or + comment (ISO C, Appendix A.6.2, point 1). + */ + +e406 /* unclosed comment */ + +elib(406) + -append(406,[MISRA 2004 Rule 1.2, required]) + + /* Non-standard character usage (ISO C, Appendix A.6.2, point 2). + */ + +e27 /* illegal character */ + +elib(27) + -append(27,[MISRA 2004 Rule 1.2, required]) + + /* Unclosed quotes (ISO C, Appendix A.6.2, point 4). + */ + +e2 /* unclose quote */ + +elib(2) + -append(2,[MISRA 2004 Rule 1.2, required]) + + /* Repeated label within a function (ISO C, Appendix A.6.2, point + 5). + */ + +e31 /* symbol redefinition */ + +elib(31) + -append(31,[MISRA 2004 Rule 1.2, required]) + + /* Non-visible identifier used (ISO C, Appendix A.6.2, point 6). + */ + +e40 /* undeclared identifier */ + +elib(40) + -append(40,[MISRA 2004 Rule 1.2, required]) + + /* Identifiers for the same entity differ beyond the minimal + significant characters (ISO C, Appendix A.6.2, point 7). + See Rules 1.4 and 5.1 + */ + + /* The same identifier has both internal and external linkage in + the same translation unit (ISO C, Appendix A.6.2, point 8). + */ + +e401 /* symbol not previously declared static */ + +elib(401) + -append(401,[MISRA 2004 Rule 1.2, required]) + + /* Multiple definitions for the same externally linked identifier + (ISO C, Appendix A.6.2, point 9). + */ + +e31 /* symbol redefinition */ + +elib(31) + + /* Using automatic storage data via a pointer after the data's + lifetime (ISO C, Appendix A.6.2, point 10). + */ + +e604 /* returning address of auto variable */ + +elib(604) + -append(604,[MISRA 2004 Rule 1.2, required]) + +e934 /* taking address of near auto variable */ + +elib(934) + -append(934,[MISRA 2004 Rule 1.2, required]) + + /* Incompatible redeclarations (ISO C, Appendix A.6.2, point 11). + See Rule 8.3 + */ + + /* Non-standard escape sequence (ISO C, Appendix A.6.2, point 12). + See Rule 4.1 + */ + + /* Non-standard character in header name (ISO C, Appendix A.6.2, + point 15). + See Rule 19.2 + */ + + /* No complete type available (ISO C, Appendix A.6.2, point 16). + */ + +e86 /* structure has no data elements */ + +elib(86) + -append(86,[MISRA 2004 Rule 1.2, required]) + + /* Using or converting a void expression (ISO C, Appendix A.6.2, + point 17). + */ + +e64 /* type mismatch */ + +elib(64) + -append(64,[MISRA 2004 Rule 1.2, required]) + +e67 /* cannot cast between types */ + +elib(67) + -append(67,[MISRA 2004 Rule 1.2, required]) + +e144 /* non-existent return value */ + +elib(144) + -append(144,[MISRA 2004 Rule 1.2, required]) + + /* Modifying an object more than once or modifying and accessing + between two sequence points (ISO C, Appendix A.6.2, point 18). + See Rule 12.2 + */ + + /* Invalid arithmetic operations or unrepresentable results + (ISO C, Appendix A.6.2, point 19). + */ + +e54 /* division by 0 */ + +elib(54) + -append(54,[MISRA 2004 Rule 1.2, required]) + +e414 /* possible division by 0 */ + +elib(414) + -append(414,[MISRA 2004 Rule 1.2, required]) + +e795 /* conceivable division by 0 */ + +elib(795) + -append(795,[MISRA 2004 Rule 1.2, required]) + /* Also, see Rule 12.11 */ + + /* Passing a void argument to a function (ISO C, Appendix A.6.2, + point 20). + */ + +e64 /* type mismatch */ + +elib(64) + + /* Incompatible function redeclaration (ISO C, Appendix A.6.2, + point 22). + See Rule 8.3 + */ + + /* An invalid array reference, null pointer reference, or + reference to an object declared with automatic storage duration in + a terminated block occurs (ISO C, Appendix A.6.2, point 24). + */ + +e64 /* type mismatch */ + +elib(64) + +e413 /* likely use of null pointer */ + +elib(413) + -append(413,[MISRA 2004 Rule 1.2, required]) + +e415 /* out-of-bounds pointer */ + +elib(415) + -append(415,[MISRA 2004 Rule 1.2, required]) + +e416 /* out-of-bounds pointer */ + +elib(416) + -append(416,[MISRA 2004 Rule 1.2, required]) + +e428 /* negative subscript */ + +elib(428) + -append(428,[MISRA 2004 Rule 1.2, required]) + /* Also, see Rule 17.6 */ + + /* A pointer to a function is converted to a pointer to an object + or a pointer to an object is converted to a pointer to a function + (ISO C, Appendix A.6.2, point 26). + */ + +e64 /* type mismatch */ + +elib(64) + +e740 /* unusual pointer cast */ + +elib(740) + -append(740,[MISRA 2004 Rule 1.2, required]) + /* Also, see Rule 11.2 */ + + /* A pointer is converted to other than an integral or pointer + type (ISO C, Appendix A.6.2, point 27). + */ + +e64 /* type mismatch */ + +elib(64) + +e71 /* cannot cast */ + +elib(71) + +esym(920,pointer) /* cast to void */ + -append(920,[MISRA 2004 Rule 1.2, required]) + + /* An expression is shifted by a negative number or by an amount + greater than or equal to the width in bits of the expression being + shifted (ISO C, Appendix A.6.2, point 30). + */ + +e504 /* unusual shift */ + +elib(504) + -append(504,[MISRA 2004 Rule 1.2, required]) + + /* An identifier for an object is declared with no linkage and the + type of the object is incomplete after its declarator, or after its + init-declarator if it has an initializer (ISO C, Appendix + A.6.2, point 33). + */ + +e86 /* structure has no data elements */ + +elib(86) + + /* Declaring a function at block scope with a storage-class + specifier other than extern (ISO C, Appendix A.6.2, point 34). + */ + +e629 /* static class for function */ + +elib(629) + -append(629,[MISRA 2004 Rule 1.2, required]) + + /* A bit-field is declared with a type other than int, signed int, + or unsigned int (ISO C, Appendix A.6.2, point 35). + See Rule 6.4 + */ + + /* Attempting to modify an object with const-qualified type by + means of an lvalue with non-const-qualified type (ISO C, + Appendix A.6.2, point 36). + */ + +e158 /* assignment increases capability */ + +elib(158) + -append(158,[MISRA 2004 Rule 1.2, required]) + + /* Attempting to refer to an object with volatile-qualified type + by means of an lvalue with non-volatile-qualified type (ISO C, + Appendix A.6.2, point 37). + */ + +e158 /* assignment increases capability */ + +elib(158) + + /* Using the value of uninitialized automatic object (ISO C, + Appendix A.6.2, point 38). + See Rule 9.1 + */ + + /* An object with aggregate or union type with static storage + duration has a non-brace-enclosed initializer, or an object + with aggregate or union type with automatic storage duration + has either a single expression initializer with a type other + than that of the object or a non-brace-enclosed initializer + (ISO C, Appendix A.6.2, point 39). + Also, see Rule 9.2 + */ + +e64 /* type mismatch */ + +elib(64) + + /* The value of a function is used, but no value was returned + (ISO C, Appendix A.6.2, point 40). + See Rule 16.8 + */ + + /* A function that accepts a variable number of arguments is + defined without a parameter type list that ends with the + ellipsis notation (ISO C, Appendix A.6.2, point 41). + See Rule 8.3 + */ + + /* An identifier for an object with internal linkage and an + incomplete type is declared with a tentative definition (ISO C, + Appendix A.6.2, point 42). + */ + +e86 /* structure has no data elements */ + +elib(86) + + /* Non-standard #include preprocessing directive (ISO C, Appendix + A.6.2, point 44). + See Rule 19.3 + */ + + /* Non-standard #line directive (ISO C, Appendix A.6.2, point 49). + */ + +"estring(10,a numeric constant)" + + /* #defining or #undefing any of: defined, __LINE__, __FILE__, + __DATE__, __TIME__, or __STDC__ (ISO C, Appendix A.6.2, point 50). + */ + +e136 /* illegal macro name */ + +elib(136) + -append(136,[MISRA 2004 Rule 1.2, required]) + + /* Format-argument mismatch in an fprintf or fscanf type of + function (ISO C, Appendix A.6.2, point 75). + */ + +e558 /* too few arguments */ + +elib(558) + -append(558,[MISRA 2004 Rule 1.2, required]) + +e719 /* too many arguments */ + +elib(719) + -append(719,[MISRA 2004 Rule 1.2, required]) + + /* A %% conversion specification for the fprintf or fscanf + function contains characters between the pair of % characters + (ISO C, Appendix A.6.2, point 77). + */ + +e557 /* unrecognized format */ + +elib(557) + -append(557,[MISRA 2004 Rule 1.2, required]) + + /* An aggregate or union, or a pointer to an aggregate or union is + an argument to the fprintf function, except for the conversion + specifiers %s (for an array of character type) or %p (for a pointer + to void) (ISO C, Appendix A.6.2, point 81). + */ + +e437 /* passing struct to ellipsis */ + +elib(437) + -append(437,[MISRA 2004 Rule 1.2, required]) + + /* Referring to deallocated space (ISO C, Appendix A.6.2, point + 87). + */ + +e449 /* previously deallocated pointer */ + +elib(449) + -append(449,[MISRA 2004 Rule 1.2, required]) + + /* Misuse of free or realloc (ISO C, Appendix A.6.2, point 88). + */ + +esym(424,free) /* inappropriate deallocation */ + -append(424,[MISRA 2004 Rule 1.2, required]) + + /* An array written to by a copying or concatenation function is + too small (ISO C, Appendix A.6.2, point 91). + */ + +e419 /* data overrun */ + +elib(419) + -append(419,[MISRA 2004 Rule 1.2, required]) + + /* Order of evaluation (ISO C, Appendix A.6.1, point 7). + */ + +e564 /* variable depends on order of evaluation */ + +elib(564) + -append(564,[MISRA 2004 Rule 1.2, required]) + + /* Side effects order (ISO C, Appendix A.6.1, point 8). + */ + +e931 /* both sides of an expression have side-effects */ + +elib(931) + -append(931,[MISRA 2004 Rule 1.2, required]) + + /* Function argument evaluation (ISO C, Appendix A.6.1, point 9). + */ + +e564 /* variable depends on order of evaluation */ + +elib(564) + + /* The order in which # and ## operations are evaluated during + macro substitution (ISO C, Appendix A.6.1, point 12). + */ + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 19.12, + multiple use of '#/##' operators in macro definition + */ + + /* Whether setjmp is a macro or an external identifier (ISO C, + Appendix A.6.1, point 14). + See Rule 20.1 + */ + +/* Rule 1.3 (req) **********************************/ + + /* This is an environmental requirement on inter-language + interfacing and is not statically checkable + */ + +/* Rule 1.4 (req) **********************************/ + + -idlen(31) /* flag names identical in the first 31 characters */ + +e621 /* Identifier clash - length set by -idlen */ + +elib(621) + -append(621,[MISRA 2004 Rule 1.4, required]) + +/* Rule 1.5 (adv) **********************************/ + + /* This is an environmental requirement involving the floating + point hardware and is not statically checkable + */ + +/* Rule 2.1 (req) **********************************/ + + +e586 /* to activate the deprecation message */ + +elib(586) + -deprecate(keyword,asm,[MISRA 2004 Rule 2.1, required]) + +/* Rule 2.2 (req) **********************************/ + + -A(C90) /* strict ANSI */ + +e950 /* flag non-ANSI word or construct */ + +elib(950) + -append(950,[MISRA 2004 Rule 2.2, required]) + +/* Rule 2.3 (req) **********************************/ + + -fnc /* flag nested comments */ + +e602 /* comment within comment */ + +elib(602) + -append(602,[MISRA 2004 Rule 2.3, required]) + +/* Rule 2.4 (adv) **********************************/ + + /* This requirement (that there be no commented-out code) is, in + principle, not statically checkable. The reason given for the + requirement is that comments do not nest. Thus a commented + out section of code that happens to use slash-star commenting + could inadvertently introduce unwanted code. Rule 2.3, however, + addresses the nested comment issue and hence the major concern + that this requirement seeks to address is indeed checkable. + */ + -fnc /* flag nested comments */ + +e602 /* comment within comment */ + +elib(602) + -append(602,[MISRA 2004 Rule 2.4, advisory]) + +/* Rule 3.1 (req) **********************************/ + + /* This is a documentation requirement and as such is not statically + checkable. + */ + +/* Rule 3.2 (req) **********************************/ + + /* As stated in the description of the requirement, this is a + documentation requirement denoting the characters that may be + placed in string and character literals. It is not statically + checkable. + */ + +/* Rule 3.3 (adv) **********************************/ + + /* This is a requirement on the hardware implementation of + integer division and/or the program's understanding of it. + It is not statically checkable. + */ + +/* Rule 3.4 (req) **********************************/ + + /* This rule requires that all uses of the pragma directive + be documented. To assist in this documentation + effort we can report on unknown pragmas. By default, all + pragmas are unknown except two, push_macro and pop_macro. + These have been approved by the C standards committee but + nonetheless may be disabled (and thus reported upon as unknown) + by use of the -pragma option. These and other pragmas can be + later added using the +pragma option. + */ + +e975 /* report on unknown macros */ + -pragma( push_macro ) /* disable push_macro */ + -pragma( pop_macro ) /* disable pop_macro */ + -append(975,[MISRA 2004 Rule 3.4, required]) + + +/* Rule 3.5 (req) **********************************/ + + /* This rule is a documentation requirement when bit fields + are being used. As such, it is not statically checkable. + */ + +/* Rule 3.6 (req) **********************************/ + + /* PC-lint and FlexeLint analyze auto-generated code in precisely + the same manner as non-auto-generated code. + */ + +/* Rule 4.1 (req) **********************************/ + + +e606 /* non-ANSI escape sequence */ + +elib(606) + -append(606,[MISRA 2004 Rule 4.1, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 4.1, + Prohibited escape sequence used + */ + +/* Rule 4.2 (req) **********************************/ + + -ftg /* inhibit use of trigraphs */ + +e584 /* activate trigraph detected message */ + +elib(584) + -append(584,[MISRA 2004 Rule 4.2, required]) + +e739 /* activate trigraph in string message */ + +elib(739) + -append(739,[MISRA 2004 Rule 4.2, required]) + +/* Rule 5.1 (req) **********************************/ + + -idlen(31) /* flag names identical in the first 31 characters */ + +e621 /* Identifier clash - length set by -idlen */ + +elib(621) + -append(621,[MISRA 2004 Rule 5.1, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 5.1, + Identifier exceeds 31 characters + */ + +/* Rule 5.2 (req) **********************************/ + + +e578 /* enable reports of name hiding */ + +elib(578) + -append(578,[MISRA 2004 Rule 5.2, required]) + +/* Rule 5.3 (req) **********************************/ + + +e578 /* enable reports of name hiding */ + +elib(578) + -append(578,[MISRA 2004 Rule 5.3, required]) + +e623 /* redefining the storage class of symbol */ + +elib(623) + -append(623,[MISRA 2004 Rule 5.3, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 5.3, + Typedef is not a unique declarator. + */ + +/* Rule 5.4 (req) **********************************/ + + +e578 /* Declaration of Symbol hides Symbol */ + +elib(578) + -append(578,[MISRA 2004 Rule 5.4, required]) + +e14 /* Symbol previously defined */ + +elib(14) + -append(14,[MISRA 2004 Rule 5.4, required]) + +e15 /* Symbol redeclared */ + +elib(15) + -append(15,[MISRA 2004 Rule 5.4, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 5.4, + Tag is not a unique declarator + */ + +/* Rule 5.5 (adv) **********************************/ + + +e578 /* Declaration of Symbol hides Symbol */ + +elib(578) + -append(578,[MISRA 2004 Rule 5.5, advisory]) + +e580 /* enable reports of name hiding */ + +elib(580) + -append(580,[MISRA 2004 Rule 5.5, advisory]) + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 5.5, + Identifier with static storage is reused. + */ + +/* Rule 5.6 (adv) **********************************/ + + +e578 /* enable reports of name hiding */ + +elib(578) + -append(578,[MISRA 2004 Rule 5.6, advisory]) + +e580 /* enable reports of name hiding */ + +elib(580) + -append(580,[MISRA 2004 Rule 5.6, advisory]) + +/* Rule 5.7 (adv) **********************************/ + + +e578 /* enable reports of name hiding */ + +elib(578) + -append(578,[MISRA 2004 Rule 5.7, advisory]) + +e580 /* enable reports of name hiding */ + +elib(580) + -append(580,[MISRA 2004 Rule 5.7, advisory]) + +/* Rule 6.1 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 6.1, + Disallowed use of non-character value, or + Plain char mixed with type other than plain char, or + Plain char used with prohibited operator, or + Disallowed cast of plain char + */ + +/* Rule 6.2 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 6.2, + Disallowed use of non-numeric value + */ + +/* Rule 6.3 (adv) **********************************/ + + +e970 /* flag modifiers used outside of typedefs */ + +elib(970) + -append(970,[MISRA 2004 Rule 6.3, advisory]) + // For the duration, we are presuming MISRA does not want + // diagnostics for the bool type. + -esym(970,bool) + +/* Rule 6.4 (req) **********************************/ + + +e46 /* field type should be int */ + +elib(46) + -append(46,[MISRA 2004 Rule 6.4, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 6.4, + Bit field must be explicitly signed int or unsigned int + */ + +/* Rule 6.5 (req) **********************************/ + + +e806 /* small bit field is signed rather than unsigned */ + +elib(806) + -append(806,[MISRA 2004 Rule 6.5, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 6.5, + Signed bit field is too small + */ + +/* Rule 7.1 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 7.1, + Octal constant or octal escape sequence used + */ + +/* Rule 8.1 (req) **********************************/ + + +e718 /* Symbol undeclared */ + +elib(718) + -append(718,[MISRA 2004 Rule 8.1, required]) + +e746 /* Call to function not made in the + presence of a prototype + */ + +elib(746) + -append(746,[MISRA 2004 Rule 8.1, required]) + +e937 /* old-style function declaration */ + +elib(937) + -append(937,[MISRA 2004 Rule 8.1, required]) + +e957 /* function defined without a prototype + in scope + */ + +elib(957) + -append(957,[MISRA 2004 Rule 8.1, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 8.1, + no prototype for function + */ + +/* Rule 8.2 (req) **********************************/ + + +e601 /* object has no explicit type */ + +elib(601) + -append(601,[MISRA 2004 Rule 8.2, required]) + +e808 /* object type defaults to int */ + +elib(808) + -append(808,[MISRA 2004 Rule 8.2, required]) + +e745 /* function has no explicit type */ + +elib(745) + -append(745,[MISRA 2004 Rule 8.2, required]) + +e939 /* return type defaults to int */ + +elib(939) + -append(939,[MISRA 2004 Rule 8.2, required]) + +/* Rule 8.3 (req) **********************************/ + + -fvr /* varying return mode not allowed */ + -strong() /* enable strong typing for + declarations */ + +e18 /* symbol redeclared */ + +elib(18) + -append(18,[Encompasses MISRA 2004 Rule 8.3, required]) + +e516 /* argument type conflict */ + +elib(516) + -append(516,[MISRA 2004 Rule 8.3, required]) + +e532 /* return mode of symbol inconsistent */ + +elib(532) + -append(532,[MISRA 2004 Rule 8.3, required]) + +/* Rule 8.4 (req) **********************************/ + + +e15 /* symbol redeclared */ + +elib(15) + -append(15,[MISRA 2004 Rule 8.4, required]) + +e18 /* symbol redeclared */ + +elib(18) + -append(18,[Encompasses MISRA 2004 Rule 8.4, required]) + +e64 /* flag type mismatch */ + +elib(64) + -append(64,[MISRA 2004 Rule 8.4, required]) + +/* Rule 8.5 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 8.5, + no object/function definitions in header files + */ + +/* Rule 8.6 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 8.6, + function not declared at file scope + */ + +/* Rule 8.7 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 8.7, + Could define variable at block scope + */ + +/* Rule 8.8 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 8.8, + Object/function previously declared in location + */ + +/* Rule 8.9 (req) **********************************/ + + +e14 /* Symbol previously defined */ + +elib(14) + -append(14,[MISRA 2004 Rule 8.9, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 8.9, + undefined symbol + */ + +/* Rule 8.10 (req) *********************************/ + + +e765 /* symbol could be made static */ + +elib(765) + -append(765,[MISRA 2004 Rule 8.10, required]) + +/* Rule 8.11 (req) *********************************/ + + +e401 /* symbol not previously declared static */ + +elib(401) + -append(401,[MISRA 2004 Rule 8.11, required]) + +e512 /* symbol previously used as static */ + +elib(512) + -append(512,[MISRA 2004 Rule 8.11, required]) + +e839 /* symbol previously declared as static */ + +elib(839) + -append(839,[MISRA 2004 Rule 8.11, required]) + +/* Rule 8.12 (req) *********************************/ + + +e85 /* Array has 0 dimension */ + +elib(85) + -append(85,[MISRA 2004 Rule 8.12, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 8.12, + extern array declared without size or initializer + */ + +/* Rule 9.1 (req) **********************************/ + + +e644 /* Symbol may not have been initialized */ + +elib(644) + -append(644,[MISRA 2004 Rule 9.1, required]) + +e771 /* Symbol conceivably not initialized */ + +elib(771) + -append(771,[MISRA 2004 Rule 9.1, required]) + +e530 /* Symbol not initialized */ + +elib(530) + -append(530,[MISRA 2004 Rule 9.1, required]) + +/* Rule 9.2 (req) **********************************/ + + +e785 /* too few initializers for aggregate */ + +elib(785) + -append(785,[MISRA 2004 Rule 9.2, required]) + +e940 /* omitted braces within an initializer */ + +elib(940) + -append(940,[MISRA 2004 Rule 9.2, required]) + +/* Rule 9.3 (req) **********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 9.3, + should initialize either all enum members or only the first + */ + +/* Rule 10.1 (req) *********************************/ + + +e524 /* loss of precision */ + +elib(524) + -append(524,[MISRA 2004 Rule 10.1]) + +e653 /* possible loss of fraction */ + +elib(653) + -append(653,[MISRA 2004 Rule 10.1, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 10.1, + Prohibited Implicit Conversion, or + Implicit conversion from integer to floating point type, or + Implicit conversion of integer to smaller type, or + Implicit conversion changes signedness, or + Implicit conversion of complex integer expression + */ + +/* Rule 10.2 (req) *********************************/ + + +e747 /* significant prototype coercion */ + +elib(747) + -append(747,[MISRA 2004 Rule 10.2, required]) + +e918 /* prototype coercion of pointers */ + +elib(918) + -append(918,[MISRA 2004 Rule 10.2, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 10.2, + Prohibited Implicit Conversion, or + Implicit conversion from floating point to integer type, or + Implicit conversion of floating point to smaller type, or + Implicit conversion of complex floating point expression + */ + +/* Rule 10.3 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 10.3, + Prohibited cast of complex integer expression + */ + +/* Rule 10.4 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 10.4, + Prohibited cast of complex floating-point expression: Casting + to larger type + */ + +/* Rule 10.5 (req) *********************************/ + + +e701 /* shift left of signed quantity */ + +elib(701) + -append(701,[MISRA 2004 Rule 10.5, required]) + +e702 /* shift right of signed quantity */ + +elib(702) + -append(702,[MISRA 2004 Rule 10.5, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 10.5, + Operators '~' and '<<' require recasting to underlying type for + sub-integers + */ + +/* Rule 10.6 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 10.6, + Unsigned integer literals require a 'U' suffix + */ + +/* Rule 11.1 (req) *********************************/ + + +esym(68,pointer) /* cannot cast to/from pointer */ + -append(68,[MISRA 2004 Rule 11.1, required]) + +esym(922,pointer) /* cast to/from pointer */ + -append(922,[MISRA 2004 Rule 11.1, required]) + +e923 /* cast pointer/non-pointer */ + +elib(923) + -append(923,[Encompasses MISRA 2004 Rule 11.1, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 11.1, + Conversions involving function pointers must be to/from integral types + */ + +/* Rule 11.2 (req) *********************************/ + + +esym(68,pointer) /* Cannot cast from pointer to float */ + -append(68,[MISRA 2004 Rule 11.2, required]) + +e71 /* Cannot cast between types */ + +elib(71) + -append(71,[MISRA 2004 Rule 11.2, required]) + +esym(920,pointer) /* cast to void */ + -append(920,[MISRA 2004 Rule 11.2, required]) + +/* Rule 11.3 (adv) *********************************/ + + +e923 /* cast pointer/non-pointer */ + +elib(923) + -append(923,[MISRA 2004 Rule 11.3, advisory]) + +/* Rule 11.4 (adv) *********************************/ + + +e926 /* cast from pointer to pointer */ + +elib(926) + -append(926,[MISRA 2004 Rule 11.4, advisory]) + +e927 /* cast from pointer to pointer */ + +elib(927) + -append(927,[MISRA 2004 Rule 11.4, advisory]) + +e928 /* cast from pointer to pointer */ + +elib(928) + -append(928,[MISRA 2004 Rule 11.4, advisory]) + +e929 /* cast from pointer to pointer */ + +elib(929) + -append(929,[MISRA 2004 Rule 11.4, advisory]) + +/* Rule 11.5 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 11.5, + Attempt to cast away const/volatile from a pointer or reference + */ + +/* Rule 12.1 (adv) *********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 12.1, + dependence placed on C's operator precedence + */ + +e834 /* confusing operator sequence (same precedence) */ + +elib(834) + -append(834,[MISRA 2004 Rule 12.1, advisory]) + +/* Rule 12.2 (req) *********************************/ + + +e564 /* order of evaluation */ + +elib(564) + -append(564,[MISRA 2004 Rule 12.2, required]) + +e864 /* order of evaluation */ + +elib(864) + -append(864,[MISRA 2004 Rule 12.2, required]) + +e931 /* order of evaluation */ + +elib(931) + -append(931,[MISRA 2004 Rule 12.2, required]) + +/* Rule 12.3 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.3, + 'sizeof' used on expressions with side effect + */ + +/* Rule 12.4 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.4, + side effects on right hand side of logical operator + */ + +/* Rule 12.5 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.5, + Non-primary expression used with logical operator + */ + +/* Rule 12.6 (adv) *********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 12.6, + Boolean expression used with non-permitted operator, or + Boolean expression required for operator + */ + +/* Rule 12.7 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.7, + Bitwise operator applied to signed underlying type + */ + +/* Rule 12.8 (req) *********************************/ + + +e572 /* excessive shift value */ + +elib(572) + -append(572,[MISRA 2004 Rule 12.8, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.8, + out of bounds value for right hand side of shift operator + */ + +/* Rule 12.9 (req) *********************************/ + + +e501 /* expected signed type */ + +elib(501) + -append(501,[MISRA 2004 Rule 12.9, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.9, + Prohibited operator applied to unsigned underlying type + */ + +/* Rule 12.10 (req) ********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.10, + comma operator used + */ + +/* Rule 12.11 (adv) ********************************/ + + +e648 /* overflow in computing constant */ + +elib(648) + -append(648,[MISRA 2004 Rule 12.11, advisory]) + +/* Rule 12.12 (req) ********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 12.12, + Bit representation of a floating point type used + */ + +/* Rule 12.13 (adv) ********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 12.13, + Increment or decrement combined with another operator + */ + +/* Rule 13.1 (req) *********************************/ + + +e720 /* Boolean test of assignment */ + +elib(720) + -append(720,[MISRA 2004 Rule 13.1, required]) + +e820 /* Boolean test of parenthesized + assignment + */ + +elib(820) + -append(820,[MISRA 2004 Rule 13.1, required,]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 13.1, + assignment operator used in boolean expression + */ + +/* Rule 13.2 (adv) *********************************/ + + +e640 /* Non-Boolean in Boolean context */ + +elib(640) + -append(640,[MISRA 2004 Rule 13.2, advisory]) + +e720 /* Boolean test of assignment */ + +elib(720) + -append(720,[MISRA 2004 Rule 13.2, advisory]) + +/* Rule 13.3 (req) *********************************/ + + /* PC-lint and FlexeLint partially support this rule with the + following options. + */ + +e777 /* testing floats for equality */ + +elib(777) + -append(777,[MISRA 2004 Rule 13.3, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 13.3, + floating point test for equality or inequality + */ + +/* Rule 13.4 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 13.4, + floating point variable used as loop counter + */ + +/* Rule 13.5 (req) *********************************/ + + +e440 /* Compare 2nd 'for' expression with the 3rd */ + +elib(440) + -append(440,[MISRA 2004 Rule 13.5, required]) + +e443 /* Compare 1st 'for' expression with the 3rd */ + +elib(443) + -append(443,[MISRA 2004 Rule 13.5, required]) + +/* Rule 13.6 (req) *********************************/ + + +e850 /* detect loop variables modified within the loop */ + +elib(850) + -append(850,[MISRA 2004 Rule 13.6, required]) + +/* Rule 13.7 (req) *********************************/ + + +e506 /* constant value boolean */ + +elib(506) + -append(506,[MISRA 2004 Rule 13.7, required]) + +e650 /* constant out of range */ + +elib(650) + -append(650,[MISRA 2004 Rule 13.7, required]) + +e685 /* always evaluates to true/false */ + +elib(685) + -append(685,[MISRA 2004 Rule 13.7, required]) + +e774 /* always evaluates to true/false */ + +elib(774) + -append(774,[MISRA 2004 Rule 13.7, required]) + +esym(845,&&,||) /* argument is certain to be 0 */ + -append(845,[MISRA 2004 Rule 13.7, required]) + +/* Rule 14.1 (req) *********************************/ + + +e506 /* constant value boolean */ + +elib(506) + -append(506,[MISRA 2004 Rule 14.1, required]) + +e527 /* unreachable */ + +elib(527) + -append(527,[MISRA 2004 Rule 14.1, required]) + +e681 /* loop not entered */ + +elib(681) + -append(681,[MISRA 2004 Rule 14.1, required]) + +e827 /* loop not reachable */ + +elib(827) + -append(827,[MISRA 2004 Rule 14.1, required]) + +/* Rule 14.2 (req) *********************************/ + + +e505 /* redundant left argument to comma */ + +elib(505) + -append(505,[MISRA 2004 Rule 14.2, required]) + +e522 /* no side-effects */ + +elib(522) + -append(522,[MISRA 2004 Rule 14.2, required]) + +/* Rule 14.3 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 14.3, + null statement not in line by itself + */ + +/* Rule 14.4 (req) *********************************/ + + +e801 /* use of 'goto' is deprecated */ + +elib(801) + -append(801,[MISRA 2004 Rule 14.4, required]) + +/* Rule 14.5 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 14.5, + continue statement detected + */ + +/* Rule 14.6 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 14.6, + more than one 'break' terminates loop + */ + +/* Rule 14.7 (req) *********************************/ + + +e904 /* return before function end */ + +elib(904) + -append(904,[MISRA 2004 Rule 14.7, required]) + +/* Rule 14.8 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 14.8, + left brace expected for switch, for, do and while + */ + +/* Rule 14.9 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 14.9, + left brace expected for if, else and else if + */ + +/* Rule 14.10 (req) ********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 14.10, + no 'else' at end of 'if ... else if' chain + */ + +/* Rule 15.0 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 15.0, + departure from MISRA C switch syntax + */ + + /* Additionally, for complete compliance, avoid the use of the + -fallthrough option. We anticipate automating alerts of such + uses in the future. + */ + +/* Rule 15.1 (req) *********************************/ + + +e44 /* Need a switch */ + +elib(44) + -append(44,[MISRA 2004 Rule 15.1, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 15.1, + most closely enclosing compound statement of a case/default + is not of a switch + */ + +/* Rule 15.2 (req) *********************************/ + + +e616 /* control flows into case/default */ + +elib(616) + -append(616,[MISRA 2004 Rule 15.2, required]) + +e825 /* control flows into case/default without + -fallthrough comment + */ + +elib(825) + -append(825,[MISRA 2004 Rule 15.2, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 15.2, + missing unconditional break from switch case + */ + +/* Rule 15.3 (req) *********************************/ + + +e744 /* switch statement has no default */ + +elib(744) + -append(744,[MISRA 2004 Rule 15.3, required]) + + /* we also generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 15.3, + case label follows default in switch statement + */ + +/* Rule 15.4 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 15.4, + boolean value in switch statement + */ + +/* Rule 15.5 (req) *********************************/ + + +e764 /* switch does not have a case */ + +elib(764) + -append(764,[MISRA 2004 Rule 15.5, required]) + +/* Rule 16.1 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 16.1, + function has variable number of arguments + */ + +/* Rule 16.2 (req) *********************************/ + + +stack() + -e974 + +estring(974,*recursive*) /* worst case function stack usage */ + -append(974,[MISRA 2004 Rule 16.2, required]) + /* we also generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 16.2, + function is recursive */ + +/* Rule 16.3 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 16.3, + all parameters shall have identifiers + */ + +/* Rule 16.4 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 16.4, + Function parameter list differs from prior declaration + */ + +/* Rule 16.5 (req) *********************************/ + + +e937 /* old-style function declaration */ + +elib(937) + -append(937,[MISRA 2004 Rule 16.5, required]) + +/* Rule 16.6 (req) *********************************/ + + +e118 /* too few arguments for prototype */ + +elib(118) + -append(118,[MISRA 2004 Rule 16.6, required]) + +e119 /* too many arguments for prototype */ + +elib(119) + -append(119,[MISRA 2004 Rule 16.6, required]) + +/* Rule 16.7 (adv) *********************************/ + + +e818 /* use const on paramaters where appropriate */ + +elib(818) + -append(818,[MISRA 2004 Rule 16.7, advisory]) + +/* Rule 16.8 (req) *********************************/ + + +e533 /* function should return a value */ + +elib(533) + -append(533,[MISRA 2004 Rule 16.8, required]) + +/* Rule 16.9 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 16.9, + Function identifier used without '&' or parenthesized parameter + list + */ + -e546 + +/* Rule 16.10 (req) ********************************/ + + +e534 /* ignoring return value of function */ + +elib(534) + -append(534,[Encompasses MISRA 2004 Rule 16.10, required]) + +/* Rule 17.1 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 17.1, + pointer arithmetic used on non-array + */ + +/* Rule 17.2 (req) *********************************/ + + +e946 /* relational or subtract operator applied to pointers */ + +elib(946) + -append(946,[MISRA 2004 Rule 17.2, required]) + +e947 /* relational or subtract operator applied to pointers */ + +elib(947) + -append(947,[MISRA 2004 Rule 17.2, required]) + +/* Rule 17.3 (req) *********************************/ + + +e946 /* relational or subtract operator applied to pointers */ + +elib(946) + -append(946,[MISRA 2004 Rule 17.3, required]) + +e947 /* relational or subtract operator applied to pointers */ + +elib(947) + -append(947,[MISRA 2004 Rule 17.3, required]) + +/* Rule 17.4 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 17.4, + Pointer arithmetic other than array indexing used, or + Pointer arithmetic by increment or decrement used + */ + +/* Rule 17.5 (adv) *********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 17.5, + More than two pointer indirection levels used + */ + +/* Rule 17.6 (req) *********************************/ + + +e604 /* returning address of auto variable */ + +elib(604) + -append(604,[MISRA 2004 Rule 17.6, required]) + +e684 /* passing address of auto variable to caller space */ + +elib(684) + -append(684,[MISRA 2004 Rule 17.6, required]) + +e733 /* assigning address of auto to outer scope symbol */ + +elib(733) + -append(733,[MISRA 2004 Rule 17.6, required]) + +e789 /* assigning address of auto to static */ + +elib(789) + -append(789,[MISRA 2004 Rule 17.6, required]) + +/* Rule 18.1 (req) *********************************/ + + +e43 /* vacuous type for variable */ + +elib(43) + -append(43,[MISRA 2004 Rule 18.1, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 18.1, + Undefined type or Expression of undefined type + */ + +/* Rule 18.2 (req) *********************************/ + + /* not currently supported */ + +/* Rule 18.3 (req) *********************************/ + + /* Determining whether areas of memory are + being reused for 'unrelated' purposes is not + statically checkable. + */ + +/* Rule 18.4 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 18.4, + unions shall not be used + */ + +/* Rule 19.1 (adv) *********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 19.1, + only preprocessor statements and comments before '#include' + */ + +/* Rule 19.2 (adv) *********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 19.2, + header file name with non-standard character + */ + /* Note: If your system requires the '\' be used as a directory + separator, uncomment the following option. + */ + // -estring(961,\) + +/* Rule 19.3 (req) *********************************/ + + +e12 /* Need < or " after #include */ + +elib(12) + -append(12,[MISRA 2004 Rule 19.3, required]) + +/* Rule 19.4 (req) *********************************/ + + +e773 /* expression-like macro not parenthesized */ + +elib(773) + -append(773,[MISRA 2004 Rule 19.4, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 19.4, + Disallowed definition for macro + */ + +/* Rule 19.5 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 19.5, + '#define/#undef' used within a block + */ + +/* Rule 19.6 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 19.6, + use of '#undef' is discouraged + */ + +/* Rule 19.7 (adv) *********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 19.7, + Function-like macro defined + */ + +/* Rule 19.8 (req) *********************************/ + + +e131 /* syntax error in call of macro */ + +elib(131) + -append(131,[MISRA 2004 Rule 19.8, required]) + +/* Rule 19.9 (req) *********************************/ + + +e436 /* preprocessor directive in invocation of macro */ + +elib(436) + -append(436,[MISRA 2004 Rule 19.9, required]) + +/* Rule 19.10 (req) ********************************/ + + +e9022 /* unparenthesized macro parameter in definition of macro */ + +elib(9022) + -append(9022,[MISRA 2004 Rule 19.10, required]) + +/* Rule 19.11 (req) ********************************/ + + +e553 /* undefined preprocessor variable */ + +elib(553) + -append(553,[MISRA 2004 Rule 19.11, required]) + +/* Rule 19.12 (req) ********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 19.12, + multiple use of '#/##' operators in macro definition + */ + +/* Rule 19.13 (adv) ********************************/ + + /* we generate note 961 as follows: + Note 961: Violates MISRA 2004 Advisory Rule 19.13, + '#/##' operators used + */ + +/* Rule 19.14 (req) ********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 19.14, + non-standard use of 'defined' preprocessor statement + */ + +/* Rule 19.15 (req) ********************************/ + + +e451 /* Header repeatedly included without guard */ + +elib(451) + -append(451,[MISRA 2004 Rule 19.15, required]) + +/* Rule 19.16 (req) ********************************/ + + +e544 /* endif or else not followed by EOL */ + +elib(544) + -append(544,[MISRA 2004 Rule 19.16, required]) + +e16 /* # directive not followed by recognizable word */ + +elib(16) + -append(16,[MISRA 2004 Rule 19.16, required]) + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 19.16, + all preprocessing directives must be valid + */ + + /* other parts of this rule such as a syntax check + of the disabled portions of the code do not seem to be + statically checkable + */ + +/* Rule 19.17 (req) ********************************/ + + +e405 /* #if not closed off */ + +elib(405) + -append(405,[MISRA 2004 Rule 19.17, required]) + +/* Rule 20.1 (req) *********************************/ + + +e683 /* complain about #define standard functions */ + +elib(683) + -append(683,[MISRA 2004 Rule 20.1, required]) + /* Undefining standard library macros is covered by rule 19.6. */ + /* Defining/redefining reserved/standard identifiers is covered + by rule 20.2. + */ + +/* Rule 20.2 (req) *********************************/ + + /* we generate note 960 as follows: + Note 960: Violates MISRA 2004 Required Rule 20.2, + Re-use of reserved identifier + */ + +/* Rule 20.3 (req) *********************************/ + + /* The arguments to over 100 calls to standard library functions + are monitored; users can specify additional constraints for + other functions. + */ + +/* Rule 20.4 (req) *********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( function, calloc, [MISRA 2004 Rule 20.4, required] ) + -deprecate( function, malloc, [MISRA 2004 Rule 20.4, required] ) + -deprecate( function, realloc, [MISRA 2004 Rule 20.4, required] ) + -deprecate( function, free, [MISRA 2004 Rule 20.4, required] ) + +/* Rule 20.5 (req) *********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( variable, errno, [MISRA 2004 Rule 20.5, required] ) + -deprecate( macro, errno, [MISRA 2004 Rule 20.5, required] ) + +/* Rule 20.6 (req) *********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( macro, offsetof, [MISRA 2004 Rule 20.6, rquired] ) + +/* Rule 20.7 (req) *********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( function, longjmp, [MISRA 2004 Rule 20.7, required] ) + -deprecate( macro, setjmp, [MISRA 2004 Rule 20.7, required] ) + +/* Rule 20.8 (req) *********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( function, signal, [MISRA 2004 Rule 20.8, required] ) + -deprecate( function, raise, [MISRA 2004 Rule 20.8, required] ) + +e829 /* warn on header usage */ + +elib(829) + -headerwarn(signal.h) + -append(829(signal.h),[MISRA 2004 Rule 20.8, required]) + -deprecate( macro, SIG_DFL, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIG_ERR, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIG_IGN, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIGABRT, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIGFPE, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIGILL, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIGINT, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIGSEGV, [MISRA 2004 Rule 20.8, required] ) + -deprecate( macro, SIGTERM, [MISRA 2004 Rule 20.8, required] ) + +/* Rule 20.9 (req) *********************************/ + + +e829 /* warn on header usage */ + +elib(829) + -headerwarn(stdio.h) + -append(829(stdio.h),[MISRA 2004 Rule 20.9, required]) + -deprecate( macro, _IOFBF, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, _IOLBF, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, _IONBF, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, BUFSIZ, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, EOF, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, FOPEN_MAX, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, FILENAME_MAX, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, L_tmpnam, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, SEEK_CUR, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, SEEK_END, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, SEEK_SET, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, TMP_MAX, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, stdin, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, stdout, [MISRA 2004 Rule 20.9, required] ) + -deprecate( macro, stderr, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, clearerr, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fclose, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, feof, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, ferror, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fflush, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fgetc, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fopen, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fprintf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fputc, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fputs, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fread, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, freopen, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fscanf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fseek, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fsetpos, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, ftell, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, fwrite, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, getc, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, getchar, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, gets, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, perror, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, printf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, putc, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, putchar, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, puts, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, remove, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, rename, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, rewind, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, scanf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, setbuf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, setvbuf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, sprintf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, sscanf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, tmpfile, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, tmpnam, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, ungetc, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, vfprintf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, vprintf, [MISRA 2004 Rule 20.9, required] ) + -deprecate( function, vsprintf, [MISRA 2004 Rule 20.9, required] ) + +/* Rule 20.10 (req) ********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( function, atof, [MISRA 2004 Rule 20.10, required] ) + -deprecate( function, atoi, [MISRA 2004 Rule 20.10, required] ) + -deprecate( function, atol, [MISRA 2004 Rule 20.10, required] ) + +/* Rule 20.11 (req) ********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( function, abort, [MISRA 2004 Rule 20.11, required] ) + -deprecate( function, exit, [MISRA 2004 Rule 20.11, required] ) + -deprecate( function, getenv, [MISRA 2004 Rule 20.11, required] ) + -deprecate( function, system, [MISRA 2004 Rule 20.11, required] ) + +/* Rule 20.12 (req) ********************************/ + + +e586 /* Symbol is deprecated */ + +elib(586) + -deprecate( function, time, [MISRA 2004 Rule 20.12, required] ) + -deprecate( function, strftime, [MISRA 2004 Rule 20.12, required] ) + -deprecate( function, clock, [MISRA 2004 Rule 20.12, required] ) + -deprecate( function, difftime, [MISRA 2004 Rule 20.12, required] ) + -deprecate( function, mktime, [MISRA 2004 Rule 20.12, required] ) + +/* Rule 21.1 (req) *********************************/ + + /* achieved by using PC-lint/FlexeLint */ diff --git a/include/qassert.h b/include/qassert.h index d9faaed5..6f34121d 100644 --- a/include/qassert.h +++ b/include/qassert.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/qep.h b/include/qep.h index 6218a7bb..ee2bbb84 100644 --- a/include/qep.h +++ b/include/qep.h @@ -4,8 +4,8 @@ * @ingroup qep * @cond ****************************************************************************** -* Last updated for version 5.8.2 -* Last updated on 2017-01-05 +* Last updated for version 5.9.0 +* Last updated on 2017-05-10 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -45,17 +45,16 @@ * major version number, Y is a 1-digit minor version number, and Z is * a 1-digit release number. */ -#define QP_VERSION 582 +#define QP_VERSION 590 /*! The current QP version number string of the form X.Y.Z, where X is * a 1-digit major version number, Y is a 1-digit minor version number, * and Z is a 1-digit release number. */ -#define QP_VERSION_STR "5.8.2" - -/*! Tamperproof current QP release (5.8.2) and date (2017-02-08) */ -#define QP_RELEASE 0x9A8C4FB9U +#define QP_VERSION_STR "5.9.0" +/*! Tamperproof current QP release (5.9.0) and date (2017-05-19) */ +#define QP_RELEASE 0x9A5CDB41U /****************************************************************************/ /* typedefs for basic numerical types; MISRA-C 2004 rule 6.3(req). */ @@ -164,7 +163,7 @@ QEvt *QEvt_ctor(QEvt * const me, enum_t const sig); #endif /****************************************************************************/ -/*! Perform upcast from a subclass of ::QMsm to the base class ::QMsm */ +/*! Perform upcast from a subclass of ::QHsm to the base class ::QHsm */ /** * @description * Upcasting from a subclass to superclass is a very frequent and __safe__ @@ -387,7 +386,7 @@ typedef QHsm QMsm; /*! virtual table for the ::QMsm class. */ typedef struct QHsmVtbl QMsmVtbl; -/*! State object for the ::QMsm class (Meta State Machine). */ +/*! State object for the ::QMsm class (QM State Machine). */ /** * @description * This class groups together the attributes of a ::QMsm state, such as the @@ -444,9 +443,6 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e); QMState const *QMsm_childStateObj_(QMsm const * const me, QMState const * const parent); -/*! Internal helper function to execute a transition-action table. */ -QState QMsm_execTatbl_(QMsm * const me, QMTranActTable const *tatbl); - /*! Tests if a given state is part of the current active state * configuration in a MSM. */ diff --git a/include/qf.h b/include/qf.h index ab788c09..33d96580 100644 --- a/include/qf.h +++ b/include/qf.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/qk.h b/include/qk.h index e78a81e3..4a2232c3 100644 --- a/include/qk.h +++ b/include/qk.h @@ -33,7 +33,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/qpc.h b/include/qpc.h index 46eaeb40..98511b7c 100644 --- a/include/qpc.h +++ b/include/qpc.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/qpc.lnt b/include/qpc.lnt index 0b3edb97..e9969297 100644 --- a/include/qpc.lnt +++ b/include/qpc.lnt @@ -1,473 +1,481 @@ -//============================================================================ -// Product: PC-Lint 9.x option file for linting QP/C applications -// Last updated for version 5.8.0 -// Last updated on 2016-11-21 -// -// Q u a n t u m L e a P s -// --------------------------- -// innovating embedded systems -// -// Copyright (C) Quantum Leaps, LLC, state-machine.com. -// -// This program is open source software: you can redistribute it and/or -// modify it under the terms of the GNU General Public License as published -// by the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// Alternatively, this program may be distributed and modified under the -// terms of Quantum Leaps commercial licenses, which expressly supersede -// the GNU General Public License and are specifically designed for -// licensees interested in retaining the proprietary status of their code. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// -// Contact information: -// http://www.state-machine.com -// mailto:info@state-machine.com -//============================================================================ - -// General --estring(793,6) // ANSI/ISO limit of 6 significant chars exceeded --emacro((960), // MISRA04-17.4(req) pointer arithmetic - Q_DIM, - Q_UINT2PTR_CAST) --estring(961, // MISRA04-19.7(adv) function-like macro - Q_DIM, - Q_UINT2PTR_CAST) --esym(960, // MISRA04-19.10(req) unparenthesized macro par - Q_UINT2PTR_CAST) --estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter - Q_UINT2PTR_CAST) - - -// Assertions --estring(960, // MISRA04-8.7(req) could use block scope - Q_this_module_) --estring(961, // MISRA04-19.7(adv) function-like macro - Q_ASSERT, - Q_ASSERT_ID, - Q_ALLEGE, - Q_ALLEGE_ID, - Q_ERROR, - Q_ERROR_ID, - Q_REQUIRE, - Q_REQUIRE_ID, - Q_ENSURE, - Q_ENSURE_ID, - Q_INVARIANT, - Q_INVARIANT_ID, - Q_ASSERT_COMPILE, - Q_TEST_ASSERT, - Q_DEFINE_THIS_MODULE) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - Q_ALLEGE, - Q_ALLEGE_ID, - Q_ERROR, - Q_ERROR_ID, - Q_REQUIRE, - Q_REQUIRE_ID, - Q_ENSURE, - Q_ENSURE_ID, - Q_INVARIANT, - Q_INVARIANT_ID, - Q_DEFINE_THIS_FILE, - Q_ASSERT_COMPILE, - Q_TEST_ASSERT) --esym(960, // MISRA04-19.10(req) unparenthesized macro par - Q_DEFINE_THIS_MODULE) --estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter - Q_DEFINE_THIS_MODULE) --emacro(522, // Highest operation lacks side-effects - Q_ASSERT, - Q_ERROR, - Q_ALLEGE) --function(exit, // give Q_onAssert() the semantics of "exit" - Q_onAssert) --estring(752, // not referenced - Q_assert_compile) - -// QEP --emacro(740, // MISRA04-1.2(req) incompatible indirect types - Q_HSM_UPCAST) --esym(960, // MISRA04-19.10(req) unparenthesized macro par - Q_EVT_CAST) --estring(961, // MISRA04-19.7(adv) function-like macro - Q_HSM_UPCAST, - Q_EVT_CAST) --emacro(929, // MISRA04-11.4(adv) cast pointer to pointer - Q_HSM_UPCAST, - Q_EVT_CAST) --estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter - Q_EVT_CAST) - --emacro(740, // MISRA04-1.2(req) pointer cast - Q_STATE_CAST, // (incompatible indirect types) - Q_TRAN, - Q_TRAN_HIST, - Q_SUPER, - QM_ENTRY, - QM_EXIT, - QM_SM_EXIT, - QM_TRAN, - QM_TRAN_INIT, - QM_TRAN_HIST, - QM_TRAN_EP, - QM_TRAN_XP) --emacro(929, // MISRA04-11.4(adv) cast pointer to pointer - Q_STATE_CAST, - Q_ACTION_CAST, - Q_TRAN, - Q_SUPER, - QM_ENTRY, - QM_EXIT, - QM_SM_EXIT, - QM_TRAN, - QM_TRAN_INIT, - QM_TRAN_HIST, - QM_TRAN_EP, - QM_TRAN_XP) --emacro(960, // MISRA04-11.1(req) Conversions involving - Q_STATE_CAST, // fun. pointers must be to/from integral types - Q_ACTION_CAST) --emacro(960, // MISRA04-12.10(req) comma operator used - Q_TRAN, - Q_TRAN_HIST, - Q_SUPER, - QM_ENTRY, - QM_EXIT, - QM_SM_EXIT, - QM_TRAN, - QM_TRAN_INIT, - QM_TRAN_HIST) --estring(960, // MISRA04-18.4(req) declaration of union type - QHsmAttr) --estring(961, // MISRA04-19.7(adv) function-like macro - QMsm_stateObj, - QMsm_childStateObj, - QHsm_state, - QHsm_childState, - Q_IGNORED, - Q_HANDLED, - Q_UNHANDLED, - Q_TRAN, - Q_TRAN_HIST, - Q_SUPER, - Q_STATE_CAST, - Q_ACTION_CAST, - QEP_getVersion) --estring(961, // MISRA04-19.7(adv) function-like macro - QHSM_INIT, - QHSM_DISPATCH, - QM_ENTRY, - QM_EXIT, - QM_SM_EXIT, - QM_TRAN, - QM_TRAN_INIT, - QM_TRAN_HIST, - QM_TRAN_EP, - QM_TRAN_XP, - QM_SUPER, - QM_SUPER_SUB, - QM_HANDLED, - QM_UNHANDLED) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QMsm_childStateObj, - QHsm_childState) --esym(754, // Info: local structure member not referenced - target, - act) - -// QF --emacro(950, // MISRA04-2.1(req) assembly language - QF_INT_DISABLE, - QF_INT_ENABLE, - QF_CRIT_ENTRY, - QF_CRIT_EXIT, - QF_LOG2) --estring(961, // MISRA04-19.7(adv) function-like macro - Q_NEW, - Q_NEW_X, - Q_NEW_REF, - Q_DELETE_REF, - QF_INT_DISABLE, - QF_INT_ENABLE, - QF_CRIT_ENTRY, - QF_CRIT_EXIT, - QF_CRIT_EXIT_NOP, - QF_CPU_SLEEP, - QF_TICK, - QF_TICK_X, - QF_PUBLISH, - QF_MPOOL_EL, - QF_LOG2, - QACTIVE_START, - QACTIVE_POST, - QACTIVE_POST_X, - QACTIVE_POST_LIFO) --estring(961, // MISRA04-19.7(adv) function-like macro - QPSet_setEmpty, - QPSet_isEmpty, - QPSet_notEmpty, - QPSet_hasElement, - QPSet_insert, - QPSet_remove, - QPSet_findMax, - QEQueue_getNFree, - QEQueue_getNMin, - QEQueue_isEmpty, - QTimeEvt_ctor, - QTimeEvt_postIn, - QTimeEvt_postEvery, - QF_getVersion) --estring(961, // MISRA04-19.7(adv) function-like macro - QF_QS_CRIT_EXIT, - QF_QS_CRIT_ENTRY, - QF_QS_CRIT_EXIT, - QF_QS_ISR_ENTRY, - QF_QS_ISR_EXIT, - QF_QS_ACTION) --estring(961, // MISRA04-19.7(adv) function-like macro - QACTIVE_EQUEUE_WAIT_, - QACTIVE_EQUEUE_SIGNAL_, - QACTIVE_EQUEUE_ONEMPTY_, - QF_EPOOL_INIT_, - QF_EPOOL_EVENT_SIZE_, - QF_EPOOL_GET_, - QF_EPOOL_PUT_, - QF_PTR_INC_, - QF_tick, - QActive_postFIFO, - QEQueue_postFIFO) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QF_INT_DISABLE, - QF_INT_ENABLE, - QF_CRIT_ENTRY, - QF_CRIT_EXIT, - QF_CRIT_EXIT_NOP, - QF_EQUEUE_TYPE, - QF_OS_OBJECT_TYPE, - QF_THREAD_TYPE, - QF_CRIT_STAT_TYPE, - QF_MPOOL_EL, - QACTIVE_EQUEUE_ONEMPTY_, - QF_EPOOL_TYPE_, - QF_ACTIVE_SUPER_, - QF_ACTIVE_STATE_, - QTimeEvt_ctor) --emacro(929, // MISRA04-11.4(adv) cast from pointer to pointer - Q_NEW, - Q_NEW_X, - Q_NEW_REF, - QACTIVE_POST, - QACTIVE_POST_LIFO) --emacro(960, // MISRA04-17.4(req) pointer increment - QF_PTR_INC_) --emacro(717, // do ... while(0) - QPSet_setEmpty, - QPSet_insert, - QPSet_remove, - QTimeEvt_postIn, - QTimeEvt_postEvery) --estring(960, // MISRA04-8.7(req) could use block scope - QF_maxPool_, - QF_timeEvtHead_) --esym(960, // MISRA04-19.10(req) unparenthesized macro par - Q_NEW, - Q_NEW_X, - Q_NEW_REF) --estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter - Q_NEW, - Q_NEW_X, - Q_NEW_REF) --esym(641, *Signals) // Converting enum '*Signals' to 'int' --esym(754, sto_) // local structure member 'sto' not referenced - -// QV --estring(961, // MISRA04-19.7(adv) function-like macro - QV_getVersion) - -// QK --emacro(950, // MISRA04-2.1(req) assembly language - QK_ISR_CONTEXT_, - QK_ISR_ENTRY, - QK_ISR_EXIT) --estring(961, // MISRA04-19.7(adv) function-like macro - QK_ISR_CONTEXT_, - QK_ISR_ENTRY, - QK_ISR_EXIT, - QK_getVersion) --estring(960, // MISRA04-8.7(req) could use block scope - QK_intNest_) - -// QXK --emacro(950, // MISRA04-2.1(req) assembly language - QXK_ISR_CONTEXT_, - QXK_ISR_ENTRY, - QXK_ISR_EXIT) --estring(961, // MISRA04-19.7(adv) function-like macro - QXK_ISR_CONTEXT_, - QXK_ISR_ENTRY, - QXK_ISR_EXIT, - QXK_getVersion, - QXTHREAD_START, - QXTHREAD_POST_X, - Q_XTHREAD_CAST) --emacro(960, // MISRA04-11.1(req) Conversions involving - Q_XTHREAD_CAST) // fun. pointers must be to/from integral types --emacro(929, // MISRA04-11.4(adv) cast pointer to pointer - Q_XTHREAD_CAST) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QXTHREAD_START, - QXTHREAD_POST_X) --estring(960, // MISRA04-8.7(req) could use block scope - QXK_intNest_) --esym(960, // MISRA04-20.2(req) Re-use of C90 identifier pattern - topPrio) - -// QS --emacro(506, QS_*) // MISRA04-13.7(req) constant value boolean - // MISRA04-14.1(req) no unreachable code --emacro(774, QS_*) // MISRA04-13.7(req) 'if' always True - // MISRA04-14.1(req) no unreachable code --emacro(923, // MISRA04-11.3(req) cast from pointer to int - QS_OBJ_, - QS_FUN_) --emacro(960, // MISRA04-17.4(req), pointer arithmetic - QS_PTR_AT_) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QS_PTR_AT_) --estring(961, // MISRA04-19.7(adv) function-like macro - QS_INIT, - QS_EXIT, - QS_DUMP, - QS_RESET, - QS_FILTER_ON, - QS_FILTER_OFF, - QS_FILTER_SM_OBJ, - QS_FILTER_AO_OBJ, - QS_FILTER_MP_OBJ, - QS_FILTER_EQ_OBJ, - QS_FILTER_TE_OBJ, - QS_FILTER_AP_OBJ, - QS_GET_BYTE, - QS_GET_BLOCK, - QS_BEGIN, - QS_END, - QS_BEGIN_NOCRIT, - QS_END_NOCRIT) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QS_BEGIN, - QS_END, - QS_BEGIN_NOCRIT, - QS_END_NOCRIT) --estring(961, // MISRA04-19.7(adv) function-like macro - QS_I8, - QS_U8, - QS_I16, - QS_U16, - QS_I32, - QS_I64, - QS_U32, - QS_F32, - QS_F64, - QS_U64, - QS_U32_HEX, - QS_STR, - QS_OBJ, - QS_FUN, - QS_SIG_DICTIONARY, - QS_OBJ_DICTIONARY, - QS_FUN_DICTIONARY, - QS_USR_DICTIONARY, - QS_ASSERTION, - QS_TEST, - QS_FLUSH, - QS_MEM, - QS_SIG, - QS_PTR_AT_, - QS_RX_PUT) --estring(961, // MISRA04-19.7(adv) function-like macro - QS_CRIT_ENTRY_, - QS_CRIT_EXIT_, - QS_BEGIN_, - QS_END_, - QS_BEGIN_NOCRIT_, - QS_END_NOCRIT_, - QS_U8_, - QS_2U8_, - QS_U16_, - QS_U32_, - QS_U64_, - QS_STR_, - QS_TIME_, - QS_SIG_, - QS_EVS_, - QS_OBJ_, - QS_FUN_, - QS_EQC_, - QS_MPC_, - QS_MPS_, - QS_TEC_, - QS_getVersion) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QS_CRIT_STAT_, - QS_CRIT_ENTRY_, - QS_CRIT_EXIT_, - QF_QS_CRIT_ENTRY, - QF_QS_CRIT_EXIT, - QF_QS_ISR_ENTRY, - QF_QS_ISR_EXIT, - QS_SIG, - QS_BEGIN_, - QS_END_, - QS_BEGIN_NOCRIT_, - QS_END_NOCRIT_) --emacro(960, // MISRA04-11.1(req) conversion of function pointers - QS_FUN_DICTIONARY) --emacro(929, // MISRA04-11.4(adv) cast pointer to pointer - QS_FUN_DICTIONARY) --estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter - QF_QS_ISR_ENTRY, - QF_QS_ISR_EXIT, - QS_PTR_AT_) --emacro(717, QS_*) // do ... while(0); - - -// Deprecated features--provided in the backwards compatibility API of QP/C --esym(960, // MISRA04-19.4(req) disallowed macro definition - QFsm, - QFsm_ctor, - QF_onIdle) --estring(961, // MISRA04-19.7(adv) function-like macro - QHsm_init, - QHsm_dispatch, - QFsm_init, - QFsm_dispatch, - QActive_start, - QActive_postFIFO, - QF_tick, - QF_TICK, - QTimeEvt_ctor, - QTimeEvt_postIn, - QTimeEvt_postEvery, - Q_ROM_BYTE) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QHsm_init, - QHsm_dispatch, - QFsm_init, - QFsm_dispatch, - QActive_start, - QActive_postFIFO, - QF_tick, - QF_TICK, - QTimeEvt_ctor, - QTimeEvt_postIn, - QTimeEvt_postEvery) - - +//============================================================================ +// Product: PC-Lint 9.x option file for linting QP/C applications +// Last updated for version 5.9.0 +// Last updated on 2017-05-16 +// +// Q u a n t u m L e a P s +// --------------------------- +// innovating embedded systems +// +// Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// https://state-machine.com +// mailto:info@state-machine.com +//============================================================================ + +// General +-estring(793,6) // ANSI/ISO limit of 6 significant chars exceeded +-emacro((960), // MISRA04-17.4(req) pointer arithmetic + Q_DIM, + Q_UINT2PTR_CAST) +-estring(961, // MISRA04-19.7(adv) function-like macro + Q_DIM, + Q_UINT2PTR_CAST) +-esym(960, // MISRA04-19.10(req) unparenthesized macro par + Q_UINT2PTR_CAST) +-estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter + Q_UINT2PTR_CAST) + + +// Assertions +-estring(960, // MISRA04-8.7(req) could use block scope + Q_this_module_) +-estring(961, // MISRA04-19.7(adv) function-like macro + Q_ASSERT, + Q_ASSERT_ID, + Q_ALLEGE, + Q_ALLEGE_ID, + Q_ERROR, + Q_ERROR_ID, + Q_REQUIRE, + Q_REQUIRE_ID, + Q_ENSURE, + Q_ENSURE_ID, + Q_INVARIANT, + Q_INVARIANT_ID, + Q_ASSERT_COMPILE, + Q_DEFINE_THIS_MODULE) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + Q_ALLEGE, + Q_ALLEGE_ID, + Q_ERROR, + Q_ERROR_ID, + Q_REQUIRE, + Q_REQUIRE_ID, + Q_ENSURE, + Q_ENSURE_ID, + Q_INVARIANT, + Q_INVARIANT_ID, + Q_DEFINE_THIS_FILE, + Q_ASSERT_COMPILE) +-esym(960, // MISRA04-19.10(req) unparenthesized macro par + Q_DEFINE_THIS_MODULE) +-estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter + Q_DEFINE_THIS_MODULE) +-emacro(522, // Highest operation lacks side-effects + Q_ASSERT, + Q_ERROR, + Q_ALLEGE) +-function(exit, // give Q_onAssert() the semantics of "exit" + Q_onAssert) +-estring(752, // not referenced + Q_assert_compile) + +// QEP +-emacro(740, // MISRA04-1.2(req) incompatible indirect types + Q_HSM_UPCAST) +-esym(960, // MISRA04-19.10(req) unparenthesized macro par + Q_EVT_CAST) +-estring(961, // MISRA04-19.7(adv) function-like macro + Q_HSM_UPCAST, + Q_EVT_CAST) +-emacro(929, // MISRA04-11.4(adv) cast pointer to pointer + Q_HSM_UPCAST, + Q_EVT_CAST) +-estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter + Q_EVT_CAST) + +-emacro(740, // MISRA04-1.2(req) pointer cast + Q_STATE_CAST, // (incompatible indirect types) + Q_TRAN, + Q_TRAN_HIST, + Q_SUPER, + QM_ENTRY, + QM_EXIT, + QM_SM_EXIT, + QM_TRAN, + QM_TRAN_INIT, + QM_TRAN_HIST, + QM_TRAN_EP, + QM_TRAN_XP) +-emacro(929, // MISRA04-11.4(adv) cast pointer to pointer + Q_STATE_CAST, + Q_ACTION_CAST, + Q_TRAN, + Q_SUPER, + QM_ENTRY, + QM_EXIT, + QM_SM_EXIT, + QM_TRAN, + QM_TRAN_INIT, + QM_TRAN_HIST, + QM_TRAN_EP, + QM_TRAN_XP) +-emacro(960, // MISRA04-11.1(req) Conversions involving + Q_STATE_CAST, // fun. pointers must be to/from integral types + Q_ACTION_CAST) +-emacro(960, // MISRA04-12.10(req) comma operator used + Q_TRAN, + Q_TRAN_HIST, + Q_SUPER, + QM_ENTRY, + QM_EXIT, + QM_SM_EXIT, + QM_TRAN, + QM_TRAN_INIT, + QM_TRAN_HIST) +-estring(960, // MISRA04-18.4(req) declaration of union type + QHsmAttr) +-estring(961, // MISRA04-19.7(adv) function-like macro + QMsm_stateObj, + QMsm_childStateObj, + QHsm_state, + QHsm_childState, + Q_IGNORED, + Q_HANDLED, + Q_UNHANDLED, + Q_TRAN, + Q_TRAN_HIST, + Q_SUPER, + Q_STATE_CAST, + Q_ACTION_CAST, + QEP_getVersion) +-estring(961, // MISRA04-19.7(adv) function-like macro + QHSM_INIT, + QHSM_DISPATCH, + QM_ENTRY, + QM_EXIT, + QM_SM_EXIT, + QM_TRAN, + QM_TRAN_INIT, + QM_TRAN_HIST, + QM_TRAN_EP, + QM_TRAN_XP, + QM_SUPER, + QM_SUPER_SUB, + QM_HANDLED, + QM_UNHANDLED) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QMsm_childStateObj, + QHsm_childState) +-esym(754, // Info: local structure member not referenced + target, + act) + +// QF +-emacro(950, // MISRA04-2.1(req) assembly language + QF_INT_DISABLE, + QF_INT_ENABLE, + QF_CRIT_ENTRY, + QF_CRIT_EXIT, + QF_LOG2) +-estring(961, // MISRA04-19.7(adv) function-like macro + Q_NEW, + Q_NEW_X, + Q_NEW_REF, + Q_DELETE_REF, + QF_INT_DISABLE, + QF_INT_ENABLE, + QF_CRIT_ENTRY, + QF_CRIT_EXIT, + QF_CRIT_EXIT_NOP, + QF_TICK, + QF_TICK_X, + QF_PUBLISH, + QF_MPOOL_EL, + QF_LOG2, + QACTIVE_START, + QACTIVE_POST, + QACTIVE_POST_X, + QACTIVE_POST_LIFO) +-estring(961, // MISRA04-19.7(adv) function-like macro + QPSet_setEmpty, + QPSet_isEmpty, + QPSet_notEmpty, + QPSet_hasElement, + QPSet_insert, + QPSet_remove, + QPSet_findMax, + QEQueue_getNFree, + QEQueue_getNMin, + QEQueue_isEmpty, + QTimeEvt_ctor, + QTimeEvt_postIn, + QTimeEvt_postEvery, + QF_getVersion) +-estring(961, // MISRA04-19.7(adv) function-like macro + QF_QS_CRIT_EXIT, + QF_QS_CRIT_ENTRY, + QF_QS_CRIT_EXIT, + QF_QS_ISR_ENTRY, + QF_QS_ISR_EXIT, + QF_QS_ACTION) +-estring(961, // MISRA04-19.7(adv) function-like macro + QACTIVE_EQUEUE_WAIT_, + QACTIVE_EQUEUE_SIGNAL_, + QACTIVE_EQUEUE_ONEMPTY_, + QF_EPOOL_INIT_, + QF_EPOOL_EVENT_SIZE_, + QF_EPOOL_GET_, + QF_EPOOL_PUT_, + QF_PTR_INC_, + QF_tick, + QActive_postFIFO, + QEQueue_postFIFO) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QF_INT_DISABLE, + QF_INT_ENABLE, + QF_CRIT_ENTRY, + QF_CRIT_EXIT, + QF_CRIT_EXIT_NOP, + QF_EQUEUE_TYPE, + QF_OS_OBJECT_TYPE, + QF_THREAD_TYPE, + QF_CRIT_STAT_TYPE, + QF_MPOOL_EL, + QACTIVE_EQUEUE_ONEMPTY_, + QF_EPOOL_TYPE_, + QF_ACTIVE_SUPER_, + QF_ACTIVE_STATE_, + QTimeEvt_ctor) +-emacro(929, // MISRA04-11.4(adv) cast from pointer to pointer + Q_NEW, + Q_NEW_X, + Q_NEW_REF, + QACTIVE_POST, + QACTIVE_POST_LIFO) +-emacro(960, // MISRA04-17.4(req) pointer increment + QF_PTR_INC_) +-emacro(717, // do ... while(0) + QPSet_setEmpty, + QPSet_insert, + QPSet_remove, + QTimeEvt_postIn, + QTimeEvt_postEvery) +-estring(960, // MISRA04-8.7(req) could use block scope + QF_maxPool_, + QF_timeEvtHead_) +-esym(960, // MISRA04-19.10(req) unparenthesized macro par + Q_NEW, + Q_NEW_X, + Q_NEW_REF) +-estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter + Q_NEW, + Q_NEW_X, + Q_NEW_REF) +-esym(641, *Signals) // Converting enum '*Signals' to 'int' +-esym(754, sto_) // local structure member 'sto' not referenced + +// QV +-estring(961, // MISRA04-19.7(adv) function-like macro + QV_getVersion, + QV_CPU_SLEEP) + +// QK +-emacro(950, // MISRA04-2.1(req) assembly language + QK_ISR_CONTEXT_, + QK_ISR_ENTRY, + QK_ISR_EXIT) +-estring(961, // MISRA04-19.7(adv) function-like macro + QK_ISR_CONTEXT_, + QK_ISR_ENTRY, + QK_ISR_EXIT, + QK_getVersion) +-estring(960, // MISRA04-8.7(req) could use block scope + QK_intNest_) + +// QXK +-emacro(950, // MISRA04-2.1(req) assembly language + QXK_ISR_CONTEXT_, + QXK_ISR_ENTRY, + QXK_ISR_EXIT) +-estring(961, // MISRA04-19.7(adv) function-like macro + QXK_ISR_CONTEXT_, + QXK_ISR_ENTRY, + QXK_ISR_EXIT, + QXK_getVersion, + QXTHREAD_START, + QXTHREAD_POST_X, + Q_XTHREAD_CAST) +-emacro(960, // MISRA04-11.1(req) Conversions involving + Q_XTHREAD_CAST) // fun. pointers must be to/from integral types +-emacro(929, // MISRA04-11.4(adv) cast pointer to pointer + Q_XTHREAD_CAST) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QXTHREAD_START, + QXTHREAD_POST_X) +-estring(960, // MISRA04-8.7(req) could use block scope + QXK_intNest_) +-esym(960, // MISRA04-20.2(req) Re-use of C90 identifier pattern + topPrio) + +// QS +-emacro(506, QS_*) // MISRA04-13.7(req) constant value boolean + // MISRA04-14.1(req) no unreachable code +-emacro(774, QS_*) // MISRA04-13.7(req) 'if' always True + // MISRA04-14.1(req) no unreachable code +-emacro(923, // MISRA04-11.3(req) cast from pointer to int + QS_OBJ_, + QS_FUN_) +-emacro(960, // MISRA04-17.4(req), pointer arithmetic + QS_PTR_AT_) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QS_PTR_AT_) +-estring(961, // MISRA04-19.7(adv) function-like macro + QS_INIT, + QS_EXIT, + QS_DUMP, + QS_RESET, + QS_FILTER_ON, + QS_FILTER_OFF, + QS_FILTER_SM_OBJ, + QS_FILTER_AO_OBJ, + QS_FILTER_MP_OBJ, + QS_FILTER_EQ_OBJ, + QS_FILTER_TE_OBJ, + QS_FILTER_AP_OBJ, + QS_GET_BYTE, + QS_GET_BLOCK, + QS_BEGIN, + QS_END, + QS_BEGIN_NOCRIT, + QS_END_NOCRIT) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QS_BEGIN, + QS_END, + QS_BEGIN_NOCRIT, + QS_END_NOCRIT) +-estring(961, // MISRA04-19.7(adv) function-like macro + QS_I8, + QS_U8, + QS_I16, + QS_U16, + QS_I32, + QS_I64, + QS_U32, + QS_F32, + QS_F64, + QS_U64, + QS_U32_HEX, + QS_STR, + QS_OBJ, + QS_FUN, + QS_SIG_DICTIONARY, + QS_OBJ_DICTIONARY, + QS_FUN_DICTIONARY, + QS_USR_DICTIONARY, + QS_ASSERTION, + QS_FLUSH, + QS_MEM, + QS_SIG, + QS_PTR_AT_, + QS_RX_PUT) +-estring(961, // MISRA04-19.7(adv) function-like macro + QS_CRIT_ENTRY_, + QS_CRIT_EXIT_, + QS_BEGIN_, + QS_END_, + QS_BEGIN_NOCRIT_, + QS_END_NOCRIT_, + QS_REC_DONE, + QS_U8_, + QS_2U8_, + QS_U16_, + QS_U32_, + QS_U64_, + QS_STR_, + QS_TIME_, + QS_SIG_, + QS_EVS_, + QS_OBJ_, + QS_FUN_, + QS_EQC_, + QS_MPC_, + QS_MPS_, + QS_TEC_, + QS_TEST_PAUSE, + QS_TEST_PROBE_DEF, + QS_TEST_PROBE, + QS_TEST_PROBE_ID, + QS_getVersion) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QS_CRIT_STAT_, + QS_CRIT_ENTRY_, + QS_CRIT_EXIT_, + QF_QS_CRIT_ENTRY, + QF_QS_CRIT_EXIT, + QF_QS_ISR_ENTRY, + QF_QS_ISR_EXIT, + QS_SIG, + QS_BEGIN_, + QS_END_, + QS_BEGIN_NOCRIT_, + QS_END_NOCRIT_, + QS_TEST_PAUSE, + QS_TEST_PROBE_DEF, + QS_TEST_PROBE, + QS_TEST_PROBE_ID) +-emacro(960, // MISRA04-11.1(req) conversion of function pointers + QS_FUN_DICTIONARY) +-emacro(929, // MISRA04-11.4(adv) cast pointer to pointer + QS_FUN_DICTIONARY) +-estring(9022, // MISRA04-19.10(req) unparenthesized macro parameter + QF_QS_ISR_ENTRY, + QF_QS_ISR_EXIT, + QS_PTR_AT_, + QS_TEST_PROBE, + QS_TEST_PROBE_ID) +-emacro(717, QS_*) // do ... while(0); + + +// Deprecated features--provided in the backwards compatibility API of QP/C +-esym(960, // MISRA04-19.4(req) disallowed macro definition + QFsm, + QFsm_ctor, + QF_onIdle) +-estring(961, // MISRA04-19.7(adv) function-like macro + QHsm_init, + QHsm_dispatch, + QFsm_init, + QFsm_dispatch, + QActive_start, + QActive_postFIFO, + QF_tick, + QF_TICK, + QTimeEvt_ctor, + QTimeEvt_postIn, + QTimeEvt_postEvery, + Q_ROM_BYTE) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QHsm_init, + QHsm_dispatch, + QFsm_init, + QFsm_dispatch, + QActive_start, + QActive_postFIFO, + QF_tick, + QF_TICK, + QTimeEvt_ctor, + QTimeEvt_postIn, + QTimeEvt_postEvery) + + diff --git a/include/qpset.h b/include/qpset.h index 7d46af90..ac271aeb 100644 --- a/include/qpset.h +++ b/include/qpset.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -175,9 +175,9 @@ typedef struct { /*! function that returns (log2(x_) + 1), where @p x_ is uint32_t */ /** * @description - * This function returns the 1-based number of the most significant 1-bit - * of a 32-bit number. This function can be replaced in the QP ports, if - * the CPU supports special instructions, such as CLZ (count leading zeros). + * This function returns the number of the most significant 1-bit of a + * 32-bit number. This function can be replaced in the QP ports, if the + * CPU supports special instructions, such as CLZ (count leading zeros). */ inline uint_fast8_t QF_LOG2(uint32_t x) { uint_fast8_t n; @@ -207,13 +207,6 @@ typedef struct { } #else /* older C compiler */ - /*! function that returns (log2(x_) + 1), where @p x_ is uint32_t */ - /** - * @description - * This function returns the 1-based number of the most significant 1-bit - * of a 32-bit number. This function can be replaced in the QP ports, if - * the CPU supports special instructions, such as CLZ (count leading zeros). - */ uint_fast8_t QF_LOG2(uint32_t x); #endif /* __STDC_VERSION__ */ @@ -221,4 +214,3 @@ typedef struct { #endif /* QF_LOG2 */ #endif /* qpset_h */ - diff --git a/include/qs.h b/include/qs.h index 96106a14..34e6c966 100644 --- a/include/qs.h +++ b/include/qs.h @@ -1,11 +1,11 @@ /** * @file * @brief QS/C platform-independent public interface. -* @ingroup qs +* @ingroup qs qpspy * @cond ****************************************************************************** -* Last updated for version 5.6.2 -* Last updated on 2016-03-23 +* Last updated for version 5.9.0 +* Last updated on 2017-05-16 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -84,13 +84,13 @@ enum QSpyRecords { QS_QF_ACTIVE_UNSUBSCRIBE, /*!< an AO unsubscribed to an event */ QS_QF_ACTIVE_POST_FIFO, /*!< an event was posted (FIFO) directly to AO */ QS_QF_ACTIVE_POST_LIFO, /*!< an event was posted (LIFO) directly to AO */ - QS_QF_ACTIVE_GET, /*!< AO got an event and its queue is still not empty */ - QS_QF_ACTIVE_GET_LAST, /*!< AO got an event and its queue is empty */ + QS_QF_ACTIVE_GET, /*!< AO got an event and its queue is not empty */ + QS_QF_ACTIVE_GET_LAST,/*!< AO got an event and its queue is empty */ QS_QF_EQUEUE_INIT, /*!< an event queue was initialized */ QS_QF_EQUEUE_POST_FIFO, /*!< an event was posted (FIFO) to a raw queue */ QS_QF_EQUEUE_POST_LIFO, /*!< an event was posted (LIFO) to a raw queue */ QS_QF_EQUEUE_GET, /*!< get an event and queue still not empty */ - QS_QF_EQUEUE_GET_LAST, /*!< get the last event from the queue */ + QS_QF_EQUEUE_GET_LAST,/*!< get the last event from the queue */ QS_QF_MPOOL_INIT, /*!< a memory pool was initialized */ QS_QF_MPOOL_GET, /*!< a memory block was removed from memory pool */ QS_QF_MPOOL_PUT, /*!< a memory block was returned to memory pool */ @@ -130,27 +130,50 @@ enum QSpyRecords { QS_QEP_TRAN_HIST, /*!< a tran to history was taken */ QS_QEP_TRAN_EP, /*!< a tran to entry point into a submachine */ QS_QEP_TRAN_XP, /*!< a tran to exit point out of a submachine */ - QS_QEP_RESERVED1, - QS_QEP_RESERVED0, - /* [60] Miscellaneous QS records (not maskable) */ + /* [58] Miscellaneous QS records (not maskable) */ + QS_TEST_PAUSED, /*!< test has been paused */ + QS_TEST_PROBE_GET, /*!< reports that Test-Probe has been used */ QS_SIG_DICT, /*!< signal dictionary entry */ QS_OBJ_DICT, /*!< object dictionary entry */ QS_FUN_DICT, /*!< function dictionary entry */ QS_USR_DICT, /*!< user QS record dictionary entry */ QS_TARGET_INFO, /*!< reports the Target information */ - QS_RESERVED0, + QS_TARGET_DONE, /*!< reports completion of a user callback */ QS_RX_STATUS, /*!< reports QS data receive status */ - QS_TEST_STATUS, /*!< reports test status */ + QS_MSC_RESERVED1, QS_PEEK_DATA, /*!< reports the data from the PEEK query */ QS_ASSERT_FAIL, /*!< assertion failed in the code */ - /* [70] Application-specific QS records */ + /* [70] Application-specific (User) QS records */ QS_USER /*!< the first record available to QS users */ }; -/*! Specification of all QS records for QS_FILTER_ON() and QS_FILTER_OFF() */ -#define QS_ALL_RECORDS ((uint_fast8_t)0xFF) +/*! QS record groups for QS_FILTER_ON() and QS_FILTER_OFF() */ +enum QSpyRecordGroups { + QS_ALL_RECORDS = 0xF0,/*!< all maskable QS records */ + QS_SM_RECORDS, /*!< State Machine QS records */ + QS_AO_RECORDS, /*!< Active Object QS records */ + QS_EQ_RECORDS, /*!< Event Queues QS records */ + QS_MP_RECORDS, /*!< Memory Pools QS records */ + QS_TE_RECORDS, /*!< Time Events QS records */ + QS_QF_RECORDS, /*!< QF QS records */ + QS_SC_RECORDS, /*!< Scheduler QS records */ + QS_U0_RECORDS, /*!< User Group 70-79 records */ + QS_U1_RECORDS, /*!< User Group 80-89 records */ + QS_U2_RECORDS, /*!< User Group 90-99 records */ + QS_U3_RECORDS, /*!< User Group 100-109 records */ + QS_U4_RECORDS, /*!< User Group 110-124 records */ + QS_UA_RECORDS /*!< All User records */ +}; + +/*! QS user record group offsets */ +enum QSpyUserRecords { + QS_USER0 = QS_USER, /*!< offset for User Group 0 */ + QS_USER1 = QS_USER0 + 10, /*!< offset for User Group 1 */ + QS_USER2 = QS_USER1 + 10, /*!< offset for User Group 2 */ + QS_USER3 = QS_USER2 + 10 /*!< offset for User Group 3 */ +}; #ifndef QS_TIME_SIZE @@ -354,8 +377,7 @@ QSTimeCtr QS_onGetTime(void); * routine if #Q_SPY is defined, or do nothing if #Q_SPY is not defined. * @sa QS_onStartup(), example of setting up a QS filter in QS_FILTER_ON */ -#define QS_INIT(arg_) ((QS_onStartup(arg_) != (uint8_t)0) \ - ? (QS_onFlush(), (uint8_t)1) : (uint8_t)0) +#define QS_INIT(arg_) (QS_onStartup(arg_)) /*! Cleanup the QS facility. */ /** @@ -416,7 +438,7 @@ QSTimeCtr QS_onGetTime(void); * * @sa Example of using QS filters in #QS_FILTER_ON documentation */ -#define QS_FILTER_SM_OBJ(obj_) (QS_priv_.smObjFilter = (obj_)) +#define QS_FILTER_SM_OBJ(obj_) (QS_priv_.locFilter[SM_OBJ] = (obj_)) /*! Local Filter for a given active object @p obj_. */ /** @@ -437,7 +459,7 @@ QSTimeCtr QS_onGetTime(void); * * @sa Example of using QS filters in #QS_FILTER_ON documentation */ -#define QS_FILTER_AO_OBJ(obj_) (QS_priv_.aoObjFilter = (obj_)) +#define QS_FILTER_AO_OBJ(obj_) (QS_priv_.locFilter[AO_OBJ] = (obj_)) /*! Local Filter for a given memory pool object @p obj_. */ /** @@ -457,7 +479,7 @@ QSTimeCtr QS_onGetTime(void); * * @sa Example of using QS filters in #QS_FILTER_ON documentation */ -#define QS_FILTER_MP_OBJ(obj_) (QS_priv_.mpObjFilter = (obj_)) +#define QS_FILTER_MP_OBJ(obj_) (QS_priv_.locFilter[MP_OBJ] = (obj_)) /*! Local Filter for a given event queue object @p obj_. */ /** @@ -477,7 +499,7 @@ QSTimeCtr QS_onGetTime(void); * * @sa Example of using QS filters in #QS_FILTER_ON documentation */ -#define QS_FILTER_EQ_OBJ(obj_) (QS_priv_.eqObjFilter = (obj_)) +#define QS_FILTER_EQ_OBJ(obj_) (QS_priv_.locFilter[EQ_OBJ] = (obj_)) /*! Local Filter for a given time event object @p obj_. */ /** @@ -498,7 +520,7 @@ QSTimeCtr QS_onGetTime(void); * * @sa Example of using QS filters in #QS_FILTER_ON documentation */ -#define QS_FILTER_TE_OBJ(obj_) (QS_priv_.teObjFilter = (obj_)) +#define QS_FILTER_TE_OBJ(obj_) (QS_priv_.locFilter[TE_OBJ] = (obj_)) /*! Local Filter for a generic application object @p obj_. */ /** @@ -515,7 +537,7 @@ QSTimeCtr QS_onGetTime(void); * * @sa Example of using QS filters in #QS_FILTER_ON documentation */ -#define QS_FILTER_AP_OBJ(obj_) (QS_priv_.apObjFilter = (obj_)) +#define QS_FILTER_AP_OBJ(obj_) (QS_priv_.locFilter[AP_OBJ] = (obj_)) /****************************************************************************/ /* Macros to generate user QS records */ @@ -525,8 +547,8 @@ QSTimeCtr QS_onGetTime(void); if ((((uint_fast8_t)QS_priv_.glbFilter[(uint8_t)(rec_) >> 3] \ & (uint_fast8_t)(1U << ((uint8_t)(rec_) & (uint8_t)7))) \ != (uint_fast8_t)0) \ - && ((QS_priv_.apObjFilter == (void *)0) \ - || (QS_priv_.apObjFilter == (obj_)))) \ + && ((QS_priv_.locFilter[AP_OBJ] == (void *)0) \ + || (QS_priv_.locFilter[AP_OBJ] == (obj_)))) \ { \ QS_beginRec((uint_fast8_t)(rec_)); \ QS_TIME_(); { @@ -535,18 +557,23 @@ QSTimeCtr QS_onGetTime(void); #define QS_END_NOCRIT() } \ QS_END_NOCRIT_() +#ifndef QS_REC_DONE + /*! macro to hook up user code when a QS record is produced */ + #define QS_REC_DONE() ((void)0) +#endif /* QS_REC_DONE */ + /* QS-specific critical section *********************************************/ #ifdef QS_CRIT_ENTRY /* separate QS critical section defined? */ #ifndef QS_CRIT_STAT_TYPE #define QS_CRIT_STAT_ #define QS_CRIT_ENTRY_() QS_CRIT_ENTRY(dummy) - #define QS_CRIT_EXIT_() QS_CRIT_EXIT(dummy) + #define QS_CRIT_EXIT_() QS_CRIT_EXIT(dummy); QS_REC_DONE() #else #define QS_CRIT_STAT_ QS_CRIT_STAT_TYPE critStat_; #define QS_CRIT_ENTRY_() QS_CRIT_ENTRY(critStat_) - #define QS_CRIT_EXIT_() QS_CRIT_EXIT(critStat_) -#endif + #define QS_CRIT_EXIT_() QS_CRIT_EXIT(critStat_); QS_REC_DONE() +#endif /* QS_CRIT_STAT_TYPE */ #else /* separate QS critical section not defined--use the QF definition */ @@ -586,16 +613,15 @@ QSTimeCtr QS_onGetTime(void); * Otherwise #QF_CRIT_EXIT is invoked with a dummy parameter. * @sa #QF_CRIT_EXIT */ - #define QS_CRIT_EXIT_() QF_CRIT_EXIT(dummy) + #define QS_CRIT_EXIT_() QF_CRIT_EXIT(dummy); QS_REC_DONE() -#else +#else /* simple unconditional interrupt disabling used */ #define QS_CRIT_STAT_ QF_CRIT_STAT_TYPE critStat_; #define QS_CRIT_ENTRY_() QF_CRIT_ENTRY(critStat_) + #define QS_CRIT_EXIT_() QF_CRIT_EXIT(critStat_); QS_REC_DONE() +#endif /* simple unconditional interrupt disabling used */ - #define QS_CRIT_EXIT_() QF_CRIT_EXIT(critStat_) -#endif - -#endif /* QS_CRIT_ENTRY */ +#endif /* separate QS critical section not defined */ /*! Begin a user QS record with entering critical section. */ /** @@ -610,8 +636,8 @@ QSTimeCtr QS_onGetTime(void); if ((((uint_fast8_t)QS_priv_.glbFilter[(uint8_t)(rec_) >> 3] \ & (uint_fast8_t)((uint_fast8_t)1 << ((uint8_t)(rec_) & (uint8_t)7))) \ != (uint_fast8_t)0) \ - && ((QS_priv_.apObjFilter == (void *)0) \ - || (QS_priv_.apObjFilter == (obj_)))) \ + && ((QS_priv_.locFilter[AP_OBJ] == (void *)0) \ + || (QS_priv_.locFilter[AP_OBJ] == (obj_)))) \ { \ QS_CRIT_STAT_ \ QS_CRIT_ENTRY_(); \ @@ -910,12 +936,8 @@ enum { * @include qs_sigLog0.txt */ #define QS_SIG_DICTIONARY(sig_, obj_) do { \ - if (((QS_priv_.glbFilter[(uint8_t)QS_SIG_DICT >> 3] \ - & (uint8_t)(1U << ((uint8_t)QS_SIG_DICT & (uint8_t)7))) != (uint8_t)0))\ - { \ - static char_t const sig_name_[] = #sig_; \ - QS_sig_dict((sig_), (obj_), &sig_name_[0]); \ - } \ + static char_t const sig_name_[] = #sig_; \ + QS_sig_dict((sig_), (obj_), &sig_name_[0]); \ } while (0) /*! Output object dictionary record */ @@ -933,12 +955,8 @@ enum { * @include qs_objDic.c */ #define QS_OBJ_DICTIONARY(obj_) do { \ - if (((QS_priv_.glbFilter[(uint8_t)QS_OBJ_DICT >> 3] \ - & (uint8_t)(1U << ((uint8_t)QS_OBJ_DICT & (uint8_t)7))) != (uint8_t)0))\ - { \ - static char_t const obj_name_[] = #obj_; \ - QS_obj_dict((obj_), &obj_name_[0]); \ - } \ + static char_t const obj_name_[] = #obj_; \ + QS_obj_dict((obj_), &obj_name_[0]); \ } while (0) /*! Output function dictionary record */ @@ -955,27 +973,19 @@ enum { * dictionary. */ #define QS_FUN_DICTIONARY(fun_) do { \ - if (((QS_priv_.glbFilter[(uint8_t)QS_FUN_DICT >> 3] \ - & (uint8_t)(1U << ((uint8_t)QS_FUN_DICT & (uint8_t)7))) != (uint8_t)0))\ - { \ - static char_t const fun_name_[] = #fun_; \ - QS_fun_dict((void (*)(void))(fun_), &fun_name_[0]); \ - } \ + static char_t const fun_name_[] = #fun_; \ + QS_fun_dict((void (*)(void))(fun_), &fun_name_[0]); \ } while (0) -/*! Output user QS rectord dictionary record */ +/*! Output user QS-record dictionary record */ /** * @description -* A user QS record dictionary record associates the numerical value of a +* A user QS-record dictionary record associates the numerical value of a * user record with the human-readable identifier. */ #define QS_USR_DICTIONARY(rec_) do { \ - if (((QS_priv_.glbFilter[(uint8_t)QS_USR_DICT >> 3] \ - & (uint8_t)(1U << ((uint8_t)QS_USR_DICT & (uint8_t)7))) != (uint8_t)0))\ - { \ - static char_t const usr_name_[] = #rec_; \ - QS_usr_dict((rec_), &usr_name_[0]); \ - } \ + static char_t const usr_name_[] = #rec_; \ + QS_usr_dict((rec_), &usr_name_[0]); \ } while (0) /*! Output the assertion failure trace record */ @@ -1042,16 +1052,21 @@ enum { /* QS private data (the transmit channel) */ typedef uint_fast16_t QSCtr; /*!< QS ring buffer counter and offset type */ +/*! Kinds of objects used in QS. */ +enum QSpyObjKind { + SM_OBJ, /*!< state machine object for QEP */ + AO_OBJ, /*!< active object */ + MP_OBJ, /*!< event pool object */ + EQ_OBJ, /*!< raw queue object */ + TE_OBJ, /*!< time event object */ + AP_OBJ, /*!< generic Application-specific object */ + MAX_OBJ +}; + /*! Private QS data to keep track of the filters and the trace buffer. */ typedef struct { - uint8_t glbFilter[16]; /*!< global on/off QS filter */ - void const *smObjFilter; /*!< state machine for QEP local filter */ - void const *aoObjFilter; /*!< active object for QF local filter */ - void const *mpObjFilter; /*!< event pool for QF local filter */ - void const *eqObjFilter; /*!< raw queue for QF local filter */ - void const *teObjFilter; /*!< time event for QF local filter */ - void const *apObjFilter; /*!< generic object Application local filter */ - + uint8_t glbFilter[16]; /*!< global on/off QS filter */ + void const *locFilter[MAX_OBJ]; /*!< local QS filters */ uint8_t *buf; /*!< pointer to the start of the ring buffer */ QSCtr end; /*!< offset of the end of the ring buffer */ QSCtr head; /*!< offset to where next byte will be inserted */ @@ -1078,20 +1093,20 @@ enum QSpyRxRecords { QS_RX_INFO, /*!< query Target info (ver, config, tstamp) */ QS_RX_COMMAND, /*!< execute a user-defined command in the Target */ QS_RX_RESET, /*!< reset the Target */ - QS_RX_TICK, /*!< call QF_tick() */ + QS_RX_TICK, /*!< call QF_TICK_X() in the Target */ QS_RX_PEEK, /*!< peek Target memory */ QS_RX_POKE, /*!< poke Target memory */ - QS_RX_RESERVED7, /*!< reserved for future use */ - QS_RX_RESERVED6, /*!< reserved for future use */ - QS_RX_RESERVED5, /*!< reserved for future use */ - QS_RX_RESERVED4, /*!< reserved for future use */ + QS_RX_FILL, /*!< fill Target memory */ + QS_RX_TEST_SETUP, /*!< test setup */ + QS_RX_TEST_TEARDOWN, /*!< test teardown */ + QS_RX_TEST_PROBE, /*!< set a Test-Probe in the Target */ QS_RX_GLB_FILTER, /*!< set global filters in the Target */ QS_RX_LOC_FILTER, /*!< set local filters in the Target */ QS_RX_AO_FILTER, /*!< set local AO filter in the Target */ - QS_RX_RESERVED3, /*!< reserved for future use */ - QS_RX_RESERVED2, /*!< reserved for future use */ + QS_RX_CURR_OBJ, /*!< set the "current-object" in the Target */ + QS_RX_TEST_CONTINUE, /*!< continue a test after QS_TEST_PAUSE() */ QS_RX_RESERVED1, /*!< reserved for future use */ - QS_RX_EVENT /*!< inject an event to the Target (post/publish) */ + QS_RX_EVENT /*!< inject an event to the Target */ }; /*! Initialize the QS RX data buffer. */ @@ -1100,12 +1115,14 @@ void QS_rxInitBuf(uint8_t sto[], uint16_t stoSize); /*! Parse all bytes present in the QS RX data buffer */ void QS_rxParse(void); -/*! Private QS-RX data to keep track of the lock-free buffer. */ +/*! Private QS-RX data to keep track of the lock-free buffer */ typedef struct { - uint8_t *buf; /*!< pointer to the start of the ring buffer */ - QSCtr end; /*!< offset of the end of the ring buffer */ - QSCtr head; /*!< offset to where next byte will be inserted */ - QSCtr tail; /*!< offset of where next byte will be extracted */ + void *currObj[MAX_OBJ]; /*!< current objects */ + uint8_t *buf; /*!< pointer to the start of the ring buffer */ + QSCtr end; /*!< offset of the end of the ring buffer */ + QSCtr head; /*!< offset to where next byte will be inserted */ + QSCtr tail; /*!< offset of where next byte will be extracted */ + bool inTestLoop; /*!< QUTest event loop is running */ } QSrxPriv; extern QSrxPriv QS_rxPriv_; @@ -1129,12 +1146,54 @@ extern QSrxPriv QS_rxPriv_; /*! Obtain the number of free bytes in the QS RX data buffer */ uint16_t QS_rxGetNfree(void); -/*! callback function to reset the target (to be implemented in the BSP) */ +/*! callback function to reset the Target (to be implemented in the BSP) */ void QS_onReset(void); /*! callback function to execute user commands (to be implemented in BSP) */ -void QS_onCommand(uint8_t cmdId, uint32_t param); +void QS_onCommand(uint8_t cmdId, uint32_t param1, + uint32_t param2, uint32_t param3); + +#ifdef Q_UTEST + /*! callback to setup a unit test inside the Target */ + void QS_onTestSetup(void); + + /*! callback to teardown after a unit test inside the Target */ + void QS_onTestTeardown(void); + + /*! callback to run the test loop */ + void QS_onTestLoop(void); + + /*! callback to "massage" the test event, if neccessary */ + void QS_onTestEvt(QEvt *e); + + /*! QS internal function to get the Test-Probe for a given API */ + uint32_t QS_getTestProbe_(void (* const api)(void)); + + /*! QS macro to define the Test-Probe for a given @p fun_ */ + #define QS_TEST_PROBE_DEF(fun_) \ + uint32_t const qs_tp_ = QS_getTestProbe_((void (*)(void))(fun_)); + + /*! QS macro to apply a Test-Probe */ + #define QS_TEST_PROBE(code_) \ + if (qs_tp_ != (uint32_t)0) { code_ } + + /*! QS macro to apply a Test-Probe */ + #define QS_TEST_PROBE_ID(id_, code_) \ + if (qs_tp_ == (uint32_t)(id_)) { code_ } + + /*! QS macro to pause test execution and enter the test event loop */ + #define QS_TEST_PAUSE() do { \ + QS_beginRec((uint_fast8_t)QS_TEST_PAUSED); \ + QS_endRec(); \ + QS_onTestLoop(); \ + } while (0) + +#else + /* dummy definitions when not building for QUTEST */ + #define QS_TEST_PROBE_DEF(fun_) + #define QS_TEST_PROBE(code_) + #define QS_TEST_PROBE_ID(id_, code_) + #define QS_TEST_PAUSE() ((void)0) +#endif /* Q_UTEST */ #endif /* qs_h */ - - diff --git a/include/qs_dummy.h b/include/qs_dummy.h index ea41499b..8a8f1093 100644 --- a/include/qs_dummy.h +++ b/include/qs_dummy.h @@ -2,17 +2,17 @@ * @file * @brief Dummy definitions of the QS macros that avoid code generation from * the QS instrumentation. -* @ingroup qs +* @ingroup qs qpspy * @cond ****************************************************************************** -* Last updated for version 5.6.0 -* Last updated on 2015-12-18 +* Last updated for version 5.9.0 +* Last updated on 2017-05-16 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -33,7 +33,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -88,6 +88,11 @@ #define QS_ASSERTION(module_, loc_, delay_) ((void)0) #define QS_FLUSH() ((void)0) +#define QS_TEST_PROBE_DEF(fun_) +#define QS_TEST_PROBE(code_) +#define QS_TEST_PROBE_ID(id_, code_) +#define QS_TEST_PAUSE() ((void)0) + /****************************************************************************/ /* internal QS macros used only in the QP components */ #define QS_CRIT_STAT_ diff --git a/include/qstamp.c b/include/qstamp.c index a0eaa4df..aeb14f7d 100644 --- a/include/qstamp.c +++ b/include/qstamp.c @@ -37,7 +37,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/qv.h b/include/qv.h index c07def5e..c5660103 100644 --- a/include/qv.h +++ b/include/qv.h @@ -33,7 +33,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/qxk.h b/include/qxk.h index 2774dafa..37638ce6 100644 --- a/include/qxk.h +++ b/include/qxk.h @@ -33,7 +33,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/qxthread.h b/include/qxthread.h index 2b8dcff4..617177c7 100644 --- a/include/qxthread.h +++ b/include/qxthread.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/include/std.lnt b/include/std.lnt index e5ee9370..a1d84ee1 100644 --- a/include/std.lnt +++ b/include/std.lnt @@ -1,53 +1,53 @@ -//============================================================================ -// Product: PC-Lint 9.x standard option file -// Last Updated for Version: 5.7.1 -// Date of the Last Update: 2016-09-18 -// -// Q u a n t u m L e a P s -// --------------------------- -// innovating embedded systems -// -// Copyright (C) Quantum Leaps. All rights reserved. -// -// This program is free software: you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// Alternatively, this program may be distributed and modified under the -// terms of Quantum Leaps commercial licenses, which expressly supersede -// the GNU General Public License and are specifically designed for -// licensees interested in retaining the proprietary status of their code. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// -// Contact information: -// Web: http://www.state-machine.com -// Email: info@state-machine.com -//============================================================================ - -// output: a single line, file info always, use full path names --hF1 -+ffn --"format=%(\q%f\q %l %C%) %t %n: %m" - --width(0,0) // do not break lines -+flm // make sure no foreign includes change the format - --D__STDC_VERSION__=199409L // C89 Standard last ammended 1994-04 -//-D__STDC_VERSION__=199901L // C99 Standard 1999-01 -+rw(inline, entry) - --zero(99) // don't stop make because of warnings - --passes(2) // make two passes (for better error messages) - --restore_at_end // don't let -e options bleed to other files - --summary() // produce a summary of all produced messages +//============================================================================ +// Product: PC-Lint 9.x standard option file +// Last Updated for Version: 5.7.1 +// Date of the Last Update: 2016-09-18 +// +// Q u a n t u m L e a P s +// --------------------------- +// innovating embedded systems +// +// Copyright (C) Quantum Leaps. All rights reserved. +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// Web: http://www.state-machine.com +// Email: info@state-machine.com +//============================================================================ + +// output: a single line, file info always, use full path names +-hF1 ++ffn +-"format=%(\q%f\q %l %C%) %t %n: %m" + +-width(0,0) // do not break lines ++flm // make sure no foreign includes change the format + +-D__STDC_VERSION__=199409L // C89 Standard last ammended 1994-04 +//-D__STDC_VERSION__=199901L // C99 Standard 1999-01 ++rw(inline, entry) + +-zero(99) // don't stop make because of warnings + +-passes(2) // make two passes (for better error messages) + +-restore_at_end // don't let -e options bleed to other files + +-summary() // produce a summary of all produced messages diff --git a/ports/arm-cm/README.url b/ports/arm-cm/README.url index 2091029f..2ef304da 100644 --- a/ports/arm-cm/README.url +++ b/ports/arm-cm/README.url @@ -1,4 +1,4 @@ [InternetShortcut] -URL=http://www.state-machine.com/qpc/arm-cm.html -IconFile=http://www.state-machine.com/qp.ico +URL=https://state-machine.com/qpc/arm-cm.html +IconFile=https://state-machine.com/qp.ico diff --git a/ports/arm-cm/qk/arm/qf_port.h b/ports/arm-cm/qk/arm/qf_port.h index 76f5cb2e..a61c79e7 100644 --- a/ports/arm-cm/qk/arm/qf_port.h +++ b/ports/arm-cm/qk/arm/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, preemptive QK kernel, ARM-KEIL toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -52,41 +52,76 @@ #define QF_INT_DISABLE() __disable_irq() #define QF_INT_ENABLE() __enable_irq() - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(primask_) do { \ + (primask_) = QF_get_PRIMASK(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) QF_set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* inline function for getting the PRIMASK register */ + static __inline unsigned QF_get_PRIMASK(void) { + register unsigned __regPriMask __asm("primask"); + return __regPriMask; + } + + /* inline function for setting the PRIMASK register */ + static __inline void QF_set_PRIMASK(unsigned primask) { + register unsigned __regPriMask __asm("primask"); + __regPriMask = primask; + } + #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_set_BASEPRI(QF_BASEPRI) - #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __disable_irq() + #define QF_PRIMASK_ENABLE() __enable_irq() + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(basepri_) do {\ + (basepri_) = QF_get_BASEPRI(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) QF_set_BASEPRI((basepri_)) /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. * CAUTION: keep in synch with the value defined in "qk_port.s" */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __clz(n_))) + /* inline function for getting the BASEPRI register */ + static __inline unsigned QF_get_BASEPRI(void) { + register unsigned volatile __regBasePri __asm("basepri"); + return __regBasePri; + } + /* inline function for setting the BASEPRI register */ static __inline void QF_set_BASEPRI(unsigned basePri) { register unsigned volatile __regBasePri __asm("basepri"); __regBasePri = basePri; } - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __disable_irq() - #define QF_PRIMASK_ENABLE() __enable_irq() #endif -/* QF critical section entry/exit */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm("isb") #include "qep_port.h" /* QEP port */ @@ -117,6 +152,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qk/arm/qk_port.h b/ports/arm-cm/qk/arm/qk_port.h index c161ceaf..2fafd8ae 100644 --- a/ports/arm-cm/qk/arm/qk_port.h +++ b/ports/arm-cm/qk/arm/qk_port.h @@ -3,8 +3,8 @@ * @brief QK/C port to ARM Cortex-M, ARM-KEIL toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -54,7 +54,7 @@ static __inline uint32_t QK_get_IPSR(void) { #define QK_ISR_EXIT() do { \ QF_INT_DISABLE(); \ if (QK_sched_() != (uint_fast8_t)0) { \ - (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)); \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ } \ QF_INT_ENABLE(); \ } while (0) diff --git a/ports/arm-cm/qk/arm/qk_port.s b/ports/arm-cm/qk/arm/qk_port.s index d4b8c514..957b7613 100644 --- a/ports/arm-cm/qk/arm/qk_port.s +++ b/ports/arm-cm/qk/arm/qk_port.s @@ -1,7 +1,7 @@ ;***************************************************************************** ; Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), ARM-KEIL assembler -; Last Updated for Version: 5.8.1 -; Date of the Last Update: 2016-12-12 +; Last Updated for Version: 5.9.0 +; Date of the Last Update: 2017-03-17 ; ; Q u a n t u m L e a P s ; --------------------------- @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;***************************************************************************** @@ -60,18 +60,18 @@ QK_init FUNCTION IF {TARGET_ARCH_THUMB} == 3 ; Cortex-M0/M0+/M1 (v6-M, v6S-M)? - LDR r1,=0xE000ED18 ; System Handler Priority Register - LDR r2,[r1,#8] ; load the System 12-15 Priority Register - MOVS r3,#0xFF - LSLS r3,r3,#16 - ORRS r2,r3 ; set PRI_14 (PendSV) to 0xFF - STR r2,[r1,#8] ; write the System 12-15 Priority Register + LDR r3,=0xE000ED18 ; System Handler Priority Register + LDR r2,[r3,#8] ; r2 := SYSPRI3 + MOVS r1,#0xFF + LSLS r1,r1,#16 + ORRS r2,r1 + STR r2,[r3,#8] ; SYSPRI3 := r2, PendSV <- 0xFF ELSE ; Cortex-M3/M4/.. ; NOTE: - ; On Cortex-M3/M4/.., this QK port disables interrupts by means of the - ; BASEPRI register. However, this method cannot disable interrupt + ; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of + ; the BASEPRI register. However, this method cannot disable interrupt ; priority zero, which is the default for all interrupts out of reset. ; The following code changes the SysTick priority and all IRQ priorities ; to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -166,7 +166,9 @@ PendSV_Handler FUNCTION PUSH {r0,lr} ; ... push lr (EXC_RETURN) plus stack-aligner ENDIF ; VFP available MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 ; selectively disable interrupts + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r0 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. ENDIF ; M3/M4/M7 ; The PendSV exception handler can be preempted by an interrupt, @@ -205,8 +207,8 @@ PendSV_Handler FUNCTION ;***************************************************************************** Thread_ret FUNCTION ; After the QK activator returns, we need to resume the preempted - ; task. However, this must be accomplished by a return-from-exception, - ; while we are still in the task context. The switch to the exception + ; thread. However, this must be accomplished by a return-from-exception, + ; while we are still in the thread context. The switch to the exception ; contex is accomplished by triggering the NMI exception. ; NOTE: The NMI exception is triggered with nterrupts DISABLED, ; because QK activator disables interrutps before return. @@ -217,12 +219,14 @@ Thread_ret FUNCTION MRS r0,CONTROL ; r0 := CONTROL BICS r0,r0,#4 ; r0 := r0 & ~4 (FPCA bit) MSR CONTROL,r0 ; CONTROL := r0 (clear CONTROL[2] FPCA bit) + ISB ; ISB after MSR CONTROL (ARM AN 321, Sect.4.16) ENDIF ; VFP available ; trigger NMI to return to preempted task... + ; NOTE: The NMI exception is triggered with nterrupts DISABLED LDR r0,=0xE000ED04 ; Interrupt Control and State Register MOVS r1,#1 - LSLS r1,r1,#31 ; r0 := (1 << 31) (NMI bit) + LSLS r1,r1,#31 ; r1 := (1 << 31) (NMI bit) STR r1,[r0] ; ICSR[31] := 1 (pend NMI) B . ; wait for preemption by NMI ENDFUNC diff --git a/ports/arm-cm/qk/arm/qs_port.h b/ports/arm-cm/qk/arm/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qk/arm/qs_port.h +++ b/ports/arm-cm/qk/arm/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qk/gnu/qf_port.h b/ports/arm-cm/qk/gnu/qf_port.h index 7b0828ef..99304126 100644 --- a/ports/arm-cm/qk/gnu/qf_port.h +++ b/ports/arm-cm/qk/gnu/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, preemptive QK kernel, GNU-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -46,46 +46,73 @@ #define QF_MAX_TICK_RATE 2 /* QF interrupt disable/enable and log2()... */ -#if (__ARM_ARCH == 6) /* Cortex-M0/M0+/M1? */ +#if (__ARM_ARCH == 6) /* Cortex-M0/M0+/M1(v6-M, v6S-M)? */ /* Cortex-M0/M0+/M1(v6-M, v6S-M) interrupt disabling policy, see NOTE2 */ #define QF_INT_DISABLE() __asm volatile ("cpsid i") #define QF_INT_ENABLE() __asm volatile ("cpsie i") - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE uint32_t + #define QF_CRIT_ENTRY(primask_) do { \ + QF_GET_PRIMASK((primask_)); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) QF_SET_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* macro for getting the PRIMASK register */ + #define QF_GET_PRIMASK(primask_) __asm volatile (\ + "mrs %0,PRIMASK" : "=r" (primask_) :: ) + + /* macro for setting the PRIMASK register */ + #define QF_SET_PRIMASK(primask_) __asm volatile (\ + "msr PRIMASK,%0" :: "r" (primask_) : ) + #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_SET_BASEPRI(QF_BASEPRI) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __asm volatile ("cpsid i") + #define QF_PRIMASK_ENABLE() __asm volatile ("cpsie i") + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_SET_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) #define QF_INT_ENABLE() QF_SET_BASEPRI(0U) + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(basepri_) do {\ + QF_GET_BASEPRI((basepri_)); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) QF_SET_BASEPRI((basepri_)) + /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. * CAUTION: keep in synch with the value defined in "qk_port.s" */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __builtin_clz(n_))) - /* macro for setting the BASEPRI register */ - #define QF_SET_BASEPRI(val_) __asm volatile (\ - "movs r0,%0 \n\t" \ - "msr BASEPRI,r0" :: "I" (val_) : "cc", "r0") + /* macro for getting the BASEPRI register */ + #define QF_GET_BASEPRI(basepri_) __asm volatile (\ + "mrs %0,BASEPRI" : "=r" (basepri_) :: ) - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __asm volatile ("cpsid i") - #define QF_PRIMASK_ENABLE() __asm volatile ("cpsie i") + /* macro for setting the BASEPRI register */ + #define QF_SET_BASEPRI(basepri_) __asm volatile (\ + "msr BASEPRI,%0" :: "r" (basepri_) : ) #endif -/* QF critical section entry/exit */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling" policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm volatile ("isb") #include "qep_port.h" /* QEP port */ @@ -116,6 +143,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qk/gnu/qk_port.h b/ports/arm-cm/qk/gnu/qk_port.h index 0fc03af8..82089f98 100644 --- a/ports/arm-cm/qk/gnu/qk_port.h +++ b/ports/arm-cm/qk/gnu/qk_port.h @@ -3,8 +3,8 @@ * @brief QK/C port to ARM Cortex-M, GNU-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -42,6 +42,7 @@ /* determination if the code executes in the ISR context */ #define QK_ISR_CONTEXT_() (QK_get_IPSR() != (uint32_t)0) + __attribute__((always_inline)) static inline uint32_t QK_get_IPSR(void) { uint32_t regIPSR; @@ -55,7 +56,7 @@ static inline uint32_t QK_get_IPSR(void) { #define QK_ISR_EXIT() do { \ QF_INT_DISABLE(); \ if (QK_sched_() != (uint_fast8_t)0) { \ - (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)); \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ } \ QF_INT_ENABLE(); \ } while (0) diff --git a/ports/arm-cm/qk/gnu/qk_port.s b/ports/arm-cm/qk/gnu/qk_port.s index d9381cfb..8a626008 100644 --- a/ports/arm-cm/qk/gnu/qk_port.s +++ b/ports/arm-cm/qk/gnu/qk_port.s @@ -1,7 +1,7 @@ /***************************************************************************** * Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), GNU-ARM assembler -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-12 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ @@ -57,15 +57,15 @@ QK_init: LDR r3,=0xE000ED18 /* System Handler Priority Register */ LDR r2,[r3,#8] /* r2 := SYSPRI3 */ - MOVS r0,#0xFF - LSLS r0,r0,#16 + MOVS r1,#0xFF + LSLS r1,r1,#16 ORRS r2,r1 STR r2,[r3,#8] /* SYSPRI3 := r2, PendSV <- 0xFF */ .else /* M3/M4/M7 */ /* NOTE: - * On Cortex-M3/M4/.., this QK port disables interrupts by means of the - * BASEPRI register. However, this method cannot disable interrupt + * On Cortex-M3/M4/M7.., this QK port disables interrupts by means of + * the BASEPRI register. However, this method cannot disable interrupt * priority zero, which is the default for all interrupts out of reset. * The following code changes the SysTick priority and all IRQ priorities * to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -166,7 +166,9 @@ PendSV_Handler: PUSH {r0,lr} /* ... push EXC_RETURN plus stack-aligner */ .endif /* VFP */ MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 /* selectively disable interrupts */ + CPSID i /* selectively disable interrutps with BASEPRI */ + MSR BASEPRI,r0 /* apply the workaround the Cortex-M7 erraturm */ + CPSIE i /* 837070, see ARM-EPM-064408. */ .endif /* M3/M4/M7 */ /* The PendSV exception handler can be preempted by an interrupt, @@ -211,27 +213,27 @@ PendSV_Handler: Thread_ret: /* After the QK activator returns, we need to resume the preempted - * task. However, this must be accomplished by a return-from-exception, - * while we are still in the task context. The switch to the exception + * thread. However, this must be accomplished by a return-from-exception, + * while we are still in the thread context. The switch to the exception * contex is accomplished by triggering the NMI exception. - * NOTE: The NMI exception is triggered with nterrupts DISABLED, - * because QK activator disables interrutps before return. */ - /* before triggering the PendSV exception, make sure that the + /* before triggering the NMI exception, make sure that the * VFP stack frame will NOT be used... */ .ifdef __FPU_PRESENT /* if VFP available... */ MRS r0,CONTROL /* r0 := CONTROL */ BICS r0,r0,#4 /* r0 := r0 & ~4 (FPCA bit) */ MSR CONTROL,r0 /* CONTROL := r0 (clear CONTROL[2] FPCA bit) */ + ISB /* ISB after MSR CONTROL (ARM AN321,Sect.4.16)*/ .endif /* VFP available */ - - /* trigger NMI to return to preempted task... */ + /* trigger NMI to return to preempted task... + * NOTE: The NMI exception is triggered with nterrupts DISABLED + */ LDR r0,=0xE000ED04 /* Interrupt Control and State Register */ MOVS r1,#1 - LSLS r1,r1,#31 /* r0 := (1 << 31) (NMI bit) */ + LSLS r1,r1,#31 /* r1 := (1 << 31) (NMI bit) */ STR r1,[r0] /* ICSR[31] := 1 (pend NMI) */ B . /* wait for preemption by NMI */ .size Thread_ret, . - Thread_ret @@ -261,7 +263,7 @@ NMI_Handler: MSR BASEPRI,r0 /* enable interrupts (clear BASEPRI) */ .ifdef __FPU_PRESENT /* if VFP available... */ POP {r0,pc} /* pop stack "aligner" and EXC_RETURN to PC */ - .else + .else /* no VFP */ BX lr /* return to the preempted task */ .endif /* VFP available */ .endif /* M3/M4/M7 */ diff --git a/ports/arm-cm/qk/gnu/qs_port.h b/ports/arm-cm/qk/gnu/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qk/gnu/qs_port.h +++ b/ports/arm-cm/qk/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qk/iar/qf_port.h b/ports/arm-cm/qk/iar/qf_port.h index aba655f0..85278a6f 100644 --- a/ports/arm-cm/qk/iar/qf_port.h +++ b/ports/arm-cm/qk/iar/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, preemptive QK kernel, IAR-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -46,41 +46,58 @@ #define QF_MAX_TICK_RATE 2 /* QF interrupt disable/enable and log2()... */ -#if (__CORE__ == __ARM6M__) /* Cortex-M0/M0+/M1? */ +#if (__CORE__ == __ARM6M__) /* Cortex-M0/M0+/M1(v6-M, v6S-M)? */ /* Cortex-M0/M0+/M1(v6-M, v6S-M) interrupt disabling policy, see NOTE2 */ #define QF_INT_DISABLE() __disable_interrupt() #define QF_INT_ENABLE() __enable_interrupt() - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(primask_) do { \ + (primask_) = __get_PRIMASK(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) __set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M4F interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() __set_BASEPRI(QF_BASEPRI) - #define QF_INT_ENABLE() __set_BASEPRI(0U) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __disable_interrupt() + #define QF_PRIMASK_ENABLE() __enable_interrupt() + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + __set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() __set_BASEPRI(0U) + + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(basepri_) do {\ + (basepri_) = __get_BASEPRI(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) __set_BASEPRI((basepri_)) /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. * CAUTION: keep in synch with the value defined in "qk_port.s" */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __CLZ(n_))) - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __disable_interrupt() - #define QF_PRIMASK_ENABLE() __enable_interrupt() #endif -/* QF critical section entry/exit... */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling" policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __ISB() #include /* IAR intrinsic functions */ @@ -112,6 +129,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qk/iar/qk_port.h b/ports/arm-cm/qk/iar/qk_port.h index 212cdc5a..b84bd773 100644 --- a/ports/arm-cm/qk/iar/qk_port.h +++ b/ports/arm-cm/qk/iar/qk_port.h @@ -3,8 +3,8 @@ * @brief QK/C port to ARM Cortex-M, IAR-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -48,7 +48,7 @@ #define QK_ISR_EXIT() do { \ QF_INT_DISABLE(); \ if (QK_sched_() != (uint_fast8_t)0) { \ - (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)); \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ } \ QF_INT_ENABLE(); \ } while (0) diff --git a/ports/arm-cm/qk/iar/qk_port.s b/ports/arm-cm/qk/iar/qk_port.s index 1b986b88..18844d3e 100644 --- a/ports/arm-cm/qk/iar/qk_port.s +++ b/ports/arm-cm/qk/iar/qk_port.s @@ -1,7 +1,7 @@ ;***************************************************************************** ; Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), IAR-ARM assembler -; Last Updated for Version: 5.8.1 -; Date of the Last Update: 2016-12-12 +; Last Updated for Version: 5.9.0 +; Date of the Last Update: 2017-03-17 ; ; Q u a n t u m L e a P s ; --------------------------- @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;***************************************************************************** @@ -62,15 +62,15 @@ QK_init: LDR r3,=0xE000ED18 ; System Handler Priority Register LDR r2,[r3,#8] ; r2 := SYSPRI3 - MOVS r0,#0xFF - LSLS r0,r0,#16 + MOVS r1,#0xFF + LSLS r1,r1,#16 ORRS r2,r1 STR r2,[r3,#8] ; SYSPRI3 := r2, PendSV <- 0xFF #else ; Cortex-M3/M4/.. ; NOTE: - ; On Cortex-M3/M4/.., this QK port disables interrupts by means of the - ; BASEPRI register. However, this method cannot disable interrupt + ; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of + ; the BASEPRI register. However, this method cannot disable interrupt ; priority zero, which is the default for all interrupts out of reset. ; The following code changes the SysTick priority and all IRQ priorities ; to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -159,12 +159,14 @@ PendSV_Handler: ; <<<<<<<<<<<<<<<<<<<<<<< CRITICAL SECTION BEGIN <<<<<<<<<<<<<<<<<<<<<<<<< #if (__CORE__ == __ARM6M__) ; Cortex-M0/M0+/M1 ? CPSID i ; disable interrupts (set PRIMASK) -#else ; M3/M4/M7 +#else ; M3/M4/M7 #ifdef __ARMVFP__ ; if VFP available... PUSH {r0,lr} ; ... push lr (EXC_RETURN) plus stack-aligner #endif ; VFP available MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 ; selectively disable interrupts + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r0 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. #endif ; M3/M4/M7 ; The PendSV exception handler can be preempted by an interrupt, @@ -203,8 +205,8 @@ PendSV_Handler: REQUIRE Thread_ret ; forces (THUMB) symbol to be referenced Thread_ret: ; After the QK activator returns, we need to resume the preempted - ; task. However, this must be accomplished by a return-from-exception, - ; while we are still in the task context. The switch to the exception + ; thread. However, this must be accomplished by a return-from-exception, + ; while we are still in the thread context. The switch to the exception ; contex is accomplished by triggering the NMI exception. ; NOTE: The NMI exception is triggered with nterrupts DISABLED, ; because QK activator disables interrutps before return. @@ -215,6 +217,7 @@ Thread_ret: MRS r0,CONTROL ; r0 := CONTROL BICS r0,r0,#4 ; r0 := r0 & ~4 (FPCA bit) MSR CONTROL,r0 ; CONTROL := r0 (clear CONTROL[2] FPCA bit) + ISB ; ISB after MSR CONTROL (ARM AN 321, Sect.4.16) #endif ; VFP available ; trigger NMI to return to preempted task... diff --git a/ports/arm-cm/qk/iar/qs_port.h b/ports/arm-cm/qk/iar/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qk/iar/qs_port.h +++ b/ports/arm-cm/qk/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qk/ti/qf_port.h b/ports/arm-cm/qk/ti/qf_port.h index 8d5bc19e..65c28ce2 100644 --- a/ports/arm-cm/qk/ti/qf_port.h +++ b/ports/arm-cm/qk/ti/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, preemptive QK kernel, TI-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -50,26 +50,37 @@ || (defined __TI_TMS470_V7M4__) \ || (defined __TI_TMS470_V7M7__) - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_set_BASEPRI(QF_BASEPRI) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __asm(" CPSID I") + #define QF_PRIMASK_ENABLE() __asm(" CPSIE I") + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(basepri_) ((basepri_) = QF_crit_entry()) + #define QF_CRIT_EXIT(basepri_) QF_set_BASEPRI((basepri_)) + /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. * CAUTION: keep in synch with the value defined in "qk_port.s" */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __clz(n_))) - void QF_set_BASEPRI(unsigned basePri); - - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __asm(" CPSID I") - #define QF_PRIMASK_ENABLE() __asm(" CPSIE I") + /* assembly functions for critical section implementatin */ + unsigned QF_crit_entry(void); + void QF_set_BASEPRI(unsigned basepri); /* not M3/M4/M7, assuming no BASEPRI register or CLZ instruction */ #else @@ -78,15 +89,19 @@ #define QF_INT_DISABLE() __asm(" CPSID I") #define QF_INT_ENABLE() __asm(" CPSIE I") - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(primask_) ((primask_) = QF_crit_entry()) + #define QF_CRIT_EXIT(primask_) __set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* assembly functions for critical section implementatin */ + unsigned QF_crit_entry(void); + #endif /* not M3/M4/M7 */ -/* QF critical section entry/exit */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm(" ISB") #include "qep_port.h" /* QEP port */ @@ -117,6 +132,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qk/ti/qk_port.h b/ports/arm-cm/qk/ti/qk_port.h index 57f967c1..c009efef 100644 --- a/ports/arm-cm/qk/ti/qk_port.h +++ b/ports/arm-cm/qk/ti/qk_port.h @@ -3,8 +3,8 @@ * @brief QK/C port to Cortex-M, TI-ARM (CCS) toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -48,7 +48,7 @@ #define QK_ISR_EXIT() do { \ QF_INT_DISABLE(); \ if (QK_sched_() != (uint_fast8_t)0) { \ - (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)); \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ } \ QF_INT_ENABLE(); \ } while (0) diff --git a/ports/arm-cm/qk/ti/qk_port.s b/ports/arm-cm/qk/ti/qk_port.s index a4a98871..2289b45c 100644 --- a/ports/arm-cm/qk/ti/qk_port.s +++ b/ports/arm-cm/qk/ti/qk_port.s @@ -1,7 +1,7 @@ ;***************************************************************************** ; Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), TI-ARM assembler -; Last Updated for Version: 5.8.1 -; Date of the Last Update: 2016-12-12 +; Last Updated for Version: 5.9.0 +; Date of the Last Update: 2017-03-17 ; ; Q u a n t u m L e a P s ; --------------------------- @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;***************************************************************************** @@ -39,6 +39,8 @@ .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ .global QF_set_BASEPRI ; set BASEPRI register .endif ; M3/M4/M7 + + .global QF_crit_entry ; enter critical section .global QK_get_IPSR ; get the IPSR .global assert_failed ; low-level assert handler @@ -66,8 +68,8 @@ QK_init: .asmfunc .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ ; M3/4/7? ; NOTE: - ; On Cortex-M3/M4/.., this QK port disables interrupts by means of the - ; BASEPRI register. However, this method cannot disable interrupt + ; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of + ; the BASEPRI register. However, this method cannot disable interrupt ; priority zero, which is the default for all interrupts out of reset. ; The following code changes the SysTick priority and all IRQ priorities ; to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -124,8 +126,8 @@ QK_init_irq: LDR r3,=0xE000ED18 ; System Handler Priority Register LDR r2,[r3,#8] ; r2 := SYSPRI3 - MOVS r0,#0xFF - LSLS r0,r0,#16 + MOVS r1,#0xFF + LSLS r1,r1,#16 ORRS r2,r1 STR r2,[r3,#8] ; SYSPRI3 := r2, PendSV <- 0xFF @@ -169,7 +171,9 @@ PendSV_Handler: .asmfunc PUSH {r0,lr} ; ... push lr (EXC_RETURN) plus stack-aligner .endif ; VFP available MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 ; selectively disable interrupts + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r0 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. .else ; Cortex-M0/M0+/M1 ? CPSID i ; disable interrupts (set PRIMASK) .endif ; M0/M0+/M1 @@ -210,8 +214,8 @@ PendSV_Handler: .asmfunc ;***************************************************************************** Thread_ret: .asmfunc ; to ensure that the label is THUMB ; After the QK activator returns, we need to resume the preempted - ; task. However, this must be accomplished by a return-from-exception, - ; while we are still in the task context. The switch to the exception + ; thread. However, this must be accomplished by a return-from-exception, + ; while we are still in the thread context. The switch to the exception ; contex is accomplished by triggering the NMI exception. ; NOTE: The NMI exception is triggered with nterrupts DISABLED, ; because QK activator disables interrutps before return. @@ -222,9 +226,11 @@ Thread_ret: .asmfunc ; to ensure that the label is THUMB MRS r0,CONTROL ; r0 := CONTROL BICS r0,r0,#4 ; r0 := r0 & ~4 (FPCA bit) MSR CONTROL,r0 ; CONTROL := r0 (clear CONTROL[2] FPCA bit) - .endif ; VFP + ISB ; ISB after MSR CONTROL (ARM AN 321, Sect.4.16) + .endif ; VFP available ; trigger NMI to return to preempted thread... + ; NOTE: The NMI exception is triggered with nterrupts DISABLED LDR r0,ICSR_addr ; Interrupt Control and State Register MOVS r1,#1 LSLS r1,r1,#31 ; r0 := (1 << 31) (NMI bit) @@ -267,15 +273,37 @@ NMI_Handler: .asmfunc ; NOTE: The BASEPRI register is implemented only in ARMv7 architecture ; and is **not** available in ARMv6 (M0/M0+/M1) ; -; C prototype: void QF_set_BASEPRI(unsigned basePri); +; C prototype: void QF_set_BASEPRI(unsigned basepri); ;***************************************************************************** .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ QF_set_BASEPRI: .asmfunc - MSR BASEPRI,r0 ; set BASEPRI + MSR BASEPRI,r0 ; BASEPRI := r0 (basepri parameter) BX lr ; return to the caller .endasmfunc .endif ; M3/M4/M7 +;***************************************************************************** +; The QF_crit_entry function enters the QF critical section +; passed in r0. +; NOTE: The BASEPRI register is implemented only in ARMv7 architecture +; and is **not** available in ARMv6 (M0/M0+/M1) +; +; C prototype: unsigned QF_crit_entry(void); +;***************************************************************************** +QF_crit_entry: .asmfunc + .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ + MRS r0,BASEPRI ; r0 := BASEPRI (to return) + MOVS r1,#QF_BASEPRI + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r1 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. + BX lr ; return to the caller (previous BASEPRI in r0) + .else ; M0/M0+ + MRS r0,PRIMASK ; r0 := PRIMASK (to return) + CPSID i ; globally disable interrutps with PRIMASK + BX lr ; return to the caller (previous PRIMASK in r0) + .endif ; M0/M0+ + .endasmfunc ;***************************************************************************** ; The QK_get_IPSR function gets the IPSR register and returns it in r0. @@ -296,6 +324,8 @@ assert_failed: .asmfunc LDR r0,[r0,#0] ; r0 := contents of VTOR LDR r0,[r0] ; r0 := VT[0] (first entry is the top of stack) MSR MSP,r0 ; main SP := initial top of stack + DSB ; DSB/ISB pair if instructions needed... + ISB ; ...after MSR MSP (ARM AN 321, Sect.4.10) BL Q_onAssert .endasmfunc diff --git a/ports/arm-cm/qk/ti/qs_port.h b/ports/arm-cm/qk/ti/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qk/ti/qs_port.h +++ b/ports/arm-cm/qk/ti/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qutest/qep_port.h b/ports/arm-cm/qutest/qep_port.h new file mode 100644 index 00000000..e2fea9e9 --- /dev/null +++ b/ports/arm-cm/qutest/qep_port.h @@ -0,0 +1,48 @@ +/** +* @file +* @brief QEP/C port, generic C99 compiler +* @ingroup ports +* @cond +****************************************************************************** +* Last Updated for Version: 5.4.0 +* Date of the Last Update: 2015-04-08 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qep_port_h +#define qep_port_h + +#include /* Exact-width types. WG14/N843 C99 Standard */ +#include /* Boolean type. WG14/N843 C99 Standard */ + +#include "qep.h" /* QEP platform-independent public interface */ + +#endif /* qep_port_h */ diff --git a/ports/arm-cm/qutest/qf_port.h b/ports/arm-cm/qutest/qf_port.h new file mode 100644 index 00000000..3b1239e3 --- /dev/null +++ b/ports/arm-cm/qutest/qf_port.h @@ -0,0 +1,103 @@ +/** +* @file +* @brief QF/C port to Cortex-M, QUTEST unit test, generic C99 compiler +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-02 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qf_port_h +#define qf_port_h + +/* QUTEST event queue and thread types */ +#define QF_EQUEUE_TYPE QEQueue +/*#define QF_OS_OBJECT_TYPE */ +/*#define QF_THREAD_TYPE */ + +/* The maximum number of active objects in the application */ +#define QF_MAX_ACTIVE 32 + +/* The number of system clock tick rates */ +#define QF_MAX_TICK_RATE 2 + +/* QF interrupt disable/enable */ +#define QF_INT_DISABLE() (++QF_intNest) +#define QF_INT_ENABLE() (--QF_intNest) + +/* QF critical section */ +/* QF_CRIT_STAT_TYPE not defined */ +#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() +#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() + +/* QF_LOG2 not defined -- use the internal LOG2() implementation */ + +#include "qep_port.h" /* QEP port */ +#include "qequeue.h" /* QUTEST port uses QEQueue event-queue */ +#include "qmpool.h" /* QUTEST port uses QMPool memory-pool */ +#include "qf.h" /* QF platform-independent public interface */ + +/* interrupt nesting up-down counter */ +extern uint8_t volatile QF_intNest; + +/****************************************************************************/ +/* interface used only inside QF implementation, but not in applications */ +#ifdef QP_IMPL + + /* QUTEST scheduler locking (not used) */ + #define QF_SCHED_STAT_ + #define QF_SCHED_LOCK_(dummy) ((void)0) + #define QF_SCHED_UNLOCK_() ((void)0) + + /* QUTEST active object event queue customization (not used) */ + #define QACTIVE_EQUEUE_WAIT_(me_) ((void)0) + #define QACTIVE_EQUEUE_SIGNAL_(me_) ((void)0) + + /* native QF event pool operations */ + #define QF_EPOOL_TYPE_ QMPool + #define QF_EPOOL_INIT_(p_, poolSto_, poolSize_, evtSize_) \ + QMPool_init(&(p_), (poolSto_), (poolSize_), (evtSize_)) + + #define QF_EPOOL_EVENT_SIZE_(p_) ((p_).blockSize) + #define QF_EPOOL_GET_(p_, e_, m_) ((e_) = (QEvt *)QMPool_get(&(p_), (m_))) + #define QF_EPOOL_PUT_(p_, e_) (QMPool_put(&(p_), e_)) + +#endif /* QP_IMPL */ + +/***************************************************************************** +* NOTE1: +* The maximum number of active objects QF_MAX_ACTIVE can be increased +* up to 64, if necessary. Here it is set to a lower level to save some RAM. +* +*/ + +#endif /* qf_port_h */ diff --git a/ports/arm-cm/qutest/qs_port.h b/ports/arm-cm/qutest/qs_port.h new file mode 100644 index 00000000..e9ceb005 --- /dev/null +++ b/ports/arm-cm/qutest/qs_port.h @@ -0,0 +1,65 @@ +/** +* @file +* @brief QS/C port to a 32-bit CPU and a generic C99 compiler. +* @ingroup qs +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-16 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qs_port_h +#define qs_port_h + +/* QS time-stamp size in bytes */ +#define QS_TIME_SIZE 4 + +/* object pointer size in bytes */ +#define QS_OBJ_PTR_SIZE 4 + +/* function pointer size in bytes */ +#define QS_FUN_PTR_SIZE 4 + +/* flush the QS output buffer after each QS record */ +#define QS_REC_DONE() QS_onFlush() + +/***************************************************************************** +* NOTE: QS might be used with or without other QP components, in which +* case the separate definitions of the macros QF_CRIT_STAT_TYPE, +* QF_CRIT_ENTRY, and QF_CRIT_EXIT are needed. In this port QS is configured +* to be used with the other QP component, by simply including "qf_port.h" +* *before* "qs.h". +*/ +#include "qf_port.h" /* use QS with QF */ +#include "qs.h" /* QS platform-independent public interface */ + +#endif /* qs_port_h */ diff --git a/ports/arm-cm/qv/arm/qf_port.h b/ports/arm-cm/qv/arm/qf_port.h index 3b803220..a7422934 100644 --- a/ports/arm-cm/qv/arm/qf_port.h +++ b/ports/arm-cm/qv/arm/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, cooperative QV kernel, ARM-KEIL toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -52,39 +52,76 @@ #define QF_INT_DISABLE() __disable_irq() #define QF_INT_ENABLE() __enable_irq() - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(primask_) do { \ + (primask_) = QF_get_PRIMASK(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) QF_set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* inline function for getting the PRIMASK register */ + static __inline unsigned QF_get_PRIMASK(void) { + register unsigned __regPriMask __asm("primask"); + return __regPriMask; + } + + /* inline function for setting the PRIMASK register */ + static __inline void QF_set_PRIMASK(unsigned primask) { + register unsigned __regPriMask __asm("primask"); + __regPriMask = primask; + } + #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_set_BASEPRI(QF_BASEPRI) - #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __disable_irq() + #define QF_PRIMASK_ENABLE() __enable_irq() - /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3 */ + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(basepri_) do {\ + (basepri_) = QF_get_BASEPRI(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) QF_set_BASEPRI((basepri_)) + + /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. + * CAUTION: keep in synch with the value defined in "qk_port.s" + */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __clz(n_))) + /* inline function for getting the BASEPRI register */ + static __inline unsigned QF_get_BASEPRI(void) { + register unsigned volatile __regBasePri __asm("basepri"); + return __regBasePri; + } + /* inline function for setting the BASEPRI register */ static __inline void QF_set_BASEPRI(unsigned basePri) { register unsigned volatile __regBasePri __asm("basepri"); __regBasePri = basePri; } - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __disable_irq() - #define QF_PRIMASK_ENABLE() __enable_irq() #endif -/* QF critical section entry/exit... */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm("isb") #include "qep_port.h" /* QEP port */ @@ -115,6 +152,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qv/arm/qs_port.h b/ports/arm-cm/qv/arm/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qv/arm/qs_port.h +++ b/ports/arm-cm/qv/arm/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qv/arm/qv_port.c b/ports/arm-cm/qv/arm/qv_port.c index 9ba94994..38cec46b 100644 --- a/ports/arm-cm/qv/arm/qv_port.c +++ b/ports/arm-cm/qv/arm/qv_port.c @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qv/arm/qv_port.h b/ports/arm-cm/qv/arm/qv_port.h index ec880dff..e04bfca8 100644 --- a/ports/arm-cm/qv/arm/qv_port.h +++ b/ports/arm-cm/qv/arm/qv_port.h @@ -3,8 +3,8 @@ * @brief QV/C port to ARM Cortex-M, ARM-KEIL toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -51,10 +51,10 @@ /* macro to put the CPU to sleep inside QV_onIdle() */ #define QV_CPU_SLEEP() do { \ - __disable_irq(); \ + QF_PRIMASK_DISABLE(); \ QF_INT_ENABLE(); \ __wfi(); \ - __enable_irq(); \ + QF_PRIMASK_ENABLE(); \ } while (0) /* initialization of the QV kernel for Cortex-M3/M4/M4F */ diff --git a/ports/arm-cm/qv/gnu/qf_port.h b/ports/arm-cm/qv/gnu/qf_port.h index 9e2eb095..d414fa71 100644 --- a/ports/arm-cm/qv/gnu/qf_port.h +++ b/ports/arm-cm/qv/gnu/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, cooperative QV kernel, GNU-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -52,38 +52,67 @@ #define QF_INT_DISABLE() __asm volatile ("cpsid i") #define QF_INT_ENABLE() __asm volatile ("cpsie i") - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE uint32_t + #define QF_CRIT_ENTRY(primask_) do { \ + QF_GET_PRIMASK((primask_)); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) QF_SET_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* macro for getting the PRIMASK register */ + #define QF_GET_PRIMASK(primask_) __asm volatile (\ + "mrs %0,PRIMASK" : "=r" (primask_) :: ) + + /* macro for setting the PRIMASK register */ + #define QF_SET_PRIMASK(primask_) __asm volatile (\ + "msr PRIMASK,%0" :: "r" (primask_) : ) + #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_SET_BASEPRI(QF_BASEPRI) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __asm volatile ("cpsid i") + #define QF_PRIMASK_ENABLE() __asm volatile ("cpsie i") + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_SET_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) #define QF_INT_ENABLE() QF_SET_BASEPRI(0U) - /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(basepri_) do {\ + QF_GET_BASEPRI((basepri_)); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) QF_SET_BASEPRI((basepri_)) + + /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. + * CAUTION: keep in synch with the value defined in "qk_port.s" + */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __builtin_clz(n_))) - /* inline function for setting the BASEPRI register */ - #define QF_SET_BASEPRI(val_) __asm volatile (\ - "movs r0,%0 \n\t" \ - "msr BASEPRI,r0" :: "I" (val_) : "cc", "r0") + /* macro for getting the BASEPRI register */ + #define QF_GET_BASEPRI(basepri_) __asm volatile (\ + "mrs %0,BASEPRI" : "=r" (basepri_) :: ) - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __asm volatile ("cpsid i") - #define QF_PRIMASK_ENABLE() __asm volatile ("cpsie i") + /* macro for setting the BASEPRI register */ + #define QF_SET_BASEPRI(basepri_) __asm volatile (\ + "msr BASEPRI,%0" :: "r" (basepri_) : ) #endif -/* QF critical section entry/exit */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling" policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm volatile ("isb") #include "qep_port.h" /* QEP port */ @@ -114,6 +143,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qv/gnu/qs_port.h b/ports/arm-cm/qv/gnu/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qv/gnu/qs_port.h +++ b/ports/arm-cm/qv/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qv/gnu/qv_port.c b/ports/arm-cm/qv/gnu/qv_port.c index f9f41337..db1f18b2 100644 --- a/ports/arm-cm/qv/gnu/qv_port.c +++ b/ports/arm-cm/qv/gnu/qv_port.c @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qv/gnu/qv_port.h b/ports/arm-cm/qv/gnu/qv_port.h index b268da7d..3a48935e 100644 --- a/ports/arm-cm/qv/gnu/qv_port.h +++ b/ports/arm-cm/qv/gnu/qv_port.h @@ -3,8 +3,8 @@ * @brief QV/C port to ARM Cortex-M, GNU-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -51,10 +51,10 @@ /* macro to put the CPU to sleep inside QV_onIdle() */ #define QV_CPU_SLEEP() do { \ - __asm volatile ("cpsid i"); \ + QF_PRIMASK_DISABLE(); \ QF_INT_ENABLE(); \ __asm volatile ("wfi"); \ - __asm volatile ("cpsie i"); \ + QF_PRIMASK_ENABLE(); \ } while (0) /* initialization of the QV kernel for Cortex-M3/M4/M4F */ diff --git a/ports/arm-cm/qv/iar/qf_port.h b/ports/arm-cm/qv/iar/qf_port.h index c71a4e86..78bf67ad 100644 --- a/ports/arm-cm/qv/iar/qf_port.h +++ b/ports/arm-cm/qv/iar/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, cooperative QV kernel, IAR-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -52,33 +52,52 @@ #define QF_INT_DISABLE() __disable_interrupt() #define QF_INT_ENABLE() __enable_interrupt() - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(primask_) do { \ + (primask_) = __get_PRIMASK(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) __set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() __set_BASEPRI(QF_BASEPRI) - #define QF_INT_ENABLE() __set_BASEPRI(0U) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __disable_interrupt() + #define QF_PRIMASK_ENABLE() __enable_interrupt() - /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3 */ + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + __set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() __set_BASEPRI(0U) + + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(basepri_) do {\ + (basepri_) = __get_BASEPRI(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) __set_BASEPRI((basepri_)) + + /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. + * CAUTION: keep in synch with the value defined in "qk_port.s" + */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __CLZ(n_))) - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __disable_interrupt() - #define QF_PRIMASK_ENABLE() __enable_interrupt() #endif -/* QF critical section entry/exit... */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __ISB() #include /* IAR intrinsic functions */ @@ -110,6 +129,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qv/iar/qs_port.h b/ports/arm-cm/qv/iar/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qv/iar/qs_port.h +++ b/ports/arm-cm/qv/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qv/iar/qv_port.c b/ports/arm-cm/qv/iar/qv_port.c index c867eedc..84d7d91f 100644 --- a/ports/arm-cm/qv/iar/qv_port.c +++ b/ports/arm-cm/qv/iar/qv_port.c @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qv/iar/qv_port.h b/ports/arm-cm/qv/iar/qv_port.h index 05fdf70d..59cc94c4 100644 --- a/ports/arm-cm/qv/iar/qv_port.h +++ b/ports/arm-cm/qv/iar/qv_port.h @@ -3,8 +3,8 @@ * @brief QV/C port to ARM Cortex-M, IAR-GNU toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -51,10 +51,10 @@ /* macro to put the CPU to sleep inside QV_onIdle() */ #define QV_CPU_SLEEP() do { \ - __disable_interrupt(); \ + QF_PRIMASK_DISABLE(); \ QF_INT_ENABLE(); \ __WFI(); \ - __enable_interrupt(); \ + QF_PRIMASK_ENABLE(); \ } while (0) /* initialization of the QV kernel for Cortex-M3/M4/M4F */ diff --git a/ports/arm-cm/qv/ti/qf_port.h b/ports/arm-cm/qv/ti/qf_port.h index edae06e5..ee54402e 100644 --- a/ports/arm-cm/qv/ti/qf_port.h +++ b/ports/arm-cm/qv/ti/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, cooperative QV kernel, TI-ARM CCS toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -50,25 +50,37 @@ || (defined __TI_TMS470_V7M4__) \ || (defined __TI_TMS470_V7M7__) - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_set_BASEPRI(QF_BASEPRI) - #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __asm(" CPSID I") + #define QF_PRIMASK_ENABLE() __asm(" CPSIE I") - /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3 */ + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(basepri_) ((basepri_) = QF_crit_entry()) + #define QF_CRIT_EXIT(basepri_) QF_set_BASEPRI((basepri_)) + + /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. + * CAUTION: keep in synch with the value defined in "qv_port.s" + */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __clz(n_))) - /* assembly function for setting the BASEPRI register */ - void QF_set_BASEPRI(unsigned basePri); - - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __asm(" CPSID I") - #define QF_PRIMASK_ENABLE() __asm(" CPSIE I") + /* assembly functions for critical section implementatin */ + unsigned QF_crit_entry(void); + void QF_set_BASEPRI(unsigned basepri); /* not M3/M4/M7, assuming no BASEPRI register or CLZ instruction */ #else @@ -77,15 +89,19 @@ #define QF_INT_DISABLE() __asm(" CPSID I") #define QF_INT_ENABLE() __asm(" CPSIE I") - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(primask_) ((primask_) = QF_crit_entry()) + #define QF_CRIT_EXIT(primask_) __set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* assembly functions for critical section implementatin */ + unsigned QF_crit_entry(void); + #endif /* not M3/M4/M7 */ -/* QF critical section entry/exit... */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm(" ISB") #include "qep_port.h" /* QEP port */ @@ -116,6 +132,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qv/ti/qs_port.h b/ports/arm-cm/qv/ti/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qv/ti/qs_port.h +++ b/ports/arm-cm/qv/ti/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qv/ti/qv_port.h b/ports/arm-cm/qv/ti/qv_port.h index b1f0e7f1..f9db2f9e 100644 --- a/ports/arm-cm/qv/ti/qv_port.h +++ b/ports/arm-cm/qv/ti/qv_port.h @@ -3,8 +3,8 @@ * @brief QV/C port to ARM Cortex-M, TI-ARM (CCS) toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -43,10 +43,10 @@ /* macro to put the CPU to sleep inside QV_onIdle() */ #define QV_CPU_SLEEP() do { \ - __asm(" CPSID I"); \ + QF_PRIMASK_DISABLE(); \ QF_INT_ENABLE(); \ __asm(" WFI"); \ - __asm(" CPSIE I"); \ + QF_PRIMASK_ENABLE(); \ } while (0) /* initialization of the QV kernel for Cortex-M3/M4/M4F */ diff --git a/ports/arm-cm/qv/ti/qv_port.s b/ports/arm-cm/qv/ti/qv_port.s index 140a48b5..1924de82 100644 --- a/ports/arm-cm/qv/ti/qv_port.s +++ b/ports/arm-cm/qv/ti/qv_port.s @@ -1,7 +1,7 @@ ;***************************************************************************** ; Product: QV port to ARM Cortex-M (M0,M0+,M1,M3,M4,M7), TI-ARM assembler -; Last Updated for Version: 5.8.1 -; Date of the Last Update: 2016-12-12 +; Last Updated for Version: 5.9.0 +; Date of the Last Update: 2017-03-17 ; ; Q u a n t u m L e a P s ; --------------------------- @@ -28,11 +28,15 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;***************************************************************************** + .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ .global QF_set_BASEPRI ; set BASEPRI register + .endif ; M3/M4/M7 + + .global QF_crit_entry ; enter critical section .global assert_failed ; low-level assert handler .ref Q_onAssert ; external reference @@ -42,15 +46,44 @@ QF_BASEPRI: .equ (0xFF >> 2) .text .thumb + ;***************************************************************************** ; The QF_set_BASEPRI function sets the BASEPRI register to the value ; passed in r0. -; C prototype: void QF_set_BASEPRI(uint32_t basePri); +; NOTE: The BASEPRI register is implemented only in ARMv7 architecture +; and is **not** available in ARMv6 (M0/M0+/M1) +; +; C prototype: void QF_set_BASEPRI(unsigned basepri); ;***************************************************************************** + .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ QF_set_BASEPRI: .asmfunc - MSR BASEPRI,r0 ; set BASEPRI + MSR BASEPRI,r0 ; BASEPRI := r0 (basepri parameter) BX lr ; return to the caller - .endasmfunc + .endasmfunc + .endif ; M3/M4/M7 + +;***************************************************************************** +; The QF_crit_entry function enters the QF critical section +; passed in r0. +; NOTE: The BASEPRI register is implemented only in ARMv7 architecture +; and is **not** available in ARMv6 (M0/M0+/M1) +; +; C prototype: unsigned QF_crit_entry(void); +;***************************************************************************** +QF_crit_entry: .asmfunc + .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ + MRS r0,BASEPRI ; r0 := BASEPRI (to return) + MOVS r1,#QF_BASEPRI + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r1 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. + BX lr ; return to the caller (previous BASEPRI in r0) + .else ; M0/M0+ + MRS r0,PRIMASK ; r0 := PRIMASK (to return) + CPSID i ; globally disable interrutps with PRIMASK + BX lr ; return to the caller (previous PRIMASK in r0) + .endif ; M0/M0+ + .endasmfunc .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ ; M3/4/7? ;***************************************************************************** @@ -65,8 +98,8 @@ QV_init: .asmfunc CPSID i ; PRIMASK := 1 ; NOTE: - ; On Cortex-M3/M4/.., this QK port disables interrupts by means of the - ; BASEPRI register. However, this method cannot disable interrupt + ; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of + ; the BASEPRI register. However, this method cannot disable interrupt ; priority zero, which is the default for all interrupts out of reset. ; The following code changes the SysTick priority and all IRQ priorities ; to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -136,9 +169,10 @@ assert_failed: .asmfunc LDR r0,[r0,#0] ; r0 := contents of VTOR LDR r0,[r0] ; r0 := VT[0] (first entry is the top of stack) MSR MSP,r0 ; main SP := initial top of stack - ISB ; flush the instruction pipeline + DSB ; DSB/ISB pair if instructions needed... + ISB ; ...after MSR MSP (ARM AN 321, Sect.4.10) BL Q_onAssert - .endasmfunc + .endasmfunc ;***************************************************************************** ; Addresses for PC-relative LDR diff --git a/ports/arm-cm/qxk/arm/qep_port.h b/ports/arm-cm/qxk/arm/qep_port.h index 56116aae..4e0bde5e 100644 --- a/ports/arm-cm/qxk/arm/qep_port.h +++ b/ports/arm-cm/qxk/arm/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/arm/qf_port.h b/ports/arm-cm/qxk/arm/qf_port.h index a7d97a21..9fe00da7 100644 --- a/ports/arm-cm/qxk/arm/qf_port.h +++ b/ports/arm-cm/qxk/arm/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, dual-mode QXK kernel, ARM-KEIL toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -52,47 +52,82 @@ #define QF_INT_DISABLE() __disable_irq() #define QF_INT_ENABLE() __enable_irq() - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(primask_) do { \ + (primask_) = QF_get_PRIMASK(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) QF_set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* inline function for getting the PRIMASK register */ + static __inline unsigned QF_get_PRIMASK(void) { + register unsigned __regPriMask __asm("primask"); + return __regPriMask; + } + + /* inline function for setting the PRIMASK register */ + static __inline void QF_set_PRIMASK(unsigned primask) { + register unsigned __regPriMask __asm("primask"); + __regPriMask = primask; + } + #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_set_BASEPRI(QF_BASEPRI) - #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __disable_irq() + #define QF_PRIMASK_ENABLE() __enable_irq() + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(basepri_) do {\ + (basepri_) = QF_get_BASEPRI(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) QF_set_BASEPRI((basepri_)) /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. * CAUTION: keep in synch with the value defined in "qk_port.s" */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __clz(n_))) + /* inline function for getting the BASEPRI register */ + static __inline unsigned QF_get_BASEPRI(void) { + register unsigned volatile __regBasePri __asm("basepri"); + return __regBasePri; + } + /* inline function for setting the BASEPRI register */ static __inline void QF_set_BASEPRI(unsigned basePri) { register unsigned volatile __regBasePri __asm("basepri"); __regBasePri = basePri; } - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __disable_irq() - #define QF_PRIMASK_ENABLE() __enable_irq() #endif -/* QF critical section entry/exit */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling" policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm("isb") -#include "qep_port.h" /* QEP port */ -#include "qxk_port.h" /* QXK dual kernel port */ -#include "qf.h" /* QF platform-independent public interface */ -#include "qxthread.h" /* QXK extended thread interface */ +#include "qep_port.h" /* QEP port */ +#include "qxk_port.h" /* QXK dual-mode kernel port */ +#include "qf.h" /* QF platform-independent public interface */ +#include "qxthread.h" /* QXK extended thread interface */ /***************************************************************************** * NOTE1: @@ -118,6 +153,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qxk/arm/qs_port.h b/ports/arm-cm/qxk/arm/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qxk/arm/qs_port.h +++ b/ports/arm-cm/qxk/arm/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/arm/qxk_port.h b/ports/arm-cm/qxk/arm/qxk_port.h index bc264ebf..7b30fbf5 100644 --- a/ports/arm-cm/qxk/arm/qxk_port.h +++ b/ports/arm-cm/qxk/arm/qxk_port.h @@ -3,8 +3,8 @@ * @brief QXK/C port to ARM Cortex-M, ARM-KEIL toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -48,8 +48,20 @@ static __inline uint32_t QXK_get_IPSR(void) { return __regIPSR; } -#define QXK_CONTEXT_SWITCH_() \ - (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)) +#if (__TARGET_ARCH_THUMB == 3) /* Cortex-M0/M0+/M1(v6-M, v6S-M)? */ + + #define QXK_CONTEXT_SWITCH_() \ + (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)) + +#else /* Cortex-M3/M4/M7 */ + + #define QXK_CONTEXT_SWITCH_() do { \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ + __asm("dsb"); \ + __asm("isb"); \ + } while (0) + +#endif /* QXK interrupt entry and exit */ #define QXK_ISR_ENTRY() ((void)0) diff --git a/ports/arm-cm/qxk/arm/qxk_port.s b/ports/arm-cm/qxk/arm/qxk_port.s index 712604e4..b1e05398 100644 --- a/ports/arm-cm/qxk/arm/qxk_port.s +++ b/ports/arm-cm/qxk/arm/qxk_port.s @@ -1,7 +1,7 @@ ;***************************************************************************** ; Product: QXK port to ARM Cortex-M (M0,M0+,M1,M3,M4,M7), ARM-Keil assembler -; Last Updated for Version: 5.8.1 -; Date of the Last Update: 2016-12-12 +; Last Updated for Version: 5.9.0 +; Date of the Last Update: 2017-03-17 ; ; Q u a n t u m L e a P s ; --------------------------- @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;***************************************************************************** @@ -73,18 +73,18 @@ QXK_init FUNCTION IF {TARGET_ARCH_THUMB} == 3 ; Cortex-M0/M0+/M1 (v6-M, v6S-M)? - LDR r1,=0xE000ED18 ; System Handler Priority Register - LDR r2,[r1,#8] ; load the System 12-15 Priority Register - MOVS r3,#0xFF - LSLS r3,r3,#16 - ORRS r2,r3 ; set PRI_14 (PendSV) to 0xFF - STR r2,[r1,#8] ; write the System 12-15 Priority Register + LDR r3,=0xE000ED18 ; System Handler Priority Register + LDR r2,[r3,#8] ; r2 := SYSPRI3 + MOVS r1,#0xFF + LSLS r1,r1,#16 + ORRS r2,r1 + STR r2,[r3,#8] ; SYSPRI3 := r2, PendSV <- 0xFF ELSE ; Cortex-M3/M4/.. ; NOTE: - ; On Cortex-M3/M4/.., this QXK port disables interrupts by means of the - ; BASEPRI register. However, this method cannot disable interrupt + ; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of + ; the BASEPRI register. However, this method cannot disable interrupt ; priority zero, which is the default for all interrupts out of reset. ; The following code changes the SysTick priority and all IRQ priorities ; to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -180,7 +180,9 @@ PendSV_Handler FUNCTION CPSID i ; disable interrupts (set PRIMASK) ELSE ; M3/M4/M7 MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 ; selectively disable interrupts + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r0 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. ENDIF ; M3/M4/M7 ; The PendSV exception handler can be preempted by an interrupt, @@ -212,16 +214,16 @@ PendSV_activate ; The QXK activator must be called in a thread context, while this code ; executes in the handler contex of the PendSV exception. The switch ; to the Thread mode is accomplished by returning from PendSV using - ; a fabricated exception stack frame, where the return address is the - ; QXK activator QXK_activate_(). + ; a fabricated exception stack frame, where the return address is + ; QXK_activate_(). ; ; NOTE: the QXK activator is called with interrupts DISABLED and also ; it returns with interrupts DISABLED. MOVS r3,#1 - LSLS r3,r3,#24 ; r3:=(1 << 24), set the T bit (new xpsr) + LSLS r3,r3,#24 ; r3 := (1 << 24), set the T bit (new xpsr) LDR r2,=QXK_activate_ ; address of QXK_activate_ SUBS r2,r2,#1 ; align Thumb-address at halfword (new pc) - LDR r1,=Thread_ret ; return address after the call (new lr) + LDR r1,=Thread_ret ; return address after the call (new lr) SUB sp,sp,#8*4 ; reserve space for exception stack frame ADD r0,sp,#5*4 ; r0 := 5 registers below the top of stack @@ -344,6 +346,7 @@ PendSV_save_ex LDR r1,[r3,#QXK_CURR] ; r1 := QXK_attr_.curr (restore value) ELSE ; M3/M4/M7 + ISB ; reset pipeline after fetching PSP STMDB r0!,{r4-r11} ; save r4-r11 on top of the exception frame IF {TARGET_FPU_VFP} == {TRUE} ; if VFP available... TST lr,#(1 << 4) ; is it return with the VFP exception frame? @@ -421,6 +424,8 @@ Thread_ret FUNCTION ; thread. However, this must be accomplished by a return-from-exception, ; while we are still in the thread context. The switch to the exception ; contex is accomplished by triggering the NMI exception. + ; NOTE: The NMI exception is triggered with nterrupts DISABLED, + ; because QK activator disables interrutps before return. ; before triggering the NMI exception, make sure that the ; VFP stack frame will NOT be used... @@ -428,6 +433,7 @@ Thread_ret FUNCTION MRS r0,CONTROL ; r0 := CONTROL BICS r0,r0,#4 ; r0 := r0 & ~4 (FPCA bit) MSR CONTROL,r0 ; CONTROL := r0 (clear CONTROL[2] FPCA bit) + ISB ; ISB after MSR CONTROL (ARM AN 321, Sect.4.16) ENDIF ; VFP available ; trigger NMI to return to preempted task... diff --git a/ports/arm-cm/qxk/gnu/qep_port.h b/ports/arm-cm/qxk/gnu/qep_port.h index 56116aae..4e0bde5e 100644 --- a/ports/arm-cm/qxk/gnu/qep_port.h +++ b/ports/arm-cm/qxk/gnu/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/gnu/qf_port.h b/ports/arm-cm/qxk/gnu/qf_port.h index 14325d01..0d10a73c 100644 --- a/ports/arm-cm/qxk/gnu/qf_port.h +++ b/ports/arm-cm/qxk/gnu/qf_port.h @@ -3,8 +3,8 @@ * @brief QF/C port to Cortex-M, dual-mode QXK kernel, GNU-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -46,19 +46,24 @@ #define QF_MAX_TICK_RATE 2 /* QF interrupt disable/enable and log2()... */ -#if (__ARM_ARCH == 6) /* Cortex-M0/M0+/M1? */ +#if (__ARM_ARCH == 6) /* Cortex-M0/M0+/M1(v6-M, v6S-M)? */ /* Cortex-M0/M0+/M1(v6-M, v6S-M) interrupt disabling policy, see NOTE2 */ #define QF_INT_DISABLE() __asm volatile ("cpsid i") #define QF_INT_ENABLE() __asm volatile ("cpsie i") - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_SET_BASEPRI(QF_BASEPRI) + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_SET_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() QF_SET_BASEPRI(0U) /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. @@ -82,16 +87,16 @@ #define QF_PRIMASK_ENABLE() __asm volatile ("cpsie i") #endif -/* QF critical section entry/exit */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling" policy */ +/* QF critical section entry/exit... */ +/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling policy */ #define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() #define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm volatile ("isb") -#include "qep_port.h" /* QEP port */ -#include "qxk_port.h" /* QXK port */ -#include "qf.h" /* QF platform-independent public interface */ -#include "qxthread.h" /* QXK extended thread interface */ +#include "qep_port.h" /* QEP port */ +#include "qxk_port.h" /* QXK dual-mode kernel port */ +#include "qf.h" /* QF platform-independent public interface */ +#include "qxthread.h" /* QXK extended thread interface */ /***************************************************************************** * NOTE1: @@ -117,6 +122,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qxk/gnu/qs_port.h b/ports/arm-cm/qxk/gnu/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qxk/gnu/qs_port.h +++ b/ports/arm-cm/qxk/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/gnu/qxk_port.h b/ports/arm-cm/qxk/gnu/qxk_port.h index 90719755..c92d27b3 100644 --- a/ports/arm-cm/qxk/gnu/qxk_port.h +++ b/ports/arm-cm/qxk/gnu/qxk_port.h @@ -3,8 +3,8 @@ * @brief QXK/C port to ARM Cortex-M, GNU-ARM compiler * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -49,8 +49,20 @@ static inline uint32_t QXK_get_IPSR(void) { return regIPSR; } -#define QXK_CONTEXT_SWITCH_() \ - (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)) +#if (__TARGET_ARCH_THUMB == 3) /* Cortex-M0/M0+/M1(v6-M, v6S-M)? */ + + #define QXK_CONTEXT_SWITCH_() \ + (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)) + +#else /* Cortex-M3/M4/M7 */ + + #define QXK_CONTEXT_SWITCH_() do { \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ + __asm volatile ("dsb"); \ + __asm volatile ("isb"); \ + } while (0) + +#endif /* QXK interrupt entry and exit */ #define QXK_ISR_ENTRY() ((void)0) @@ -58,7 +70,7 @@ static inline uint32_t QXK_get_IPSR(void) { #define QXK_ISR_EXIT() do { \ QF_INT_DISABLE(); \ if (QXK_sched_() != (uint_fast8_t)0) { \ - QXK_CONTEXT_SWITCH_(); \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ } \ QF_INT_ENABLE(); \ } while (0) diff --git a/ports/arm-cm/qxk/gnu/qxk_port.s b/ports/arm-cm/qxk/gnu/qxk_port.s index eecae7c0..c3602dc2 100644 --- a/ports/arm-cm/qxk/gnu/qxk_port.s +++ b/ports/arm-cm/qxk/gnu/qxk_port.s @@ -1,7 +1,7 @@ /***************************************************************************** * Product: QXK port to ARM Cortex-M (M0,M0+,M1,M3,M4,M7), GNU-ARM assembler -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-12 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ @@ -65,15 +65,15 @@ QXK_init: LDR r3,=0xE000ED18 /* System Handler Priority Register */ LDR r2,[r3,#8] /* r2 := SYSPRI3 */ - MOVS r0,#0xFF - LSLS r0,r0,#16 + MOVS r1,#0xFF + LSLS r1,r1,#16 ORRS r2,r1 STR r2,[r3,#8] /* SYSPRI3 := r2, PendSV <- 0xFF */ .else /* M3/M4/M7 */ /* NOTE: - * On Cortex-M3/M4/.., this QXK port disables interrupts by means of the - * BASEPRI register. However, this method cannot disable interrupt + * On Cortex-M3/M4/M7.., this QXK port disables interrupts by means of + * the BASEPRI register. However, this method cannot disable interrupt * priority zero, which is the default for all interrupts out of reset. * The following code changes the SysTick priority and all IRQ priorities * to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -176,7 +176,9 @@ PendSV_Handler: CPSID i /* disable interrupts (set PRIMASK) */ .else /* M3/M4/M7 */ MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 /* selectively disable interrupts */ + CPSID i /* selectively disable interrutps with BASEPRI */ + MSR BASEPRI,r0 /* apply the workaround the Cortex-M7 erraturm */ + CPSIE i /* 837070, see ARM-EPM-064408. */ .endif /* M3/M4/M7 */ /* The PendSV exception handler can be preempted by an interrupt, @@ -210,8 +212,8 @@ PendSV_activate: /* The QXK activator must be called in a thread context, while this code * executes in the handler contex of the PendSV exception. The switch * to the Thread mode is accomplished by returning from PendSV using - * a fabricated exception stack frame, where the return address is the - * QXK activator QXK_activate_(). + * a fabricated exception stack frame, where the return address is + * QXK_activate_(). * * NOTE: the QXK activator is called with interrupts DISABLED and also * it returns with interrupts DISABLED. @@ -346,6 +348,7 @@ PendSV_save_ex: LDR r1,[r3,#QXK_CURR] /* r1 := QXK_attr_.curr (restore value) */ .else /* M3/M4/M7 */ + ISB /* reset pipeline after fetching PSP */ STMDB r0!,{r4-r11} /* save r4-r11 on top of the exception frame */ .ifdef __FPU_PRESENT /* if VFP available... */ TST lr,#(1 << 4) /* is it return with the VFP exception frame? */ @@ -436,6 +439,7 @@ Thread_ret: MRS r0,CONTROL /* r0 := CONTROL */ BICS r0,r0,#4 /* r0 := r0 & ~4 (FPCA bit) */ MSR CONTROL,r0 /* CONTROL := r0 (clear CONTROL[2] FPCA bit) */ + ISB /* ISB after MSR CONTROL (ARM AN321,Sect.4.16)*/ .endif /* VFP available */ /* trigger NMI to return to preempted task... diff --git a/ports/arm-cm/qxk/iar/qep_port.h b/ports/arm-cm/qxk/iar/qep_port.h index 56116aae..4e0bde5e 100644 --- a/ports/arm-cm/qxk/iar/qep_port.h +++ b/ports/arm-cm/qxk/iar/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/iar/qf_port.h b/ports/arm-cm/qxk/iar/qf_port.h index aa785c63..16462cfb 100644 --- a/ports/arm-cm/qxk/iar/qf_port.h +++ b/ports/arm-cm/qxk/iar/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, preemptive dual-mode QXK kernel, IAR-ARM * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -46,41 +46,58 @@ #define QF_MAX_TICK_RATE 2 /* QF interrupt disable/enable and log2()... */ -#if (__CORE__ == __ARM6M__) /* Cortex-M0/M0+/M1? */ +#if (__CORE__ == __ARM6M__) /* Cortex-M0/M0+/M1(v6-M, v6S-M)? */ /* Cortex-M0/M0+/M1(v6-M, v6S-M) interrupt disabling policy, see NOTE2 */ #define QF_INT_DISABLE() __disable_interrupt() #define QF_INT_ENABLE() __enable_interrupt() - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(primask_) do { \ + (primask_) = __get_PRIMASK(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(primask_) __set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 #else /* Cortex-M3/M4/M7 */ - /* Cortex-M3/M4/M4F interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() __set_BASEPRI(QF_BASEPRI) - #define QF_INT_ENABLE() __set_BASEPRI(0U) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __disable_interrupt() + #define QF_PRIMASK_ENABLE() __enable_interrupt() + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + __set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) + #define QF_INT_ENABLE() __set_BASEPRI(0U) + + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned long + #define QF_CRIT_ENTRY(basepri_) do {\ + (basepri_) = __get_BASEPRI(); \ + QF_INT_DISABLE(); \ + } while (0) + #define QF_CRIT_EXIT(basepri_) __set_BASEPRI((basepri_)) /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. * CAUTION: keep in synch with the value defined in "qk_port.s" */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __CLZ(n_))) - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __disable_interrupt() - #define QF_PRIMASK_ENABLE() __enable_interrupt() #endif -/* QF critical section entry/exit... */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling" policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __ISB() #include /* IAR intrinsic functions */ @@ -113,6 +130,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qxk/iar/qs_port.h b/ports/arm-cm/qxk/iar/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qxk/iar/qs_port.h +++ b/ports/arm-cm/qxk/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/iar/qxk_port.h b/ports/arm-cm/qxk/iar/qxk_port.h index 200487f1..94931d1d 100644 --- a/ports/arm-cm/qxk/iar/qxk_port.h +++ b/ports/arm-cm/qxk/iar/qxk_port.h @@ -3,8 +3,8 @@ * @brief QXK/C port to ARM Cortex-M, IAR-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -42,8 +42,20 @@ /* determination if the code executes in the ISR context */ #define QXK_ISR_CONTEXT_() (__get_IPSR() != (uint32_t)0) -#define QXK_CONTEXT_SWITCH_() \ - (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)) +#if (__CORE__ == __ARM6M__) /* Cortex-M0/M0+/M1? */ + + #define QXK_CONTEXT_SWITCH_() \ + (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)) + +#else /* Cortex-M3/M4/M7 */ + + #define QXK_CONTEXT_SWITCH_() do { \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ + __DSB(); \ + __ISB(); \ + } while (0) + +#endif /* QXK interrupt entry and exit */ #define QXK_ISR_ENTRY() ((void)0) @@ -51,7 +63,7 @@ #define QXK_ISR_EXIT() do { \ QF_INT_DISABLE(); \ if (QXK_sched_() != (uint_fast8_t)0) { \ - QXK_CONTEXT_SWITCH_(); \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ } \ QF_INT_ENABLE(); \ } while (0) diff --git a/ports/arm-cm/qxk/iar/qxk_port.s b/ports/arm-cm/qxk/iar/qxk_port.s index a685ffc8..c27ffb60 100644 --- a/ports/arm-cm/qxk/iar/qxk_port.s +++ b/ports/arm-cm/qxk/iar/qxk_port.s @@ -1,7 +1,7 @@ ;***************************************************************************** ; Product: QXK port to ARM Cortex-M (M0,M0+,M3,M4,M7), IAR-ARM assembler -; Last Updated for Version: 5.8.1 -; Date of the Last Update: 2016-12-12 +; Last Updated for Version: 5.9.0 +; Date of the Last Update: 2017-03-17 ; ; Q u a n t u m L e a P s ; --------------------------- @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;***************************************************************************** @@ -75,15 +75,15 @@ QXK_init: LDR r3,=0xE000ED18 ; System Handler Priority Register LDR r2,[r3,#8] ; r2 := SYSPRI3 - MOVS r0,#0xFF - LSLS r0,r0,#16 + MOVS r1,#0xFF + LSLS r1,r1,#16 ORRS r2,r1 STR r2,[r3,#8] ; SYSPRI3 := r2, PendSV <- 0xFF #else ; Cortex-M3/M4/.. ; NOTE: - ; On Cortex-M3/M4/.., this QXK port disables interrupts by means of the - ; BASEPRI register. However, this method cannot disable interrupt + ; On Cortex-M3/M4/M7.., this QXK port disables interrupts by means of + ; the BASEPRI register. However, this method cannot disable interrupt ; priority zero, which is the default for all interrupts out of reset. ; The following code changes the SysTick priority and all IRQ priorities ; to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -178,7 +178,9 @@ PendSV_Handler: CPSID i ; disable interrupts (set PRIMASK) #else ; M3/M4/M7 MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 ; selectively disable interrupts + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r0 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. #endif ; M3/M4/M7 ; The PendSV exception handler can be preempted by an interrupt, @@ -205,13 +207,13 @@ PendSV_Handler: PendSV_activate: #ifdef __ARMVFP__ ; if VFP available... - PUSH {r0,lr} ; ... push lr (EXC_RETURN) plus stack-aligner + PUSH {r0,lr} ; ...push lr (EXC_RETURN) plus stack-aligner #endif ; VFP available ; The QXK activator must be called in a thread context, while this code ; executes in the handler contex of the PendSV exception. The switch ; to the Thread mode is accomplished by returning from PendSV using - ; a fabricated exception stack frame, where the return address is the - ; QXK activator QXK_activate_(). + ; a fabricated exception stack frame, where the return address is + ; QXK_activate_(). ; ; NOTE: the QXK activator is called with interrupts DISABLED and also ; it returns with interrupts DISABLED. @@ -342,6 +344,7 @@ PendSV_save_ex: LDR r1,[r3,#QXK_CURR] ; r1 := QXK_attr_.curr (restore value) #else ; M3/M4/M7 + ISB ; reset pipeline after fetching PSP STMDB r0!,{r4-r11} ; save r4-r11 on top of the exception frame #ifdef __ARMVFP__ ; if VFP available... TST lr,#(1 << 4) ; is it return with the VFP exception frame? @@ -419,6 +422,8 @@ Thread_ret: ; thread. However, this must be accomplished by a return-from-exception, ; while we are still in the thread context. The switch to the exception ; contex is accomplished by triggering the NMI exception. + ; NOTE: The NMI exception is triggered with nterrupts DISABLED, + ; because QK activator disables interrutps before return. ; before triggering the NMI exception, make sure that the ; VFP stack frame will NOT be used... @@ -426,6 +431,7 @@ Thread_ret: MRS r0,CONTROL ; r0 := CONTROL BICS r0,r0,#4 ; r0 := r0 & ~4 (FPCA bit) MSR CONTROL,r0 ; CONTROL := r0 (clear CONTROL[2] FPCA bit) + ISB ; ISB after MSR CONTROL (ARM AN 321, Sect.4.16) #endif ; VFP available ; trigger NMI to return to preempted task... diff --git a/ports/arm-cm/qxk/ti/qep_port.h b/ports/arm-cm/qxk/ti/qep_port.h index 56116aae..4e0bde5e 100644 --- a/ports/arm-cm/qxk/ti/qep_port.h +++ b/ports/arm-cm/qxk/ti/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/ti/qf_port.h b/ports/arm-cm/qxk/ti/qf_port.h index f25685ba..5fcdbf88 100644 --- a/ports/arm-cm/qxk/ti/qf_port.h +++ b/ports/arm-cm/qxk/ti/qf_port.h @@ -3,14 +3,14 @@ * @brief QF/C port to Cortex-M, dual-mode QXK kernel, TI-ARM toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.2 -* Date of the Last Update: 2017-02-03 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -50,26 +50,37 @@ || (defined __TI_TMS470_V7M4__) \ || (defined __TI_TMS470_V7M7__) - /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 */ - #define QF_INT_DISABLE() QF_set_BASEPRI(QF_BASEPRI) + /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ + #define QF_PRIMASK_DISABLE() __asm(" CPSID I") + #define QF_PRIMASK_ENABLE() __asm(" CPSIE I") + + /* Cortex-M3/M4/M7 interrupt disabling policy, see NOTE3 and NOTE4 */ + #define QF_INT_DISABLE() do { \ + QF_PRIMASK_DISABLE(); \ + QF_set_BASEPRI(QF_BASEPRI); \ + QF_PRIMASK_ENABLE(); \ + } while (0) #define QF_INT_ENABLE() QF_set_BASEPRI(0U) + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(basepri_) ((basepri_) = QF_crit_entry()) + #define QF_CRIT_EXIT(basepri_) QF_set_BASEPRI((basepri_)) + /* BASEPRI threshold for "QF-aware" interrupts, see NOTE3. * CAUTION: keep in synch with the value defined in "qk_port.s" */ #define QF_BASEPRI (0xFFU >> 2) - /* CMSIS threshold for "QF-aware" interrupts, see NOTE4 */ + /* CMSIS threshold for "QF-aware" interrupts, see NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI (QF_BASEPRI >> (8 - __NVIC_PRIO_BITS)) /* Cortex-M3/M4/M7 provide the CLZ instruction for fast LOG2 */ #define QF_LOG2(n_) ((uint_fast8_t)(32U - __clz(n_))) - void QF_set_BASEPRI(unsigned basePri); - - /* Cortex-M3/M4/M7 alternative interrupt disabling with PRIMASK */ - #define QF_PRIMASK_DISABLE() __asm(" CPSID I") - #define QF_PRIMASK_ENABLE() __asm(" CPSIE I") + /* assembly functions for critical section implementatin */ + unsigned QF_crit_entry(void); + void QF_set_BASEPRI(unsigned basepri); /* not M3/M4/M7, assuming no BASEPRI register or CLZ instruction */ #else @@ -78,21 +89,25 @@ #define QF_INT_DISABLE() __asm(" CPSID I") #define QF_INT_ENABLE() __asm(" CPSIE I") - /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE4 */ + /* QF critical section entry/exit (save and restore interrupt status) */ + #define QF_CRIT_STAT_TYPE unsigned + #define QF_CRIT_ENTRY(primask_) ((primask_) = QF_crit_entry()) + #define QF_CRIT_EXIT(primask_) __set_PRIMASK((primask_)) + + /* CMSIS threshold for "QF-aware" interrupts, see NOTE2 and NOTE5 */ #define QF_AWARE_ISR_CMSIS_PRI 0 + /* assembly functions for critical section implementatin */ + unsigned QF_crit_entry(void); + #endif /* not M3/M4/M7 */ -/* QF critical section entry/exit */ -/* QF_CRIT_STAT_TYPE not defined: unconditional interrupt disabling policy */ -#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() -#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() #define QF_CRIT_EXIT_NOP() __asm(" ISB") -#include "qep_port.h" /* QEP port */ -#include "qxk_port.h" /* QXK port */ -#include "qf.h" /* QF platform-independent public interface */ -#include "qxthread.h" /* QXK extended thread interface */ +#include "qep_port.h" /* QEP port */ +#include "qxk_port.h" /* QXK dual-mode kernel port */ +#include "qf.h" /* QF platform-independent public interface */ +#include "qxthread.h" /* QXK extended thread interface */ /***************************************************************************** * NOTE1: @@ -118,6 +133,13 @@ * ("QF-aware" interrupts ), can call QF services. * * NOTE4: +* The selective disabling of "QF-aware" interrupts with the BASEPRI register +* has a problem on ARM Cortex-M7 core r0p1 (see ARM-EPM-064408, errata +* 837070). The workaround recommended by ARM is to surround MSR BASEPRI with +* the CPSID i/CPSIE i pair, which is implemented in the QF_INT_DISABLE() +* macro. This workaround works also for Cortex-M3/M4 cores. +* +* NOTE5: * The QF_AWARE_ISR_CMSIS_PRI macro is useful as an offset for enumerating * the "QF-aware" interrupt priorities in the applications, whereas the * numerical values of the "QF-aware" interrupts must be greater or equal to diff --git a/ports/arm-cm/qxk/ti/qs_port.h b/ports/arm-cm/qxk/ti/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm-cm/qxk/ti/qs_port.h +++ b/ports/arm-cm/qxk/ti/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cm/qxk/ti/qxk_port.h b/ports/arm-cm/qxk/ti/qxk_port.h index 10c20753..e50b9b68 100644 --- a/ports/arm-cm/qxk/ti/qxk_port.h +++ b/ports/arm-cm/qxk/ti/qxk_port.h @@ -3,8 +3,8 @@ * @brief QXK port to Cortex-M, TI-ARM (CCS) toolset * @cond ****************************************************************************** -* Last Updated for Version: 5.8.1 -* Date of the Last Update: 2016-12-14 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -42,16 +42,31 @@ /* determination if the code executes in the ISR context */ #define QXK_ISR_CONTEXT_() (QXK_get_IPSR() != (uint32_t)0) +/* is the target M3/M4/M7? */ +#if (defined __TI_TMS470_V7M3__) \ + || (defined __TI_TMS470_V7M4__) \ + || (defined __TI_TMS470_V7M7__) + + #define QXK_CONTEXT_SWITCH_() do { \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ + __asm(" DSB"); \ + __asm(" ISB"); \ + } while (0) + +#else + #define QXK_CONTEXT_SWITCH_() \ (*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28)) +#endif /* not M3/M4/M7 */ + /* QXK interrupt entry and exit */ #define QXK_ISR_ENTRY() ((void)0) #define QXK_ISR_EXIT() do { \ QF_INT_DISABLE(); \ if (QXK_sched_() != (uint_fast8_t)0) { \ - QXK_CONTEXT_SWITCH_(); \ + *Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (uint32_t)(1U << 28); \ } \ QF_INT_ENABLE(); \ } while (0) diff --git a/ports/arm-cm/qxk/ti/qxk_port.s b/ports/arm-cm/qxk/ti/qxk_port.s index 352210db..445e4671 100644 --- a/ports/arm-cm/qxk/ti/qxk_port.s +++ b/ports/arm-cm/qxk/ti/qxk_port.s @@ -1,7 +1,7 @@ ;***************************************************************************** -; Product: QXK port to ARM Cortex-M (M0,M0+,M1,M3,M4,M7), TI-ARM assembler -; Last Updated for Version: 5.8.1 -; Date of the Last Update: 2016-12-12 +; Product: QXK port to ARM Cortex-M (M0,M0+,M3,M4,M7), TI-ARM assembler +; Last Updated for Version: 5.9.0 +; Date of the Last Update: 2017-03-17 ; ; Q u a n t u m L e a P s ; --------------------------- @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;***************************************************************************** @@ -40,6 +40,8 @@ .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ .global QF_set_BASEPRI ; set BASEPRI register .endif ; M3/M4/M7 + + .global QF_crit_entry ; enter critical section .global QXK_get_IPSR ; get the IPSR .global assert_failed ; low-level assert handler @@ -55,7 +57,6 @@ QF_BASEPRI .equ (0xFF >> 2) QXK_CURR .equ 0 QXK_NEXT .equ 4 QXK_TOP_PRIO .equ 8 -QXK_INT_NEST .equ 20 ; NOTE: keep in synch with the QMActive struct in "qf.h/qxk.h" !!! QMACTIVE_THREAD .equ 40 @@ -76,8 +77,8 @@ QXK_init: .asmfunc .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ ; M3/4/7? ; NOTE: - ; On Cortex-M3/M4/.., this QXK port disables interrupts by means of the - ; BASEPRI register. However, this method cannot disable interrupt + ; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of + ; the BASEPRI register. However, this method cannot disable interrupt ; priority zero, which is the default for all interrupts out of reset. ; The following code changes the SysTick priority and all IRQ priorities ; to the safe value QF_BASEPRI, wich the QF critical section can disable. @@ -134,8 +135,8 @@ QXK_init_irq: LDR r3,=0xE000ED18 ; System Handler Priority Register LDR r2,[r3,#8] ; r2 := SYSPRI3 - MOVS r0,#0xFF - LSLS r0,r0,#16 + MOVS r1,#0xFF + LSLS r1,r1,#16 ORRS r2,r1 STR r2,[r3,#8] ; SYSPRI3 := r2, PendSV <- 0xFF @@ -180,7 +181,9 @@ PendSV_Handler: .asmfunc ; <<<<<<<<<<<<<<<<<<<<<<< CRITICAL SECTION BEGIN <<<<<<<<<<<<<<<<<<<<<<<<< .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ MOVS r0,#QF_BASEPRI - MSR BASEPRI,r0 ; selectively disable interrupts + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r0 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. .else ; M0/M0+ CPSID i ; disable interrupts (set PRIMASK) .endif ; M0/M0+ @@ -209,16 +212,16 @@ PendSV_Handler: .asmfunc PendSV_activate: .if __TI_VFP_SUPPORT__ ; if VFP available... - PUSH {r0,lr} ; ... push lr (EXC_RETURN) plus stack-aligner + PUSH {r0,lr} ; ...push lr (EXC_RETURN) plus stack-aligner .endif ; VFP available ; The QXK activator must be called in a thread context, while this code ; executes in the handler contex of the PendSV exception. The switch ; to the Thread mode is accomplished by returning from PendSV using - ; a fabricated exception stack frame, where the return address is the - ; QXK activator QXK_activate_(). + ; a fabricated exception stack frame, where the return address is + ; QXK_activate_(). ; ; NOTE: the QXK activator is called with interrupts DISABLED and also - ; it returns with interrupts DISABLED. + ; returns with interrupts DISABLED. MOVS r3,#1 LSLS r3,r3,#24 ; r3:=(1 << 24), set the T bit (new xpsr) LDR r2,QXK_activate_addr ; address of QXK_activate_ @@ -424,6 +427,8 @@ Thread_ret: .asmfunc ; to ensure that the label is THUMB ; thread. However, this must be accomplished by a return-from-exception, ; while we are still in the thread context. The switch to the exception ; contex is accomplished by triggering the NMI exception. + ; NOTE: The NMI exception is triggered with nterrupts DISABLED, + ; because QXK activator disables interrutps before return. ; before triggering the NMI exception, make sure that the ; VFP stack frame will NOT be used... @@ -431,9 +436,10 @@ Thread_ret: .asmfunc ; to ensure that the label is THUMB MRS r0,CONTROL ; r0 := CONTROL BICS r0,r0,#4 ; r0 := r0 & ~4 (FPCA bit) MSR CONTROL,r0 ; CONTROL := r0 (clear CONTROL[2] FPCA bit) + ISB ; ISB after MSR CONTROL (ARM AN 321, Sect.4.16) .endif ; VFP available - ; trigger NMI to return to preempted task... + ; trigger NMI to return to preempted thread... ; NOTE: The NMI exception is triggered with nterrupts DISABLED LDR r0,ICSR_addr ; Interrupt Control and State Register MOVS r1,#1 @@ -596,15 +602,37 @@ QXK_stackInit_fill: ; NOTE: The BASEPRI register is implemented only in ARMv7 architecture ; and is **not** available in ARMv6 (M0/M0+/M1) ; -; C prototype: void QF_set_BASEPRI(unsigned basePri); +; C prototype: void QF_set_BASEPRI(unsigned basepri); ;***************************************************************************** .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ QF_set_BASEPRI: .asmfunc - MSR BASEPRI,r0 ; set BASEPRI + MSR BASEPRI,r0 ; BASEPRI := r0 (basepri parameter) BX lr ; return to the caller .endasmfunc .endif ; M3/M4/M7 +;***************************************************************************** +; The QF_crit_entry function enters the QF critical section +; passed in r0. +; NOTE: The BASEPRI register is implemented only in ARMv7 architecture +; and is **not** available in ARMv6 (M0/M0+/M1) +; +; C prototype: unsigned QF_crit_entry(void); +;***************************************************************************** +QF_crit_entry: .asmfunc + .if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ + MRS r0,BASEPRI ; r0 := BASEPRI (to return) + MOVS r1,#QF_BASEPRI + CPSID i ; selectively disable interrutps with BASEPRI + MSR BASEPRI,r1 ; apply the workaround the Cortex-M7 erraturm + CPSIE i ; 837070, see ARM-EPM-064408. + BX lr ; return to the caller (previous BASEPRI in r0) + .else ; M0/M0+ + MRS r0,PRIMASK ; r0 := PRIMASK (to return) + CPSID i ; globally disable interrutps with PRIMASK + BX lr ; return to the caller (previous PRIMASK in r0) + .endif ; M0/M0+ + .endasmfunc ;***************************************************************************** ; The QXK_get_IPSR function gets the IPSR register and returns it in r0. @@ -615,7 +643,6 @@ QXK_get_IPSR: .asmfunc BX lr ; return to the caller .endasmfunc - ;***************************************************************************** ; The assert_failed() function restores the SP (in case stack is corrupted) ; and calls Q_onAssert(module, loc) @@ -626,10 +653,11 @@ assert_failed: .asmfunc LDR r0,[r0,#0] ; r0 := contents of VTOR LDR r0,[r0] ; r0 := VT[0] (first entry is the top of stack) MSR MSP,r0 ; main SP := initial top of stack + DSB ; DSB/ISB pair if instructions needed... + ISB ; ...after MSR MSP (ARM AN 321, Sect.4.10) BL Q_onAssert .endasmfunc - ;***************************************************************************** ; Constants for PC-relative LDR ;***************************************************************************** diff --git a/ports/arm-cr/qk/gnu/qep_port.h b/ports/arm-cr/qk/gnu/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qk/gnu/qep_port.h +++ b/ports/arm-cr/qk/gnu/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/gnu/qf_port.h b/ports/arm-cr/qk/gnu/qf_port.h index 57be7fa3..b1414a00 100644 --- a/ports/arm-cr/qk/gnu/qf_port.h +++ b/ports/arm-cr/qk/gnu/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/gnu/qk_port.h b/ports/arm-cr/qk/gnu/qk_port.h index 8faa2ece..8eb51020 100644 --- a/ports/arm-cr/qk/gnu/qk_port.h +++ b/ports/arm-cr/qk/gnu/qk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/gnu/qs_port.h b/ports/arm-cr/qk/gnu/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qk/gnu/qs_port.h +++ b/ports/arm-cr/qk/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/iar/qep_port.h b/ports/arm-cr/qk/iar/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qk/iar/qep_port.h +++ b/ports/arm-cr/qk/iar/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/iar/qf_port.h b/ports/arm-cr/qk/iar/qf_port.h index b54a888e..3da4d1d1 100644 --- a/ports/arm-cr/qk/iar/qf_port.h +++ b/ports/arm-cr/qk/iar/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/iar/qk_port.h b/ports/arm-cr/qk/iar/qk_port.h index 2510eae7..aa12c971 100644 --- a/ports/arm-cr/qk/iar/qk_port.h +++ b/ports/arm-cr/qk/iar/qk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/iar/qs_port.h b/ports/arm-cr/qk/iar/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qk/iar/qs_port.h +++ b/ports/arm-cr/qk/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/ti/qep_port.h b/ports/arm-cr/qk/ti/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qk/ti/qep_port.h +++ b/ports/arm-cr/qk/ti/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/ti/qf_port.h b/ports/arm-cr/qk/ti/qf_port.h index ef52a8e3..1cbea980 100644 --- a/ports/arm-cr/qk/ti/qf_port.h +++ b/ports/arm-cr/qk/ti/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/ti/qk_port.h b/ports/arm-cr/qk/ti/qk_port.h index df4de137..0989b068 100644 --- a/ports/arm-cr/qk/ti/qk_port.h +++ b/ports/arm-cr/qk/ti/qk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qk/ti/qs_port.h b/ports/arm-cr/qk/ti/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qk/ti/qs_port.h +++ b/ports/arm-cr/qk/ti/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/gnu/qep_port.h b/ports/arm-cr/qv/gnu/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qv/gnu/qep_port.h +++ b/ports/arm-cr/qv/gnu/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/gnu/qf_port.h b/ports/arm-cr/qv/gnu/qf_port.h index ed57ee53..176c83b0 100644 --- a/ports/arm-cr/qv/gnu/qf_port.h +++ b/ports/arm-cr/qv/gnu/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/gnu/qs_port.h b/ports/arm-cr/qv/gnu/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qv/gnu/qs_port.h +++ b/ports/arm-cr/qv/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/gnu/qv_port.h b/ports/arm-cr/qv/gnu/qv_port.h index 40497536..2b851927 100644 --- a/ports/arm-cr/qv/gnu/qv_port.h +++ b/ports/arm-cr/qv/gnu/qv_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/iar/qep_port.h b/ports/arm-cr/qv/iar/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qv/iar/qep_port.h +++ b/ports/arm-cr/qv/iar/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/iar/qf_port.h b/ports/arm-cr/qv/iar/qf_port.h index ef133fe8..b72134fb 100644 --- a/ports/arm-cr/qv/iar/qf_port.h +++ b/ports/arm-cr/qv/iar/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/iar/qs_port.h b/ports/arm-cr/qv/iar/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qv/iar/qs_port.h +++ b/ports/arm-cr/qv/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/iar/qv_port.h b/ports/arm-cr/qv/iar/qv_port.h index 1dc715fb..d23f1aea 100644 --- a/ports/arm-cr/qv/iar/qv_port.h +++ b/ports/arm-cr/qv/iar/qv_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/ti/qep_port.h b/ports/arm-cr/qv/ti/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qv/ti/qep_port.h +++ b/ports/arm-cr/qv/ti/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/ti/qf_port.h b/ports/arm-cr/qv/ti/qf_port.h index a358a1f7..b16ad901 100644 --- a/ports/arm-cr/qv/ti/qf_port.h +++ b/ports/arm-cr/qv/ti/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/ti/qs_port.h b/ports/arm-cr/qv/ti/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qv/ti/qs_port.h +++ b/ports/arm-cr/qv/ti/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qv/ti/qv_port.h b/ports/arm-cr/qv/ti/qv_port.h index d10134a9..c730f9be 100644 --- a/ports/arm-cr/qv/ti/qv_port.h +++ b/ports/arm-cr/qv/ti/qv_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/gnu/qep_port.h b/ports/arm-cr/qxk/gnu/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qxk/gnu/qep_port.h +++ b/ports/arm-cr/qxk/gnu/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/gnu/qf_port.h b/ports/arm-cr/qxk/gnu/qf_port.h index 57be7fa3..b1414a00 100644 --- a/ports/arm-cr/qxk/gnu/qf_port.h +++ b/ports/arm-cr/qxk/gnu/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/gnu/qk_port.h b/ports/arm-cr/qxk/gnu/qk_port.h index c4da9fb5..26227bd5 100644 --- a/ports/arm-cr/qxk/gnu/qk_port.h +++ b/ports/arm-cr/qxk/gnu/qk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/gnu/qs_port.h b/ports/arm-cr/qxk/gnu/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qxk/gnu/qs_port.h +++ b/ports/arm-cr/qxk/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/iar/qep_port.h b/ports/arm-cr/qxk/iar/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qxk/iar/qep_port.h +++ b/ports/arm-cr/qxk/iar/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/iar/qf_port.h b/ports/arm-cr/qxk/iar/qf_port.h index f9ccd80b..3408fff6 100644 --- a/ports/arm-cr/qxk/iar/qf_port.h +++ b/ports/arm-cr/qxk/iar/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/iar/qs_port.h b/ports/arm-cr/qxk/iar/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qxk/iar/qs_port.h +++ b/ports/arm-cr/qxk/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/iar/qxk_port.h b/ports/arm-cr/qxk/iar/qxk_port.h index 3fe0d32f..74029066 100644 --- a/ports/arm-cr/qxk/iar/qxk_port.h +++ b/ports/arm-cr/qxk/iar/qxk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/ti/qep_port.h b/ports/arm-cr/qxk/ti/qep_port.h index f4f04658..e8c2f33b 100644 --- a/ports/arm-cr/qxk/ti/qep_port.h +++ b/ports/arm-cr/qxk/ti/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/ti/qf_port.h b/ports/arm-cr/qxk/ti/qf_port.h index ef52a8e3..1cbea980 100644 --- a/ports/arm-cr/qxk/ti/qf_port.h +++ b/ports/arm-cr/qxk/ti/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/ti/qk_port.h b/ports/arm-cr/qxk/ti/qk_port.h index b763cfef..ed0f71df 100644 --- a/ports/arm-cr/qxk/ti/qk_port.h +++ b/ports/arm-cr/qxk/ti/qk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm-cr/qxk/ti/qs_port.h b/ports/arm-cr/qxk/ti/qs_port.h index 0fb3c55a..da5486ac 100644 --- a/ports/arm-cr/qxk/ti/qs_port.h +++ b/ports/arm-cr/qxk/ti/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm7-9/qk/gnu/qk_port.s b/ports/arm7-9/qk/gnu/qk_port.s index d96f068c..efe73a37 100644 --- a/ports/arm7-9/qk/gnu/qk_port.s +++ b/ports/arm7-9/qk/gnu/qk_port.s @@ -28,7 +28,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com *****************************************************************************/ diff --git a/ports/arm7-9/qk/gnu/qs_port.h b/ports/arm7-9/qk/gnu/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm7-9/qk/gnu/qs_port.h +++ b/ports/arm7-9/qk/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm7-9/qk/iar/qk_port.s b/ports/arm7-9/qk/iar/qk_port.s index 7650fc51..eabe4820 100644 --- a/ports/arm7-9/qk/iar/qk_port.s +++ b/ports/arm7-9/qk/iar/qk_port.s @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; http://www.state-machine.com +; https://state-machine.com ; mailto:info@state-machine.com ;----------------------------------------------------------------------------- diff --git a/ports/arm7-9/qk/iar/qs_port.h b/ports/arm7-9/qk/iar/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm7-9/qk/iar/qs_port.h +++ b/ports/arm7-9/qk/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm7-9/qv/gnu/qs_port.h b/ports/arm7-9/qv/gnu/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm7-9/qv/gnu/qs_port.h +++ b/ports/arm7-9/qv/gnu/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm7-9/qv/iar/qs_port.h b/ports/arm7-9/qv/iar/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/arm7-9/qv/iar/qs_port.h +++ b/ports/arm7-9/qv/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/arm7-9/qv/iar/qv_port.s b/ports/arm7-9/qv/iar/qv_port.s index 7f97adf3..c5b57caf 100644 --- a/ports/arm7-9/qv/iar/qv_port.s +++ b/ports/arm7-9/qv/iar/qv_port.s @@ -28,7 +28,7 @@ ; along with this program. If not, see . ; ; Contact information: -; Web: http://www.state-machine.com +; Web: https://state-machine.com ; Email: info@state-machine.com ;----------------------------------------------------------------------------- diff --git a/ports/embos/README.url b/ports/embos/README.url index 9920858d..3fa0caa5 100644 --- a/ports/embos/README.url +++ b/ports/embos/README.url @@ -1,4 +1,4 @@ [InternetShortcut] -URL=http://www.state-machine.com/qpc/embos.html -IconFile=http://www.state-machine.com/qp.ico +URL=https://state-machine.com/qpc/embos.html +IconFile=https://state-machine.com/qp.ico diff --git a/ports/embos/qf_port.c b/ports/embos/qf_port.c index d2c70a14..2ed5b7da 100644 --- a/ports/embos/qf_port.c +++ b/ports/embos/qf_port.c @@ -4,8 +4,8 @@ * @ingroup ports * @cond ****************************************************************************** -* Last Updated for Version: 5.8.0 -* Date of the Last Update: 2016-11-29 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-05 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -154,7 +154,8 @@ bool QActive_post_(QActive * const me, QEvt const * const e, nFree = (uint_fast16_t)(me->eQueue.maxMsg - me->eQueue.nofMsg); if (nFree > margin) { - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -171,7 +172,7 @@ bool QActive_post_(QActive * const me, QEvt const * const e, QF_CRIT_EXIT_(); /* posting to the embOS mailbox must succeed, see NOTE3 */ - Q_ALLEGE_ID(710, + Q_ALLEGE_ID(410, OS_PutMailCond(&me->eQueue, (OS_CONST_PTR void *)&e) == (char)0); @@ -179,16 +180,17 @@ bool QActive_post_(QActive * const me, QEvt const * const e, } else { /* can tolerate dropping evts? */ - Q_ASSERT(margin != (uint_fast16_t)0); + Q_ASSERT_ID(420, margin != (uint_fast16_t)0); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, QS_priv_.aoObjFilter, me) - QS_TIME_(); /* timestamp */ - QS_OBJ_(sender); /* the sender object */ - QS_SIG_(e->sig); /* the signal of the event */ - QS_OBJ_(me); /* this active object (recipient) */ + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, + QS_priv_.locFilter[AO_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(sender); /* the sender object */ + QS_SIG_(e->sig); /* the signal of the event */ + QS_OBJ_(me); /* this active object (recipient) */ QS_2U8_(e->poolId_, e->refCtr_); /* pool Id & ref Count */ - QS_EQC_((QEQueueCtr)nFree); /* # free entries available */ - QS_EQC_((QEQueueCtr)0); /* min # free entries (unknown) */ + QS_EQC_((QEQueueCtr)nFree); /* # free entries available */ + QS_EQC_((QEQueueCtr)margin); /* margin requested */ QS_END_NOCRIT_() QF_CRIT_EXIT_(); @@ -203,7 +205,7 @@ void QActive_postLIFO_(QActive * const me, QEvt const * const e) { QF_CRIT_STAT_ QF_CRIT_ENTRY_(); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -220,7 +222,7 @@ void QActive_postLIFO_(QActive * const me, QEvt const * const e) { QF_CRIT_EXIT_(); /* posting to the embOS mailbox must succeed, see NOTE3 */ - Q_ALLEGE_ID(810, + Q_ALLEGE_ID(510, OS_PutMailFrontCond(&me->eQueue, (OS_CONST_PTR void *)&e) == (char)0); } @@ -231,7 +233,7 @@ QEvt const *QActive_get_(QActive * const me) { OS_GetMail(&me->eQueue, (void *)&e); - QS_BEGIN_(QS_QF_ACTIVE_GET, QS_priv_.aoObjFilter, me) + QS_BEGIN_(QS_QF_ACTIVE_GET, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -263,4 +265,3 @@ QEvt const *QActive_get_(QActive * const me) { * but this is OK, because the QF/embOS critical sections are designed * to nest. */ - diff --git a/ports/embos/qf_port.h b/ports/embos/qf_port.h index 509959b2..a2e7c5b2 100644 --- a/ports/embos/qf_port.h +++ b/ports/embos/qf_port.h @@ -4,8 +4,8 @@ * @ingroup ports * @cond ****************************************************************************** -* Last Updated for Version: 5.7.2 -* Date of the Last Update: 2016-09-28 +* Last Updated for Version: 5.9.0 / embOS v4.34.1 +* Date of the Last Update: 2017-05-04 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -77,12 +77,12 @@ void QF_setEmbOsTaskAttr(QActive *act, uint32_t attr); /* embOS-specific scheduler locking, see NOTE3 */ #define QF_SCHED_STAT_ #define QF_SCHED_LOCK_(dummy) do { \ - if (OS_InInt == (OS_U8)0) { \ + if (OS_InInterrupt() == (OS_BOOL)0) { \ OS_EnterRegion(); \ } \ } while (0) #define QF_SCHED_UNLOCK_() do { \ - if (OS_InInt == (OS_U8)0) { \ + if (OS_InInterrupt() == (OS_BOOL)0) { \ OS_LeaveRegion(); \ } \ } while (0) diff --git a/ports/embos/qs_port.h b/ports/embos/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/embos/qs_port.h +++ b/ports/embos/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/lint/MISRA_Exemplar_Suite_test/lin.bat b/ports/lint/MISRA_Exemplar_Suite_test/lin.bat index 9dfd74f9..9b679709 100644 --- a/ports/lint/MISRA_Exemplar_Suite_test/lin.bat +++ b/ports/lint/MISRA_Exemplar_Suite_test/lin.bat @@ -10,10 +10,10 @@ :: :: Copyright (C) 2002-2013 Quantum Leaps, LLC. All rights reserved. :: -:: This program is open source software: you can redistribute it and/or -:: modify it under the terms of the GNU General Public License as published -:: by the Free Software Foundation, either version 3 of the License, or -:: (at your option) any later version. +:: This program is open source software: you can redistribute it and/or +:: modify it under the terms of the GNU General Public License as published +:: by the Free Software Foundation, either version 3 of the License, or +:: (at your option) any later version. :: :: Alternatively, this program may be distributed and modified under the :: terms of Quantum Leaps commercial licenses, which expressly supersede @@ -30,7 +30,7 @@ :: :: Contact information: :: Quantum Leaps Web sites: http://www.quantum-leaps.com -:: http://www.state-machine.com +:: https://state-machine.com :: e-mail: info@quantum-leaps.com :: =========================================================================== setlocal diff --git a/ports/lint/README.url b/ports/lint/README.url index 8b9ce792..7f6df558 100644 --- a/ports/lint/README.url +++ b/ports/lint/README.url @@ -1,4 +1,8 @@ [InternetShortcut] -URL=http://www.state-machine.com/qpc/lint.html +URL=https://state-machine.com/qpc/lint.html IconFile=http://www.state-machine.com/qp.ico +IDList= +HotKey=0 +[{000214A0-0000-0000-C000-000000000046}] +Prop3=19,11 diff --git a/ports/lint/lin.bat b/ports/lint/lin.bat index ffb5f9c2..4b236978 100644 --- a/ports/lint/lin.bat +++ b/ports/lint/lin.bat @@ -1,8 +1,8 @@ @echo off :: =========================================================================== :: Product: QP/C build script for PC-Lint(TM), Standard C compiler -:: Last Updated for Version: 5.7.2 -:: Date of the Last Update: 2016-09-28 +:: Last Updated for Version: 5.8.3 +:: Date of the Last Update: 2017-03-27 :: :: Q u a n t u m L e a P s :: --------------------------- @@ -29,7 +29,7 @@ :: along with this program. If not, see . :: :: Contact information: -:: http://www.state-machine.com +:: https://state-machine.com :: mailto:info@state-machine.com :: =========================================================================== setlocal diff --git a/ports/lint/options.lnt b/ports/lint/options.lnt index bc029126..004b7a10 100644 --- a/ports/lint/options.lnt +++ b/ports/lint/options.lnt @@ -1,201 +1,207 @@ -////////////////////////////////////////////////////////////////////////////// -// Product: PC-Lint 9.x option file for linting QP/C -// Last updated for version 5.8.0 -// Last updated on 2016-11-29 -// -// Q u a n t u m L e a P s -// --------------------------- -// innovating embedded systems -// -// Copyright (C) Quantum Leaps, LLC. All rights reserved. -// -// This program is open source software: you can redistribute it and/or -// modify it under the terms of the GNU General Public License as published -// by the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// Alternatively, this program may be distributed and modified under the -// terms of Quantum Leaps commercial licenses, which expressly supersede -// the GNU General Public License and are specifically designed for -// licensees interested in retaining the proprietary status of their code. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// -// Contact information: -// http://www.state-machine.com -// mailto:info@state-machine.com -////////////////////////////////////////////////////////////////////////////// - -// library headers -+libclass() // lint all header files, including "foreign" -//-vf // print names of all source files - -+fdi // start #include search in dir of the including file --i. // QP/C port includes (see also qk/ and qv/) --i../../include // QP/C includes - --si4 // sizeof(int) --ss2 // sizeof(short) --spD4 // sizeof(void *) --spP4 // sizeof(function pointer) - - -au-misra2.lnt // MISRA-C:2004 options -au-ds.lnt // Dan Saks recommendations -qpc.lnt // QP/C options --strong(AXJ) // Strong type checking - -// general -+e900 // prints a success message at the end - -// QEP --emacro(960, // MISRA04-14.3(req) null not in line by itself - QEP_ENTER_, - QEP_EXIT_) --emacro(960, // MISR04-17.4(req), pointer arithmetic - QEP_ACT_PTR_INC_) --estring(961, // MISRA04-19.7(adv) function-like macro - QEP_TRIG_, - QEP_ENTER_, - QEP_EXIT_, - QEP_ACT_PTR_INC_) --emacro(717, // do ... while(0); - QEP_ENTER_, - QEP_EXIT_) --efunc(632, // Assignment to strong type 'QStateHandler' - QHsm_init) - -efunc(661, // Possible access of out-of-bounds pointer - QMsm_execTatbl_) --efunc(644, // Variable 'entry' may not be initialized - QMsm_enterHistory_) - -// QF --emacro(960, // MISRA04-11.5(req) cast away const - QF_EVT_REF_CTR_INC_, - QF_EVT_REF_CTR_DEC_, - QF_EPOOL_PUT_) --esym(960, // MISRA04-8.7(req) could define at block scope - QF_log2Lkup, - QF_subscrList_, - QF_maxPubSignal_) --emacro(960, // MISRA04-17.4(req) pointer arithmetic - QF_PTR_AT_) --emacro(946, // MISRA04-17.2(req),17.3(req) - QF_PTR_RANGE_) // Relation or subtraction applied to pointers --emacro(929, // MISRA04-11.4(adv) cast pointer to pointer - QF_EVT_REF_CTR_INC_, - QF_EVT_REF_CTR_DEC_, - QF_EPOOL_PUT_) --estring(961, // MISRA04-19.7(adv) function-like macro - QF_EVT_REF_CTR_INC_, - QF_EVT_REF_CTR_DEC_, - QF_PTR_AT_, - QF_CRIT_ENTRY_, - QF_CRIT_EXIT_, - QF_SCHED_LOCK_, - QF_SCHED_UNLOCK_, - QF_ISR_CONTEXT_, - QF_PTR_RANGE_, - QF_MPOOL_EL) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QF_CRIT_ENTRY_, - QF_CRIT_EXIT_, - QF_SCHED_STAT_, - QF_SCHED_LOCK_, - QF_SCHED_UNLOCK_, - QF_EPOOL_TYPE_, - QF_ACTIVE_SUPER_, - QF_ACTIVE_STATE_, - QF_CRIT_STAT_, - QF_PTR_AT_, - QACTIVE_EQUEUE_WAIT_, - QACTIVE_EQUEUE_SIGNAL_, - QACTIVE_EQUEUE_ONEMPTY_) --efunc(818, // MISRA04-16.7(adv) 'stkSto' could be const - QActive_start_) --efunc(527, QF_run) // MISRA04-14.17(req) Unreachable code --emacro({717}, // do ... while(0); - QACTIVE_EQUEUE_SIGNAL_, - QACTIVE_EQUEUE_ONEMPTY_, - QF_SCHED_LOCK_, - QF_SCHED_UNLOCK_) --esym(960, 8.8) // MISRA04-8.8(req) Seems to be checked incorrectly... - -// QV - -// QK - -// QXK --estring(961, // MISRA04-19.7(adv) function-like macro - QXK_CONTEXT_SWITCH_) - -// QS -- the following options are needed only when Q_SPY is defined --emacro(960, // MISRA04-17.4(req), pointer arithmetic - QS_RX_AT_, - QS_PTR_INC_) --efunc(960, // MISRA04-18.4(req) declaration of union - QS_f32, - QS_f64) --estring(960, // MISRA04-8.7(req) could use block scope - QS_seq_, - QS_priv_) --estring(961, // MISRA04-19.7(adv) function-like macro - QS_INSERT_BYTE, - QS_INSERT_ESC_BYTE, - QS_INSERT_CHKSUM_BYTE, - QS_PTR_INC_, - QS_RX_AT_, - QS_RX_TRAN_) --emacro(506, // MISRA04-13.7(req) & 14.1(req) - QS_BEGIN_, - QS_BEGIN_NOCRIT_) --emacro(923, // MISRA04-11.1(req) & 11.3(req) - QS_OBJ_, - QS_FUN_) --emacro(572, // MISRA04-12.8(req) excessive shift value - QS_BEGIN_, - QS_BEGIN_NOCRIT_) --esym(960, // MISRA04-19.4(req) Disallowed macro definition - QS_BEGIN_, - QS_END_, - QS_BEGIN_NOCRIT_, - QS_END_NOCRIT_, - QS_INSERT_BYTE, - QS_INSERT_ESC_BYTE, - QS_INSERT_CHKSUM_BYTE, - QS_EQC_, - QS_EVS_, - QS_MPS_, - QS_MPC_, - QS_TEC_) --emacro(961, QS_TEC_) // MISRA04-12.13(adv) --emacro(774, // Boolean within 'if' always False - QS_BEGIN_, - QS_BEGIN_NOCRIT_) --emacro(778, // expression evaluates to 0 in operation '>>' - QS_BEGIN_, - QS_BEGIN_NOCRIT_) --emacro(845, // The right argument of '<<' is zero - QS_BEGIN_, - QS_BEGIN_NOCRIT_) --emacro(725, // Expected positive indentation - QS_END_, - QS_END_NOCRIT_) --emacro(778, // zero in operation '&' - QS_BEGIN_NOCRIT_) --estring(960, // MISRA04-18.4(req) declaration of union type - QSRxExtState) --esym(754, // Info: Symbol not referenced - U32Rep::u32) - -// Warning 537 "Repeated include file" is generated only for QEP source code -// This warning is redundant, because all QP header files are protected -// by #ifndef xxx_h ... #endif preprocessor checks. --e537 // Repeated include file (checked by 451) - +////////////////////////////////////////////////////////////////////////////// +// Product: PC-Lint 9.x option file for linting QP/C +// Last updated for version 5.9.0 +// Last updated on 2017-05-10 +// +// Q u a n t u m L e a P s +// --------------------------- +// innovating embedded systems +// +// Copyright (C) Quantum Leaps, LLC. All rights reserved. +// +// This program is open source software: you can redistribute it and/or +// modify it under the terms of the GNU General Public License as published +// by the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Alternatively, this program may be distributed and modified under the +// terms of Quantum Leaps commercial licenses, which expressly supersede +// the GNU General Public License and are specifically designed for +// licensees interested in retaining the proprietary status of their code. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// Contact information: +// http://www.state-machine.com +// mailto:info@state-machine.com +////////////////////////////////////////////////////////////////////////////// + +// library headers ++libclass() // lint all header files, including "foreign" +//-vf // print names of all source files + ++fdi // start #include search in dir of the including file +-i. // QP/C port includes (see also qk/ and qv/) +-i../../include // QP/C includes + +-si4 // sizeof(int) +-ss2 // sizeof(short) +-spD4 // sizeof(void *) +-spP4 // sizeof(function pointer) + + +au-misra2.lnt // MISRA-C:2004 options +au-ds.lnt // Dan Saks recommendations +qpc.lnt // QP/C options +-strong(AXJ) // Strong type checking + +// general ++e900 // prints a success message at the end + +// QEP +-emacro(960, // MISRA04-14.3(req) null not in line by itself + QEP_ENTER_, + QEP_EXIT_) +-emacro(960, // MISR04-17.4(req), pointer arithmetic + QEP_ACT_PTR_INC_) +-estring(961, // MISRA04-19.7(adv) function-like macro + QEP_TRIG_, + QEP_ENTER_, + QEP_EXIT_, + QEP_ACT_PTR_INC_) +-emacro(717, // do ... while(0); + QEP_ENTER_, + QEP_EXIT_) +-efunc(632, // Assignment to strong type 'QStateHandler' + QHsm_init) +-efunc(661, // Possible access of out-of-bounds pointer + QMsm_execTatbl_) +-efunc(644, // Variable 'entry' may not be initialized + QMsm_enterHistory_) + +// QF +-emacro(960, // MISRA04-11.5(req) cast away const + QF_EVT_REF_CTR_INC_, + QF_EVT_REF_CTR_DEC_, + QF_EPOOL_PUT_) +-esym(960, // MISRA04-8.7(req) could define at block scope + QF_log2Lkup, + QF_subscrList_, + QF_maxPubSignal_) +-emacro(960, // MISRA04-17.4(req) pointer arithmetic + QF_PTR_AT_) +-emacro(946, // MISRA04-17.2(req),17.3(req) + QF_PTR_RANGE_) // Relation or subtraction applied to pointers +-emacro(929, // MISRA04-11.4(adv) cast pointer to pointer + QF_EVT_REF_CTR_INC_, + QF_EVT_REF_CTR_DEC_, + QF_EPOOL_PUT_, + QMSM_CAST, + QTICKER_CAST) +-estring(961, // MISRA04-19.7(adv) function-like macro + QF_EVT_REF_CTR_INC_, + QF_EVT_REF_CTR_DEC_, + QF_PTR_AT_, + QF_CRIT_ENTRY_, + QF_CRIT_EXIT_, + QF_SCHED_LOCK_, + QF_SCHED_UNLOCK_, + QF_ISR_CONTEXT_, + QF_PTR_RANGE_, + QF_MPOOL_EL, + QMSM_CAST, + QTICKER_CAST) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QF_CRIT_ENTRY_, + QF_CRIT_EXIT_, + QF_SCHED_STAT_, + QF_SCHED_LOCK_, + QF_SCHED_UNLOCK_, + QF_EPOOL_TYPE_, + QF_ACTIVE_SUPER_, + QF_ACTIVE_STATE_, + QF_CRIT_STAT_, + QF_PTR_AT_, + QACTIVE_EQUEUE_WAIT_, + QACTIVE_EQUEUE_SIGNAL_, + QACTIVE_EQUEUE_ONEMPTY_) +-emacro(740, // MISRA04-1.2(req) Unusual pointer cast (icomp. indirect types) + QMSM_CAST) +-efunc(818, // MISRA04-16.7(adv) 'stkSto' could be const + QActive_start_) +-efunc(527, QF_run) // MISRA04-14.17(req) Unreachable code +-emacro({717}, // do ... while(0); + QACTIVE_EQUEUE_SIGNAL_, + QACTIVE_EQUEUE_ONEMPTY_, + QF_SCHED_LOCK_, + QF_SCHED_UNLOCK_) +-esym(960, 8.8) // MISRA04-8.8(req) Seems to be checked incorrectly... + +// QV + +// QK + +// QXK +-estring(961, // MISRA04-19.7(adv) function-like macro + QXK_CONTEXT_SWITCH_) + +// QS -- the following options are needed only when Q_SPY is defined +-emacro(960, // MISRA04-17.4(req), pointer arithmetic + QS_RX_AT_, + QS_PTR_INC_) +-efunc(960, // MISRA04-18.4(req) declaration of union + QS_f32, + QS_f64) +-estring(960, // MISRA04-8.7(req) could use block scope + QS_seq_, + QS_priv_) +-estring(961, // MISRA04-19.7(adv) function-like macro + QS_INSERT_BYTE, + QS_INSERT_ESC_BYTE, + QS_INSERT_CHKSUM_BYTE, + QS_PTR_INC_, + QS_RX_AT_, + QS_RX_TRAN_) +-emacro(506, // MISRA04-13.7(req) & 14.1(req) + QS_BEGIN_, + QS_BEGIN_NOCRIT_) +-emacro(923, // MISRA04-11.1(req) & 11.3(req) + QS_OBJ_, + QS_FUN_) +-emacro(572, // MISRA04-12.8(req) excessive shift value + QS_BEGIN_, + QS_BEGIN_NOCRIT_) +-esym(960, // MISRA04-19.4(req) Disallowed macro definition + QS_BEGIN_, + QS_END_, + QS_BEGIN_NOCRIT_, + QS_END_NOCRIT_, + QS_INSERT_BYTE, + QS_INSERT_ESC_BYTE, + QS_INSERT_CHKSUM_BYTE, + QS_EQC_, + QS_EVS_, + QS_MPS_, + QS_MPC_, + QS_TEC_) +-emacro(961, QS_TEC_) // MISRA04-12.13(adv) +-emacro(774, // Boolean within 'if' always False + QS_BEGIN_, + QS_BEGIN_NOCRIT_) +-emacro(778, // expression evaluates to 0 in operation '>>' + QS_BEGIN_, + QS_BEGIN_NOCRIT_) +-emacro(845, // The right argument of '<<' is zero + QS_BEGIN_, + QS_BEGIN_NOCRIT_) +-emacro(725, // Expected positive indentation + QS_END_, + QS_END_NOCRIT_) +-emacro(778, // zero in operation '&' + QS_BEGIN_NOCRIT_) +-estring(960, // MISRA04-18.4(req) declaration of union type + QSRxExtState) +-esym(754, // Info: Symbol not referenced + U32Rep::u32) + +// Warning 537 "Repeated include file" is generated only for QEP source code +// This warning is redundant, because all QP header files are protected +// by #ifndef xxx_h ... #endif preprocessor checks. +-e537 // Repeated include file (checked by 451) + diff --git a/ports/lint/qk/qf_port.h b/ports/lint/qk/qf_port.h index 28f46f1e..38ba2e10 100644 --- a/ports/lint/qk/qf_port.h +++ b/ports/lint/qk/qf_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/lint/qk/qk_port.h b/ports/lint/qk/qk_port.h index ed296f74..d5e54d0a 100644 --- a/ports/lint/qk/qk_port.h +++ b/ports/lint/qk/qk_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/lint/qs_port.h b/ports/lint/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/lint/qs_port.h +++ b/ports/lint/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/lint/qv/qf_port.h b/ports/lint/qv/qf_port.h index 6ac450b8..60698477 100644 --- a/ports/lint/qv/qf_port.h +++ b/ports/lint/qv/qf_port.h @@ -4,14 +4,14 @@ * @ingroup qv * @cond ****************************************************************************** -* Last updated for version 5.6.0 -* Last updated on 2015-12-14 +* Last updated for version 5.9.0 +* Last updated on 2017-02-28 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -261,7 +261,7 @@ void intEnable(void); * * @note The provided code is just an example (for ARM Cortex-M). */ -#define QF_CPU_SLEEP() do { \ +#define QV_CPU_SLEEP() do { \ __disable_interrupt(); \ QF_INT_ENABLE(); \ __WFI(); \ diff --git a/ports/lint/qxk/qep_port.h b/ports/lint/qxk/qep_port.h index 56116aae..4e0bde5e 100644 --- a/ports/lint/qxk/qep_port.h +++ b/ports/lint/qxk/qep_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/lint/qxk/qf_port.h b/ports/lint/qxk/qf_port.h index 6b426118..b74024ca 100644 --- a/ports/lint/qxk/qf_port.h +++ b/ports/lint/qxk/qf_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/lint/qxk/qs_port.h b/ports/lint/qxk/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/lint/qxk/qs_port.h +++ b/ports/lint/qxk/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/lint/qxk/qxk_port.h b/ports/lint/qxk/qxk_port.h index 8062d2ee..dc6accfc 100644 --- a/ports/lint/qxk/qxk_port.h +++ b/ports/lint/qxk/qxk_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/msp430/qk/ccs/qk_port.h b/ports/msp430/qk/ccs/qk_port.h index 217a721d..44d3e4d3 100644 --- a/ports/msp430/qk/ccs/qk_port.h +++ b/ports/msp430/qk/ccs/qk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/msp430/qk/ccs/qs_port.h b/ports/msp430/qk/ccs/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/msp430/qk/ccs/qs_port.h +++ b/ports/msp430/qk/ccs/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/msp430/qk/iar/qk_port.h b/ports/msp430/qk/iar/qk_port.h index 17ae5e54..04ae25a7 100644 --- a/ports/msp430/qk/iar/qk_port.h +++ b/ports/msp430/qk/iar/qk_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/msp430/qk/iar/qs_port.h b/ports/msp430/qk/iar/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/msp430/qk/iar/qs_port.h +++ b/ports/msp430/qk/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/msp430/qv/ccs/qs_port.h b/ports/msp430/qv/ccs/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/msp430/qv/ccs/qs_port.h +++ b/ports/msp430/qv/ccs/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/msp430/qv/iar/qs_port.h b/ports/msp430/qv/iar/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/msp430/qv/iar/qs_port.h +++ b/ports/msp430/qv/iar/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/posix-qutest/Makefile b/ports/posix-qutest/Makefile new file mode 100644 index 00000000..6e6c0a45 --- /dev/null +++ b/ports/posix-qutest/Makefile @@ -0,0 +1,172 @@ +############################################################################## +# Product: Makefile for QUTEST, QP/C, POSIX, GNU toolset +# Last Updated for Version: 5.9.0 +# Date of the Last Update: 2017-04-18 +# +# Q u a n t u m L e a P s +# --------------------------- +# innovating embedded systems +# +# Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +# +# This program is open source software: you can redistribute it and/or +# modify it under the terms of the GNU General Public License as published +# by the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# Alternatively, this program may be distributed and modified under the +# terms of Quantum Leaps commercial licenses, which expressly supersede +# the GNU General Public License and are specifically designed for +# licensees interested in retaining the proprietary status of their code. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Contact information: +# https://state-machine.com +# mailto:info@state-machine.com +############################################################################## +# examples of invoking this Makefile: +# make +# +# cleaning +# make clean +# + +#----------------------------------------------------------------------------- +# project name +# +PROJECT := qp + +#----------------------------------------------------------------------------- +# project directories +# + +# location of the QP/C framework +QPC := ../.. + +# QP port used in this project +QP_PORT_DIR := . + + +# list of all source directories used by this project +VPATH = \ + $(QPC)/source \ + $(QP_PORT_DIR) + +# list of all include directories needed by this project +INCLUDES = \ + -I$(QPC)/include \ + -I$(QPC)/source \ + -I$(QP_PORT_DIR) + +#----------------------------------------------------------------------------- +# files +# + +# C source files +C_SRCS := \ + qep_hsm.c \ + qep_msm.c \ + qf_act.c \ + qf_defer.c \ + qf_dyn.c \ + qf_mem.c \ + qf_ps.c \ + qf_qact.c \ + qf_qeq.c \ + qf_qmact.c \ + qs.c \ + qs_64bit.c \ + qs_rx.c \ + qs_fp.c \ + qutest.c \ + qutest_port.c + +# C++ source files +CPP_SRCS := + +# defines +DEFINES := + +#----------------------------------------------------------------------------- +# GNU toolset +# +CC := gcc +CPP := g++ +LIB := ar + + +############################################################################## +# Typically, you should not need to change anything below this line + +MKDIR := mkdir -p +RM := rm -f + +#----------------------------------------------------------------------------- +# build options +# + +BIN_DIR := posix + +CFLAGS = -g -O -Wall -Wstrict-prototypes -W $(INCLUDES) $(DEFINES) \ + -DQ_SPY -DQ_UTEST -DQ_HOST + +CPPFLAGS = -fno-rtti -fno-exceptions \ + -O -Wall -W $(INCLUDES) $(DEFINES) -DQ_SPY -DQ_UTEST -DQ_HOST + +LIBFLAGS := rs + +C_OBJS := $(patsubst %.c,%.o, $(notdir $(C_SRCS))) +CPP_OBJS := $(patsubst %.cpp,%.o,$(notdir $(CPP_SRCS))) + +TARGET_LIB := $(BIN_DIR)/lib$(PROJECT).a +C_OBJS_EXT := $(addprefix $(BIN_DIR)/, $(C_OBJS)) +CPP_OBJS_EXT := $(addprefix $(BIN_DIR)/, $(CPP_OBJS)) + +# create $(BIN_DIR) if it does not exist +ifeq ("$(wildcard $(BIN_DIR))","") +$(shell $(MKDIR) $(BIN_DIR)) +endif + +#----------------------------------------------------------------------------- +# rules +# + +all: $(TARGET_LIB) + -$(RM) $(BIN_DIR)/*.o + +$(TARGET_LIB) : $(ASM_OBJS_EXT) $(C_OBJS_EXT) $(CPP_OBJS_EXT) + $(LIB) $(LIBFLAGS) $@ $^ + +$(BIN_DIR)/%.o : %.c + $(CC) $(CFLAGS) -c $< -o $@ + +$(BIN_DIR)/%.o : %.cpp + $(CPP) $(CPPFLAGS) -c $< -o $@ + +#----------------------------------------------------------------------------- +# the clean target +# +.PHONY : clean +clean: + -$(RM) $(BIN_DIR)/*.o $(TARGET_LIB) + +#----------------------------------------------------------------------------- +# the show target for debugging +# +show: + @echo PROJECT = $(PROJECT) + @echo CONF = $(CONF) + @echo TARGET_LIB = $(TARGET_LIB) + @echo C_SRCS = $(C_SRCS) + @echo CPP_SRCS = $(CPP_SRCS) + @echo C_OBJS_EXT = $(C_OBJS_EXT) + @echo C_DEPS_EXT = $(C_DEPS_EXT) + @echo CPP_OBJS_EXT = $(CPP_OBJS_EXT) + @echo CPP_DEPS_EXT = $(CPP_DEPS_EXT) diff --git a/ports/posix-qutest/qep_port.h b/ports/posix-qutest/qep_port.h new file mode 100644 index 00000000..e2fea9e9 --- /dev/null +++ b/ports/posix-qutest/qep_port.h @@ -0,0 +1,48 @@ +/** +* @file +* @brief QEP/C port, generic C99 compiler +* @ingroup ports +* @cond +****************************************************************************** +* Last Updated for Version: 5.4.0 +* Date of the Last Update: 2015-04-08 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qep_port_h +#define qep_port_h + +#include /* Exact-width types. WG14/N843 C99 Standard */ +#include /* Boolean type. WG14/N843 C99 Standard */ + +#include "qep.h" /* QEP platform-independent public interface */ + +#endif /* qep_port_h */ diff --git a/ports/posix-qutest/qf_port.h b/ports/posix-qutest/qf_port.h new file mode 100644 index 00000000..8312eb5c --- /dev/null +++ b/ports/posix-qutest/qf_port.h @@ -0,0 +1,102 @@ +/** +* @file +* @brief QF/C "port" for QUTEST unit test, generic C99 compiler +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-02 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qf_port_h +#define qf_port_h + +/* QUTEST event queue and thread types */ +#define QF_EQUEUE_TYPE QEQueue +/*#define QF_OS_OBJECT_TYPE */ +/*#define QF_THREAD_TYPE */ + +/* The maximum number of active objects in the application */ +#define QF_MAX_ACTIVE 64 + +/* The number of system clock tick rates */ +#define QF_MAX_TICK_RATE 2 + +/* QF interrupt disable/enable */ +#define QF_INT_DISABLE() (++QF_intNest) +#define QF_INT_ENABLE() (--QF_intNest) + +/* QF critical section */ +/* QF_CRIT_STAT_TYPE not defined */ +#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() +#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() + +/* QF_LOG2 not defined -- use the internal LOG2() implementation */ + +#include "qep_port.h" /* QEP port */ +#include "qequeue.h" /* QUTEST port uses QEQueue event-queue */ +#include "qmpool.h" /* QUTEST port uses QMPool memory-pool */ +#include "qf.h" /* QF platform-independent public interface */ + +/* interrupt nesting up-down counter */ +extern uint8_t volatile QF_intNest; + +/****************************************************************************/ +/* interface used only inside QF implementation, but not in applications */ +#ifdef QP_IMPL + + /* QUTEST scheduler locking (not used) */ + #define QF_SCHED_STAT_ + #define QF_SCHED_LOCK_(dummy) ((void)0) + #define QF_SCHED_UNLOCK_() ((void)0) + + /* QUTEST active object event queue customization (not used) */ + #define QACTIVE_EQUEUE_WAIT_(me_) ((void)0) + #define QACTIVE_EQUEUE_SIGNAL_(me_) ((void)0) + + /* native QF event pool operations */ + #define QF_EPOOL_TYPE_ QMPool + #define QF_EPOOL_INIT_(p_, poolSto_, poolSize_, evtSize_) \ + QMPool_init(&(p_), (poolSto_), (poolSize_), (evtSize_)) + + #define QF_EPOOL_EVENT_SIZE_(p_) ((p_).blockSize) + #define QF_EPOOL_GET_(p_, e_, m_) ((e_) = (QEvt *)QMPool_get(&(p_), (m_))) + #define QF_EPOOL_PUT_(p_, e_) (QMPool_put(&(p_), e_)) + +#endif /* QP_IMPL */ + +/***************************************************************************** +* NOTE1: +* This QF "port" provides dummy declaration for the QF stub that provides +* empty definitions of the QF facilities. +*/ + +#endif /* qf_port_h */ diff --git a/ports/posix-qutest/qs_port.h b/ports/posix-qutest/qs_port.h new file mode 100644 index 00000000..5b1edeed --- /dev/null +++ b/ports/posix-qutest/qs_port.h @@ -0,0 +1,67 @@ +/** +* @file +* @brief QS/C port to QUTEST, POSIX with GNU compiler +* @ingroup ports +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-16 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qs_port_h +#define qs_port_h + +/* QS time-stamp size in bytes */ +#define QS_TIME_SIZE 4 + +#if defined(__LP64__) || defined(_LP64) /* 64-bit architecture? */ + #define QS_OBJ_PTR_SIZE 8 + #define QS_FUN_PTR_SIZE 8 +#else /* 32-bit architecture */ + #define QS_OBJ_PTR_SIZE 4 + #define QS_FUN_PTR_SIZE 4 +#endif + +/* flush the QS output buffer after each QS record */ +#define QS_REC_DONE() QS_onFlush() + +/***************************************************************************** +* NOTE: QS might be used with or without other QP components, in which +* case the separate definitions of the macros QF_CRIT_STAT_TYPE, +* QF_CRIT_ENTRY, and QF_CRIT_EXIT are needed. In this port QS is configured +* to be used with the other QP component, by simply including "qf_port.h" +* *before* "qs.h". +*/ +#include "qf_port.h" /* use QS with QF */ +#include "qs.h" /* QS platform-independent public interface */ + +#endif /* qs_port_h */ diff --git a/ports/posix-qutest/qutest_port.c b/ports/posix-qutest/qutest_port.c new file mode 100644 index 00000000..4e0b105a --- /dev/null +++ b/ports/posix-qutest/qutest_port.c @@ -0,0 +1,277 @@ +/** +* @file +* @brief QS/C QUTEST port for POSIX +* @ingroup qf +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-17 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#define QP_IMPL /* this is QP implementation */ +#include "qf_port.h" /* QF port */ +#include "qassert.h" /* QP embedded systems-friendly assertions */ +#include "qs_port.h" /* include QS port */ + +Q_DEFINE_THIS_MODULE("qs_port") + +#ifndef Q_SPY + #error "Q_SPY must be defined for QTEST application" +#endif /* Q_SPY */ + +#include /* for printf() and _snprintf_s() */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define QS_TX_SIZE (4*1024) +#define QS_RX_SIZE 1024 +#define QS_IMEOUT_MS 100 +#define INVALID_SOCKET -1 + +/* local variables .........................................................*/ +static int l_sock = INVALID_SOCKET; +static struct termios l_termios_saved; /* saved terminal attributes */ + +/*..........................................................................*/ +uint8_t QS_onStartup(void const *arg) { + static uint8_t qsBuf[QS_TX_SIZE]; /* buffer for QS-TX channel */ + static uint8_t qsRxBuf[QS_RX_SIZE]; /* buffer for QS-RX channel */ + char hostName[64]; + char const *src; + char *dst; + + uint16_t port_local = 51234; /* default local port */ + uint16_t port_remote = 6601; /* default QSPY server port */ + int sockopt_bool; + struct sockaddr_in sa_local; + struct sockaddr_in sa_remote; + struct hostent *host; + + struct termios t; + + QS_initBuf(qsBuf, sizeof(qsBuf)); + QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf)); + + src = (arg != (void const *)0) + ? (char const *)arg + : "localhost"; + dst = hostName; + while ((*src != '\0') + && (*src != ':') + && (dst < &hostName[sizeof(hostName)])) + { + *dst++ = *src++; + } + *dst = '\0'; + if (*src == ':') { + port_remote = (uint16_t)strtoul(src + 1, NULL, 10); + } + + l_sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP); /* TCP socket */ + if (l_sock == INVALID_SOCKET){ + printf(" ERROR cannot create client socket, errno=%d\n", + errno); + goto error; + } + + /* configure the socket */ + sockopt_bool = 1; + setsockopt(l_sock, SOL_SOCKET, SO_REUSEADDR, + &sockopt_bool, sizeof(sockopt_bool)); + + sockopt_bool = 0; + setsockopt(l_sock, SOL_SOCKET, SO_LINGER, + &sockopt_bool, sizeof(sockopt_bool)); + + /* local address:port */ + memset(&sa_local, 0, sizeof(sa_local)); + sa_local.sin_family = AF_INET; + sa_local.sin_port = htons(port_local); + host = gethostbyname(""); /* local host */ + //sa_local.sin_addr.s_addr = inet_addr( + // inet_ntoa(*(struct in_addr *)*host->h_addr_list)); + //if (bind(l_sock, &sa_local, sizeof(sa_local)) == -1) { + // printf(" Cannot bind to the local port Err=0x%08X\n", + // WSAGetLastError()); + // /* no error */ + //} + + /* remote hostName:port (QSPY server socket) */ + host = gethostbyname(hostName); + if (host == NULL) { + printf(" ERROR cannot be resolve host name, errno=%d\n", + errno); + goto error; + } + memset(&sa_remote, 0, sizeof(sa_remote)); + sa_remote.sin_family = AF_INET; + memcpy(&sa_remote.sin_addr, host->h_addr, host->h_length); + sa_remote.sin_port = htons(port_remote); + + /* try to connect to the QSPY server */ + if (connect(l_sock, (struct sockaddr *)&sa_remote, sizeof(sa_remote)) + == -1) + { + printf(" ERROR cannot be connected to QSPY, errno=%d\n", + errno); + goto error; + } + + printf(" Connected to QSPY via TCP/IP\n"); //??? + + /* modify the terminal attributes... */ + /* get the original terminal settings */ + if (tcgetattr(0, &l_termios_saved) == -1) { + printf(" ERROR getting terminal attributes\n"); + goto error; + } + + t = l_termios_saved; + t.c_lflag &= ~(ICANON | ECHO); /* disable canonical mode and echo */ + if (tcsetattr(0, TCSANOW, &t) == -1) { + printf(" ERROR setting terminal attributes"); + goto error; + } + + //printf(" Connected to QSPY via TCP/IP\n"); + return (uint8_t)1; /* success */ + +error: + return (uint8_t)0; /* failure */ +} +/*..........................................................................*/ +void QS_onCleanup(void) { + if (l_sock != INVALID_SOCKET) { + close(l_sock); + l_sock = INVALID_SOCKET; + } + /* restore the saved terminal settings */ + tcsetattr(0, TCSANOW, &l_termios_saved); + //printf(" Disconnected from QSPY via TCP/IP\n"); +} +/*..........................................................................*/ +void QS_onReset(void) { + QS_onCleanup(); + exit(0); +} + +/*..........................................................................*/ +void QS_onTestLoop() { + fd_set readSet; + FD_ZERO(&readSet); + + QS_rxPriv_.inTestLoop = true; + while (QS_rxPriv_.inTestLoop) { + static struct timeval timeout = { + (long)0, (long)(QS_IMEOUT_MS * 1000) + }; + int nrec; + uint16_t nBytes; + uint8_t const *block; + + FD_SET(0, &readSet); /* console/terminal */ + FD_SET(l_sock, &readSet); /* the socket */ + + /* selective, timed blocking on the TCP/IP socket... */ + timeout.tv_usec = (long)(QS_IMEOUT_MS * 1000); + nrec = select(l_sock + 1, &readSet, + (fd_set *)0, (fd_set *)0, &timeout); + if (nrec < 0) { + printf(" ERROR select() errno=%d\n", errno); + QS_onCleanup(); + exit(-2); + } + else if (nrec > 0) { + if (FD_ISSET(l_sock, &readSet)) { /* socket ready to read? */ + uint8_t buf[QS_RX_SIZE]; + int status = recv(l_sock, (char *)buf, (int)sizeof(buf), 0); + while (status > 0) { /* any data received? */ + uint8_t *pb; + int i = (int)QS_rxGetNfree(); + if (i > status) { + i = status; + } + status -= i; + /* reorder the received bytes into QS-RX buffer */ + for (pb = &buf[0]; i > 0; --i, ++pb) { + QS_RX_PUT(*pb); + } + QS_rxParse(); /* parse all n-bytes of data */ + } + } + if (FD_ISSET(0, &readSet)) { /* console/terminal redy to read? */ + char ch; + read(0, &ch, 1); + switch (ch) { + case 'x': /* 'x' pressed? */ + case 'X': /* 'X' pressed? */ + case '\033': { /* ESC pressed? */ + QS_onCleanup(); + exit(0); + break; + } + } + } + } + + nBytes = QS_TX_SIZE; + //QF_CRIT_ENTRY(dummy); + block = QS_getBlock(&nBytes); + //QF_CRIT_EXIT(dummy); + + if (block != (uint8_t *)0) { + send(l_sock, (char const *)block, nBytes, 0); + } + } + /* set inTestLoop to true in case calls to QS_onTestLoop() nest, + * which can happen through the calls to QS_TEST_PAUSE(). + */ + QS_rxPriv_.inTestLoop = true; +} +/*..........................................................................*/ +void QS_onFlush(void) { + uint16_t nBytes = (uint16_t)QS_TX_SIZE; + uint8_t const *block; + while ((block = QS_getBlock(&nBytes)) != (uint8_t *)0) { + send(l_sock, (char const *)block, nBytes, 0); + nBytes = (uint16_t)QS_TX_SIZE; + } +} diff --git a/ports/posix/Makefile b/ports/posix/Makefile index af733464..900cc8de 100644 --- a/ports/posix/Makefile +++ b/ports/posix/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/ports/posix/README.url b/ports/posix/README.url index b0b3af38..60a0455b 100644 --- a/ports/posix/README.url +++ b/ports/posix/README.url @@ -1,3 +1,3 @@ [InternetShortcut] -URL=http://www.state-machine.com/qpc/posix.html -IconFile=http://www.state-machine.com/qp.ico +URL=https://state-machine.com/qpc/posix.html +IconFile=https://state-machine.com/qp.ico diff --git a/ports/posix/qf_port.c b/ports/posix/qf_port.c index bbad8b3c..1bed131e 100644 --- a/ports/posix/qf_port.c +++ b/ports/posix/qf_port.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/posix/qf_port.h b/ports/posix/qf_port.h index 67d756a0..352a2934 100644 --- a/ports/posix/qf_port.h +++ b/ports/posix/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/posix/qs_port.h b/ports/posix/qs_port.h index 996a96b4..b7ebc072 100644 --- a/ports/posix/qs_port.h +++ b/ports/posix/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/threadx/qf_port.c b/ports/threadx/qf_port.c index d862c910..59b9552f 100644 --- a/ports/threadx/qf_port.c +++ b/ports/threadx/qf_port.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -140,7 +140,8 @@ bool QActive_post_(QActive * const me, QEvt const * const e, nFree = (uint_fast16_t)me->eQueue.tx_queue_available_storage; if (nFree > margin) { - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -167,7 +168,8 @@ bool QActive_post_(QActive * const me, QEvt const * const e, /* can tolerate dropping evts? */ Q_ASSERT(margin != (uint_fast16_t)0); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -189,7 +191,8 @@ void QActive_postLIFO_(QActive * const me, QEvt const * const e) { QF_CRIT_STAT_ QF_CRIT_ENTRY_(); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -202,6 +205,7 @@ void QActive_postLIFO_(QActive * const me, QEvt const * const e) { if (e->poolId_ != (uint8_t)0) { /* is it a pool event? */ QF_EVT_REF_CTR_INC_(e); /* increment the reference counter */ } + QF_CRIT_EXIT_(); /* LIFO posting must succeed, see NOTE1 */ @@ -218,7 +222,7 @@ QEvt const *QActive_get_(QActive * const me) { tx_queue_receive(&me->eQueue, (VOID *)&e, TX_WAIT_FOREVER) == TX_SUCCESS); - QS_BEGIN_(QS_QF_ACTIVE_GET, QS_priv_.aoObjFilter, me) + QS_BEGIN_(QS_QF_ACTIVE_GET, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ diff --git a/ports/threadx/qf_port.h b/ports/threadx/qf_port.h index adaed92c..ae5a446f 100644 --- a/ports/threadx/qf_port.h +++ b/ports/threadx/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/threadx/qs_port.h b/ports/threadx/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/threadx/qs_port.h +++ b/ports/threadx/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/ti-rtos/qf_port.c b/ports/ti-rtos/qf_port.c index 2332425a..15b56d37 100644 --- a/ports/ti-rtos/qf_port.c +++ b/ports/ti-rtos/qf_port.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/ti-rtos/qf_port.h b/ports/ti-rtos/qf_port.h index 877af549..3f3bb0ba 100644 --- a/ports/ti-rtos/qf_port.h +++ b/ports/ti-rtos/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/ti-rtos/qs_port.h b/ports/ti-rtos/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/ti-rtos/qs_port.h +++ b/ports/ti-rtos/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/ucos-ii/qf_port.c b/ports/ucos-ii/qf_port.c index eb82f174..386c5e43 100644 --- a/ports/ucos-ii/qf_port.c +++ b/ports/ucos-ii/qf_port.c @@ -4,14 +4,14 @@ * @ingroup ports * @cond ****************************************************************************** -* Last Updated for Version: 5.8.0 -* Date of the Last Update: 2016-11-29 +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-05 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. state-machine.com. +* Copyright (C) Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -153,7 +153,8 @@ bool QActive_post_(QActive * const me, QEvt const * const e, nFree = (uint_fast16_t)(((OS_Q_DATA *)me->eQueue)->OSQSize - ((OS_Q_DATA *)me->eQueue)->OSNMsgs); if (nFree > margin) { - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -177,23 +178,24 @@ bool QActive_post_(QActive * const me, QEvt const * const e, OSQPost((OS_EVENT *)me->eQueue, (void *)e) == OS_ERR_NONE); /* posting the event to uC/OS message queue must succeed */ - status = true; /* report event posted */ + status = true; /* report success */ } else { /* can tolerate dropping evts? */ Q_ASSERT_ID(420, margin != (uint_fast16_t)0); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, QS_priv_.aoObjFilter, me) - QS_TIME_(); /* timestamp */ - QS_OBJ_(sender); /* the sender object */ - QS_SIG_(e->sig); /* the signal of the event */ - QS_OBJ_(me); /* this active object (recipient) */ + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, + QS_priv_.locFilter[AO_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(sender); /* the sender object */ + QS_SIG_(e->sig); /* the signal of the event */ + QS_OBJ_(me); /* this active object (recipient) */ QS_2U8_(e->poolId_, e->refCtr_); /* pool Id & ref Count */ - QS_EQC_((QEQueueCtr)nFree); /* number of free entries */ + QS_EQC_((QEQueueCtr)nFree); /* # free entries available */ QS_EQC_((QEQueueCtr)margin); /* margin requested */ QS_END_NOCRIT_() - status = false; /* report event NOT posted */ + status = false; /* report failure */ } QF_CRIT_EXIT_(); @@ -204,14 +206,14 @@ void QActive_postLIFO_(QActive * const me, QEvt const * const e) { QF_CRIT_STAT_ QF_CRIT_ENTRY_(); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.aoObjFilter, me) - QS_TIME_(); /* timestamp */ - QS_SIG_(e->sig); /* the signal of this event */ - QS_OBJ_(me); /* this active object */ + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.locFilter[AO_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_SIG_(e->sig); /* the signal of this event */ + QS_OBJ_(me); /* this active object */ QS_2U8_(e->poolId_, e->refCtr_); /* pool Id & ref Count */ QS_EQC_(((OS_Q *)me->eQueue)->OSQSize - ((OS_Q *)me->eQueue)->OSQEntries); /* # free entries */ - QS_EQC_((QEQueueCtr)0); /* min # free entries (unknown) */ + QS_EQC_((QEQueueCtr)0); /* min # free entries (unknown) */ QS_END_NOCRIT_() if (e->poolId_ != (uint8_t)0) { /* is it a pool event? */ @@ -237,10 +239,10 @@ QEvt const *QActive_get_(QActive * const me) { Q_ASSERT_ID(610, err == OS_ERR_NONE); - QS_BEGIN_(QS_QF_ACTIVE_GET, QS_priv_.aoObjFilter, me) - QS_TIME_(); /* timestamp */ - QS_SIG_(e->sig); /* the signal of this event */ - QS_OBJ_(me); /* this active object */ + QS_BEGIN_(QS_QF_ACTIVE_GET, QS_priv_.locFilter[AO_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_SIG_(e->sig); /* the signal of this event */ + QS_OBJ_(me); /* this active object */ QS_2U8_(e->poolId_, e->refCtr_); /* pool Id & ref Count */ QS_EQC_(((OS_Q *)me->eQueue)->OSQSize - ((OS_Q *)me->eQueue)->OSQEntries); /* # free entries */ diff --git a/ports/ucos-ii/qf_port.h b/ports/ucos-ii/qf_port.h index 71042d4f..5945eb41 100644 --- a/ports/ucos-ii/qf_port.h +++ b/ports/ucos-ii/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/ucos-ii/qs_port.h b/ports/ucos-ii/qs_port.h index 3cc16fd4..396e04ea 100644 --- a/ports/ucos-ii/qs_port.h +++ b/ports/ucos-ii/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32-qutest/Makefile b/ports/win32-qutest/Makefile new file mode 100644 index 00000000..9e8f9598 --- /dev/null +++ b/ports/win32-qutest/Makefile @@ -0,0 +1,184 @@ +############################################################################## +# Product: Makefile for QUTEST, QP/C, Win32, MinGW toolset +# Last Updated for Version: 5.9.0 +# Date of the Last Update: 2017-04-18 +# +# Q u a n t u m L e a P s +# --------------------------- +# innovating embedded systems +# +# Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +# +# This program is open source software: you can redistribute it and/or +# modify it under the terms of the GNU General Public License as published +# by the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# Alternatively, this program may be distributed and modified under the +# terms of Quantum Leaps commercial licenses, which expressly supersede +# the GNU General Public License and are specifically designed for +# licensees interested in retaining the proprietary status of their code. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# Contact information: +# https://state-machine.com +# mailto:info@state-machine.com +############################################################################## +# examples of invoking this Makefile: +# make +# +# cleaning +# make clean +# +# NOTE: +# To use this Makefile on Windows, you will need the GNU make utility, which +# is included in the Qtools collection for Windows, see: +# http://sourceforge.net/projects/qpc/files/Qtools/ +# + +#----------------------------------------------------------------------------- +# project name +# +PROJECT := qp + +#----------------------------------------------------------------------------- +# project directories +# + +# location of the QP/C framework +QPC := ../.. + +# QP port used in this project +QP_PORT_DIR := . + + +# list of all source directories used by this project +VPATH = \ + $(QPC)/source \ + $(QP_PORT_DIR) + +# list of all include directories needed by this project +INCLUDES = \ + -I$(QPC)/include \ + -I$(QPC)/source \ + -I$(QP_PORT_DIR) + +#----------------------------------------------------------------------------- +# files +# + +# C source files +C_SRCS := \ + qep_hsm.c \ + qep_msm.c \ + qf_act.c \ + qf_defer.c \ + qf_dyn.c \ + qf_mem.c \ + qf_ps.c \ + qf_qact.c \ + qf_qeq.c \ + qf_qmact.c \ + qs.c \ + qs_64bit.c \ + qs_rx.c \ + qs_fp.c \ + qutest.c \ + qutest_port.c + +# C++ source files +CPP_SRCS := + +# defines +DEFINES := + +#----------------------------------------------------------------------------- +# MinGW toolset (NOTE: assumed to be on your PATH) +# +# NOTE: +# MinGW toolset is included in the Qtools collection for Windows, see: +# http://sourceforge.net/projects/qpc/files/Qtools/ + +CC := gcc +CPP := g++ +LIB := ar + + +############################################################################## +# Typically, you should not need to change anything below this line + +# basic utilities (included in Qtools for Windows), see: +# http://sourceforge.net/projects/qpc/files/Qtools + +MKDIR := mkdir +RM := rm + +#----------------------------------------------------------------------------- +# build options +# + +BIN_DIR = mingw + +CFLAGS = -g -O -Wall -Wstrict-prototypes -W $(INCLUDES) $(DEFINES) \ + -DQ_SPY -DQ_UTEST -DQ_HOST + +CPPFLAGS = -fno-rtti -fno-exceptions \ + -O -Wall -W $(INCLUDES) $(DEFINES) -DQ_SPY -DQ_UTEST -DQ_HOST + +LIBFLAGS := rs + +C_OBJS := $(patsubst %.c,%.o, $(notdir $(C_SRCS))) +CPP_OBJS := $(patsubst %.cpp,%.o,$(notdir $(CPP_SRCS))) + +TARGET_LIB := $(BIN_DIR)/lib$(PROJECT).a +C_OBJS_EXT := $(addprefix $(BIN_DIR)/, $(C_OBJS)) +CPP_OBJS_EXT := $(addprefix $(BIN_DIR)/, $(CPP_OBJS)) + +# create $(BIN_DIR) if it does not exist +ifeq ("$(wildcard $(BIN_DIR))","") +$(shell $(MKDIR) $(BIN_DIR)) +endif + +#----------------------------------------------------------------------------- +# rules +# + +all: $(TARGET_LIB) + -$(RM) $(BIN_DIR)/*.o + +$(TARGET_LIB) : $(ASM_OBJS_EXT) $(C_OBJS_EXT) $(CPP_OBJS_EXT) + $(LIB) $(LIBFLAGS) $@ $^ + +$(BIN_DIR)/%.o : %.c + $(CC) $(CFLAGS) -c $< -o $@ + +$(BIN_DIR)/%.o : %.cpp + $(CPP) $(CPPFLAGS) -c $< -o $@ + +#----------------------------------------------------------------------------- +# the clean target +# +.PHONY : clean +clean: + -$(RM) $(BIN_DIR)/*.o $(TARGET_LIB) + +#----------------------------------------------------------------------------- +# the show target for debugging +# +show: + @echo PROJECT = $(PROJECT) + @echo CONF = $(CONF) + @echo TARGET_LIB = $(TARGET_LIB) + @echo C_SRCS = $(C_SRCS) + @echo CPP_SRCS = $(CPP_SRCS) + @echo C_OBJS_EXT = $(C_OBJS_EXT) + @echo C_DEPS_EXT = $(C_DEPS_EXT) + @echo CPP_OBJS_EXT = $(CPP_OBJS_EXT) + @echo CPP_DEPS_EXT = $(CPP_DEPS_EXT) diff --git a/ports/win32-qutest/qep_port.h b/ports/win32-qutest/qep_port.h new file mode 100644 index 00000000..8eac1e3a --- /dev/null +++ b/ports/win32-qutest/qep_port.h @@ -0,0 +1,68 @@ +/** +* @file +* @brief QEP/C port to Win32 with GNU or Visual C++ compilers +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-04-15 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qep_port_h +#define qep_port_h + +#include /* Exact-width types. WG14/N843 C99 Standard */ +#include /* Boolean type. WG14/N843 C99 Standard */ + +#if (defined __cplusplus) && (defined _MSC_VER) +/* +* This is the case where QP/C is compiled by the Microsoft Visual C++ +* compiler in the C++ mode, which can happen when qep_port.h is included +* in a C++ module, or the compilation is forced to C++ by the option /TP. +* +* The following pragma suppresses the level-4 C++ warnings C4510, C4512, and +* C4610, which warn that default constructors and assignment operators could +* not be generated for structures QMState and QMTranActTable. +* +* The QP/C source code cannot be changed to avoid these C++ warnings, because +* the structures QMState and QMTranActTable must remain PODs (Plain Old +* Datatypes) to be initializable statically with constant initializers. +*/ +#pragma warning (disable: 4510 4512 4610) +#endif + +#include "qep.h" /* QEP platform-independent public interface */ + +#if (defined __cplusplus) && (defined _MSC_VER) +#pragma warning (default: 4510 4512 4610) +#endif + +#endif /* qep_port_h */ diff --git a/ports/win32-qutest/qf_port.h b/ports/win32-qutest/qf_port.h new file mode 100644 index 00000000..d3bf8432 --- /dev/null +++ b/ports/win32-qutest/qf_port.h @@ -0,0 +1,140 @@ +/** +* @file +* @brief QF/C "port" for QUTEST Unit Test, Win32 with GNU or Visual C++ +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-04-18 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qf_port_h +#define qf_port_h + +/* QUTEST event queue and thread types */ +#define QF_EQUEUE_TYPE QEQueue +/*#define QF_OS_OBJECT_TYPE */ +/*#define QF_THREAD_TYPE */ + +/* The maximum number of active objects in the application */ +#define QF_MAX_ACTIVE 64 + +/* The number of system clock tick rates */ +#define QF_MAX_TICK_RATE 2 + +/* QF interrupt disable/enable */ +#define QF_INT_DISABLE() (++QF_intNest) +#define QF_INT_ENABLE() (--QF_intNest) + +/* QF critical section */ +/* QF_CRIT_STAT_TYPE not defined */ +#define QF_CRIT_ENTRY(dummy) QF_INT_DISABLE() +#define QF_CRIT_EXIT(dummy) QF_INT_ENABLE() + +/* QF_LOG2 not defined -- use the internal LOG2() implementation */ + +#include "qep_port.h" /* QEP port */ +#include "qequeue.h" /* QUTEST port uses QEQueue event-queue */ +#include "qmpool.h" /* QUTEST port uses QMPool memory-pool */ +#include "qf.h" /* QF platform-independent public interface */ + +/* interrupt nesting up-down counter */ +extern uint8_t volatile QF_intNest; + +#ifdef _MSC_VER /* Microsoft C/C++ compiler? */ +/* define portable "safe" facilities from and ... */ + +#define SNPRINTF_S(buf_, len_, format_, ...) \ + _snprintf_s(buf_, len_, _TRUNCATE, format_, ##__VA_ARGS__) + +#define STRNCPY_S(dest_, src_, len_) \ + strncpy_s(dest_, len_, src_, _TRUNCATE) + +#define FOPEN_S(fp_, fName_, mode_) \ + if (fopen_s(&fp_, fName_, mode_) != 0) { \ + fp_ = (FILE *)0; \ + } else (void)0 + +#define CTIME_S(buf_, len_, time_) \ + ctime_s((char *)buf_, len_, time_) + +#define SSCANF_S(buf_, format_, ...) \ + sscanf_s(buf_, format_, ##__VA_ARGS__) + +#else /* other C/C++ compilers (GNU, etc.) */ + +#define SNPRINTF_S(buf_, len_, format_, ...) \ + snprintf(buf_, len_, format_, ##__VA_ARGS__) + +#define STRNCPY_S(dest_, src_, len_) strncpy(dest_, src_, len_) + +#define FOPEN_S(fp_, fName_, mode_) \ + (fp_ = fopen(fName_, mode_)) + +#define CTIME_S(buf_, len_, time_) \ + strncpy((char *)buf_, ctime(time_), len_) + +#define SSCANF_S(buf_, format_, ...) \ + sscanf(buf_, format_, ##__VA_ARGS__) + +#endif /* _MSC_VER */ + +/****************************************************************************/ +/* interface used only inside QF implementation, but not in applications */ +#ifdef QP_IMPL + + /* QUTEST scheduler locking (not used) */ + #define QF_SCHED_STAT_ + #define QF_SCHED_LOCK_(dummy) ((void)0) + #define QF_SCHED_UNLOCK_() ((void)0) + + /* QUTEST active object event queue customization (not used) */ + #define QACTIVE_EQUEUE_WAIT_(me_) ((void)0) + #define QACTIVE_EQUEUE_SIGNAL_(me_) ((void)0) + + /* native QF event pool operations */ + #define QF_EPOOL_TYPE_ QMPool + #define QF_EPOOL_INIT_(p_, poolSto_, poolSize_, evtSize_) \ + QMPool_init(&(p_), (poolSto_), (poolSize_), (evtSize_)) + + #define QF_EPOOL_EVENT_SIZE_(p_) ((p_).blockSize) + #define QF_EPOOL_GET_(p_, e_, m_) ((e_) = (QEvt *)QMPool_get(&(p_), (m_))) + #define QF_EPOOL_PUT_(p_, e_) (QMPool_put(&(p_), e_)) + +#endif /* QP_IMPL */ + +/***************************************************************************** +* NOTE1: +* This QF "port" provides dummy declaration for the QF stub that provides +* empty definitions of the QF facilities. +*/ + +#endif /* qf_port_h */ diff --git a/ports/win32-qutest/qp.sln b/ports/win32-qutest/qp.sln new file mode 100644 index 00000000..098e6a70 --- /dev/null +++ b/ports/win32-qutest/qp.sln @@ -0,0 +1,18 @@ +Microsoft Visual Studio Solution File, Format Version 12.00 +# Visual Studio 2013 +VisualStudioVersion = 12.0.31101.0 +MinimumVisualStudioVersion = 10.0.40219.1 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "qp", "qp.vcxproj", "{3E9F0C4A-01B7-4357-95C6-0FE86BACB6D9}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Win32 = Debug|Win32 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {3E9F0C4A-01B7-4357-95C6-0FE86BACB6D9}.Debug|Win32.ActiveCfg = vc|Win32 + {3E9F0C4A-01B7-4357-95C6-0FE86BACB6D9}.Debug|Win32.Build.0 = vc|Win32 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/ports/win32-qutest/qp.vcxproj b/ports/win32-qutest/qp.vcxproj new file mode 100644 index 00000000..72a5c394 --- /dev/null +++ b/ports/win32-qutest/qp.vcxproj @@ -0,0 +1,98 @@ + + + + + vc + Win32 + + + + {3E9F0C4A-01B7-4357-95C6-0FE86BACB6D9} + qp + ManagedCProj + + + + StaticLibrary + NotSet + false + v120 + + + + + + + + + + <_ProjectFileVersion>10.0.40219.1 + $(SolutionDir)$(Configuration)\ + $(Configuration)\ + false + + + + Disabled + .;../../include;../../source;%(AdditionalIncludeDirectories) + Q_SPY;Q_HOST;_DEBUG;%(PreprocessorDefinitions) + + + MultiThreaded + NotUsing + Level4 + ProgramDatabase + Default + 4127;%(DisableSpecificWarnings) + + + Cleanup + del $(IntDir)*.obj $(IntDir)*.tlog $(IntDir)*.lastbuildstate + + + + + true + true + + + true + true + + + true + true + + + + + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/ports/win32-qutest/qp.vcxproj.filters b/ports/win32-qutest/qp.vcxproj.filters new file mode 100644 index 00000000..310abdce --- /dev/null +++ b/ports/win32-qutest/qp.vcxproj.filters @@ -0,0 +1,72 @@ + + + + + {553ace6f-efbf-49d9-be33-15209894492c} + + + {f23cedd0-0f13-4d39-b4f1-77eaa32e87fd} + + + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP + + + QP_port + + + + + QP + + + QP_port + + + QP_port + + + QP + + + \ No newline at end of file diff --git a/ports/win32-qutest/qs_port.h b/ports/win32-qutest/qs_port.h new file mode 100644 index 00000000..0db04196 --- /dev/null +++ b/ports/win32-qutest/qs_port.h @@ -0,0 +1,67 @@ +/** +* @file +* @brief QS/C port to Win32 with GNU or Visual C++ compilers +* @ingroup ports +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-16 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#ifndef qs_port_h +#define qs_port_h + +/* QS time-stamp size in bytes */ +#define QS_TIME_SIZE 4 + +#ifdef _WIN64 /* 64-bit architecture? */ + #define QS_OBJ_PTR_SIZE 8 + #define QS_FUN_PTR_SIZE 8 +#else /* 32-bit architecture */ + #define QS_OBJ_PTR_SIZE 4 + #define QS_FUN_PTR_SIZE 4 +#endif + +/* flush the QS output buffer after each QS record */ +#define QS_REC_DONE() QS_onFlush() + +/***************************************************************************** +* NOTE: QS might be used with or without other QP components, in which +* case the separate definitions of the macros QF_CRIT_STAT_TYPE, +* QF_CRIT_ENTRY, and QF_CRIT_EXIT are needed. In this port QS is configured +* to be used with the other QP component, by simply including "qf_port.h" +* *before* "qs.h". +*/ +#include "qf_port.h" /* use QS with QF */ +#include "qs.h" /* QS platform-independent public interface */ + +#endif /* qs_port_h */ diff --git a/ports/win32-qutest/qutest_port.c b/ports/win32-qutest/qutest_port.c new file mode 100644 index 00000000..74400567 --- /dev/null +++ b/ports/win32-qutest/qutest_port.c @@ -0,0 +1,270 @@ +/** +* @file +* @brief QS/C QUTEST port for Win32 +* @ingroup qf +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-17 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +#define QP_IMPL /* this is QP implementation */ +#include "qf_port.h" /* QF port */ +#include "qassert.h" /* QP embedded systems-friendly assertions */ +#include "qs_port.h" /* include QS port */ + +Q_DEFINE_THIS_MODULE("qutest_port") + +#ifndef Q_SPY + #error "Q_SPY must be defined for QTEST application" +#endif /* Q_SPY */ + +#include /* for printf() and _snprintf_s() */ +#include +#include +#include +#include /* for Windows network facilities */ + +#define QS_TX_SIZE (4*1024) +#define QS_RX_SIZE 1024 +#define QS_IMEOUT_MS 100 + +/* local variables .........................................................*/ +static SOCKET l_sock = INVALID_SOCKET; + +/*..........................................................................*/ +uint8_t QS_onStartup(void const *arg) { + static uint8_t qsBuf[QS_TX_SIZE]; /* buffer for QS-TX channel */ + static uint8_t qsRxBuf[QS_RX_SIZE]; /* buffer for QS-RX channel */ + static WSADATA wsaData; + char hostName[64]; + char const *src; + char *dst; + + USHORT port_local = 51234; /* default local port */ + USHORT port_remote = 6601; /* default QSPY server port */ + BOOL sockopt_bool; + ULONG ioctl_opt = 1; + struct sockaddr_in sa_local; + struct sockaddr_in sa_remote; + struct hostent *host; + + QS_initBuf(qsBuf, sizeof(qsBuf)); + QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf)); + + /* initialize Windows sockets */ + if (WSAStartup(MAKEWORD(2,0), &wsaData) == SOCKET_ERROR) { + printf(" Windows Sockets cannot be initialized\n"); + goto error; + } + + src = (arg != (void const *)0) + ? (char const *)arg + : "localhost"; + dst = hostName; + while ((*src != '\0') + && (*src != ':') + && (dst < &hostName[sizeof(hostName)])) + { + *dst++ = *src++; + } + *dst = '\0'; + if (*src == ':') { + port_remote = (USHORT)strtoul(src + 1, NULL, 10); + } + + l_sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP); /* TCP socket */ + if (l_sock == INVALID_SOCKET){ + printf(" Socket cannot be created Err=0x%08X\n", + WSAGetLastError()); + goto error; + } + + /* configure the socket */ + sockopt_bool = TRUE; + setsockopt(l_sock, SOL_SOCKET, SO_REUSEADDR, + (const char *)&sockopt_bool, sizeof(sockopt_bool)); + + sockopt_bool = TRUE; + setsockopt(l_sock, SOL_SOCKET, SO_DONTLINGER, + (const char *)&sockopt_bool, sizeof(sockopt_bool)); + + /* disable the Nagle algorithm (good for small messages) */ + //sockopt_bool = TRUE; + //setsockopt(l_sock, IPPROTO_TCP, TCP_NODELAY, + // (const char *)&sockopt_bool, sizeof(sockopt_bool)); + + /* local address:port */ + memset(&sa_local, 0, sizeof(sa_local)); + sa_local.sin_family = AF_INET; + sa_local.sin_port = htons(port_local); + host = gethostbyname(""); /* local host */ + sa_local.sin_addr.s_addr = inet_addr( + inet_ntoa(*(struct in_addr *)*host->h_addr_list)); + //if (bind(l_sock, &sa_local, sizeof(sa_local)) == -1) { + // printf(" Cannot bind to the local port Err=0x%08X\n", + // WSAGetLastError()); + // /* no error */ + //} + + /* remote hostName:port (QSPY server socket) */ + host = gethostbyname(hostName); + if (host == NULL) { + printf(" QSpy host name %s cannot be resolved Err=0x%08X\n", + hostName, WSAGetLastError()); + goto error; + } + + memset(&sa_remote, 0, sizeof(sa_remote)); + sa_remote.sin_family = AF_INET; + memcpy(&sa_remote.sin_addr, host->h_addr, host->h_length); + sa_remote.sin_port = htons(port_remote); + + /* try to connect to the QSPY server */ + if (connect(l_sock, (struct sockaddr *)&sa_remote, sizeof(sa_remote)) + == SOCKET_ERROR) + { + printf(" Cannot connect to the QSPY server Err=0x%08X\n", + WSAGetLastError()); + QS_EXIT(); + goto error; + } + + /* Set the socket to non-blocking mode. */ + if (ioctlsocket(l_sock, FIONBIO, &ioctl_opt) == SOCKET_ERROR) { + printf(" Socket configuration failed Err=0x%08X\n", + WSAGetLastError()); + QS_EXIT(); + goto error; + } + + QS_onFlush(); + + //printf(" Connected to QSPY via TCP/IP\n"); + return (uint8_t)1; /* success */ + +error: + return (uint8_t)0; /* failure */ +} +/*..........................................................................*/ +void QS_onCleanup(void) { + if (l_sock != INVALID_SOCKET) { + closesocket(l_sock); + l_sock = INVALID_SOCKET; + } + WSACleanup(); + //printf(" Disconnected from QSPY via TCP/IP\n"); +} +/*..........................................................................*/ +void QS_onReset(void) { + QS_onCleanup(); + exit(0); +} +/*..........................................................................*/ +void QS_onTestLoop() { + fd_set readSet; + FD_ZERO(&readSet); + + QS_rxPriv_.inTestLoop = true; + while (QS_rxPriv_.inTestLoop) { + static struct timeval const timeout = { + (long)0, (long)(QS_IMEOUT_MS * 1000) + }; + int status; + uint16_t nBytes; + uint8_t const *block; + int ch = 0; + + FD_SET(l_sock, &readSet); + + /* selective, timed blocking on the TCP/IP socket... */ + status = select(0, &readSet, (fd_set *)0, (fd_set *)0, &timeout); + if (status == SOCKET_ERROR) { + printf(" ERROR socket select Err=%d", WSAGetLastError()); + QS_onCleanup(); + exit(-2); + } + else if (FD_ISSET(l_sock, &readSet)) { + uint8_t buf[QS_RX_SIZE]; + int status = recv(l_sock, (char *)buf, (int)sizeof(buf), 0); + while (status > 0) { /* any data received? */ + uint8_t *pb; + int i = (int)QS_rxGetNfree(); + if (i > status) { + i = status; + } + status -= i; + /* reorder the received bytes into QS-RX buffer */ + for (pb = &buf[0]; i > 0; --i, ++pb) { + QS_RX_PUT(*pb); + } + QS_rxParse(); /* parse all n-bytes of data */ + } + } + + nBytes = QS_TX_SIZE; + //QF_CRIT_ENTRY(dummy); + block = QS_getBlock(&nBytes); + //QF_CRIT_EXIT(dummy); + + if (block != (uint8_t *)0) { + send(l_sock, (char const *)block, nBytes, 0); + } + while (_kbhit()) { /* any key pressed? */ + ch = _getch(); + } + switch (ch) { + case 'x': /* 'x' pressed? */ + case 'X': /* 'X' pressed? */ + case '\033': { /* ESC pressed? */ + QS_onCleanup(); + exit(0); + break; + } + } + } + /* set inTestLoop to true in case calls to QS_onTestLoop() nest, + * which can happen through the calls to QS_TEST_PAUSE(). + */ + QS_rxPriv_.inTestLoop = true; +} +/*..........................................................................*/ +void QS_onFlush(void) { + if (l_sock != INVALID_SOCKET) { /* socket initialized? */ + uint16_t nBytes = QS_TX_SIZE; + uint8_t const *data; + while ((data = QS_getBlock(&nBytes)) != (uint8_t *)0) { + send(l_sock, (char const *)data, nBytes, 0); + nBytes = QS_TX_SIZE; + } + } +} diff --git a/ports/win32-qv/Makefile b/ports/win32-qv/Makefile index 12e8d873..ad7c268a 100644 --- a/ports/win32-qv/Makefile +++ b/ports/win32-qv/Makefile @@ -28,7 +28,7 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: diff --git a/ports/win32-qv/qf_port.c b/ports/win32-qv/qf_port.c index 64682ba3..2fe83b90 100644 --- a/ports/win32-qv/qf_port.c +++ b/ports/win32-qv/qf_port.c @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32-qv/qf_port.h b/ports/win32-qv/qf_port.h index 625595e7..3705dcba 100644 --- a/ports/win32-qv/qf_port.h +++ b/ports/win32-qv/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32-qv/qs_port.h b/ports/win32-qv/qs_port.h index 0ae4a89e..263a4c9d 100644 --- a/ports/win32-qv/qs_port.h +++ b/ports/win32-qv/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32-qv/qwin_gui.c b/ports/win32-qv/qwin_gui.c index a85a129e..81291e97 100644 --- a/ports/win32-qv/qwin_gui.c +++ b/ports/win32-qv/qwin_gui.c @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32-qv/qwin_gui.h b/ports/win32-qv/qwin_gui.h index 1449aed8..3dcfe340 100644 --- a/ports/win32-qv/qwin_gui.h +++ b/ports/win32-qv/qwin_gui.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32/Makefile b/ports/win32/Makefile index 12e8d873..94c7f99e 100644 --- a/ports/win32/Makefile +++ b/ports/win32/Makefile @@ -1,7 +1,7 @@ ############################################################################## # Product: Makefile for QP/C port to Win32 API, MinGW toolset -# Last Updated for Version: 5.6.4 -# Date of the Last Update: 2016-05-02 +# Last Updated for Version: 5.8.3 +# Date of the Last Update: 2017-03-22 # # Q u a n t u m L e a P s # --------------------------- @@ -28,11 +28,11 @@ # along with this program. If not, see . # # Contact information: -# http://www.state-machine.com +# https://state-machine.com # mailto:info@state-machine.com ############################################################################## # examples of invoking this Makefile: -# building configurations: Debug (default), Release, and Spy +# building configurations: Debug (default), Release, Spy, Qutest # make # make CONF=rel # make CONF=spy diff --git a/ports/win32/qf_port.c b/ports/win32/qf_port.c index e07b7860..e39dfb4c 100644 --- a/ports/win32/qf_port.c +++ b/ports/win32/qf_port.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32/qf_port.h b/ports/win32/qf_port.h index ccd0d358..8e08f4c1 100644 --- a/ports/win32/qf_port.h +++ b/ports/win32/qf_port.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32/qs_port.h b/ports/win32/qs_port.h index 0ae4a89e..263a4c9d 100644 --- a/ports/win32/qs_port.h +++ b/ports/win32/qs_port.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32/qwin_gui.c b/ports/win32/qwin_gui.c index a85a129e..81291e97 100644 --- a/ports/win32/qwin_gui.c +++ b/ports/win32/qwin_gui.c @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/ports/win32/qwin_gui.h b/ports/win32/qwin_gui.h index 1449aed8..3dcfe340 100644 --- a/ports/win32/qwin_gui.h +++ b/ports/win32/qwin_gui.h @@ -31,7 +31,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/source/qep_hsm.c b/source/qep_hsm.c index a659ec20..785ceaa6 100644 --- a/source/qep_hsm.c +++ b/source/qep_hsm.c @@ -4,8 +4,8 @@ * @ingroup qep * @cond ****************************************************************************** -* Last updated for version 5.8.0 -* Last updated on 2016-11-18 +* Last updated for version 5.9.0 +* Last updated on 2017-05-10 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -47,6 +47,9 @@ Q_DEFINE_THIS_MODULE("qep_hsm") +/****************************************************************************/ +char_t const QP_versionStr[6] = QP_VERSION_STR; + /****************************************************************************/ /*! internal QEP constants */ enum { @@ -78,7 +81,7 @@ static QEvt const QEP_reservedEvt_[] = { /*! helper macro to trigger exit action in an HSM */ #define QEP_EXIT_(state_) do { \ if (QEP_TRIG_((state_), Q_EXIT_SIG) == (QState)Q_RET_HANDLED) { \ - QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.smObjFilter, me) \ + QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.locFilter[SM_OBJ], me) \ QS_OBJ_(me); \ QS_FUN_(state_); \ QS_END_() \ @@ -88,7 +91,7 @@ static QEvt const QEP_reservedEvt_[] = { /*! helper macro to trigger entry action in an HSM */ #define QEP_ENTER_(state_) do { \ if (QEP_TRIG_((state_), Q_ENTRY_SIG) == (QState)Q_RET_HANDLED) { \ - QS_BEGIN_(QS_QEP_STATE_ENTRY, QS_priv_.smObjFilter, me) \ + QS_BEGIN_(QS_QEP_STATE_ENTRY, QS_priv_.locFilter[SM_OBJ], me) \ QS_OBJ_(me); \ QS_FUN_(state_); \ QS_END_() \ @@ -121,11 +124,11 @@ static int_fast8_t QHsm_tran_(QHsm * const me, * @include qep_qhsm_ctor.c */ void QHsm_ctor(QHsm * const me, QStateHandler initial) { - static QMsmVtbl const vtbl = { /* QHsm virtual table */ + static struct QHsmVtbl const vtbl = { /* QHsm virtual table */ &QHsm_init_, &QHsm_dispatch_ }; - me->vptr = &vtbl; + me->vptr = &vtbl; me->state.fun = Q_STATE_CAST(&QHsm_top); me->temp.fun = initial; } @@ -158,7 +161,7 @@ void QHsm_init_(QHsm * const me, QEvt const * const e) { /* the top-most initial transition must be taken */ Q_ASSERT_ID(210, r == (QState)Q_RET_TRAN); - QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(t); /* the source state */ QS_FUN_(me->temp.fun); /* the target of the initial transition */ @@ -166,8 +169,8 @@ void QHsm_init_(QHsm * const me, QEvt const * const e) { /* drill down into the state hierarchy with initial transitions... */ do { - QStateHandler path[QHSM_MAX_NEST_DEPTH_]; - int_fast8_t ip = (int_fast8_t)0; /* transition entry path index */ + QStateHandler path[QHSM_MAX_NEST_DEPTH_]; /* tran entry path array */ + int_fast8_t ip = (int_fast8_t)0; /* tran entry path index */ path[0] = me->temp.fun; (void)QEP_TRIG_(me->temp.fun, QEP_EMPTY_SIG_); @@ -191,7 +194,7 @@ void QHsm_init_(QHsm * const me, QEvt const * const e) { #ifdef Q_SPY if (r == (QState)Q_RET_TRAN) { - QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(t); /* the source state */ QS_FUN_(me->temp.fun); /* the target of the initial tran. */ @@ -201,7 +204,7 @@ void QHsm_init_(QHsm * const me, QEvt const * const e) { } while (r == (QState)Q_RET_TRAN); - QS_BEGIN_(QS_QEP_INIT_TRAN, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_INIT_TRAN, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_OBJ_(me); /* this state machine object */ QS_FUN_(t); /* the new active state */ @@ -255,9 +258,9 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { * the state configuration must be stable */ Q_REQUIRE_ID(400, (t != Q_STATE_CAST(0)) - && (t == me->temp.fun)); + && (t == me->temp.fun)); - QS_BEGIN_(QS_QEP_DISPATCH, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_DISPATCH, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -271,7 +274,7 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { if (r == (QState)Q_RET_UNHANDLED) { /* unhandled due to a guard? */ - QS_BEGIN_(QS_QEP_UNHANDLED, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_UNHANDLED, QS_priv_.locFilter[SM_OBJ], me) QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ QS_FUN_(s); /* the current state */ @@ -293,9 +296,9 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { /* exit current state to transition source s... */ for (; t != s; t = me->temp.fun) { if (QEP_TRIG_(t, Q_EXIT_SIG) == (QState)Q_RET_HANDLED) { - QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.smObjFilter, me) - QS_OBJ_(me); /* this state machine object */ - QS_FUN_(t); /* the exited state */ + QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.locFilter[SM_OBJ], me) + QS_OBJ_(me); /* this state machine object */ + QS_FUN_(t); /* the exited state */ QS_END_() (void)QEP_TRIG_(t, QEP_EMPTY_SIG_); /* find superstate of t */ @@ -307,10 +310,10 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { #ifdef Q_SPY if (r == (QState)Q_RET_TRAN_HIST) { - QS_BEGIN_(QS_QEP_TRAN_HIST, QS_priv_.smObjFilter, me) - QS_OBJ_(me); /* this state machine object */ - QS_FUN_(t); /* the source of the transition */ - QS_FUN_(path[0]);/* the target of the tran. to history */ + QS_BEGIN_(QS_QEP_TRAN_HIST, QS_priv_.locFilter[SM_OBJ], me) + QS_OBJ_(me); /* this state machine object */ + QS_FUN_(t); /* the source of the transition */ + QS_FUN_(path[0]); /* the target of the tran. to history */ QS_END_() } @@ -327,9 +330,9 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { /* drill into the target hierarchy... */ while (QEP_TRIG_(t, Q_INIT_SIG) == (QState)Q_RET_TRAN) { - QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.smObjFilter, me) - QS_OBJ_(me); /* this state machine object */ - QS_FUN_(t); /* the source (pseudo)state */ + QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.locFilter[SM_OBJ], me) + QS_OBJ_(me); /* this state machine object */ + QS_FUN_(t); /* the source (pseudo)state */ QS_FUN_(me->temp.fun); /* the target of the transition */ QS_END_() @@ -357,7 +360,7 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { t = path[0]; /* current state becomes the new source */ } - QS_BEGIN_(QS_QEP_TRAN, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_TRAN, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -369,7 +372,7 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { #ifdef Q_SPY else if (r == (QState)Q_RET_HANDLED) { - QS_BEGIN_(QS_QEP_INTERN_TRAN, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_INTERN_TRAN, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -379,7 +382,7 @@ void QHsm_dispatch_(QHsm * const me, QEvt const * const e) { } else { - QS_BEGIN_(QS_QEP_IGNORED, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_IGNORED, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -497,7 +500,7 @@ static int_fast8_t QHsm_tran_(QHsm * const me, } } while (iq >= (int_fast8_t)0); - /* not found? */ + /* LCA not found? */ if (r != (QState)Q_RET_HANDLED) { /* (g) check each source->super->... * for each target->super... @@ -509,7 +512,7 @@ static int_fast8_t QHsm_tran_(QHsm * const me, == (QState)Q_RET_HANDLED) { QS_BEGIN_(QS_QEP_STATE_EXIT, - QS_priv_.smObjFilter, me) + QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); QS_FUN_(t); QS_END_() @@ -525,7 +528,7 @@ static int_fast8_t QHsm_tran_(QHsm * const me, ip = (int_fast8_t)(iq-(int_fast8_t)1); /* cause breaking out of inner loop */ iq = (int_fast8_t)(-1); - r = (QState)Q_RET_HANDLED; + r = (QState)Q_RET_HANDLED; /* break */ } else { --iq; diff --git a/source/qep_msm.c b/source/qep_msm.c index d62e0afe..e7b0606a 100644 --- a/source/qep_msm.c +++ b/source/qep_msm.c @@ -4,8 +4,8 @@ * @ingroup qep * @cond ****************************************************************************** -* Last updated for version 5.8.0 -* Last updated on 2016-11-20 +* Last updated for version 5.9.0 +* Last updated on 2017-05-10 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -47,9 +47,6 @@ Q_DEFINE_THIS_MODULE("qep_msm") -/****************************************************************************/ -char_t const QP_versionStr[6] = QP_VERSION_STR; - /****************************************************************************/ /*! internal QEP constants */ enum { @@ -73,6 +70,9 @@ static QMState const l_msm_top_s = { */ #define QEP_ACT_PTR_INC_(act_) (++(act_)) +/*! helper function to execute a transition-action table. */ +static QState QMsm_execTatbl_(QMsm * const me, QMTranActTable const *tatbl); + /*! helper function to exit the current state up to the transition source */ static void QMsm_exitToTranSource_(QMsm * const me, QMState const *s, QMState const *ts); @@ -143,7 +143,7 @@ void QMsm_init_(QMsm * const me, QEvt const * const e) { /* the top-most initial transition must be taken */ Q_ASSERT_ID(210, r == (QState)Q_RET_TRAN_INIT); - QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(me->state.obj->stateHandler); /* source state handler*/ QS_FUN_(me->temp.tatbl->target->stateHandler);/*target state handler*/ @@ -157,7 +157,7 @@ void QMsm_init_(QMsm * const me, QEvt const * const e) { r = QMsm_execTatbl_(me, me->temp.tatbl); /* execute the tran. table */ } while (r >= (QState)Q_RET_TRAN_INIT); - QS_BEGIN_(QS_QEP_INIT_TRAN, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_INIT_TRAN, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_OBJ_(me); /* this state machine object */ QS_FUN_(me->state.obj->stateHandler); /* the new current state */ @@ -186,7 +186,7 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e) { /** @pre current state must be initialized */ Q_REQUIRE_ID(300, s != (QMState const *)0); - QS_BEGIN_(QS_QEP_DISPATCH, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_DISPATCH, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -212,7 +212,7 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e) { /* event unhandled due to a guard? */ else if (r == (QState)Q_RET_UNHANDLED) { - QS_BEGIN_(QS_QEP_UNHANDLED, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_UNHANDLED, QS_priv_.locFilter[SM_OBJ], me) QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ QS_FUN_(t->stateHandler); /* the current state */ @@ -278,7 +278,7 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e) { /* take the XP-Segment from submachine-state */ r = QMsm_execTatbl_(me, me->temp.tatbl); - QS_BEGIN_(QS_QEP_TRAN_XP, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_TRAN_XP, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(s); /* source handler */ QS_FUN_(t); /* target handler */ @@ -294,7 +294,7 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e) { } while (r >= (QState)Q_RET_TRAN); - QS_BEGIN_(QS_QEP_TRAN, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_TRAN, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -309,7 +309,7 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e) { /* internal tran. source can't be NULL */ Q_ASSERT_ID(340, t != (QMState const *)0); - QS_BEGIN_(QS_QEP_INTERN_TRAN, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_INTERN_TRAN, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -320,7 +320,7 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e) { /* event bubbled to the 'top' state? */ else if (t == (QMState const *)0) { - QS_BEGIN_(QS_QEP_IGNORED, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_IGNORED, QS_priv_.locFilter[SM_OBJ], me) QS_TIME_(); /* time stamp */ QS_SIG_(e->sig); /* the signal of the event */ QS_OBJ_(me); /* this state machine object */ @@ -348,7 +348,7 @@ void QMsm_dispatch_(QMsm * const me, QEvt const * const e) { * This function is for internal use inside the QEP event processor and should * __not__ be called directly from the applications. */ -QState QMsm_execTatbl_(QMsm * const me, QMTranActTable const *tatbl) { +static QState QMsm_execTatbl_(QMsm * const me, QMTranActTable const *tatbl) { QActionHandler const *a; QState r = (QState)Q_RET_NULL; QS_CRIT_STAT_ @@ -361,21 +361,21 @@ QState QMsm_execTatbl_(QMsm * const me, QMTranActTable const *tatbl) { #ifdef Q_SPY if (r == (QState)Q_RET_ENTRY) { - QS_BEGIN_(QS_QEP_STATE_ENTRY, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_ENTRY, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(me->temp.obj->stateHandler);/*entered state handler */ QS_END_() } else if (r == (QState)Q_RET_EXIT) { - QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(me->temp.obj->stateHandler); /* exited state handler*/ QS_END_() } else if (r == (QState)Q_RET_TRAN_INIT) { - QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_INIT, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(tatbl->target->stateHandler); /* source */ QS_FUN_(me->temp.tatbl->target->stateHandler);/* target */ @@ -383,7 +383,7 @@ QState QMsm_execTatbl_(QMsm * const me, QMTranActTable const *tatbl) { } else if (r == (QState)Q_RET_TRAN_EP) { - QS_BEGIN_(QS_QEP_TRAN_EP, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_TRAN_EP, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(tatbl->target->stateHandler); /* source */ QS_FUN_(me->temp.tatbl->target->stateHandler);/* target */ @@ -391,7 +391,7 @@ QState QMsm_execTatbl_(QMsm * const me, QMTranActTable const *tatbl) { } else if (r == (QState)Q_RET_TRAN_XP) { - QS_BEGIN_(QS_QEP_TRAN_XP, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_TRAN_XP, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(tatbl->target->stateHandler); /* source */ QS_FUN_(me->temp.tatbl->target->stateHandler);/* target */ @@ -435,7 +435,7 @@ static void QMsm_exitToTranSource_(QMsm * const me, QMState const *s, (void)(*s->exitAction)(me); /* execute the exit action */ - QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_EXIT, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(s->stateHandler); /* the exited state handler */ QS_END_() @@ -462,7 +462,7 @@ static void QMsm_exitToTranSource_(QMsm * const me, QMState const *s, * @returns #Q_RET_INIT, if an initial transition has been executed * in the last entered state or #Q_RET_NULL if no such transition was taken. */ -static QState QMsm_enterHistory_(QMsm * const me, QMState const * const hist){ +static QState QMsm_enterHistory_(QMsm * const me, QMState const *const hist) { QMState const *s = hist; QMState const *ts = me->state.obj; /* transition source */ QMState const *epath[QMSM_MAX_ENTRY_DEPTH_]; @@ -470,7 +470,7 @@ static QState QMsm_enterHistory_(QMsm * const me, QMState const * const hist){ uint_fast8_t i = (uint_fast8_t)0; /* transition entry path index */ QS_CRIT_STAT_ - QS_BEGIN_(QS_QEP_TRAN_HIST, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_TRAN_HIST, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); /* this state machine object */ QS_FUN_(ts->stateHandler); /* source state handler */ QS_FUN_(hist->stateHandler); /* target state handler */ @@ -493,7 +493,7 @@ static QState QMsm_enterHistory_(QMsm * const me, QMState const * const hist){ --i; r = (*epath[i]->entryAction)(me); /* run entry action in epath[i] */ - QS_BEGIN_(QS_QEP_STATE_ENTRY, QS_priv_.smObjFilter, me) + QS_BEGIN_(QS_QEP_STATE_ENTRY, QS_priv_.locFilter[SM_OBJ], me) QS_OBJ_(me); QS_FUN_(epath[i]->stateHandler); /* entered state handler */ QS_END_() diff --git a/source/qf_act.c b/source/qf_act.c index 59a32db6..4d0318d0 100644 --- a/source/qf_act.c +++ b/source/qf_act.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -83,7 +83,7 @@ void QF_add_(QActive * const a) { QF_active_[p] = a; /* register the active object at this priority */ - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_ADD, QS_priv_.aoObjFilter, a) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_ADD, QS_priv_.locFilter[AO_OBJ], a) QS_TIME_(); /* timestamp */ QS_OBJ_(a); /* the active object */ QS_U8_((uint8_t)p); /* the priority of the active object */ @@ -123,7 +123,7 @@ void QF_remove_(QActive * const a) { QF_active_[p] = (QActive *)0; /* free-up the priority level */ a->super.state.fun = Q_STATE_CAST(0); /* invalidate the state */ - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_REMOVE, QS_priv_.aoObjFilter, a) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_REMOVE, QS_priv_.locFilter[AO_OBJ], a) QS_TIME_(); /* timestamp */ QS_OBJ_(a); /* the active object */ QS_U8_((uint8_t)p); /* the priority of the active object */ diff --git a/source/qf_actq.c b/source/qf_actq.c index 634fb5f1..c85521de 100644 --- a/source/qf_actq.c +++ b/source/qf_actq.c @@ -8,14 +8,14 @@ * @ingroup qf * @cond ****************************************************************************** -* Last updated for version 5.8.1 -* Last updated on 2016-12-14 +* Last updated for version 5.8.2 +* Last updated on 2017-02-08 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, www.state-machine.com. +* Copyright (C) Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -36,8 +36,8 @@ * along with this program. If not, see . * * Contact information: -* Web: www.state-machine.com -* Email: info@state-machine.com +* https://state-machine.com +* mailto:info@state-machine.com ****************************************************************************** * @endcond */ @@ -117,7 +117,8 @@ bool QActive_post_(QActive * const me, QEvt const * const e, /* margin available? */ if (nFree > (QEQueueCtr)margin) { - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -162,7 +163,8 @@ bool QActive_post_(QActive * const me, QEvt const * const e, */ Q_ASSERT_ID(110, margin != (uint_fast16_t)0); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -206,7 +208,7 @@ void QActive_postLIFO_(QActive * const me, QEvt const * const e) { /* the queue must be able to accept the event (cannot overflow) */ Q_ASSERT_ID(210, nFree != (QEQueueCtr)0); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -281,7 +283,7 @@ QEvt const *QActive_get_(QActive * const me) { } --me->eQueue.tail; - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -295,7 +297,8 @@ QEvt const *QActive_get_(QActive * const me) { /* all entries in the queue must be free (+1 for fronEvt) */ Q_ASSERT_ID(310, nFree == (me->eQueue.end + (QEQueueCtr)1)); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET_LAST, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET_LAST, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -341,6 +344,16 @@ uint_fast16_t QF_getQueueMin(uint_fast8_t const prio) { /****************************************************************************/ /****************************************************************************/ +/*! Perform downcast to QTicker pointer. */ +/** +* @description +* This macro encapsulates the downcast to (QTicker *), which is used in +* QTicker_init_() and QTicker_dispatch_(). Such casts can trigger PC-Lint +* "Note 929: cast from pointer to pointer [MISRA-04 Rule 11.4, advisory]" +* and this macro helps to encapsulate this deviation. +*/ +#define QTICKER_CAST(me_) ((QTicker *)(me_)) + static void QTicker_init_(QHsm * const me, QEvt const * const e); static void QTicker_dispatch_(QHsm * const me, QEvt const * const e); #ifdef Q_SPY @@ -349,7 +362,7 @@ static void QTicker_dispatch_(QHsm * const me, QEvt const * const e); uint_fast16_t const margin, void const * const sender); #else static bool QTicker_post_(QActive * const me, QEvt const * const e, - uint_fast16_t const margin); + uint_fast16_t const margin); #endif static void QTicker_postLIFO_(QActive * const me, QEvt const * const e); @@ -373,7 +386,7 @@ void QTicker_ctor(QTicker * const me, uint8_t tickRate) { static void QTicker_init_(QHsm * const me, QEvt const * const e) { (void)me; (void)e; - ((QActive *)me)->eQueue.tail = (QEQueueCtr)0; + QTICKER_CAST(me)->eQueue.tail = (QEQueueCtr)0; } /*..........................................................................*/ static void QTicker_dispatch_(QHsm * const me, QEvt const * const e) { @@ -383,12 +396,12 @@ static void QTicker_dispatch_(QHsm * const me, QEvt const * const e) { (void)e; /* unused parameter */ QF_CRIT_ENTRY_(); - n = ((QActive *)me)->eQueue.tail; /* # ticks since last call */ - ((QActive *)me)->eQueue.tail = (QEQueueCtr)0; /* clear the # ticks */ + n = QTICKER_CAST(me)->eQueue.tail; /* # ticks since last call */ + QTICKER_CAST(me)->eQueue.tail = (QEQueueCtr)0; /* clear the # ticks */ QF_CRIT_EXIT_(); for (; n > (QEQueueCtr)0; --n) { - QF_TICK_X(((QActive const *)me)->eQueue.head, me); + QF_TICK_X(QTICKER_CAST(me)->eQueue.head, me); } } /*..........................................................................*/ @@ -418,7 +431,7 @@ static bool QTicker_post_(QActive * const me, QEvt const * const e, ++me->eQueue.tail; /* account for one more tick event */ - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_((QSignal)0); /* the signal of the event */ diff --git a/source/qf_defer.c b/source/qf_defer.c index 5e236137..e4db5569 100644 --- a/source/qf_defer.c +++ b/source/qf_defer.c @@ -4,8 +4,8 @@ * @ingroup qf * @cond ****************************************************************************** -* Last updated for version 5.8.0 -* Last updated on 2016-11-19 +* Last updated for version 5.9.0 +* Last updated on 2017-03-17 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -41,6 +41,11 @@ #include "qf_port.h" /* QF port */ #include "qf_pkg.h" /* QF package-scope interface */ #include "qassert.h" /* QP embedded systems-friendly assertions */ +#ifdef Q_SPY /* QS software tracing enabled? */ + #include "qs_port.h" /* include QS port */ +#else + #include "qs_dummy.h" /* disable the QS software tracing */ +#endif /* Q_SPY */ Q_DEFINE_THIS_MODULE("qf_defer") @@ -160,4 +165,3 @@ uint_fast16_t QActive_flushDeferred(QActive const * const me, } return n; } - diff --git a/source/qf_dyn.c b/source/qf_dyn.c index a584a4cc..be5c51c6 100644 --- a/source/qf_dyn.c +++ b/source/qf_dyn.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/source/qf_mem.c b/source/qf_mem.c index 66d66bae..94e3fc8f 100644 --- a/source/qf_mem.c +++ b/source/qf_mem.c @@ -131,7 +131,7 @@ void QMPool_init(QMPool * const me, void * const poolSto, me->start = poolSto; /* the original start this pool buffer */ me->end = fb; /* the last block in this pool */ - QS_BEGIN_(QS_QF_MPOOL_INIT, QS_priv_.mpObjFilter, me->start) + QS_BEGIN_(QS_QF_MPOOL_INIT, QS_priv_.locFilter[MP_OBJ], me->start) QS_OBJ_(me->start); /* the memory managed by this pool */ QS_MPC_(me->nTot); /* the total number of blocks */ QS_END_() @@ -171,7 +171,7 @@ void QMPool_put(QMPool * const me, void *b) { me->free_head = b; /* set as new head of the free list */ ++me->nFree; /* one more free block in this pool */ - QS_BEGIN_NOCRIT_(QS_QF_MPOOL_PUT, QS_priv_.mpObjFilter, me->start) + QS_BEGIN_NOCRIT_(QS_QF_MPOOL_PUT, QS_priv_.locFilter[MP_OBJ], me->start) QS_TIME_(); /* timestamp */ QS_OBJ_(me->start); /* the memory managed by this pool */ QS_MPC_(me->nFree); /* the number of free blocks in the pool */ @@ -248,7 +248,8 @@ void *QMPool_get(QMPool * const me, uint_fast16_t const margin) { me->free_head = fb_next; /* set the head to the next free block */ - QS_BEGIN_NOCRIT_(QS_QF_MPOOL_GET, QS_priv_.mpObjFilter, me->start) + QS_BEGIN_NOCRIT_(QS_QF_MPOOL_GET, + QS_priv_.locFilter[MP_OBJ], me->start) QS_TIME_(); /* timestamp */ QS_OBJ_(me->start); /* the memory managed by this pool */ QS_MPC_(me->nFree); /* # of free blocks in the pool */ @@ -261,7 +262,7 @@ void *QMPool_get(QMPool * const me, uint_fast16_t const margin) { fb = (QFreeBlock *)0; QS_BEGIN_NOCRIT_(QS_QF_MPOOL_GET_ATTEMPT, - QS_priv_.mpObjFilter, me->start) + QS_priv_.locFilter[MP_OBJ], me->start) QS_TIME_(); /* timestamp */ QS_OBJ_(me->start); /* the memory managed by this pool */ QS_MPC_(me->nFree); /* the number of free blocks in the pool */ diff --git a/source/qf_pkg.h b/source/qf_pkg.h index 0c3ae713..43b9937f 100644 --- a/source/qf_pkg.h +++ b/source/qf_pkg.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/source/qf_ps.c b/source/qf_ps.c index 59b7d86d..56f45258 100644 --- a/source/qf_ps.c +++ b/source/qf_ps.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -213,7 +213,7 @@ void QActive_subscribe(QActive const * const me, enum_t const sig) { QF_CRIT_ENTRY_(); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_SUBSCRIBE, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_SUBSCRIBE, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_((QSignal)sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -261,7 +261,7 @@ void QActive_unsubscribe(QActive const * const me, enum_t const sig) { QF_CRIT_ENTRY_(); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_UNSUBSCRIBE, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_UNSUBSCRIBE, QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_((QSignal)sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ @@ -309,7 +309,7 @@ void QActive_unsubscribeAll(QActive const * const me) { QPSet_remove(&QF_PTR_AT_(QF_subscrList_, sig), p); QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_UNSUBSCRIBE, - QS_priv_.aoObjFilter, me) + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_((QSignal)sig); /* the signal of this event */ QS_OBJ_(me); /* this active object */ diff --git a/source/qf_qeq.c b/source/qf_qeq.c index 71e4d041..81542e08 100644 --- a/source/qf_qeq.c +++ b/source/qf_qeq.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -82,7 +82,7 @@ void QEQueue_init(QEQueue * const me, QEvt const *qSto[], me->nFree = (QEQueueCtr)(qLen + (uint_fast16_t)1); /*+1 for frontEvt */ me->nMin = me->nFree; - QS_BEGIN_(QS_QF_EQUEUE_INIT, QS_priv_.eqObjFilter, me) + QS_BEGIN_(QS_QF_EQUEUE_INIT, QS_priv_.locFilter[EQ_OBJ], me) QS_OBJ_(me); /* this QEQueue object */ QS_EQC_(me->end); /* the length of the queue */ QS_END_() @@ -131,7 +131,8 @@ bool QEQueue_post(QEQueue * const me, QEvt const * const e, /* required margin available? */ if (nFree > (QEQueueCtr)margin) { - QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_POST_FIFO, QS_priv_.eqObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_POST_FIFO, + QS_priv_.locFilter[EQ_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this queue object */ @@ -174,7 +175,8 @@ bool QEQueue_post(QEQueue * const me, QEvt const * const e, */ Q_ASSERT_ID(210, margin != (uint_fast16_t)0); - QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_POST_ATTEMPT, QS_priv_.eqObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_POST_ATTEMPT, + QS_priv_.locFilter[EQ_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this queue object */ @@ -221,7 +223,7 @@ void QEQueue_postLIFO(QEQueue * const me, QEvt const * const e) { /** @pre the queue must be able to accept the event (cannot overflow) */ Q_REQUIRE_ID(300, nFree != (QEQueueCtr)0); - QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_POST_LIFO, QS_priv_.eqObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_POST_LIFO, QS_priv_.locFilter[EQ_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this queue object */ @@ -292,7 +294,7 @@ QEvt const *QEQueue_get(QEQueue * const me) { } --me->tail; - QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_GET, QS_priv_.eqObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_GET, QS_priv_.locFilter[EQ_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this queue object */ @@ -306,7 +308,8 @@ QEvt const *QEQueue_get(QEQueue * const me) { /* all entries in the queue must be free (+1 for fronEvt) */ Q_ASSERT_ID(410, nFree == (me->end + (QEQueueCtr)1)); - QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_GET_LAST, QS_priv_.eqObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_EQUEUE_GET_LAST, + QS_priv_.locFilter[EQ_OBJ], me) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(me); /* this queue object */ diff --git a/source/qf_qmact.c b/source/qf_qmact.c index 283d99c5..4b055d5b 100644 --- a/source/qf_qmact.c +++ b/source/qf_qmact.c @@ -40,7 +40,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/source/qf_time.c b/source/qf_time.c index 6b5c655f..a52a0d57 100644 --- a/source/qf_time.c +++ b/source/qf_time.c @@ -4,8 +4,8 @@ * @ingroup qf * @cond ****************************************************************************** -* Last updated for version 5.8.0 -* Last updated on 2016-11-19 +* Last updated for version 5.9.0 +* Last updated on 2017-03-28 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -135,14 +135,15 @@ void QF_tickX_(uint_fast8_t const tickRate, void const * const sender) /* do NOT advance the prev pointer */ QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_AUTO_DISARM, - QS_priv_.teObjFilter, t) + QS_priv_.locFilter[TE_OBJ], t) QS_OBJ_(t); /* this time event object */ QS_OBJ_(act); /* the target AO */ QS_U8_((uint8_t)tickRate); /* tick rate */ QS_END_NOCRIT_() } - QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_POST, QS_priv_.teObjFilter, t) + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_POST, + QS_priv_.locFilter[TE_OBJ], t) QS_TIME_(); /* timestamp */ QS_OBJ_(t); /* the time event object */ QS_SIG_(t->super.sig); /* signal of this time event */ @@ -329,7 +330,7 @@ void QTimeEvt_armX(QTimeEvt * const me, QF_timeEvtHead_[tickRate].act = me; } - QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_ARM, QS_priv_.teObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_ARM, QS_priv_.locFilter[TE_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(me); /* this time event object */ QS_OBJ_(me->act); /* the active object */ @@ -368,7 +369,7 @@ bool QTimeEvt_disarm(QTimeEvt * const me) { if (me->ctr != (QTimeEvtCtr)0) { wasArmed = true; - QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_DISARM, QS_priv_.teObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_DISARM, QS_priv_.locFilter[TE_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(me); /* this time event object */ QS_OBJ_(me->act); /* the target AO */ @@ -384,7 +385,7 @@ bool QTimeEvt_disarm(QTimeEvt * const me) { wasArmed = false; QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_DISARM_ATTEMPT, - QS_priv_.teObjFilter, me) + QS_priv_.locFilter[TE_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(me); /* this time event object */ QS_OBJ_(me->act); /* the target AO */ @@ -464,7 +465,7 @@ bool QTimeEvt_rearm(QTimeEvt * const me, QTimeEvtCtr const nTicks) { } me->ctr = nTicks; /* re-load the tick counter (shift the phasing) */ - QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_REARM, QS_priv_.teObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_REARM, QS_priv_.locFilter[TE_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(me); /* this time event object */ QS_OBJ_(me->act); /* the target AO */ @@ -499,7 +500,7 @@ QTimeEvtCtr QTimeEvt_ctr(QTimeEvt const * const me) { QF_CRIT_ENTRY_(); ret = me->ctr; - QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_CTR, QS_priv_.teObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_CTR, QS_priv_.locFilter[TE_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(me); /* this time event object */ QS_OBJ_(me->act); /* the target AO */ diff --git a/source/qk.c b/source/qk.c index 2ad7751a..3e929d26 100644 --- a/source/qk.c +++ b/source/qk.c @@ -4,8 +4,8 @@ * @ingroup qk * @cond ****************************************************************************** -* Last updated for version 5.8.1 -* Last updated on 2016-12-14 +* Last updated for version 5.9.0 +* Last updated on 2017-03-13 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -73,11 +73,6 @@ void QF_init(void) { QF_subscrList_ = (QSubscrList *)0; QF_maxPubSignal_ = (enum_t)0; - /* clear the internal QF variables, so that the framework can start - * correctly even if the startup code fails to clear the uninitialized - * data (as is required by the C Standard). - */ - QF_maxPool_ = (uint_fast8_t)0; QF_bzero(&QF_timeEvtHead_[0], (uint_fast16_t)sizeof(QF_timeEvtHead_)); QF_bzero(&QF_active_[0], (uint_fast16_t)sizeof(QF_active_)); QF_bzero(&QK_attr_, (uint_fast16_t)sizeof(QK_attr_)); @@ -137,7 +132,6 @@ int_t QF_run(void) { for (;;) { QK_onIdle(); /* application-specific QK on-idle callback */ } - #ifdef __GNUC__ return (int_t)0; #endif @@ -154,10 +148,9 @@ int_t QF_run(void) { * @param[in] prio priority at which to start the active object * @param[in] qSto pointer to the storage for the ring buffer of the * event queue (used only with the built-in ::QEQueue) -* @param[in] qLen length of the event queue (in events) -* @param[in] stkSto pointer to the stack storage (used only when -* per-AO stack is needed) -* @param[in] stkSize stack size (in bytes) +* @param[in] qLen length of the event queue [events] +* @param[in] stkSto pointer to the stack storage (must be NULL in QK) +* @param[in] stkSize stack size [bytes] * @param[in] ie pointer to the initial event (might be NULL). * * @note This function should be called via the macro QACTIVE_START(). @@ -173,23 +166,27 @@ void QActive_start_(QActive * const me, uint_fast8_t prio, { QF_CRIT_STAT_ - Q_REQUIRE_ID(500, ((uint_fast8_t)0 < prio) + /** @pre AO cannot be started from an ISR, the priority must be in range + * and the stack storage must not be provided, because the QK kernel does + * not need per-AO stacks. + */ + Q_REQUIRE_ID(500, (!QK_ISR_CONTEXT_()) + && ((uint_fast8_t)0 < prio) && (prio <= (uint_fast8_t)QF_MAX_ACTIVE) - && (stkSto == (void *)0) - && (stkSize == (uint_fast16_t)0)); + && (stkSto == (void *)0)); + + (void)stkSize; /* unused parameter */ QEQueue_init(&me->eQueue, qSto, qLen); /* initialize the built-in queue */ me->prio = prio; /* set the current priority of the AO */ - QF_CRIT_ENTRY_(); QF_add_(me); /* make QF aware of this active object */ - QF_CRIT_EXIT_(); QHSM_INIT(&me->super, ie); /* take the top-most initial tran. */ QS_FLUSH(); /* flush the trace buffer to the host */ /* See if this AO needs to be scheduled in case QK is already running */ QF_CRIT_ENTRY_(); - if (QK_sched_() != (uint_fast8_t)0) { + if (QK_sched_() != (uint_fast8_t)0) { /* activation needed? */ QK_activate_(); } QF_CRIT_EXIT_(); @@ -209,12 +206,12 @@ void QActive_start_(QActive * const me, uint_fast8_t prio, void QActive_stop(QActive * const me) { QF_CRIT_STAT_ - QF_CRIT_ENTRY_(); /** @pre QActive_stop() must be called from the AO that wants to stop. */ Q_REQUIRE_ID(600, (me == QF_active_[QK_attr_.actPrio])); QF_remove_(me); /* remove this active object from the QF */ + QF_CRIT_ENTRY_(); QPSet_remove(&QK_attr_.readySet, me->prio); if (QK_sched_() != (uint_fast8_t)0) { QK_activate_(); @@ -287,7 +284,7 @@ void QK_activate_(void) { a = QF_active_[p]; /* obtain the pointer to the AO */ QK_attr_.actPrio = p; /* this becomes the active priority */ - QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.aoObjFilter, a) + QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.locFilter[AO_OBJ], a) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)p, /* priority of the scheduled AO */ (uint8_t)pprev); /* previous priority */ @@ -338,7 +335,7 @@ void QK_activate_(void) { if (pin != (uint_fast8_t)0) { /* resuming an active object? */ a = QF_active_[pin]; /* the pointer to the preempted AO */ - QS_BEGIN_NOCRIT_(QS_SCHED_RESUME, QS_priv_.aoObjFilter, a) + QS_BEGIN_NOCRIT_(QS_SCHED_RESUME, QS_priv_.locFilter[AO_OBJ], a) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)pin, /* priority of the resumed AO */ (uint8_t)pprev); /* previous priority */ diff --git a/source/qk_mutex.c b/source/qk_mutex.c index 368e4aa2..84b461da 100644 --- a/source/qk_mutex.c +++ b/source/qk_mutex.c @@ -4,8 +4,8 @@ * @brief QMutex_init(), QMutex_lock and QMutex_unlock() definitions. * @cond ****************************************************************************** -* Last updated for version 5.8.0 -* Last updated on 2016-11-29 +* Last updated for version 5.9.0 +* Last updated on 2017-03-02 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -154,15 +154,17 @@ void QMutex_unlock(QMutex * const me) { Q_REQUIRE_ID(800, (!QK_ISR_CONTEXT_()) && (me->prevPrio != (uint_fast8_t)MUTEX_UNUSED)); - QS_BEGIN_NOCRIT_(QS_SCHED_UNLOCK, (void *)0, (void *)0) - QS_TIME_(); /* timestamp */ - QS_2U8_((uint8_t)me->prevPrio, /* the previouis lock priority */ - (uint8_t)QK_attr_.lockPrio); /* the lock priority */ - QS_END_NOCRIT_() - p = me->prevPrio; me->prevPrio = (uint_fast8_t)MUTEX_UNUSED; + QS_BEGIN_NOCRIT_(QS_SCHED_UNLOCK, (void *)0, (void *)0) + QS_TIME_(); /* timestamp */ + QS_2U8_((uint8_t)QK_attr_.lockPrio, /* the previouis lock priority */ + (uint8_t)((QK_attr_.lockPrio > p) /* the new lock priority */ + ? p + : QK_attr_.lockPrio)); + QS_END_NOCRIT_() + if (QK_attr_.lockPrio > p) { QK_attr_.lockPrio = p; /* restore the previous lock prio */ if (QK_sched_() != (uint_fast8_t)0) { /* priority found? */ diff --git a/source/qs.c b/source/qs.c index 0086260b..7b6acac4 100644 --- a/source/qs.c +++ b/source/qs.c @@ -4,8 +4,8 @@ * @ingroup qs * @cond ****************************************************************************** -* Last updated for version 5.6.0 -* Last updated on 2015-12-18 +* Last updated for version 5.9.0 +* Last updated on 2017-05-16 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -70,23 +70,24 @@ QSPriv QS_priv_; /* QS private data */ * consistent with the "last-is-best" QS policy. The record sequence counters * and check sums on each record allow the QSPY host uitiliy to easily detect * any data loss. +* +* @note +* This function initializes all the internal QS variables, so that the +* tracing can start correctly even if the startup code fails to clear +* any uninitialized data (as is required by the C Standard). */ void QS_initBuf(uint8_t sto[], uint_fast16_t stoSize) { /* the provided buffer must be at least 8 bytes long */ Q_REQUIRE_ID(100, stoSize > (uint_fast16_t)8); - /* This function initializes all the internal QS variables, so that the - * tracing can start correctly even if the startup code fails to clear - * any uninitialized data (as is required by the C Standard). - */ - QS_filterOff(QS_ALL_RECORDS); /* disable all maskable filters */ + QS_filterOff((uint_fast8_t)QS_ALL_RECORDS); /* all maskable filters off */ - QS_priv_.smObjFilter = (void *)0; - QS_priv_.aoObjFilter = (void *)0; - QS_priv_.mpObjFilter = (void *)0; - QS_priv_.eqObjFilter = (void *)0; - QS_priv_.teObjFilter = (void *)0; - QS_priv_.apObjFilter = (void *)0; + QS_priv_.locFilter[SM_OBJ] = (void *)0; + QS_priv_.locFilter[AO_OBJ] = (void *)0; + QS_priv_.locFilter[MP_OBJ] = (void *)0; + QS_priv_.locFilter[EQ_OBJ] = (void *)0; + QS_priv_.locFilter[TE_OBJ] = (void *)0; + QS_priv_.locFilter[AP_OBJ] = (void *)0; QS_priv_.buf = &sto[0]; QS_priv_.end = (QSCtr)stoSize; @@ -121,22 +122,78 @@ void QS_initBuf(uint8_t sto[], uint_fast16_t stoSize) { * QS_FILTER_EQ_OBJ, and QS_FILTER_TE_OBJ. */ void QS_filterOn(uint_fast8_t rec) { - if (rec == QS_ALL_RECORDS) { + if (rec == (uint_fast8_t)QS_ALL_RECORDS) { uint_fast8_t i; - for (i = (uint_fast8_t)0; - i < (uint_fast8_t)(sizeof(QS_priv_.glbFilter) - 1U); - ++i) - { + for (i = (uint_fast8_t)0; i < (uint_fast8_t)15; ++i) { QS_priv_.glbFilter[i] = (uint8_t)0xFFU; /* set all bits */ } /* never turn the last 3 records on (0x7D, 0x7E, 0x7F) */ QS_priv_.glbFilter[sizeof(QS_priv_.glbFilter) - 1U] = (uint8_t)0x1FU; } + else if (rec == (uint_fast8_t)QS_SM_RECORDS) { + QS_priv_.glbFilter[0] |= (uint8_t)0xFEU; + QS_priv_.glbFilter[1] |= (uint8_t)0x03U; + QS_priv_.glbFilter[6] |= (uint8_t)0x80U; + QS_priv_.glbFilter[7] |= (uint8_t)0x03U; + } + else if (rec == (uint_fast8_t)QS_AO_RECORDS) { + QS_priv_.glbFilter[1] |= (uint8_t)0xFCU; + QS_priv_.glbFilter[2] |= (uint8_t)0x03U; + QS_priv_.glbFilter[5] |= (uint8_t)0x20U; + } + else if (rec == (uint_fast8_t)QS_EQ_RECORDS) { + QS_priv_.glbFilter[2] |= (uint8_t)0x7CU; + QS_priv_.glbFilter[5] |= (uint8_t)0x40U; + } + else if (rec == (uint_fast8_t)QS_MP_RECORDS) { + QS_priv_.glbFilter[2] |= (uint8_t)0x80U; + QS_priv_.glbFilter[3] |= (uint8_t)0x03U; + QS_priv_.glbFilter[5] |= (uint8_t)0x80U; + } + else if (rec == (uint_fast8_t)QS_QF_RECORDS) { + QS_priv_.glbFilter[3] |= (uint8_t)0xFCU; + QS_priv_.glbFilter[4] |= (uint8_t)0x80U; + QS_priv_.glbFilter[5] |= (uint8_t)0x1FU; + } + else if (rec == (uint_fast8_t)QS_TE_RECORDS) { + QS_priv_.glbFilter[4] |= (uint8_t)0x7FU; + } + else if (rec == (uint_fast8_t)QS_SC_RECORDS) { + QS_priv_.glbFilter[6] |= (uint8_t)0x7CU; + } + else if (rec == (uint_fast8_t)QS_U0_RECORDS) { + QS_priv_.glbFilter[8] |= (uint8_t)0xC0U; + QS_priv_.glbFilter[9] |= (uint8_t)0xFFU; + } + else if (rec == (uint_fast8_t)QS_U1_RECORDS) { + QS_priv_.glbFilter[10] |= (uint8_t)0xFFU; + QS_priv_.glbFilter[11] |= (uint8_t)0x03U; + } + else if (rec == (uint_fast8_t)QS_U2_RECORDS) { + QS_priv_.glbFilter[11] |= (uint8_t)0xFCU; + QS_priv_.glbFilter[12] |= (uint8_t)0x0FU; + } + else if (rec == (uint_fast8_t)QS_U3_RECORDS) { + QS_priv_.glbFilter[12] |= (uint8_t)0xF0U; + QS_priv_.glbFilter[13] |= (uint8_t)0x3FU; + } + else if (rec == (uint_fast8_t)QS_U4_RECORDS) { + QS_priv_.glbFilter[13] |= (uint8_t)0xC0U; + QS_priv_.glbFilter[14] |= (uint8_t)0xFFU; + } + else if (rec == (uint_fast8_t)QS_UA_RECORDS) { + QS_priv_.glbFilter[8] |= (uint8_t)0xC0U; + QS_priv_.glbFilter[9] |= (uint8_t)0xFFU; + QS_priv_.glbFilter[10] |= (uint8_t)0xFFU; + QS_priv_.glbFilter[11] |= (uint8_t)0xFFU; + QS_priv_.glbFilter[12] |= (uint8_t)0xFFU; + QS_priv_.glbFilter[14] |= (uint8_t)0xFFU; + } else { /* record numbers can't exceed QS_ESC, so they don't need escaping */ Q_ASSERT_ID(210, rec < (uint_fast8_t)QS_ESC); QS_priv_.glbFilter[rec >> 3] |= - (uint8_t)(1U << (rec & (uint_fast8_t)7)); + (uint8_t)(1U << (rec & (uint_fast8_t)7U)); } } @@ -155,24 +212,79 @@ void QS_filterOn(uint_fast8_t rec) { void QS_filterOff(uint_fast8_t rec) { uint8_t tmp; - if (rec == QS_ALL_RECORDS) { + if (rec == (uint_fast8_t)QS_ALL_RECORDS) { /* first clear all global filters */ - for (tmp = (uint8_t)((uint8_t)sizeof(QS_priv_.glbFilter) - (uint8_t)1); - tmp > (uint8_t)0; - --tmp) - { + for (tmp = (uint8_t)15; tmp > (uint8_t)0; --tmp) { QS_priv_.glbFilter[tmp] = (uint8_t)0; } - /* next leave the specific filters enabled */ - QS_priv_.glbFilter[0] = (uint8_t)0x01; - QS_priv_.glbFilter[7] = (uint8_t)0xF0; - QS_priv_.glbFilter[8] = (uint8_t)0x3F; + QS_priv_.glbFilter[0] = (uint8_t)0x01U; + QS_priv_.glbFilter[7] = (uint8_t)0xFCU; + QS_priv_.glbFilter[8] = (uint8_t)0x3FU; + } + else if (rec == (uint_fast8_t)QS_SM_RECORDS) { + QS_priv_.glbFilter[0] &= (uint8_t)(~0xFEU); + QS_priv_.glbFilter[1] &= (uint8_t)(~0x03U); + QS_priv_.glbFilter[6] &= (uint8_t)(~0x80U); + QS_priv_.glbFilter[7] &= (uint8_t)(~0x03U); + } + else if (rec == (uint_fast8_t)QS_AO_RECORDS) { + QS_priv_.glbFilter[1] &= (uint8_t)(~0xFCU); + QS_priv_.glbFilter[2] &= (uint8_t)(~0x03U); + QS_priv_.glbFilter[5] &= (uint8_t)(~0x20U); + } + else if (rec == (uint_fast8_t)QS_EQ_RECORDS) { + QS_priv_.glbFilter[2] &= (uint8_t)(~0x7CU); + QS_priv_.glbFilter[5] &= (uint8_t)(~0x40U); + } + else if (rec == (uint_fast8_t)QS_MP_RECORDS) { + QS_priv_.glbFilter[2] &= (uint8_t)(~0x80U); + QS_priv_.glbFilter[3] &= (uint8_t)(~0x03U); + QS_priv_.glbFilter[5] &= (uint8_t)(~0x80U); + } + else if (rec == (uint_fast8_t)QS_QF_RECORDS) { + QS_priv_.glbFilter[3] &= (uint8_t)(~0xFCU); + QS_priv_.glbFilter[4] &= (uint8_t)(~0x80U); + QS_priv_.glbFilter[5] &= (uint8_t)(~0x1FU); + } + else if (rec == (uint_fast8_t)QS_TE_RECORDS) { + QS_priv_.glbFilter[4] &= (uint8_t)(~0x7FU); + } + else if (rec == (uint_fast8_t)QS_SC_RECORDS) { + QS_priv_.glbFilter[6] &= (uint8_t)(~0x7CU); + } + else if (rec == (uint_fast8_t)QS_U0_RECORDS) { + QS_priv_.glbFilter[8] &= (uint8_t)(~0xC0U); + QS_priv_.glbFilter[9] = (uint8_t)0; + } + else if (rec == (uint_fast8_t)QS_U1_RECORDS) { + QS_priv_.glbFilter[10] = (uint8_t)0; + QS_priv_.glbFilter[11] &= (uint8_t)(~0x03U); + } + else if (rec == (uint_fast8_t)QS_U2_RECORDS) { + QS_priv_.glbFilter[11] &= (uint8_t)(~0xFCU); + QS_priv_.glbFilter[12] &= (uint8_t)(~0x0FU); + } + else if (rec == (uint_fast8_t)QS_U3_RECORDS) { + QS_priv_.glbFilter[12] &= (uint8_t)(~0xF0U); + QS_priv_.glbFilter[13] &= (uint8_t)(~0x3FU); + } + else if (rec == (uint_fast8_t)QS_U4_RECORDS) { + QS_priv_.glbFilter[13] &= (uint8_t)(~0xC0U); + QS_priv_.glbFilter[14] = (uint8_t)0; + } + else if (rec == (uint_fast8_t)QS_UA_RECORDS) { + QS_priv_.glbFilter[8] &= (uint8_t)(~0xC0U); + QS_priv_.glbFilter[9] = (uint8_t)0; + QS_priv_.glbFilter[10] = (uint8_t)0; + QS_priv_.glbFilter[11] = (uint8_t)0; + QS_priv_.glbFilter[12] = (uint8_t)0; + QS_priv_.glbFilter[14] = (uint8_t)0; } else { /* record IDs can't exceed QS_ESC, so they don't need escaping */ Q_ASSERT_ID(310, rec < (uint_fast8_t)QS_ESC); - tmp = (uint8_t)(1U << (rec & (uint_fast8_t)0x07)); + tmp = (uint8_t)(1U << (rec & (uint_fast8_t)0x07U)); tmp ^= (uint8_t)0xFFU; /* invert all bits */ QS_priv_.glbFilter[rec >> 3] &= tmp; } diff --git a/source/qs_64bit.c b/source/qs_64bit.c index 76409066..8b3a28cf 100644 --- a/source/qs_64bit.c +++ b/source/qs_64bit.c @@ -11,7 +11,7 @@ * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, www.state-machine.com. +* Copyright (C) Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -32,8 +32,8 @@ * along with this program. If not, see . * * Contact information: -* Web: www.state-machine.com -* Email: info@state-machine.com +* https://state-machine.com +* mailto:info@state-machine.com ****************************************************************************** * @endcond */ diff --git a/source/qs_fp.c b/source/qs_fp.c index c31818db..9e57098e 100644 --- a/source/qs_fp.c +++ b/source/qs_fp.c @@ -11,7 +11,7 @@ * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, www.state-machine.com. +* Copyright (C) Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -32,8 +32,8 @@ * along with this program. If not, see . * * Contact information: -* Web: www.state-machine.com -* Email: info@state-machine.com +* https://state-machine.com +* mailto:info@state-machine.com ****************************************************************************** * @endcond */ diff --git a/source/qs_pkg.h b/source/qs_pkg.h index 78a5dc0c..64dbaeb9 100644 --- a/source/qs_pkg.h +++ b/source/qs_pkg.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/source/qs_rx.c b/source/qs_rx.c index 5de1d79b..f0d977a4 100644 --- a/source/qs_rx.c +++ b/source/qs_rx.c @@ -4,14 +4,14 @@ * @ingroup qs * @cond ****************************************************************************** -* Last updated for version 5.6.0 -* Last updated on 2015-12-18 +* Last updated for version 5.9.0 +* Last updated on 2017-05-17 * * Q u a n t u m L e a P s * --------------------------- * innovating embedded systems * -* Copyright (C) Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -48,37 +48,55 @@ QSrxPriv QS_rxPriv_; /* QS-RX private data */ /****************************************************************************/ #if (QS_OBJ_PTR_SIZE == 1) - typedef uint8_t QSAddr; + typedef uint8_t QSObj; #elif (QS_OBJ_PTR_SIZE == 2) - typedef uint16_t QSAddr; + typedef uint16_t QSObj; #elif (QS_OBJ_PTR_SIZE == 4) - typedef uint32_t QSAddr; + typedef uint32_t QSObj; #elif (QS_OBJ_PTR_SIZE == 8) - typedef uint64_t QSAddr; + typedef uint64_t QSObj; #endif -/* extended-state variables used for parsing various QS-RX Records... */ +#if (QS_FUN_PTR_SIZE == 1) + typedef uint8_t QSFun; +#elif (QS_FUN_PTR_SIZE == 2) + typedef uint16_t QSFun; +#elif (QS_FUN_PTR_SIZE == 4) + typedef uint32_t QSFun; +#elif (QS_FUN_PTR_SIZE == 8) + typedef uint64_t QSFun; +#endif + +/** @cond +* Exlcude the following internals from the Doxygen documentation +* Extended-state variables used for parsing various QS-RX Records +*/ typedef struct { - uint32_t param; + uint32_t param1; + uint32_t param2; + uint32_t param3; uint8_t idx; uint8_t cmdId; } CmdVar; typedef struct { - uint8_t rate; + uint_fast8_t rate; } TickVar; typedef struct { - QSAddr addr; - uint8_t idx; - uint8_t len; + uint16_t offs; + uint8_t size; + uint8_t num; + uint8_t idx; } PeekVar; typedef struct { - uint8_t data[8]; - QSAddr addr; - uint8_t idx; - uint8_t len; + uint32_t data; + uint16_t offs; + uint8_t size; + uint8_t num; + uint8_t idx; + uint8_t fill; } PokeVar; typedef struct { @@ -87,10 +105,17 @@ typedef struct { } GFltVar; typedef struct { - QSAddr addr; + QSObj addr; uint8_t idx; - uint8_t fltId; -} LFltVar; + uint8_t kind; /* see qs.h, enum QSpyObjKind */ + uint8_t recId; +} ObjVar; + +typedef struct { + QSFun addr; + uint32_t data; + uint8_t idx; +} TPVar; /* Test-Probe */ typedef struct { uint8_t prio; @@ -106,20 +131,21 @@ typedef struct { } EvtVar; static struct { - union QSRxExtState { + union Variant { CmdVar cmd; TickVar tick; PeekVar peek; PokeVar poke; - GFltVar gFlt; - LFltVar lFlt; - AFltVar aFlt; + GFltVar gFlt; + AFltVar aFlt; + ObjVar obj; EvtVar evt; + TPVar tp; } var; /* extended-state variables for the current state */ - uint8_t state; - uint8_t esc; - uint8_t seq; - uint8_t chksum; + uint8_t state; + uint8_t esc; + uint8_t seq; + uint8_t chksum; } l_rx; enum { @@ -127,40 +153,64 @@ enum { WAIT4_REC, WAIT4_INFO_FRAME, WAIT4_CMD_ID, - WAIT4_CMD_PARAM, + WAIT4_CMD_PARAM1, + WAIT4_CMD_PARAM2, + WAIT4_CMD_PARAM3, WAIT4_CMD_FRAME, WAIT4_RESET_FRAME, WAIT4_TICK_RATE, WAIT4_TICK_FRAME, - WAIT4_PEEK_ADDR, - WAIT4_PEEK_LEN, + WAIT4_PEEK_OFFS, + WAIT4_PEEK_SIZE, + WAIT4_PEEK_NUM, WAIT4_PEEK_FRAME, - WAIT4_POKE_ADDR, - WAIT4_POKE_LEN, + WAIT4_POKE_OFFS, + WAIT4_POKE_SIZE, + WAIT4_POKE_NUM, WAIT4_POKE_DATA, WAIT4_POKE_FRAME, + WAIT4_FILL_DATA, + WAIT4_FILL_FRAME, WAIT4_GLB_FILTER_LEN, WAIT4_GLB_FILTER_DATA, WAIT4_GLB_FILTER_FRAME, - WAIT4_LOC_FILTER_ID, - WAIT4_LOC_FILTER_ADDR, - WAIT4_LOC_FILTER_FRAME, WAIT4_AO_FILTER_PRIO, WAIT4_AO_FILTER_FRAME, + WAIT4_OBJ_KIND, + WAIT4_OBJ_ADDR, + WAIT4_OBJ_FRAME, WAIT4_EVT_PRIO, WAIT4_EVT_SIG, WAIT4_EVT_LEN, WAIT4_EVT_PAR, WAIT4_EVT_FRAME, - ERROR + WAIT4_TEST_SETUP_FRAME, + WAIT4_TEST_TEARDOWN_FRAME, + WAIT4_TEST_PROBE_DATA, + WAIT4_TEST_PROBE_ADDR, + WAIT4_TEST_PROBE_FRAME, + WAIT4_TEST_CONTINUE_FRAME, + ERROR_STATE }; +#ifdef Q_UTEST + static struct { + TPVar tpBuf[16]; /* buffer of Test-Probes received so far */ + uint8_t tpNum; /* current number of Test-Probes */ + QSTimeCtr testTime; /* test time (tick counter) */ + } l_testData; +#endif /* Q_UTEST */ + +/* static helper functions... */ static void QS_rxParseData_(uint8_t b); -static void QS_rxHandleGoodFrame_(void); -static void QS_rxHandleBadFrame_(void); -static void QS_rxReportSuccess_(enum QSpyRxRecords recId); -static void QS_rxReportError_(uint8_t stateId); -static bool QS_rxAddr_(uint8_t b, QSAddr *addr, uint8_t *idx); +static void QS_rxHandleGoodFrame_(uint8_t state); +static void QS_rxHandleBadFrame_(uint8_t state); +static void QS_rxReportAck_(enum QSpyRxRecords recId); +static void QS_rxReportError_(uint8_t code); +static void QS_rxReportDone_(enum QSpyRxRecords recId); +static void QS_rxPoke_(void); + +static uint8_t const l_QS_RX = (uint8_t)0; /* QS source ID */ /*! Internal QS-RX macro to access the QS ring buffer */ /** @@ -175,15 +225,17 @@ static bool QS_rxAddr_(uint8_t b, QSAddr *addr, uint8_t *idx); /*! Internal QS-RX macro to encapsulate transition in the QS-RX FSM */ #define QS_RX_TRAN_(target_) (l_rx.state = (uint8_t)(target_)) -static uint8_t const l_QS_RX = (uint8_t)0; /* QS source ID */ +/** @endcond */ /****************************************************************************/ /** * @description * This function should be called from QS_onStartup() to provide QS-RX with -* the receive data buffer. The first parameter @p sto[] is the address of -* the memory block, and the second parameter @p stoSize is the size of -* this block in bytes. The size of the QS RX buffer cannot exceed 64KB. +* the receive data buffer. +* +* @param[in] sto[] the address of the memory block +* @param[in] stoSize the size of this block [bytes]. The size of the +* QS RX buffer cannot exceed 64KB. * * @note QS-RX can work with quite small data buffers, but you will start * losing data if the buffer is not drained fast enough in the idle task. @@ -197,25 +249,33 @@ static uint8_t const l_QS_RX = (uint8_t)0; /* QS source ID */ * QS_RX_DATA_ERROR trace record. */ void QS_rxInitBuf(uint8_t sto[], uint16_t stoSize) { - static char_t const s_rxObjDic[] = "QS_RX"; - QS_CRIT_STAT_ + QS_rxPriv_.buf = &sto[0]; + QS_rxPriv_.end = (QSCtr)stoSize - (QSCtr)1; + QS_rxPriv_.head = (QSCtr)0; + QS_rxPriv_.tail = (QSCtr)0; - QS_rxPriv_.buf = &sto[0]; - QS_rxPriv_.end = (QSCtr)stoSize - (QSCtr)1; - QS_rxPriv_.head = (QSCtr)0; - QS_rxPriv_.tail = (QSCtr)0; + QS_rxPriv_.currObj[SM_OBJ] = (void *)0; + QS_rxPriv_.currObj[AO_OBJ] = (void *)0; + QS_rxPriv_.currObj[MP_OBJ] = (void *)0; + QS_rxPriv_.currObj[EQ_OBJ] = (void *)0; + QS_rxPriv_.currObj[TE_OBJ] = (void *)0; + QS_rxPriv_.currObj[AP_OBJ] = (void *)0; QS_RX_TRAN_(WAIT4_SEQ); l_rx.esc = (uint8_t)0U; l_rx.seq = (uint8_t)0; l_rx.chksum = (uint8_t)0; - QS_CRIT_ENTRY_(); QS_beginRec((uint_fast8_t)QS_OBJ_DICT); - QS_OBJ_(&l_QS_RX); - QS_STR_(s_rxObjDic); + QS_OBJ_(&l_QS_RX); + QS_STR_("QS_RX"); QS_endRec(); - QS_CRIT_EXIT_(); + /* no QS_REC_DONE(), because QS is not running yet */ + +#ifdef Q_UTEST + l_testData.tpNum = (uint8_t)0; + l_testData.testTime = (QSTimeCtr)0; +#endif /* Q_UTEST */ } /****************************************************************************/ @@ -265,18 +325,20 @@ void QS_rxParse(void) { l_rx.esc = (uint8_t)1; } else if (b == QS_FRAME) { + /* get ready for the next frame */ + b = l_rx.state; /* save the current state in b */ + l_rx.esc = (uint8_t)0; + QS_RX_TRAN_(WAIT4_SEQ); + if (l_rx.chksum == QS_GOOD_CHKSUM) { - QS_rxHandleGoodFrame_(); + l_rx.chksum = (uint8_t)0; + QS_rxHandleGoodFrame_(b); } else { /* bad checksum */ - QS_rxReportError_((uint8_t)0x00); - QS_rxHandleBadFrame_(); + l_rx.chksum = (uint8_t)0; + QS_rxReportError_((uint8_t)0x41U); + QS_rxHandleBadFrame_(b); } - - /* get ready for the next frame */ - l_rx.esc = (uint8_t)0; - l_rx.chksum = (uint8_t)0; - QS_RX_TRAN_(WAIT4_SEQ); } else { l_rx.chksum += b; @@ -290,8 +352,8 @@ static void QS_rxParseData_(uint8_t b) { switch (l_rx.state) { case WAIT4_SEQ: { ++l_rx.seq; - if (l_rx.seq != b) { /* not the expected sequence? */ - QS_rxReportError_((uint8_t)(1U << 5)); + if (l_rx.seq != b) { + QS_rxReportError_((uint8_t)0x42U); l_rx.seq = b; /* update the sequence */ } QS_RX_TRAN_(WAIT4_REC); @@ -312,30 +374,80 @@ static void QS_rxParseData_(uint8_t b) { QS_RX_TRAN_(WAIT4_TICK_RATE); break; case QS_RX_PEEK: - l_rx.var.peek.addr = (QSAddr)0; - l_rx.var.peek.idx = (uint8_t)0; - QS_RX_TRAN_(WAIT4_PEEK_ADDR); + if (QS_rxPriv_.currObj[AP_OBJ] != (void *)0) { + l_rx.var.peek.offs = (uint16_t)0; + l_rx.var.peek.idx = (uint8_t)0; + QS_RX_TRAN_(WAIT4_PEEK_OFFS); + } + else { + QS_rxReportError_((uint8_t)QS_RX_PEEK); + QS_RX_TRAN_(ERROR_STATE); + } break; case QS_RX_POKE: - l_rx.var.poke.addr = (QSAddr)0; - l_rx.var.poke.idx = (uint8_t)0; - QS_RX_TRAN_(WAIT4_POKE_ADDR); + case QS_RX_FILL: + l_rx.var.poke.fill = (b == (uint8_t)QS_RX_FILL) + ? (uint8_t)1 + : (uint8_t)0; + if (QS_rxPriv_.currObj[AP_OBJ] != (void *)0) { + l_rx.var.poke.offs = (uint16_t)0; + l_rx.var.poke.idx = (uint8_t)0; + QS_RX_TRAN_(WAIT4_POKE_OFFS); + } + else { + QS_rxReportError_((l_rx.var.poke.fill != (uint8_t)0) + ? (uint8_t)QS_RX_FILL + : (uint8_t)QS_RX_FILL); + QS_RX_TRAN_(ERROR_STATE); + } break; case QS_RX_GLB_FILTER: QS_RX_TRAN_(WAIT4_GLB_FILTER_LEN); break; case QS_RX_LOC_FILTER: - QS_RX_TRAN_(WAIT4_LOC_FILTER_ID); + l_rx.var.obj.recId = (uint8_t)QS_RX_LOC_FILTER; + QS_RX_TRAN_(WAIT4_OBJ_KIND); break; case QS_RX_AO_FILTER: QS_RX_TRAN_(WAIT4_AO_FILTER_PRIO); break; + case QS_RX_CURR_OBJ: + l_rx.var.obj.recId = (uint8_t)QS_RX_CURR_OBJ; + QS_RX_TRAN_(WAIT4_OBJ_KIND); + break; case QS_RX_EVENT: QS_RX_TRAN_(WAIT4_EVT_PRIO); break; + +#ifdef Q_UTEST + case QS_RX_TEST_SETUP: + QS_RX_TRAN_(WAIT4_TEST_SETUP_FRAME); + break; + case QS_RX_TEST_TEARDOWN: + QS_RX_TRAN_(WAIT4_TEST_TEARDOWN_FRAME); + break; + case QS_RX_TEST_CONTINUE: + QS_RX_TRAN_(WAIT4_TEST_CONTINUE_FRAME); + break; + case QS_RX_TEST_PROBE: + if (l_testData.tpNum + < (uint8_t)(sizeof(l_testData.tpBuf) + /sizeof(l_testData.tpBuf[0]))) + { + l_rx.var.tp.data = (uint32_t)0; + l_rx.var.tp.idx = (uint8_t)0; + QS_RX_TRAN_(WAIT4_TEST_PROBE_DATA); + } + else { /* the number of Test-Probes exceeded */ + QS_rxReportError_((uint8_t)QS_RX_TEST_PROBE); + QS_RX_TRAN_(ERROR_STATE); + } + break; +#endif /* Q_UTEST */ + default: - QS_rxReportError_((uint8_t)(1U << 5)); - QS_RX_TRAN_(ERROR); + QS_rxReportError_((uint8_t)0x43U); + QS_RX_TRAN_(ERROR_STATE); break; } break; @@ -345,16 +457,37 @@ static void QS_rxParseData_(uint8_t b) { break; } case WAIT4_CMD_ID: { - l_rx.var.cmd.cmdId = b; - l_rx.var.cmd.idx = (uint8_t)0; - l_rx.var.cmd.param = (uint32_t)0; - QS_RX_TRAN_(WAIT4_CMD_PARAM); + l_rx.var.cmd.cmdId = b; + l_rx.var.cmd.idx = (uint8_t)0; + l_rx.var.cmd.param1 = (uint32_t)0; + l_rx.var.cmd.param2 = (uint32_t)0; + l_rx.var.cmd.param3 = (uint32_t)0; + QS_RX_TRAN_(WAIT4_CMD_PARAM1); break; } - case WAIT4_CMD_PARAM: { - l_rx.var.cmd.param |= ((uint32_t)b << l_rx.var.cmd.idx); - l_rx.var.cmd.idx += (uint8_t)8; + case WAIT4_CMD_PARAM1: { + l_rx.var.cmd.param1 |= ((uint32_t)b << l_rx.var.cmd.idx); + l_rx.var.cmd.idx += (uint8_t)8; if (l_rx.var.cmd.idx == (uint8_t)(8*4)) { + l_rx.var.cmd.idx = (uint8_t)0; + QS_RX_TRAN_(WAIT4_CMD_PARAM2); + } + break; + } + case WAIT4_CMD_PARAM2: { + l_rx.var.cmd.param2 |= ((uint32_t)b << l_rx.var.cmd.idx); + l_rx.var.cmd.idx += (uint8_t)8; + if (l_rx.var.cmd.idx == (uint8_t)(8*4)) { + l_rx.var.cmd.idx = (uint8_t)0; + QS_RX_TRAN_(WAIT4_CMD_PARAM3); + } + break; + } + case WAIT4_CMD_PARAM3: { + l_rx.var.cmd.param3 |= ((uint32_t)b << l_rx.var.cmd.idx); + l_rx.var.cmd.idx += (uint8_t)8; + if (l_rx.var.cmd.idx == (uint8_t)(8*4)) { + l_rx.var.cmd.idx = (uint8_t)0; QS_RX_TRAN_(WAIT4_CMD_FRAME); } break; @@ -368,7 +501,7 @@ static void QS_rxParseData_(uint8_t b) { break; } case WAIT4_TICK_RATE: { - l_rx.var.tick.rate = b; + l_rx.var.tick.rate = (uint_fast8_t)b; QS_RX_TRAN_(WAIT4_TICK_FRAME); break; } @@ -376,14 +509,30 @@ static void QS_rxParseData_(uint8_t b) { /* keep ignoring the data until a frame is collected */ break; } - case WAIT4_PEEK_ADDR: { - if (QS_rxAddr_(b, &l_rx.var.peek.addr, &l_rx.var.peek.idx)) { - QS_RX_TRAN_(WAIT4_PEEK_LEN); + case WAIT4_PEEK_OFFS: { + if (l_rx.var.peek.idx == (uint8_t)0) { + l_rx.var.peek.offs = (uint16_t)b; + l_rx.var.peek.idx += (uint8_t)8; + } + else { + l_rx.var.peek.offs |= (uint16_t)((uint16_t)b << 8); + QS_RX_TRAN_(WAIT4_PEEK_SIZE); } break; } - case WAIT4_PEEK_LEN: { - l_rx.var.peek.len = b; + case WAIT4_PEEK_SIZE: { + if ((b == (uint8_t)1) || (b == (uint8_t)2) || (b == (uint8_t)4)) { + l_rx.var.peek.size = b; + QS_RX_TRAN_(WAIT4_PEEK_NUM); + } + else { + QS_rxReportError_((uint8_t)QS_RX_PEEK); + QS_RX_TRAN_(ERROR_STATE); + } + break; + } + case WAIT4_PEEK_NUM: { + l_rx.var.peek.num = b; QS_RX_TRAN_(WAIT4_PEEK_FRAME); break; } @@ -391,32 +540,71 @@ static void QS_rxParseData_(uint8_t b) { /* keep ignoring the data until a frame is collected */ break; } - case WAIT4_POKE_ADDR: { - if (QS_rxAddr_(b, &l_rx.var.poke.addr, &l_rx.var.poke.idx)) { - QS_RX_TRAN_(WAIT4_POKE_LEN); + case WAIT4_POKE_OFFS: { + if (l_rx.var.poke.idx == (uint8_t)0) { + l_rx.var.poke.offs = (uint16_t)b; + l_rx.var.poke.idx = (uint8_t)1; + } + else { + l_rx.var.poke.offs |= (uint16_t)((uint16_t)b << 8); + QS_RX_TRAN_(WAIT4_POKE_SIZE); } break; } - case WAIT4_POKE_LEN: { - if (b <= (uint8_t)sizeof(l_rx.var.poke.data)) { - l_rx.var.poke.len = b; - l_rx.var.poke.idx = (uint8_t)0; - QS_RX_TRAN_(WAIT4_POKE_DATA); + case WAIT4_POKE_SIZE: { + if ((b == (uint8_t)1) || (b == (uint8_t)2) || (b == (uint8_t)4)) { + l_rx.var.poke.size = b; + QS_RX_TRAN_(WAIT4_POKE_NUM); } else { - QS_rxReportError_((uint8_t)(1U << 5)); - QS_RX_TRAN_(ERROR); + QS_rxReportError_((l_rx.var.poke.fill != (uint8_t)0) + ? (uint8_t)QS_RX_FILL + : (uint8_t)QS_RX_POKE); + QS_RX_TRAN_(ERROR_STATE); + } + break; + } + case WAIT4_POKE_NUM: { + if (b > (uint8_t)0) { + l_rx.var.poke.num = b; + l_rx.var.poke.data = (uint32_t)0; + l_rx.var.poke.idx = (uint8_t)0; + QS_RX_TRAN_((l_rx.var.poke.fill != (uint8_t)0) + ? WAIT4_FILL_DATA + : WAIT4_POKE_DATA); + } + else { + QS_rxReportError_((l_rx.var.poke.fill != (uint8_t)0) + ? (uint8_t)QS_RX_FILL + : (uint8_t)QS_RX_POKE); + QS_RX_TRAN_(ERROR_STATE); + } + break; + } + case WAIT4_FILL_DATA: { + l_rx.var.poke.data |= ((uint32_t)b << l_rx.var.poke.idx); + l_rx.var.poke.idx += (uint8_t)8; + if ((l_rx.var.poke.idx >> 3) == l_rx.var.poke.size) { + QS_RX_TRAN_(WAIT4_FILL_FRAME); } break; } case WAIT4_POKE_DATA: { - l_rx.var.poke.data[l_rx.var.poke.idx] = b; - ++l_rx.var.poke.idx; - if (l_rx.var.poke.idx == l_rx.var.poke.len) { - QS_RX_TRAN_(WAIT4_POKE_FRAME); + l_rx.var.poke.data |= ((uint32_t)b << l_rx.var.poke.idx); + l_rx.var.poke.idx += (uint8_t)8; + if ((l_rx.var.poke.idx >> 3) == l_rx.var.poke.size) { + QS_rxPoke_(); + --l_rx.var.poke.num; + if (l_rx.var.poke.num == (uint8_t)0) { + QS_RX_TRAN_(WAIT4_POKE_FRAME); + } } break; } + case WAIT4_FILL_FRAME: { + /* keep ignoring the data until a frame is collected */ + break; + } case WAIT4_POKE_FRAME: { /* keep ignoring the data until a frame is collected */ break; @@ -427,8 +615,8 @@ static void QS_rxParseData_(uint8_t b) { QS_RX_TRAN_(WAIT4_GLB_FILTER_DATA); } else { - QS_rxReportError_((uint8_t)(1U << 5)); - QS_RX_TRAN_(ERROR); + QS_rxReportError_((uint8_t)QS_RX_GLB_FILTER); + QS_RX_TRAN_(ERROR_STATE); } break; } @@ -444,26 +632,28 @@ static void QS_rxParseData_(uint8_t b) { /* keep ignoring the data until a frame is collected */ break; } - case WAIT4_LOC_FILTER_ID: { - if (b < (uint8_t)6) { - l_rx.var.lFlt.fltId = b; - l_rx.var.lFlt.addr = (QSAddr)0; - l_rx.var.lFlt.idx = (uint8_t)0; - QS_RX_TRAN_(WAIT4_LOC_FILTER_ADDR); + case WAIT4_OBJ_KIND: { + if (b <= (uint8_t)6) { + l_rx.var.obj.kind = b; + l_rx.var.obj.addr = (QSObj)0; + l_rx.var.obj.idx = (uint8_t)0; + QS_RX_TRAN_(WAIT4_OBJ_ADDR); } else { - QS_rxReportError_((uint8_t)(1U << 5)); - QS_RX_TRAN_(ERROR); + QS_rxReportError_(l_rx.var.obj.recId); + QS_RX_TRAN_(ERROR_STATE); } break; } - case WAIT4_LOC_FILTER_ADDR: { - if (QS_rxAddr_(b, &l_rx.var.lFlt.addr, &l_rx.var.lFlt.idx)) { - QS_RX_TRAN_(WAIT4_LOC_FILTER_FRAME); + case WAIT4_OBJ_ADDR: { + l_rx.var.obj.addr |= ((uint32_t)b << l_rx.var.obj.idx); + l_rx.var.obj.idx += (uint8_t)8; + if (l_rx.var.obj.idx == (uint8_t)(8*QS_OBJ_PTR_SIZE)) { + QS_RX_TRAN_(WAIT4_OBJ_FRAME); } break; } - case WAIT4_LOC_FILTER_FRAME: { + case WAIT4_OBJ_FRAME: { /* keep ignoring the data until a frame is collected */ break; } @@ -479,7 +669,7 @@ static void QS_rxParseData_(uint8_t b) { case WAIT4_EVT_PRIO: { l_rx.var.evt.prio = b; l_rx.var.evt.sig = (QSignal)0; - l_rx.var.evt.idx = (uint8_t)0; + l_rx.var.evt.idx = (uint8_t)0; QS_RX_TRAN_(WAIT4_EVT_SIG); break; } @@ -487,7 +677,7 @@ static void QS_rxParseData_(uint8_t b) { l_rx.var.evt.sig |= (QSignal)((uint32_t)b << l_rx.var.evt.idx); l_rx.var.evt.idx += (uint8_t)8; if (l_rx.var.evt.idx == (uint8_t)(8*Q_SIGNAL_SIZE)) { - l_rx.var.evt.len = (uint16_t)0; + l_rx.var.evt.len = (uint16_t)0; l_rx.var.evt.idx = (uint8_t)0; QS_RX_TRAN_(WAIT4_EVT_LEN); } @@ -500,6 +690,9 @@ static void QS_rxParseData_(uint8_t b) { if ((l_rx.var.evt.len + (uint16_t)sizeof(QEvt)) <= (uint16_t)QF_poolGetMaxBlockSize()) { + /* report Ack before generating any other QS records */ + QS_rxReportAck_(QS_RX_EVENT); + l_rx.var.evt.e = QF_newX_( ((uint_fast16_t)l_rx.var.evt.len + (uint_fast16_t)sizeof(QEvt)), @@ -516,13 +709,13 @@ static void QS_rxParseData_(uint8_t b) { } } else { - QS_rxReportError_((uint8_t)(1U << 5)); - QS_RX_TRAN_(ERROR); + QS_rxReportError_((uint8_t)QS_RX_EVENT); + QS_RX_TRAN_(ERROR_STATE); } } else { - QS_rxReportError_((uint8_t)(1U << 5)); - QS_RX_TRAN_(ERROR); + QS_rxReportError_((uint8_t)QS_RX_EVENT); + QS_RX_TRAN_(ERROR_STATE); } } break; @@ -540,163 +733,333 @@ static void QS_rxParseData_(uint8_t b) { /* keep ignoring the data until a frame is collected */ break; } - case ERROR: { + +#ifdef Q_UTEST + + case WAIT4_TEST_SETUP_FRAME: { + /* keep ignoring the data until a frame is collected */ + break; + } + case WAIT4_TEST_TEARDOWN_FRAME: { + /* keep ignoring the data until a frame is collected */ + break; + } + case WAIT4_TEST_CONTINUE_FRAME: { + /* keep ignoring the data until a frame is collected */ + break; + } + case WAIT4_TEST_PROBE_DATA: { + l_rx.var.tp.data |= ((uint32_t)b << l_rx.var.tp.idx); + l_rx.var.tp.idx += (uint8_t)8; + if (l_rx.var.tp.idx == (uint8_t)(8*sizeof(uint32_t))) { + l_rx.var.tp.addr = (uint32_t)0; + l_rx.var.tp.idx = (uint8_t)0; + QS_RX_TRAN_(WAIT4_TEST_PROBE_ADDR); + } + break; + } + case WAIT4_TEST_PROBE_ADDR: { + l_rx.var.tp.addr |= ((uint32_t)b << l_rx.var.tp.idx); + l_rx.var.tp.idx += (uint8_t)8; + if (l_rx.var.tp.idx == (uint8_t)(8*QS_FUN_PTR_SIZE)) { + QS_RX_TRAN_(WAIT4_TEST_PROBE_FRAME); + } + break; + } + case WAIT4_TEST_PROBE_FRAME: { + /* keep ignoring the data until a frame is collected */ + break; + } +#endif /* Q_UTEST */ + + case ERROR_STATE: { /* keep ignoring the data until a good frame is collected */ break; } default: { /* unexpected or unimplemented state */ - QS_rxReportError_((uint8_t)(1U << 5)); - QS_RX_TRAN_(ERROR); + QS_rxReportError_((uint8_t)0x45); + QS_RX_TRAN_(ERROR_STATE); break; } } } /****************************************************************************/ -static void QS_rxHandleGoodFrame_(void) { - QS_CRIT_STAT_ +static void QS_rxHandleGoodFrame_(uint8_t state) { uint8_t i; - uint8_t *buf; + uint8_t *ptr; - switch (l_rx.state) { + switch (state) { case WAIT4_INFO_FRAME: { - /* no need to report success, because a QS record is produced */ - QS_CRIT_ENTRY_(); - QS_target_info_((uint8_t)0x00); /* send only Target info */ - QS_CRIT_EXIT_(); + /* no need to report Ack or Done */ + QS_target_info_((uint8_t)0); /* send only Target info */ break; } case WAIT4_RESET_FRAME: { - /* no need to report success, because the target resets */ + /* no need to report Ack or Done, because Target resets */ QS_onReset(); /* reset the Target */ break; } + case WAIT4_CMD_PARAM1: /* intentionally fall-through */ + case WAIT4_CMD_PARAM2: /* intentionally fall-through */ + case WAIT4_CMD_PARAM3: /* intentionally fall-through */ case WAIT4_CMD_FRAME: { - QS_rxReportSuccess_(QS_RX_COMMAND); - QS_onCommand(l_rx.var.cmd.cmdId, l_rx.var.cmd.param); + QS_rxReportAck_(QS_RX_COMMAND); + QS_onCommand(l_rx.var.cmd.cmdId, l_rx.var.cmd.param1, + l_rx.var.cmd.param2, l_rx.var.cmd.param3); + QS_rxReportDone_(QS_RX_COMMAND); break; } case WAIT4_TICK_FRAME: { - QS_rxReportSuccess_(QS_RX_TICK); - QF_TICK_X((uint_fast8_t)l_rx.var.tick.rate, &l_QS_RX); + QS_rxReportAck_(QS_RX_TICK); + QF_tickX_((uint_fast8_t)l_rx.var.tick.rate, &l_QS_RX); + QS_rxReportDone_(QS_RX_TICK); break; } case WAIT4_PEEK_FRAME: { - /* no need to report success, because a QS record is produced */ - QS_BEGIN_(QS_PEEK_DATA, (void *)0, (void *)0) + /* no need to report Ack or Done */ + QS_beginRec((uint_fast8_t)QS_PEEK_DATA); + ptr = ((uint8_t *)QS_rxPriv_.currObj[AP_OBJ] + + l_rx.var.peek.offs); QS_TIME_(); /* timestamp */ - QS_OBJ_(l_rx.var.peek.addr); /* address */ - QS_U8_(l_rx.var.peek.len); /* data length */ - buf = (uint8_t *)l_rx.var.peek.addr; - for (i = (uint8_t)0; i < l_rx.var.peek.len; ++i) { - QS_U8_(QS_PTR_AT_(buf, i)); /* data byte */ + QS_U16_(l_rx.var.peek.offs); /* data offset */ + QS_U8_(l_rx.var.peek.size); /* data size */ + QS_U8_(l_rx.var.peek.num); /* number of data items */ + for (i = (uint8_t)0; i < l_rx.var.peek.num; ++i) { + switch (l_rx.var.peek.size) { + case 1: + QS_U8_(*(ptr + i)); + break; + case 2: + QS_U16_(*((uint16_t *)ptr + i)); + break; + case 4: + QS_U32_(*((uint32_t *)ptr + i)); + break; + default: + break; + } } - QS_END_() + QS_endRec(); + QS_REC_DONE(); + break; + } + case WAIT4_POKE_DATA: { + /* received less than expected poke data items */ + QS_rxReportError_((uint8_t)QS_RX_POKE); break; } case WAIT4_POKE_FRAME: { - QS_rxReportSuccess_(QS_RX_POKE); - buf = (uint8_t *)l_rx.var.poke.addr; - QS_CRIT_ENTRY_(); /* poke the data within a critical section */ - for (i = (uint8_t)0; i < l_rx.var.poke.len; ++i) { - QS_PTR_AT_(buf, i) = l_rx.var.poke.data[i]; + QS_rxReportAck_(QS_RX_POKE); + /* no need to report done */ + break; + } + case WAIT4_FILL_FRAME: { + QS_rxReportAck_(QS_RX_FILL); + ptr = ((uint8_t *)QS_rxPriv_.currObj[AP_OBJ] + + l_rx.var.poke.offs); + for (i = (uint8_t)0; i < l_rx.var.poke.num; ++i) { + switch (l_rx.var.poke.size) { + case 1: + *(ptr + i) = (uint8_t)l_rx.var.poke.data; + break; + case 2: + *((uint16_t *)ptr + i) = (uint16_t)l_rx.var.poke.data; + break; + case 4: + *((uint32_t *)ptr + i) = l_rx.var.poke.data; + break; + default: + break; + } } - QS_CRIT_EXIT_(); break; } case WAIT4_GLB_FILTER_FRAME: { - QS_rxReportSuccess_(QS_RX_GLB_FILTER); + QS_rxReportAck_(QS_RX_GLB_FILTER); /* never disable the non-maskable records */ l_rx.var.gFlt.data[0] |= (uint8_t)0x01; - l_rx.var.gFlt.data[7] |= (uint8_t)0xF0; + l_rx.var.gFlt.data[7] |= (uint8_t)0xFC; l_rx.var.gFlt.data[8] |= (uint8_t)0x3F; - /* never turn the last 3 records on (0x7D, 0x7E, 0x7F) */ + /* never disable the last 3 records on (0x7D, 0x7E, 0x7F) */ l_rx.var.gFlt.data[15] &= (uint8_t)0xE0; for (i=(uint8_t)0; i < (uint8_t)sizeof(QS_priv_.glbFilter); ++i) { QS_priv_.glbFilter[i] = l_rx.var.gFlt.data[i]; } + /* no need to report Done */ break; } - case WAIT4_LOC_FILTER_FRAME: { - i = (uint8_t)1; - switch (l_rx.var.lFlt.fltId) { - case 0: - QS_priv_.smObjFilter = (void *)l_rx.var.lFlt.addr; - break; - case 1: - QS_priv_.aoObjFilter = (void *)l_rx.var.lFlt.addr; - break; - case 2: - QS_priv_.mpObjFilter = (void *)l_rx.var.lFlt.addr; - break; - case 3: - QS_priv_.eqObjFilter = (void *)l_rx.var.lFlt.addr; - break; - case 4: - QS_priv_.teObjFilter = (void *)l_rx.var.lFlt.addr; - break; - case 5: - QS_priv_.apObjFilter = (void *)l_rx.var.lFlt.addr; - break; - default: - QS_rxReportError_((uint8_t)(2U << 5)); - i = (uint8_t)0; - break; + case WAIT4_OBJ_FRAME: { + if (l_rx.var.obj.kind < (uint8_t)MAX_OBJ) { + if (l_rx.var.obj.recId == (uint8_t)QS_RX_LOC_FILTER) { + QS_priv_.locFilter[l_rx.var.obj.kind] + = (void *)l_rx.var.obj.addr; + } + else { + QS_rxPriv_.currObj[l_rx.var.obj.kind] + = (void *)l_rx.var.obj.addr; + } + QS_rxReportAck_((enum QSpyRxRecords)l_rx.var.obj.recId); } - if (i != (uint8_t)0) { - QS_rxReportSuccess_(QS_RX_LOC_FILTER); + else if (l_rx.var.obj.kind == (uint8_t)6) { /* both SM and AO */ + if (l_rx.var.obj.recId == (uint8_t)QS_RX_LOC_FILTER) { + QS_priv_.locFilter[SM_OBJ] = (void *)l_rx.var.obj.addr; + QS_priv_.locFilter[AO_OBJ] = (void *)l_rx.var.obj.addr; + } + else { + QS_rxPriv_.currObj[SM_OBJ] = (void *)l_rx.var.obj.addr; + QS_rxPriv_.currObj[AO_OBJ] = (void *)l_rx.var.obj.addr; + } + QS_rxReportAck_((enum QSpyRxRecords)l_rx.var.obj.recId); + } + else { + QS_rxReportError_(l_rx.var.obj.recId); } break; } case WAIT4_AO_FILTER_FRAME: { + QS_rxReportAck_(QS_RX_AO_FILTER); if (l_rx.var.aFlt.prio <= (uint8_t)QF_MAX_ACTIVE) { - QS_rxReportSuccess_(QS_RX_AO_FILTER); - QS_priv_.aoObjFilter = QF_active_[l_rx.var.aFlt.prio]; - QS_priv_.smObjFilter = QF_active_[l_rx.var.aFlt.prio]; + QS_rxReportAck_(QS_RX_AO_FILTER); + QS_priv_.locFilter[AO_OBJ] = QF_active_[l_rx.var.aFlt.prio]; + QS_priv_.locFilter[SM_OBJ] = QF_active_[l_rx.var.aFlt.prio]; } else { - QS_rxReportError_((uint8_t)(2U << 5)); + QS_rxReportError_((uint8_t)QS_RX_AO_FILTER); } + /* no need to report Done */ break; } case WAIT4_EVT_FRAME: { - if (l_rx.var.evt.prio == (uint8_t)0) { - QS_rxReportSuccess_(QS_RX_EVENT); + /* NOTE: Ack was already reported in the WAIT4_EVT_LEN state */ +#ifdef Q_UTEST + QS_onTestEvt(l_rx.var.evt.e); /* "massage" the event, if needed */ +#endif /* Q_UTEST */ + i = (uint8_t)0; /* use 'i' as status, 0 == success,no-recycle */ + + if (l_rx.var.evt.prio == (uint8_t)0) { /* publish */ QF_PUBLISH(l_rx.var.evt.e, &l_QS_RX); + QS_rxReportDone_(QS_RX_EVENT); } else if (l_rx.var.evt.prio < (uint8_t)QF_MAX_ACTIVE) { - QS_rxReportSuccess_(QS_RX_EVENT); - (void)QACTIVE_POST_X(QF_active_[l_rx.var.evt.prio], + if (QACTIVE_POST_X(QF_active_[l_rx.var.evt.prio], l_rx.var.evt.e, (uint_fast16_t)1, /* margin */ - &l_QS_RX); + &l_QS_RX) == false) + { + /* failed QACTIVE_POST() recycles the event */ + i = (uint8_t)0x80; /* failure status, no recycle */ + } + } + else if (l_rx.var.evt.prio == (uint8_t)255) { /* special value */ + /* dispatch to the current SM object */ + if (QS_rxPriv_.currObj[SM_OBJ] != (void *)0) { + QHSM_DISPATCH((QHsm *)QS_rxPriv_.currObj[SM_OBJ], + l_rx.var.evt.e); + i = (uint8_t)0x01; /* success status, recycle needed */ + } + else { + i = (uint8_t)0x81; /* failure status, recycle needed */ + } + } + else if (l_rx.var.evt.prio == (uint8_t)254) { /* special value */ + /* init the current SM object" */ + if (QS_rxPriv_.currObj[SM_OBJ] != (void *)0) { + QHSM_INIT((QHsm *)QS_rxPriv_.currObj[SM_OBJ], + l_rx.var.evt.e); + i = (uint8_t)0x01; /* success status, recycle needed */ + } + else { + i = (uint8_t)0x81; /* failure status, recycle needed */ + } + } + else if (l_rx.var.evt.prio == (uint8_t)253) { /* special value */ + /* post to the current AO */ + if (QS_rxPriv_.currObj[AO_OBJ] != (void *)0) { + if (QACTIVE_POST_X((QActive *)QS_rxPriv_.currObj[AO_OBJ], + l_rx.var.evt.e, + (uint_fast16_t)1, /* margin */ + &l_QS_RX) == false) + { + /* failed QACTIVE_POST() recycles the event */ + i = (uint8_t)0x80; /* failure status, no recycle */ + } + } + else { + i = (uint8_t)0x81; /* failure status, recycle needed */ + } } else { - QS_rxReportError_((uint8_t)(2U << 5)); + i = (uint8_t)0x81; /* failure status, recycle needed */ + } + + if ((i & (uint8_t)0x01) != (uint8_t)0) { /* recycle needed? */ QF_gc(l_rx.var.evt.e); } + if ((i & (uint8_t)0x80) != (uint8_t)0) { /* failure? */ + QS_rxReportError_((uint8_t)QS_RX_EVENT); + } + else { + QS_rxReportDone_(QS_RX_EVENT); + } break; } - case ERROR: { + +#ifdef Q_UTEST + case WAIT4_TEST_SETUP_FRAME: { + QS_rxReportAck_(QS_RX_TEST_SETUP); + l_testData.tpNum = (uint8_t)0; /* clear the Test-Probes */ + l_testData.testTime = (QSTimeCtr)0; /* clear the time tick */ + /* don't clear current objects */ + QS_onTestSetup(); /* application-specific test setup */ + /* no need to report Done */ + break; + } + case WAIT4_TEST_TEARDOWN_FRAME: { + QS_rxReportAck_(QS_RX_TEST_TEARDOWN); + QS_onTestTeardown(); /* application-specific test teardown */ + /* no need to report Done */ + break; + } + case WAIT4_TEST_CONTINUE_FRAME: { + QS_rxReportAck_(QS_RX_TEST_CONTINUE); + QS_rxPriv_.inTestLoop = false; /* exit the QUTest loop */ + /* no need to report Done */ + break; + } + case WAIT4_TEST_PROBE_FRAME: { + QS_rxReportAck_(QS_RX_TEST_PROBE); + Q_ASSERT_ID(815, l_testData.tpNum + < (uint8_t)(sizeof(l_testData.tpBuf) + /sizeof(l_testData.tpBuf[0]))); + l_testData.tpBuf[l_testData.tpNum] = l_rx.var.tp; + ++l_testData.tpNum; + /* no need to report Done */ + break; + } +#endif /* Q_UTEST */ + + case ERROR_STATE: { /* keep ignoring all bytes until new frame */ break; } default: { - QS_rxReportError_((uint8_t)(2U << 5)); + QS_rxReportError_((uint8_t)0x47); break; } } } /****************************************************************************/ -static void QS_rxHandleBadFrame_(void) { - switch (l_rx.state) { +static void QS_rxHandleBadFrame_(uint8_t state) { + QS_rxReportError_((uint8_t)0x50); /* report error for all bad frames */ + switch (state) { case WAIT4_EVT_FRAME: { Q_ASSERT_ID(910, l_rx.var.evt.e != (QEvt *)0); - QF_gc(l_rx.var.evt.e); + QF_gc(l_rx.var.evt.e); /* don't leak an allocated event */ break; } default: { @@ -706,26 +1069,96 @@ static void QS_rxHandleBadFrame_(void) { } /****************************************************************************/ -static void QS_rxReportSuccess_(enum QSpyRxRecords recId) { - QS_CRIT_STAT_ - QS_BEGIN_(QS_RX_STATUS, (void *)0, (void *)0) - QS_TIME_(); /* timestamp */ - QS_U8_(recId); /* record ID */ - QS_END_() +static void QS_rxReportAck_(enum QSpyRxRecords recId) { + QS_beginRec((uint_fast8_t)QS_RX_STATUS); + QS_U8_(recId); /* record ID */ + QS_endRec(); + QS_REC_DONE(); } /****************************************************************************/ -static void QS_rxReportError_(uint8_t stateId) { - QS_CRIT_STAT_ - QS_BEGIN_(QS_RX_STATUS, (void *)0, (void *)0) - QS_TIME_(); /* timestamp */ - QS_U8_((uint8_t)0x80 | stateId | l_rx.state); /* error number */ - QS_END_() +static void QS_rxReportError_(uint8_t code) { + QS_beginRec((uint_fast8_t)QS_RX_STATUS); + QS_U8_((uint8_t)(0x80U | code)); /* error code */ + QS_endRec(); + QS_REC_DONE(); } /****************************************************************************/ -static bool QS_rxAddr_(uint8_t b, QSAddr *addr, uint8_t *idx) { - *addr |= ((uint32_t)b << *idx); - *idx += (uint8_t)8; - return (*idx == (uint8_t)(8*QS_OBJ_PTR_SIZE)) ? true : false; +static void QS_rxReportDone_(enum QSpyRxRecords recId) { + QS_beginRec((uint_fast8_t)QS_TARGET_DONE); + QS_TIME_(); /* timestamp */ + QS_U8_(recId); /* record ID */ + QS_endRec(); + QS_REC_DONE(); } + +/****************************************************************************/ +static void QS_rxPoke_(void) { + uint8_t *ptr = ((uint8_t *)QS_rxPriv_.currObj[AP_OBJ] + + l_rx.var.poke.offs); + switch (l_rx.var.poke.size) { + case 1: + *ptr = (uint8_t)l_rx.var.poke.data; + break; + case 2: + *(uint16_t *)ptr = (uint16_t)l_rx.var.poke.data; + break; + case 4: + *(uint32_t *)ptr = l_rx.var.poke.data; + break; + default: + Q_ERROR_ID(900); + break; + } + + l_rx.var.poke.data = (uint32_t)0; + l_rx.var.poke.idx = (uint8_t)0; + l_rx.var.poke.offs += l_rx.var.poke.size; +} + +/*==========================================================================*/ +#ifdef Q_UTEST + +/****************************************************************************/ +/** +* @description +* This function obtains the Test-Probe for a given API. +* +* @param[in] api_id the API-ID that requests its Test-Probe +* +* @returs Test-Probe data that has been received for the given API +* from the Host (running qutest). For any ginve API, the function returns +* the Test-Probe data in the same order as it was received from the Host. +* If there is no Test-Probe for a ginve API, or no more Test-Probes for +* a given API, the function returns zero. +*/ +uint32_t QS_getTestProbe_(void (* const api)(void)) { + uint32_t data = (uint32_t)0; + uint8_t i; + for (i = (uint8_t)0; i < l_testData.tpNum; ++i) { + if (l_testData.tpBuf[i].addr == (QSFun)api) { + data = l_testData.tpBuf[i].data; + --l_testData.tpNum; + /* move all remaining entries in the buffer up by one */ + for (; i < l_testData.tpNum; ++i) { + l_testData.tpBuf[i] = l_testData.tpBuf[i + 1]; + } + /* i == l_testData.tpNum, which terminates the for loop */ + QS_beginRec((uint_fast8_t)QS_TEST_PROBE_GET); + QS_TIME_(); /* timestamp */ + QS_FUN_(api); /* the calling API */ + QS_U32_(data); /* the Test-Probe data */ + QS_endRec(); + QS_REC_DONE(); + } + } + return data; +} + +/****************************************************************************/ +QSTimeCtr QS_onGetTime(void) { + return (++l_testData.testTime); +} + +#endif /* Q_UTEST */ diff --git a/source/qutest.c b/source/qutest.c new file mode 100644 index 00000000..87b9ae68 --- /dev/null +++ b/source/qutest.c @@ -0,0 +1,407 @@ +/** +* @file +* @brief QF/C stub for QUTEST unit testing +* @ingroup qf +* @cond +****************************************************************************** +* Last Updated for Version: 5.9.0 +* Date of the Last Update: 2017-05-17 +* +* Q u a n t u m L e a P s +* --------------------------- +* innovating embedded systems +* +* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved. +* +* This program is open source software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published +* by the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* Alternatively, this program may be distributed and modified under the +* terms of Quantum Leaps commercial licenses, which expressly supersede +* the GNU General Public License and are specifically designed for +* licensees interested in retaining the proprietary status of their code. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see . +* +* Contact information: +* https://state-machine.com +* mailto:info@state-machine.com +****************************************************************************** +* @endcond +*/ +/* only build when Q_UTEST is defined */ +#ifdef Q_UTEST + +#define QP_IMPL /* this is QP implementation */ +#include "qf_port.h" /* QF port */ +#include "qf_pkg.h" /* QF package-scope interface */ +#include "qassert.h" /* QP embedded systems-friendly assertions */ +#include "qs_port.h" /* include QS port */ + +Q_DEFINE_THIS_MODULE("qutest") + +/* Global objects ==========================================================*/ +uint8_t volatile QF_intNest; + +/* QF functions ============================================================*/ +void QF_init(void) { + QF_maxPool_ = (uint_fast8_t)0; + QF_subscrList_ = (QSubscrList *)0; + QF_maxPubSignal_ = (enum_t)0; + QF_intNest = (uint8_t)0; + + QF_bzero(&QF_active_[0], (uint_fast16_t)sizeof(QF_active_)); +} +/*..........................................................................*/ +int_t QF_run(void) { + /* function dictionaries for the standard API */ + QS_FUN_DICTIONARY(&QActive_post_); + QS_FUN_DICTIONARY(&QActive_postLIFO_); + + QS_onTestLoop(); /* run the test loop */ + QS_onCleanup(); /* application cleanup */ + return 0; /* return no error */ +} + +/*..........................................................................*/ +bool QActive_post_(QActive * const me, QEvt const * const e, + uint_fast16_t const margin, + void const * const sender) +{ + QS_TEST_PROBE_DEF(&QActive_post_) + bool status; + QEQueueCtr nFree; /* temporary to avoid UB for volatile access */ + QF_CRIT_STAT_ + + /** @pre event pointer must be valid */ + Q_REQUIRE_ID(100, e != (QEvt const *)0); + + QF_CRIT_ENTRY_(); + nFree = me->eQueue.nFree; /* get volatile into the temporary */ + + /* test probe for reaching the margin */ + QS_TEST_PROBE_ID(1, + nFree = margin; + ) + + /* margin available? */ + if (nFree > (QEQueueCtr)margin) { + + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, + QS_priv_.locFilter[AO_OBJ], me) + //printf("QS_QF_ACTIVE_POST_FIFO\n"); + QS_TIME_(); /* timestamp */ + QS_OBJ_(sender); /* the sender object */ + QS_SIG_(e->sig); /* the signal of the event */ + QS_OBJ_(me); /* this active object (recipient) */ + QS_2U8_(e->poolId_, e->refCtr_); /* pool Id & ref Count */ + QS_EQC_(nFree); /* number of free entries */ + QS_EQC_(me->eQueue.nMin); /* min number of free entries */ + QS_END_NOCRIT_() + + /* is it a pool event? */ + if (e->poolId_ != (uint8_t)0) { + QF_EVT_REF_CTR_INC_(e); /* increment the reference counter */ + } + + QF_CRIT_EXIT_(); + + QF_gc(e); /* recycle the event to avoid a leak */ + status = true; /* event "posted" successfully */ + } + else { + /** @note assert if event cannot be posted while dropping events is + * not acceptable + */ + Q_ASSERT_ID(110, margin != (uint_fast16_t)0); + + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, + QS_priv_.locFilter[AO_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(sender); /* the sender object */ + QS_SIG_(e->sig); /* the signal of the event */ + QS_OBJ_(me); /* this active object (recipient) */ + QS_2U8_(e->poolId_, e->refCtr_); /* pool Id & ref Count */ + QS_EQC_(nFree); /* number of free entries */ + QS_EQC_(margin); /* margin requested */ + QS_END_NOCRIT_() + + QF_CRIT_EXIT_(); + + QF_gc(e); /* recycle the event to avoid a leak */ + status = false; /* event not posted */ + } + return status; +} +/*..........................................................................*/ +void QActive_postLIFO_(QActive * const me, QEvt const * const e) { + QS_TEST_PROBE_DEF(&QActive_postLIFO_) + QEQueueCtr nFree; /* temporary to avoid UB for volatile access */ + QF_CRIT_STAT_ + + QF_CRIT_ENTRY_(); + nFree = me->eQueue.nFree; /* get volatile into the temporary */ + + /* test probe for queue overflow */ + QS_TEST_PROBE_ID(1, + Q_ERROR_ID(210); + ) + + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_LIFO, QS_priv_.locFilter[AO_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_SIG_(e->sig); /* the signal of this event */ + QS_OBJ_(me); /* this active object */ + QS_2U8_(e->poolId_, e->refCtr_);/* pool Id & ref Count of the event */ + QS_EQC_(nFree); /* number of free entries */ + QS_EQC_(me->eQueue.nMin); /* min number of free entries */ + QS_END_NOCRIT_() + + /* is it a pool event? */ + if (e->poolId_ != (uint8_t)0) { + QF_EVT_REF_CTR_INC_(e); /* increment the reference counter */ + } + + QF_CRIT_EXIT_(); +} +/*..........................................................................*/ +void QActive_start_(QActive * const me, uint_fast8_t prio, + QEvt const *qSto[], uint_fast16_t qLen, + void *stkSto, uint_fast16_t stkSize, + QEvt const *ie) +{ + Q_REQUIRE_ID(500, ((uint_fast8_t)0 < prio) /* priority must be in range */ + && (prio <= (uint_fast8_t)QF_MAX_ACTIVE)); + + (void)stkSto; + (void)stkSize; + + QEQueue_init(&me->eQueue, qSto, qLen); /* initialize the built-in queue */ + me->prio = prio; /* set the current priority of the AO */ + QF_add_(me); /* make QF aware of this active object */ + + QHSM_INIT(&me->super, ie); /* take the top-most initial tran. */ + QS_FLUSH(); /* flush the trace buffer to the host */ +} +/*..........................................................................*/ +void QActive_stop(QActive * const me) { + QF_remove_(me); /* remove this active object from the framework */ +} + +/****************************************************************************/ +QTimeEvtCtr QTimeEvt_ctr(QTimeEvt const * const me) { + QTimeEvtCtr ret; + QF_CRIT_STAT_ + + QF_CRIT_ENTRY_(); + ret = me->ctr; + + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_CTR, QS_priv_.locFilter[TE_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(me); /* this time event object */ + QS_OBJ_(me->act); /* the target AO */ + QS_TEC_(ret); /* the current counter */ + QS_TEC_(me->interval); /* the interval */ + QS_U8_((uint8_t)(me->super.refCtr_ & (uint8_t)0x7F)); /* tick rate */ + QS_END_NOCRIT_() + + QF_CRIT_EXIT_(); + return ret; +} +/*..........................................................................*/ +void QTimeEvt_ctorX(QTimeEvt * const me, QActive * const act, + enum_t const sig, uint_fast8_t tickRate) +{ + /** @pre The signal must be valid and the tick rate in range */ + Q_REQUIRE_ID(300, (sig >= (enum_t)Q_USER_SIG) + && (tickRate < (uint_fast8_t)QF_MAX_TICK_RATE)); + + me->next = (QTimeEvt *)0; + me->ctr = (QTimeEvtCtr)0; + me->interval = (QTimeEvtCtr)0; + me->super.sig = (QSignal)sig; + + me->act = act; + me->super.poolId_ = (uint8_t)0; + me->super.refCtr_ = (uint8_t)tickRate; +} +/*..........................................................................*/ +void QTimeEvt_armX(QTimeEvt * const me, + QTimeEvtCtr const nTicks, QTimeEvtCtr const interval) +{ + uint_fast8_t tickRate = (uint_fast8_t)me->super.refCtr_ + & (uint_fast8_t)0x7F; + QTimeEvtCtr ctr = me->ctr; + QF_CRIT_STAT_ + + /** @pre the host AO must be valid, time evnet must be disarmed, + * number of clock ticks cannot be zero, and the signal must be valid. + */ + Q_REQUIRE_ID(400, (me->act != (void *)0) + && (ctr == (QTimeEvtCtr)0) + && (nTicks != (QTimeEvtCtr)0) + && (tickRate < (uint_fast8_t)QF_MAX_TICK_RATE) + && (me->super.sig >= (QSignal)Q_USER_SIG)); + + QF_CRIT_ENTRY_(); + me->ctr = nTicks; + me->interval = interval; + + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_ARM, QS_priv_.locFilter[TE_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(me); /* this time event object */ + QS_OBJ_(me->act); /* the active object */ + QS_TEC_(nTicks); /* the number of ticks */ + QS_TEC_(interval); /* the interval */ + QS_U8_((uint8_t)tickRate); /* tick rate */ + QS_END_NOCRIT_() + + QF_CRIT_EXIT_(); +} +/*..........................................................................*/ +bool QTimeEvt_disarm(QTimeEvt * const me) { + bool wasArmed; + QF_CRIT_STAT_ + + QF_CRIT_ENTRY_(); + + /* is the time evt running? */ + if (me->ctr != (QTimeEvtCtr)0) { + wasArmed = true; + + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_DISARM, QS_priv_.locFilter[TE_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(me); /* this time event object */ + QS_OBJ_(me->act); /* the target AO */ + QS_TEC_(me->ctr); /* the number of ticks */ + QS_TEC_(me->interval); /* the interval */ + QS_U8_((uint8_t)(me->super.refCtr_ & (uint8_t)0x7F));/*tick rate*/ + QS_END_NOCRIT_() + + me->ctr = (QTimeEvtCtr)0; /* schedule removal from the list */ + } + /* the time event was already not running */ + else { + wasArmed = false; + + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_DISARM_ATTEMPT, + QS_priv_.locFilter[TE_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(me); /* this time event object */ + QS_OBJ_(me->act); /* the target AO */ + QS_U8_((uint8_t)(me->super.refCtr_ & (uint8_t)0x7F));/*tick rate*/ + QS_END_NOCRIT_() + + } + QF_CRIT_EXIT_(); + return wasArmed; +} +/*..........................................................................*/ +bool QTimeEvt_rearm(QTimeEvt * const me, QTimeEvtCtr const nTicks) { + uint_fast8_t tickRate = (uint_fast8_t)me->super.refCtr_ + & (uint_fast8_t)0x7F; + bool isArmed; + QF_CRIT_STAT_ + + /** @pre AO must be valid, tick rate must be in range, nTicks must + * not be zero, and the signal of this time event must be valid + */ + Q_REQUIRE_ID(600, (me->act != (void *)0) + && (tickRate < (uint_fast8_t)QF_MAX_TICK_RATE) + && (nTicks != (QTimeEvtCtr)0) + && (me->super.sig >= (QSignal)Q_USER_SIG)); + + QF_CRIT_ENTRY_(); + + /* is the time evt not running? */ + if (me->ctr == (QTimeEvtCtr)0) { + isArmed = false; + + /* is the time event unlinked? + * NOTE: For a duration of a single clock tick of the specified + * tick rate a time event can be disarmed and yet still linked into + * the list, because unlinking is performed exclusively in the + * QF_tickX() function. + */ + if ((me->super.refCtr_ & (uint8_t)0x80) == (uint8_t)0) { + me->super.refCtr_ |= (uint8_t)0x80; /* mark as linked */ + } + } + /* the time event is armed */ + else { + isArmed = true; + } + me->ctr = nTicks; /* re-load the tick counter (shift the phasing) */ + + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_REARM, QS_priv_.locFilter[TE_OBJ], me) + QS_TIME_(); /* timestamp */ + QS_OBJ_(me); /* this time event object */ + QS_OBJ_(me->act); /* the target AO */ + QS_TEC_(me->ctr); /* the number of ticks */ + QS_TEC_(me->interval); /* the interval */ + QS_2U8_((uint8_t)tickRate, + ((isArmed != false) ? (uint8_t)1 : (uint8_t)0)); + QS_END_NOCRIT_() + + QF_CRIT_EXIT_(); + return isArmed; +} +/*..........................................................................*/ +void QF_tickX_(uint_fast8_t const tickRate, void const * const sender) { + QF_CRIT_STAT_ + + QF_CRIT_ENTRY_(); + if (QS_rxPriv_.currObj[TE_OBJ] != (void *)0) { + QTimeEvt *t = (QTimeEvt *)QS_rxPriv_.currObj[TE_OBJ]; + QActive *act = (QActive *)t->act; /* temp. for volatile */ + if (t->interval == (QTimeEvtCtr)0) { /* single-shot TE? */ + t->ctr = (QTimeEvtCtr)0; /* auto-disarm */ + t->super.refCtr_ &= (uint8_t)0x7F; /* mark as unlinked */ + + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_AUTO_DISARM, + QS_priv_.locFilter[TE_OBJ], t) + QS_OBJ_(t); /* this time event object */ + QS_OBJ_(act); /* the target AO */ + QS_U8_((uint8_t)tickRate); /* tick rate */ + QS_END_NOCRIT_() + } + + QS_BEGIN_NOCRIT_(QS_QF_TIMEEVT_POST, + QS_priv_.locFilter[TE_OBJ], t) + QS_TIME_(); /* timestamp */ + QS_OBJ_(t); /* the time event object */ + QS_SIG_(t->super.sig); /* signal of this time event */ + QS_OBJ_(act); /* the target AO */ + QS_U8_((uint8_t)tickRate); /* tick rate */ + QS_END_NOCRIT_() + + QF_CRIT_EXIT_(); /* exit critical section before posting */ + + /* Post to the 'act' AO (post does not actually happen) + * NOTE: QACTIVE_POST() asserts internally if the queue overflows + */ + QACTIVE_POST(act, &t->super, sender); + + /* explicitly dispatch the time event */ + QHSM_DISPATCH((QHsm *)act, &t->super); + } + else { + QF_CRIT_EXIT_(); + } +} + +/****************************************************************************/ +void Q_onAssert(char const * const module, int_t loc) { + QS_ASSERTION(module, loc, (uint32_t)0); /* report assertion to QSPY */ + QS_onTestLoop(); /* loop to wait for commands (typically reset) */ + QS_onReset(); /* in case the QUTEST loop ever returns, reset manually */ +} + +#endif /* Q_UTEST */ diff --git a/source/qv.c b/source/qv.c index ec218247..b1de80ba 100644 --- a/source/qv.c +++ b/source/qv.c @@ -5,8 +5,8 @@ * @ingroup qv * @cond ****************************************************************************** -* Last updated for version 5.8.1 -* Last updated on 2016-12-14 +* Last updated for version 5.9.0 +* Last updated on 2017-03-13 * * Q u a n t u m L e a P s * --------------------------- @@ -33,7 +33,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -62,7 +62,7 @@ QPSet QV_readySet_; /* QV ready-set of active objects */ /** * @description * Initializes QF and must be called exactly once before any other QF -* function. Typcially, QF_init() is called from main() even before +* function. Typically, QF_init() is called from main() even before * initializing the Board Support Package (BSP). * * @note QF_init() clears the internal QF variables, so that the framework @@ -74,14 +74,9 @@ void QF_init(void) { QF_subscrList_ = (QSubscrList *)0; QF_maxPubSignal_ = (enum_t)0; - /* clear the internal QF variables, so that the framework can start - * correctly even if the startup code fails to clear the uninitialized - * data (as is required by the C Standard). - */ - QF_maxPool_ = (uint_fast8_t)0; - QF_bzero(&QV_readySet_, (uint_fast16_t)sizeof(QV_readySet_)); QF_bzero(&QF_timeEvtHead_[0], (uint_fast16_t)sizeof(QF_timeEvtHead_)); QF_bzero(&QF_active_[0], (uint_fast16_t)sizeof(QF_active_)); + QF_bzero(&QV_readySet_, (uint_fast16_t)sizeof(QV_readySet_)); #ifdef QV_INIT QV_INIT(); /* port-specific initialization of the QV kernel */ @@ -128,7 +123,7 @@ int_t QF_run(void) { QF_onStartup(); /* application-specific startup callback */ - /* the combined event-loop and background-loop of the QV kernel */ + /* the combined event-loop and background-loop of the QV kernel... */ QF_INT_DISABLE(); for (;;) { QEvt const *e; @@ -141,7 +136,7 @@ int_t QF_run(void) { a = QF_active_[p]; #ifdef Q_SPY - QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.aoObjFilter, a) + QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.locFilter[AO_OBJ], a) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)p, /* priority of the scheduled AO */ (uint8_t)pprev); /* previous priority */ @@ -208,10 +203,9 @@ int_t QF_run(void) { * @param[in] prio priority at which to start the active object * @param[in] qSto pointer to the storage for the ring buffer of the * event queue (used only with the built-in ::QEQueue) -* @param[in] qLen length of the event queue (in events) -* @param[in] stkSto pointer to the stack storage (used only when -* per-AO stack is needed) -* @param[in] stkSize stack size (in bytes) +* @param[in] qLen length of the event queue [events] +* @param[in] stkSto pointer to the stack storage (must be NULL in QV) +* @param[in] stkSize stack size [bytes] * @param[in] ie pointer to the initial event (might be NULL). * * @note This function should be called via the macro QACTIVE_START(). @@ -225,35 +219,40 @@ void QActive_start_(QActive * const me, uint_fast8_t prio, void *stkSto, uint_fast16_t stkSize, QEvt const *ie) { - /** @pre the priority must be in range and the stack storage must not + /** @pre The priority must be in range and the stack storage must not * be provided, because the QV kernel does not need per-AO stacks. */ - Q_REQUIRE_ID(400, ((uint_fast8_t)0 < prio) - && (prio <= (uint_fast8_t)QF_MAX_ACTIVE) - && (stkSto == (void *)0)); + Q_REQUIRE_ID(500, ((uint_fast8_t)0 < prio) + && (prio <= (uint_fast8_t)QF_MAX_ACTIVE) + && (stkSto == (void *)0)); - (void)stkSize; /* avoid the "unused parameter" compiler warning */ + (void)stkSize; /* unused parameter */ + + QEQueue_init(&me->eQueue, qSto, qLen); /* initialize the built-in queue */ + me->prio = prio; /* set the current priority of the AO */ + QF_add_(me); /* make QF aware of this active object */ - QEQueue_init(&me->eQueue, qSto, qLen); - me->prio = prio; /* set QF priority of this AO before adding it to QF */ - QF_add_(me); /* make QF aware of this active object */ QHSM_INIT(&me->super, ie); /* take the top-most initial tran. */ - - QS_FLUSH(); /* flush the QS trace buffer to the host */ + QS_FLUSH(); /* flush the trace buffer to the host */ } /****************************************************************************/ /** * @description -* The preferred way of calling this function is from within the active -* object that needs to stop. In other words, an active object should stop -* itself rather than being stopped by someone else. This policy works -* best, because only the active object itself "knows" when it has reached -* the appropriate state for the shutdown. +* This function must be called from within the AO that needs to stop. +* In other words, an AO should stop itself rather than being stopped by +* someone else. This policy works best, because only the AO itself "knows" +* when it has reached the appropriate state for the shutdown. * * @note By the time the AO calls QActive_stop(), it should have unsubscribed * from all events and no more events should be directly-posted to it. */ void QActive_stop(QActive * const me) { - QF_remove_(me); /* remove the AO from the framework */ + QF_CRIT_STAT_ + + QF_remove_(me); /* remove this active object from the QF */ + + QF_CRIT_ENTRY_(); + QPSet_remove(&QV_readySet_, me->prio); /* make sure it is not ready */ + QF_CRIT_EXIT_(); } diff --git a/source/qxk.c b/source/qxk.c index 1475e399..74c93c43 100644 --- a/source/qxk.c +++ b/source/qxk.c @@ -4,8 +4,8 @@ * @ingroup qxk * @cond ****************************************************************************** -* Last updated for version 5.8.1 -* Last updated on 2016-12-14 +* Last updated for version 5.9.0 +* Last updated on 2017-03-13 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -119,7 +119,7 @@ static void initial_events(void) { /* any active objects need to be scheduled before starting event loop? */ if (QXK_sched_() != (uint_fast8_t)0) { - QXK_activate_(); /* process all events produced so far */ + QXK_activate_(); /* activate AOs to process all events posted so far*/ } } @@ -159,10 +159,10 @@ int_t QF_run(void) { * @param[in] prio priority at which to start the active object * @param[in] qSto pointer to the storage for the ring buffer of the * event queue (used only with the built-in ::QEQueue) -* @param[in] qLen length of the event queue (in events) +* @param[in] qLen length of the event queue [events] * @param[in] stkSto pointer to the stack storage (used only when * per-AO stack is needed) -* @param[in] stkSize stack size (in bytes) +* @param[in] stkSize stack size [bytes] * @param[in] ie pointer to the initial event (might be NULL). * * @note This function should be called via the macro QACTIVE_START(). @@ -178,25 +178,25 @@ void QActive_start_(QActive * const me, uint_fast8_t prio, { QF_CRIT_STAT_ - Q_REQUIRE_ID(500, (!QXK_ISR_CONTEXT_()) /* don't start AO's in an ISR! */ + /** @pre AO cannot be started from an ISR, the priority must be in range + * and the stack storage must not be provided, because the QK kernel does + * not need per-AO stacks. + */ + Q_REQUIRE_ID(500, (!QXK_ISR_CONTEXT_()) && ((uint_fast8_t)0 < prio) && (prio <= (uint_fast8_t)QF_MAX_ACTIVE) - && (qSto != (QEvt const **)0) - && (qLen != (uint_fast16_t)0) && (stkSto == (void *)0) && (stkSize == (uint_fast16_t)0)); QEQueue_init(&me->eQueue, qSto, qLen); /* initialize the built-in queue */ me->thread = (void *)0; /* no private stack for AO */ me->prio = prio; /* set the current priority of the AO */ - QF_CRIT_ENTRY_(); QF_add_(me); /* make QF aware of this active object */ - QF_CRIT_EXIT_(); QHSM_INIT(&me->super, ie); /* take the top-most initial tran. */ QS_FLUSH(); /* flush the trace buffer to the host */ - /* see if this AO needs to be scheduled in case QXK is running */ + /* see if this AO needs to be scheduled in case QXK is already running */ QF_CRIT_ENTRY_(); if (QXK_sched_() != (uint_fast8_t)0) { /* activation needed? */ QXK_activate_(); @@ -218,12 +218,12 @@ void QActive_start_(QActive * const me, uint_fast8_t prio, void QActive_stop(QActive * const me) { QF_CRIT_STAT_ - QF_CRIT_ENTRY_(); /** @pre QActive_stop() must be called from the AO that wants to stop. */ Q_REQUIRE_ID(600, (me == QF_active_[QXK_attr_.actPrio])); QF_remove_(me); /* remove this active object from the QF */ + QF_CRIT_ENTRY_(); QPSet_remove(&QXK_attr_.readySet, me->prio); if (QXK_sched_() != (uint_fast8_t)0) { QXK_activate_(); @@ -274,7 +274,7 @@ uint_fast8_t QXK_sched_(void) { } else { /* this is an extened-thread */ - QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.aoObjFilter, + QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.locFilter[AO_OBJ], QXK_attr_.next) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)p, /* priority of the next AO */ @@ -292,7 +292,7 @@ uint_fast8_t QXK_sched_(void) { /* is the new prio different from the current prio? */ if (p != ((QActive volatile *)QXK_attr_.curr)->prio) { - QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.aoObjFilter, + QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.locFilter[AO_OBJ], QXK_attr_.next) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)p, /* priority of the next AO */ @@ -341,7 +341,7 @@ void QXK_activate_(void) { QXK_attr_.actPrio = p; /* this becomes the active prio */ QXK_attr_.next = (void *)0; /* clear the next AO */ - QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.aoObjFilter, a) + QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.locFilter[AO_OBJ], a) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)p, /* prio of the scheduled AO */ (uint8_t)pprev); /* previous priority */ @@ -375,7 +375,7 @@ void QXK_activate_(void) { QPSet_findMax(&QXK_attr_.readySet, p); if (p <= QXK_attr_.lockPrio) { /* is it below the lock prio? */ - p = QXK_attr_.lockHolder; /* prio of the thread holding the lock */ + p = QXK_attr_.lockHolder; /* prio of the thread holding lock */ } a = QF_active_[p]; Q_ASSERT_ID(710, a != (QActive *)0); /* must be registered */ @@ -392,7 +392,7 @@ void QXK_activate_(void) { } else { /* next is the extened thread */ - QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.aoObjFilter, + QS_BEGIN_NOCRIT_(QS_SCHED_NEXT, QS_priv_.locFilter[AO_OBJ], QXK_attr_.next) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)p, /* priority of the next AO */ @@ -412,7 +412,7 @@ void QXK_activate_(void) { if (pin != (uint_fast8_t)0) { /* resuming an active object? */ a = QF_active_[pin]; /* the pointer to the preempted AO */ - QS_BEGIN_NOCRIT_(QS_SCHED_RESUME, QS_priv_.aoObjFilter, a) + QS_BEGIN_NOCRIT_(QS_SCHED_RESUME, QS_priv_.locFilter[AO_OBJ], a) QS_TIME_(); /* timestamp */ QS_2U8_((uint8_t)pin, /* priority of the resumed AO */ (uint8_t)pprev); /* previous priority */ @@ -426,5 +426,3 @@ void QXK_activate_(void) { } #endif /* Q_SPY */ } - - diff --git a/source/qxk_mutex.c b/source/qxk_mutex.c index 787eed0d..81d37705 100644 --- a/source/qxk_mutex.c +++ b/source/qxk_mutex.c @@ -4,8 +4,8 @@ * @brief QXMutex_init(), QXMutex_lock and QXMutex_unlock() definitions. * @cond ****************************************************************************** -* Last updated for version 5.8.0 -* Last updated on 2016-11-19 +* Last updated for version 5.9.0 +* Last updated on 2017-03-02 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -124,9 +124,9 @@ void QXMutex_lock(QXMutex * const me) { QXK_attr_.lockPrio = me->lockPrio; } QXK_attr_.lockHolder = - (QXK_attr_.curr != (void *)0) - ? ((QActive volatile *)QXK_attr_.curr)->prio - : (uint_fast8_t)0; + (QXK_attr_.curr != (void *)0) + ? ((QActive volatile *)QXK_attr_.curr)->prio + : (uint_fast8_t)0; QS_BEGIN_NOCRIT_(QS_SCHED_LOCK, (void *)0, (void *)0) QS_TIME_(); /* timestamp */ @@ -180,8 +180,10 @@ void QXMutex_unlock(QXMutex * const me) { QS_BEGIN_NOCRIT_(QS_SCHED_UNLOCK, (void *)0, (void *)0) QS_TIME_(); /* timestamp */ - QS_2U8_((uint8_t)me->prevPrio, /* the previouis lock priority */ - (uint8_t)QXK_attr_.lockPrio); /* the lock priority */ + QS_2U8_((uint8_t)QXK_attr_.lockPrio, /* the previouis lock priority */ + (uint8_t)((QXK_attr_.lockPrio > p) /* the new lock priority */ + ? p + : QXK_attr_.lockPrio)); QS_END_NOCRIT_() if (QXK_attr_.lockPrio > p) { diff --git a/source/qxk_pkg.h b/source/qxk_pkg.h index c147b6e0..2481f87b 100644 --- a/source/qxk_pkg.h +++ b/source/qxk_pkg.h @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/source/qxk_sema.c b/source/qxk_sema.c index 8854b817..8f790a4b 100644 --- a/source/qxk_sema.c +++ b/source/qxk_sema.c @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond diff --git a/source/qxk_xthr.c b/source/qxk_xthr.c index 52b2b566..01149b10 100644 --- a/source/qxk_xthr.c +++ b/source/qxk_xthr.c @@ -4,8 +4,8 @@ * @ingroup qxk * @cond ****************************************************************************** -* Last updated for version 5.7.4 -* Last updated on 2016-11-02 +* Last updated for version 5.9.0 +* Last updated on 2017-05-06 * * Q u a n t u m L e a P s * --------------------------- @@ -32,7 +32,7 @@ * along with this program. If not, see . * * Contact information: -* http://www.state-machine.com +* https://www.state-machine.com * mailto:info@state-machine.com ****************************************************************************** * @endcond @@ -101,7 +101,7 @@ void QXThread_ctor(QXThread * const me, QActive_ctor(&me->super, Q_STATE_CAST(handler)); /* superclass' ctor */ me->super.super.vptr = &vtbl.super; /* set the vptr to QXThread v-table */ - me->super.super.state.act = Q_ACTION_CAST(0); /* mark as extended thread */ + me->super.super.state.act = Q_ACTION_CAST(0); /*mark as extended thread */ /* construct the time event member added in the QXThread class */ QTimeEvt_ctorX(&me->timeEvt, &me->super, (enum_t)QXK_DELAY_SIG, tickRate); @@ -173,12 +173,12 @@ static void QXThread_start_(QActive * const me, uint_fast8_t prio, me->prio = prio; - QF_CRIT_ENTRY_(); - QF_add_(me); /* make QF aware of this extended thread */ - /* the new thread is not blocked on any object */ me->super.temp.obj = (QMState const *)0; + QF_add_(me); /* make QF aware of this extended thread */ + + QF_CRIT_ENTRY_(); /* extended-thread becomes ready immediately */ QPSet_insert(&QXK_attr_.readySet, me->prio); @@ -257,7 +257,8 @@ static bool QXThread_post_(QActive * const me, QEvt const * const e, /* margin available? */ if (nFree > (QEQueueCtr)margin) { - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, QS_priv_.aoObjFilter, me) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_FIFO, + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -311,7 +312,7 @@ static bool QXThread_post_(QActive * const me, QEvt const * const e, Q_ASSERT_ID(310, margin != (uint_fast16_t)0); QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_POST_ATTEMPT, - QS_priv_.aoObjFilter, me) + QS_priv_.locFilter[AO_OBJ], me) QS_TIME_(); /* timestamp */ QS_OBJ_(sender); /* the sender object */ QS_SIG_(e->sig); /* the signal of the event */ @@ -359,7 +360,7 @@ static void QXThread_postLIFO_(QActive * const me, QEvt const * const e) { * receive QP events directly into its own built-in event queue from an ISR, * basic thread (AO), or another extended thread. * -* If QXThread_queueGet() is called when no events are present in the threads +* If QXThread_queueGet() is called when no events are present in the thread's * event queue, the operation blocks the current extended thread until either * an event is received, or a user-specified timeout expires. * @@ -425,7 +426,8 @@ QEvt const *QXThread_queueGet(uint_fast16_t const nTicks, } --thr->super.eQueue.tail; - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET, QS_priv_.aoObjFilter, thr) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET, + QS_priv_.locFilter[AO_OBJ], thr) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(&thr->super); /* this active object */ @@ -439,7 +441,8 @@ QEvt const *QXThread_queueGet(uint_fast16_t const nTicks, /* all entries in the queue must be free (+1 for fronEvt) */ Q_ASSERT_ID(520, nFree == (thr->super.eQueue.end +(QEQueueCtr)1)); - QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET_LAST, QS_priv_.aoObjFilter, thr) + QS_BEGIN_NOCRIT_(QS_QF_ACTIVE_GET_LAST, + QS_priv_.locFilter[AO_OBJ], thr) QS_TIME_(); /* timestamp */ QS_SIG_(e->sig); /* the signal of this event */ QS_OBJ_(&thr->super); /* this active object */ @@ -626,4 +629,3 @@ void QXK_threadRet_(void) { (void)QXK_sched_(); QF_CRIT_EXIT_(); } - diff --git a/version-5.8.2 b/version-5.8.2 deleted file mode 100644 index 13836a75..00000000 --- a/version-5.8.2 +++ /dev/null @@ -1,2 +0,0 @@ -QP/C 5.8.2 -2017-02-08 diff --git a/version-5.9.0 b/version-5.9.0 new file mode 100644 index 00000000..028d8c11 --- /dev/null +++ b/version-5.9.0 @@ -0,0 +1,2 @@ +QP/C 5.9.0 +2017-04-16