5.9.0

3rd_party/CMSIS/Include/cmsis_armcc.h

@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_armcc.h
  * @brief    CMSIS compiler ARMCC (ARM compiler V5) header file
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     03. February 2017
+ * @date     13. February 2017
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
@@ -50,34 +50,46 @@
 
 /* CMSIS compiler specific defines */
 #ifndef   __ASM
-  #define __ASM                     __asm
+  #define __ASM                                  __asm
 #endif
 #ifndef   __INLINE
-  #define __INLINE                  __inline
+  #define __INLINE                               __inline
 #endif
 #ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE           static __inline
+  #define __STATIC_INLINE                        static __inline
 #endif
 #ifndef   __NO_RETURN
-  #define __NO_RETURN               __declspec(noreturn)
+  #define __NO_RETURN                            __declspec(noreturn)
 #endif
 #ifndef   __USED
-  #define __USED                    __attribute__((used))
+  #define __USED                                 __attribute__((used))
 #endif
 #ifndef   __WEAK
-  #define __WEAK                    __attribute__((weak))
+  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __UNALIGNED_UINT32
-  #define __UNALIGNED_UINT32(x)     (*((__packed uint32_t *)(x)))
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)              __attribute__((aligned(x)))
 #endif
 #ifndef   __PACKED
-  #define __PACKED                  __attribute__((packed))
+  #define __PACKED                               __attribute__((packed))
 #endif
 #ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT           __packed struct
+  #define __PACKED_STRUCT                        __packed struct
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
 #endif
 
 

3rd_party/CMSIS/Include/cmsis_armclang.h

@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_armclang.h
  * @brief    CMSIS compiler ARMCLANG (ARM compiler V6) header file
- * @version  V5.0.1
+ * @version  V5.0.3
- * @date     02. February 2017
+ * @date     27. March 2017
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
@@ -22,6 +22,8 @@
  * limitations under the License.
  */
 
+//lint -esym(9058, IRQn)   disable MISRA 2012 Rule 2.4 for IRQn
+
 #ifndef __CMSIS_ARMCLANG_H
 #define __CMSIS_ARMCLANG_H
 
@@ -31,38 +33,70 @@
 
 /* CMSIS compiler specific defines */
 #ifndef   __ASM
-  #define __ASM                     __asm
+  #define __ASM                                  __asm
 #endif
 #ifndef   __INLINE
-  #define __INLINE                  __inline
+  #define __INLINE                               __inline
 #endif
 #ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE           static __inline
+  #define __STATIC_INLINE                        static __inline
 #endif
 #ifndef   __NO_RETURN
-  #define __NO_RETURN               __attribute__((noreturn))
+  #define __NO_RETURN                            __attribute__((noreturn))
 #endif
 #ifndef   __USED
-  #define __USED                    __attribute__((used))
+  #define __USED                                 __attribute__((used))
 #endif
 #ifndef   __WEAK
-  #define __WEAK                    __attribute__((weak))
+  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __UNALIGNED_UINT32
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)              __attribute__((aligned(x)))
 #endif
 #ifndef   __PACKED
-  #define __PACKED                  __attribute__((packed, aligned(1)))
+  #define __PACKED                               __attribute__((packed, aligned(1)))
 #endif
 #ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT           struct __attribute__((packed, aligned(1)))
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+//lint -esym(9058, T_UINT32)  disable MISRA 2012 Rule 2.4 for T_UINT32
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+//lint -esym(9058, T_UINT16_WRITE)  disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+//lint -esym(9058, T_UINT16_READ)  disable MISRA 2012 Rule 2.4 for T_UINT16_READ
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+//lint -esym(9058, T_UINT32_WRITE)  disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
 #endif
 
 
@@ -292,6 +326,33 @@ __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t top
 #endif
 
 
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
+{
+  register uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
 /**
   \brief   Get Priority Mask
   \details Returns the current state of the priority mask bit from the Priority Mask Register.

3rd_party/CMSIS/Include/cmsis_compiler.h

@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_compiler.h
  * @brief    CMSIS compiler generic header file
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     30. January 2017
+ * @date     13. February 2017
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
@@ -54,40 +54,56 @@
 #elif defined ( __ICCARM__ )
 
   #ifndef   __ASM
-    #define __ASM                     __asm
+    #define __ASM                                  __asm
   #endif
   #ifndef   __INLINE
-    #define __INLINE                  inline
+    #define __INLINE                               inline
   #endif
   #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
+    #define __STATIC_INLINE                        static inline
   #endif
 
   #include <cmsis_iar.h>
 
   #ifndef   __NO_RETURN
-    #define __NO_RETURN               __noreturn
+    #define __NO_RETURN                            __noreturn
   #endif
   #ifndef   __USED
-    #define __USED                    __root
+    #define __USED                                 __root
   #endif
   #ifndef   __WEAK
-    #define __WEAK                    __weak
+    #define __WEAK                                 __weak
   #endif
-  #ifndef   __UNALIGNED_UINT32
+  #ifndef   __PACKED
+    #define __PACKED                               __packed
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        __packed struct
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
     __packed struct T_UINT32 { uint32_t v; };
-      #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
   #endif
   #ifndef   __ALIGNED
     #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
     #define __ALIGNED(x)
   #endif
-  #ifndef   __PACKED
-    #define __PACKED                  __packed
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT           __packed struct
-  #endif
 
 
 /*
@@ -97,35 +113,51 @@
   #include <cmsis_ccs.h>
 
   #ifndef   __ASM
-    #define __ASM                     __asm
+    #define __ASM                                  __asm
   #endif
   #ifndef   __INLINE
-    #define __INLINE                  inline
+    #define __INLINE                               inline
   #endif
   #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
+    #define __STATIC_INLINE                        static inline
   #endif
   #ifndef   __NO_RETURN
-    #define __NO_RETURN               __attribute__((noreturn))
+    #define __NO_RETURN                            __attribute__((noreturn))
   #endif
   #ifndef   __USED
-    #define __USED                    __attribute__((used))
+    #define __USED                                 __attribute__((used))
   #endif
   #ifndef   __WEAK
-    #define __WEAK                    __attribute__((weak))
+    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __UNALIGNED_UINT32
-    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)              __attribute__((aligned(x)))
   #endif
   #ifndef   __PACKED
-    #define __PACKED                  __attribute__((packed))
+    #define __PACKED                               __attribute__((packed))
   #endif
   #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT           struct __attribute__((packed))
+    #define __PACKED_STRUCT                        struct __attribute__((packed))
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)                           __attribute__((aligned(x)))
   #endif
 
 
@@ -140,36 +172,52 @@
    */
 
   #ifndef   __ASM
-    #define __ASM                     __asm
+    #define __ASM                                  __asm
   #endif
   #ifndef   __INLINE
-    #define __INLINE                  inline
+    #define __INLINE                               inline
   #endif
   #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
+    #define __STATIC_INLINE                        static inline
   #endif
   #ifndef   __NO_RETURN
-    #define __NO_RETURN               __attribute__((noreturn))
+    #define __NO_RETURN                            __attribute__((noreturn))
   #endif
   #ifndef   __USED
-    #define __USED                    __attribute__((used))
+    #define __USED                                 __attribute__((used))
   #endif
   #ifndef   __WEAK
-    #define __WEAK                    __attribute__((weak))
+    #define __WEAK                                 __attribute__((weak))
   #endif
-  #ifndef   __UNALIGNED_UINT32
+  #ifndef   __PACKED
+    #define __PACKED                               __packed__
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __packed__
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
     struct __packed__ T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
   #endif
   #ifndef   __ALIGNED
     #define __ALIGNED(x)              __align(x)
   #endif
-  #ifndef   __PACKED
-    #define __PACKED                  __packed__
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT           struct __packed__
-  #endif
 
 
 /*
@@ -179,13 +227,13 @@
    #include <cmsis_csm.h>
 
  #ifndef   __ASM
-    #define __ASM                     _asm
+    #define __ASM                                  _asm
   #endif
   #ifndef   __INLINE
-    #define __INLINE                  inline
+    #define __INLINE                               inline
   #endif
   #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
+    #define __STATIC_INLINE                        static inline
   #endif
   #ifndef   __NO_RETURN
     // NO RETURN is automatically detected hence no warning here
@@ -196,22 +244,38 @@
     #define __USED
   #endif
   #ifndef   __WEAK
-    #define __WEAK                    __weak
+    #define __WEAK                                 __weak
   #endif
-  #ifndef   __UNALIGNED_UINT32
+  #ifndef   __PACKED
+    #define __PACKED                               @packed
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        @packed struct
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
     @packed struct T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
   #endif
   #ifndef   __ALIGNED
     #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
     #define __ALIGNED(x)
   #endif
-  #ifndef   __PACKED
-    #define __PACKED                  @packed
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT           @packed struct
-  #endif
 
 
 #else

3rd_party/CMSIS/Include/cmsis_gcc.h

@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_gcc.h
  * @brief    CMSIS compiler GCC header file
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     02. February 2017
+ * @date     13. February 2017
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
@@ -33,39 +33,71 @@
 
 /* CMSIS compiler specific defines */
 #ifndef   __ASM
-  #define __ASM                     __asm
+  #define __ASM                                  __asm
 #endif
 #ifndef   __INLINE
-  #define __INLINE                  inline
+  #define __INLINE                               inline
 #endif
 #ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE           static inline
+  #define __STATIC_INLINE                        static inline
 #endif
 #ifndef   __NO_RETURN
-  #define __NO_RETURN               __attribute__((noreturn))
+  #define __NO_RETURN                            __attribute__((noreturn))
 #endif
 #ifndef   __USED
-  #define __USED                    __attribute__((used))
+  #define __USED                                 __attribute__((used))
 #endif
 #ifndef   __WEAK
-  #define __WEAK                    __attribute__((weak))
+  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __UNALIGNED_UINT32
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wpacked"
-#pragma GCC diagnostic ignored "-Wattributes"
-  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-#pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)              __attribute__((aligned(x)))
 #endif
 #ifndef   __PACKED
-  #define __PACKED                  __attribute__((packed, aligned(1)))
+  #define __PACKED                               __attribute__((packed, aligned(1)))
 #endif
 #ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT           struct __attribute__((packed, aligned(1)))
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
 #endif
 
 
@@ -301,6 +333,33 @@ __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t top
 #endif
 
 
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
+{
+  register uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
 /**
   \brief   Get Priority Mask
   \details Returns the current state of the priority mask bit from the Priority Mask Register.

3rd_party/CMSIS/Include/core_armv8mbl.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_armv8mbl.h
  * @brief    CMSIS ARMv8MBL Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     25. November 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -1224,7 +1224,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
 /*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for ARMv8-M Baseline */
 /*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for ARMv8-M Baseline */
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -1236,9 +1241,15 @@ typedef struct
   #define NVIC_GetActive              __NVIC_GetActive
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -1536,7 +1547,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/Include/core_armv8mml.h

@@ -2,10 +2,10 @@
  * @file     core_armv8mml.h
  * @brief    CMSIS ARMv8MML Core Peripheral Access Layer Header File
  * @version  V5.0.2
- * @date     07. December 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -2050,7 +2050,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
   #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -2062,9 +2067,15 @@ typedef struct
   #define NVIC_GetActive              __NVIC_GetActive
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -2431,7 +2442,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */
@@ -2546,6 +2557,10 @@ __STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
   {
     return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
   }
+  else
+  {
+    return(0U);
+  }
 }
 
 

3rd_party/CMSIS/Include/core_cm0.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm0.h
  * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     25. November 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -564,7 +564,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
 /*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Cortex-M0 */
 /*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Cortex-M0 */
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -576,9 +581,15 @@ typedef struct
 /*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -779,7 +790,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/Include/core_cm0plus.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm0plus.h
  * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     25. November 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -680,7 +680,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
 /*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Cortex-M0+ */
 /*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Cortex-M0+ */
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -692,9 +697,15 @@ typedef struct
 /*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0+ */
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -905,7 +916,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/Include/core_cm23.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm23.h
  * @brief    CMSIS Cortex-M23 Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     25. November 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -1224,7 +1224,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
 /*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Cortex-M23 */
 /*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Cortex-M23 */
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -1236,9 +1241,15 @@ typedef struct
   #define NVIC_GetActive              __NVIC_GetActive
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -1536,7 +1547,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/Include/core_cm3.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm3.h
  * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     30. January 2017
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

3rd_party/CMSIS/Include/core_cm33.h

@@ -2,10 +2,10 @@
  * @file     core_cm33.h
  * @brief    CMSIS Cortex-M33 Core Peripheral Access Layer Header File
  * @version  V5.0.2
- * @date     07. December 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -2050,7 +2050,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
   #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -2062,9 +2067,15 @@ typedef struct
   #define NVIC_GetActive              __NVIC_GetActive
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -2431,7 +2442,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/Include/core_cm4.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm4.h
  * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     30. January 2017
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

3rd_party/CMSIS/Include/core_cm7.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm7.h
  * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     25. November 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -1801,7 +1801,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
   #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -1813,9 +1818,15 @@ typedef struct
   #define NVIC_GetActive              __NVIC_GetActive
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -2115,7 +2126,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/Include/core_sc000.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_sc000.h
  * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     25. November 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -692,7 +692,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
 /*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for SC000 */
 /*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for SC000 */
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -704,9 +709,15 @@ typedef struct
 /*#define NVIC_GetActive              __NVIC_GetActive             not available for SC000 */
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -907,7 +918,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/Include/core_sc300.h

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_sc300.h
  * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
- * @version  V5.0.1
+ * @version  V5.0.2
- * @date     25. November 2016
+ * @date     13. February 2017
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -1401,7 +1401,12 @@ typedef struct
   @{
  */
 
-#ifndef CMSIS_NVIC_VIRTUAL
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
   #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
   #define NVIC_EnableIRQ              __NVIC_EnableIRQ
@@ -1413,9 +1418,15 @@ typedef struct
   #define NVIC_GetActive              __NVIC_GetActive
   #define NVIC_SetPriority            __NVIC_SetPriority
   #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
 #endif /* CMSIS_NVIC_VIRTUAL */
 
-#ifndef CMSIS_VECTAB_VIRTUAL
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
   #define NVIC_SetVector              __NVIC_SetVector
   #define NVIC_GetVector              __NVIC_GetVector
 #endif  /* (CMSIS_VECTAB_VIRTUAL) */
@@ -1715,7 +1726,7 @@ __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */

3rd_party/CMSIS/README.txt

@@ -1,7 +1,7 @@
 About CMSIS
 ===========
 This folder contains the Cortex Microcontroller Software Interface Standard
-(CMSIS) V5.0.1, which provides a single standard across all Cortex-Mx
+(CMSIS) V5.0.2, which provides a single standard across all Cortex-Mx
 processor series vendors. It enables code re-use and code sharing across
 software projects and reduces time-to-market for new embedded applications.
 

3rd_party/at91sam7s-ek/iar/low_level_init.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* Web  : https://state-machine.com
 * Email: info@state-machine.com
 *****************************************************************************/
 #include <stdint.h>

3rd_party/at91sam7s-ek/iar/startup_at91mc.s

@@ -27,7 +27,7 @@
 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
 ;
 ; Contact information:
-; Web:   http://www.state-machine.com
+; Web:   https://state-machine.com
 ; Email: info@state-machine.com
 ;-----------------------------------------------------------------------------
 

3rd_party/ek-lm3s6965/lwip_driver/netif/eth_driver.h

@@ -29,7 +29,7 @@
 *
 * Contact information:
 * Quantum Leaps Web sites: http://www.quantum-leaps.com
-*                          http://www.state-machine.com
+*                          https://state-machine.com
 * e-mail:                  info@quantum-leaps.com
 *****************************************************************************/
 #ifndef eth_driver_h

3rd_party/embOS/License.txt

@@ -1,6 +1,6 @@
 Important - Read carefully:
 
-This license is a legal agreement between YOU (either an individual or a single entity) and SEGGER Microcontroller Systeme GmbH & Co. KG (called SEGGER).
+This license is a legal agreement between YOU (either an individual or a single entity) and SEGGER Microcontroller GmbH & Co. KG (called SEGGER).
 By downloading and/or using the starterkit software, you agree to be bound by the terms of this agreement.
 
 1. Content of contract
@@ -53,4 +53,4 @@ The product is not fault-tolerant and is not designed, manufactured or intended
 (g) The relationship between Licensor and Licensee is that of independent contractors and neither Licensee nor its agents shall have any authority to bind Licensor in any way.
 (h) If any SEGGER Microcontroller Systeme GmbH & Co. KG professional services are being provided, then such professional services are provided pursuant to the terms of a separate professional services agreement between the parties. The parties acknowledge that such services are acquired independently of the product licensed hereunder, and that provision of such services is not essential to the functionality of such product.
 
-<EFBFBD> 2004-2013 SEGGER Microcontroller GmbH & Co. KG
+<EFBFBD> 2004-2017 SEGGER Microcontroller GmbH & Co. KG

3rd_party/embOS/Start/Inc/BSP.h

@@ -1,17 +1,16 @@
 /*********************************************************************
-*               SEGGER MICROCONTROLLER GmbH & Co KG                  *
+*                SEGGER Microcontroller GmbH & Co. KG                *
-*       Solutions for real time microcontroller applications         *
+*                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*       (c) 1995 - 2014  SEGGER Microcontroller GmbH & Co KG         *
+*       (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG         *
 *                                                                    *
-*       www.segger.com     Support: support@segger.com               *
+*       Internet: segger.com  Support: support_embos@segger.com      *
 *                                                                    *
 **********************************************************************
 *                                                                    *
 *       embOS * Real time operating system for microcontrollers      *
 *                                                                    *
-*                                                                    *
 *       Please note:                                                 *
 *                                                                    *
 *       Knowledge of this file may under no circumstances            *
@@ -22,7 +21,7 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       OS version: 4.00                                             *
+*       OS version: 4.34.1                                           *
 *                                                                    *
 **********************************************************************
 
@@ -32,7 +31,7 @@ Purpose : BSP (Board support package)
 --------  END-OF-HEADER  ---------------------------------------------
 */
 
-#ifndef BSP_H                           /* avoid multiple inclusion */
+#ifndef BSP_H                           /* Avoid multiple inclusion */
 #define BSP_H
 
 /*********************************************************************
@@ -41,12 +40,6 @@ Purpose : BSP (Board support package)
 *
 **********************************************************************
 */
-#define KEY_STAT_UP       (1 << 0)
-#define KEY_STAT_DOWN     (1 << 1)
-#define KEY_STAT_LEFT     (1 << 2)
-#define KEY_STAT_RIGHT    (1 << 3)
-#define KEY_STAT_BUTTON1  (1 << 4)
-#define KEY_STAT_BUTTON2  (1 << 5)
 
 /* In order to avoid warnings for undefined parameters */
 #ifndef BSP_USE_PARA
@@ -59,7 +52,7 @@ Purpose : BSP (Board support package)
 
 /*********************************************************************
 *
-*       Functions
+*       Prototypes
 *
 **********************************************************************
 */
@@ -72,61 +65,15 @@ extern "C" {
 *
 *       General
 */
-void     BSP_Init       (void);
+void BSP_Init     (void);
-void     BSP_SetLED     (int Index);
+void BSP_SetLED   (int Index);
-void     BSP_ClrLED     (int Index);
+void BSP_ClrLED   (int Index);
-void     BSP_ToggleLED  (int Index);
+void BSP_ToggleLED(int Index);
-unsigned BSP_GetKeyStat (void);
-
-/*********************************************************************
-*
-*       GUI
-*/
-void BSP_GUI_Init(void);
-
-/*********************************************************************
-*
-*       USB
-*/
-void BSP_USB_Attach         (void);
-void BSP_USB_InstallISR     (void (*pfISR)(void));
-void BSP_USB_InstallISR_Ex  (int ISRIndex, void (*pfISR)(void), int Prio);
-void BSP_USB_ISR_Handler    (void);
-
-/*********************************************************************
-*
-*       USBH
-*/
-void BSP_USBH_InstallISR    (void (*pfISR)(void));
-void BSP_USBH_Init          (void);
-
-/*********************************************************************
-*
-*       ETH
-*
-*  Functions for ethernet controllers (as far as present)
-*/
-void BSP_ETH_Init          (unsigned Unit);
-void BSP_ETH_InstallISR    (void (*pfISR)(void));
-void BSP_ETH_InstallISR_Ex (int ISRIndex, void (*pfISR)(void), int Prio);
-void BSP_ETH_ISR_Handler   (void);
-
-/*********************************************************************
-*
-*       CACHE
-*/
-void BSP_CACHE_CleanInvalidateRange (void * p, unsigned NumBytes);
-void BSP_CACHE_CleanRange           (void * p, unsigned NumBytes);
-void BSP_CACHE_InvalidateRange      (void * p, unsigned NumBytes);
-
-/********************************************************************/
 
 #ifdef __cplusplus
 }
 #endif
 
-/********************************************************************/
-
 #endif                                  /* avoid multiple inclusion */
 
 /****** End Of File *************************************************/

3rd_party/embOS/Start/Inc/JLINKMEM.h

@@ -1,17 +1,16 @@
 /*********************************************************************
-*               SEGGER MICROCONTROLLER GmbH & Co KG                  *
+*                SEGGER Microcontroller GmbH & Co. KG                *
-*       Solutions for real time microcontroller applications         *
+*                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*       (c) 1995 - 2014  SEGGER Microcontroller GmbH & Co KG         *
+*       (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG         *
 *                                                                    *
-*       www.segger.com     Support: support@segger.com               *
+*       Internet: segger.com  Support: support_embos@segger.com      *
 *                                                                    *
 **********************************************************************
 *                                                                    *
 *       embOS * Real time operating system for microcontrollers      *
 *                                                                    *
-*                                                                    *
 *       Please note:                                                 *
 *                                                                    *
 *       Knowledge of this file may under no circumstances            *
@@ -22,7 +21,7 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       OS version: 4.00                                             *
+*       OS version: 4.34.1                                           *
 *                                                                    *
 **********************************************************************
 
@@ -35,12 +34,20 @@ Purpose : Header file for J-Link ARM communication using memory
 #ifndef JLINKMEM_H
 #define JLINKMEM_H             // Avoid multiple inclusion
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 void JLINKMEM_Process(void);
 void JLINKMEM_SetpfOnRx(void (* pf)(unsigned char Data));
 void JLINKMEM_SetpfOnTx(void (* pf)(void));
 void JLINKMEM_SetpfGetNextChar(OS_INT (* pf)(void));
 void JLINKMEM_SendChar(unsigned char Data);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif                         // Avoid multiple inclusion
 
 /*************************** end of file ****************************/

3rd_party/embOS/Start/Inc/OS_Config.h

@@ -1,17 +1,16 @@
 /*********************************************************************
-*               SEGGER MICROCONTROLLER GmbH & Co KG                  *
+*                SEGGER Microcontroller GmbH & Co. KG                *
-*       Solutions for real time microcontroller applications         *
+*                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*       (c) 1995 - 2014  SEGGER Microcontroller GmbH & Co KG         *
+*       (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG         *
 *                                                                    *
-*       www.segger.com     Support: support@segger.com               *
+*       Internet: segger.com  Support: support_embos@segger.com      *
 *                                                                    *
 **********************************************************************
 *                                                                    *
 *       embOS * Real time operating system for microcontrollers      *
 *                                                                    *
-*                                                                    *
 *       Please note:                                                 *
 *                                                                    *
 *       Knowledge of this file may under no circumstances            *
@@ -22,13 +21,13 @@
 *                                                                    *
 **********************************************************************
 *                                                                    *
-*       OS version: 4.00                                             *
+*       OS version: 4.34.1                                           *
 *                                                                    *
 **********************************************************************
 
 ----------------------------------------------------------------------
 File    : OS_Config.h
-Purpose : Configuration settings for the OS build and OS_VIEW
+Purpose : Configuration settings for the OS build and embOSView
 --------  END-OF-HEADER  ---------------------------------------------
 */
 
@@ -43,14 +42,14 @@ Purpose : Configuration settings for the OS build and OS_VIEW
 */
 
 #ifndef   DEBUG           // Should be overwritten by project settings
-  #define DEBUG     (0)   // in debug builds
+  #define DEBUG     (0)   // in debug configurations
 #endif
 
 /*********************************************************************
 *
-*       Configuration for RTOS build and UART
+*       Configuration for RTOS build and embOSView communication
 *
-*  One of the following builds needs to be selected for both DEBUG and Release builds:
+*  One of the following builds needs to be selected for both Debug and Release configuration:
 *
 *  OS_LIBMODE_XR    Extremely small release build without Round robin
 *  OS_LIBMODE_R     Release build
@@ -65,7 +64,7 @@ Purpose : Configuration settings for the OS build and OS_VIEW
   #define OS_LIBMODE_DP
 #else
   #define OS_LIBMODE_R
-  #define OS_VIEW_ENABLE (0)
+  #define OS_VIEW_IFSELECT  OS_VIEW_DISABLED  // embOSView communication is disabled per default in release configuration
 #endif
 
 /********************************************************************/

doxygen/Doxyfile

@@ -5,7 +5,7 @@
 #---------------------------------------------------------------------------
 DOXYFILE_ENCODING      = UTF-8
 PROJECT_NAME           = "QP/C"
-PROJECT_NUMBER         = "5.8.2"
+PROJECT_NUMBER         = "5.9.0"
 PROJECT_BRIEF          =
 PROJECT_LOGO           = images/header_logo_ql.png
 OUTPUT_DIRECTORY       =
@@ -191,10 +191,10 @@ IGNORE_PREFIX          =
 GENERATE_HTML          = YES
 HTML_OUTPUT            = ../../html/qpc
 HTML_FILE_EXTENSION    = .html
-HTML_HEADER            = ../../doxygen/header.html
+HTML_HEADER            = ../../html/header.html
-HTML_FOOTER            = ../../doxygen/footer.html
+HTML_FOOTER            = ../../html/footer.html
 HTML_STYLESHEET        =
-HTML_EXTRA_STYLESHEET  = ../../doxygen/ql.css
+HTML_EXTRA_STYLESHEET  = ../../html/ql.css
 HTML_EXTRA_FILES       =
 HTML_COLORSTYLE_HUE    = 220
 HTML_COLORSTYLE_SAT    = 100

doxygen/Doxyfile-CHM

@@ -5,7 +5,7 @@
 #---------------------------------------------------------------------------
 DOXYFILE_ENCODING      = UTF-8
 PROJECT_NAME           = "QP/C"
-PROJECT_NUMBER         = "5.8.2"
+PROJECT_NUMBER         = "5.9.0"
 PROJECT_BRIEF          =
 PROJECT_LOGO           = images/header_logo_ql.png
 OUTPUT_DIRECTORY       =
@@ -191,10 +191,10 @@ IGNORE_PREFIX          =
 GENERATE_HTML          = YES
 HTML_OUTPUT            = tmp
 HTML_FILE_EXTENSION    = .html
-HTML_HEADER            = ../../doxygen/header.html
+HTML_HEADER            = ../../html/header.html
-HTML_FOOTER            = ../../doxygen/footer.html
+HTML_FOOTER            = ../../html/footer.html
 HTML_STYLESHEET        =
-HTML_EXTRA_STYLESHEET  = ../../doxygen/ql.css
+HTML_EXTRA_STYLESHEET  = ../../html/ql.css
 HTML_EXTRA_FILES       =
 HTML_COLORSTYLE_HUE    = 220
 HTML_COLORSTYLE_SAT    = 100

doxygen/Doxyfile-DOC

@@ -108,7 +108,7 @@ WARN_LOGFILE           =
 #---------------------------------------------------------------------------
 # Configuration options related to the input files
 #---------------------------------------------------------------------------
-INPUT                  = \
+INPUT                  = \
     main.dox \
     gs.dox \
     struct.dox \
@@ -130,7 +130,13 @@ INPUT                  = \
     history.dox \
     macros.h \
     metrics.dox \
-    modules.dox
+    modules.dox \
+    ../include \
+    ../source \
+    ../ports/lint \
+    ../ports/lint/qk \
+    ../ports/lint/qv \
+    ../ports/lint/qxk
 
 INPUT_ENCODING         = UTF-8
 FILE_PATTERNS          = \
@@ -189,10 +195,10 @@ IGNORE_PREFIX          =
 GENERATE_HTML          = YES
 HTML_OUTPUT            = ../../html/qpc
 HTML_FILE_EXTENSION    = .html
-HTML_HEADER            = ../../doxygen/header.html
+HTML_HEADER            = ../../html/header.html
-HTML_FOOTER            = ../../doxygen/footer.html
+HTML_FOOTER            = ../../html/footer.html
 HTML_STYLESHEET        =
-HTML_EXTRA_STYLESHEET  = ../../doxygen/ql.css
+HTML_EXTRA_STYLESHEET  = ../../html/ql.css
 HTML_EXTRA_FILES       =
 HTML_COLORSTYLE_HUE    = 220
 HTML_COLORSTYLE_SAT    = 100

doxygen/exa.dox

@@ -150,7 +150,7 @@ To demonstrate QP/C features on an embedded board, you need to create an applica
 
 With the exception of the game application, all other example applications can be implemented on a board with just a couple of LEDs. The @ref game application is a bit more involved and requires a small graphic display on the board.
 
-Beyond these basic applications for demonstrating and testing the various @ref ports "QP/C ports", the QP/C distribution contains all examples described in the book <a class="extern" target="_blank" href="http://www.state-machine.com/psicc2" >Practical UML Statecharts in C/C++, 2nd Edition</a>.
+Beyond these basic applications for demonstrating and testing the various @ref ports "QP/C ports", the QP/C distribution contains all examples described in the book <a class="extern" target="_blank" href="https://www.state-machine.com/psicc2" >Practical UML Statecharts in C/C++, 2nd Edition</a>.
 @sa @ref exa_win32
 
 
@@ -182,7 +182,7 @@ The different phases of embedded software life cycle pose different challenges.
 
 -----------------------------------------------------------------------------
 @subsection exa_sec_qm QM Models
-Many example projects contain code auto-generated by the <a class="extern" target="_blank" href="http://www.state-machine.com/qm/help"><strong>QM modeling tool</strong></a>. Such projects always contain the corresponding **QM model** file, which you can open in QM, modify, and re-generate the code.
+Many example projects contain code auto-generated by the <a class="extern" target="_blank" href="https://www.state-machine.com/qm/help"><strong>QM modeling tool</strong></a>. Such projects always contain the corresponding **QM model** file, which you can open in QM, modify, and re-generate the code.
 
 @note
 The auto-generated files are saved as **read-only**. This protects them from inadvertent modifications, which will get lost when the files are re-generated by QM (or QMC). All modifications to the auto-generated code should be done in the QM model, not in the code.
@@ -223,10 +223,10 @@ By copying and re-naming an existing, working project, as opposed to creating a
 
 To work with QP/C effectively, you need to learn a bit more about active objects and state machines. Below is a list of links to enable you to further your knowledge:
 
-1. The book “Practical UML Statecharts in C/C++, 2nd Edition” [PSiCC2] and the companion web-page to the book (http://www.state-machine.com/psicc2/
+1. The book “Practical UML Statecharts in C/C++, 2nd Edition” [PSiCC2] and the companion web-page to the book (https://www.state-machine.com/psicc2/
 2. Free Support Forum for QP/QM (https://sourceforge.net/p/qpc/discussion/668726 )
-3. QP Code Downloads summary (http://www.state-machine.com/downloads )
+3. QP Code Downloads summary (https://www.state-machine.com/downloads )
-4. QP Application Notes (http://www.state-machine.com/doc/an.html )
+4. QP Application Notes (https://www.state-machine.com/doc/an )
 5. "State Space" Blog (http://embeddedgurus.com/state-space/ )
 
 @next{exa_ref}

doxygen/exa_apps.dox

@@ -9,17 +9,17 @@
 - @subpage game
 - @subpage pelican
 
-Additionally, the QP/C distribution contains several application examples described in the <a class="extern" target="_blank" href="http://www.state-machine.com/psicc2">PSiCC2</a> book.
+Additionally, the QP/C distribution contains several application examples described in the <a class="extern" target="_blank" href="https://www.state-machine.com/psicc2">PSiCC2</a> book.
 
-- Calculator example from Chapter 2 of PSiCC2
+- Calculator example from Chapter 2 of PSiCC2
-- Orthogonal Component design pattern
+- Orthogonal Component design pattern
-- Orthogonal Component with QM model design pattern
+- Orthogonal Component with QM model design pattern
-- Deferred Event design pattern
+- Deferred Event design pattern
-- Transition-to-History (with ::QHsm class)
+- Transition-to-History (with ::QHsm class)
-- Transition-to-History (with ::QMsm class)
+- Transition-to-History (with ::QMsm class)
-- QMsmTst Test State Machine based on QP::QMsm with QM model
+- QMsmTst Test State Machine based on QP::QMsm with QM model
-- QHsmTst Test State Machine based on QP::QHsm with QM model
+- QHsmTst Test State Machine based on QP::QHsm with QM model
-- Reminder design pattern from Chapter 5 of PSiCC2
+- Reminder design pattern from Chapter 5 of PSiCC2
 - Reminder design pattern different version
 
 @next{blinky}
@@ -46,7 +46,7 @@ The ultra-simple Blinky application, which  consists of just one active object n
 @section blinky_sm State Machine
 The very simple state machine of the Blinky AO is shown in the figure below:
 
-@image html SM_blinky.png "State Machine of the Blinky AO"
+@image html SM_blinky.png "State Machine of the Blinky AO"
 
 <ul class="tag">
   <li><span class="tag">1</span> The top-most initial transition in this state machine arms a QP time event (QTimeEvt_armX()) to deliver the `TIMEOUT` signal every half second, so that the LED can stay on for one half second and off for the other half.
@@ -91,11 +91,11 @@ As you can see, the structure of the state machine is very clearly recognizable
 /*##########################################################################*/
 /*! @page dpp Dining Philosophers Problem (DPP)
 
-The Dining Philosophers Problem (DPP) example is described in the <a class="extern" target="_blank" href="http://www.state-machine.com/doc/AN_DPP.pdf">Application Note: Dining Philosophers Problem (DPP) Example</a>.
+The Dining Philosophers Problem (DPP) example is described in the <a class="extern" target="_blank" href="https://www.state-machine.com/doc/AN_DPP.pdf">Application Note: Dining Philosophers Problem (DPP) Example</a>.
 
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_DPP.pdf"><img border="0" src="img/AN.jpg" title="Download PDF"></a>
+<a target="_blank" href="https://www.state-machine.com/doc/AN_DPP.pdf"><img border="0" src="img/AN.jpg" title="Download PDF"></a>
 <div class="caption">
 Application Note: Dining Philosophers Problem (DPP) Example
 </div>
@@ -108,11 +108,11 @@ Application Note: Dining Philosophers Problem (DPP) Example
 /*##########################################################################*/
 /*! @page game "Fly 'n' Shoot" Game
 
-The "Fly 'n' Shoot" game example is described in the <a class="extern" target="_blank" href="http://www.state-machine.com/doc/AN_Fly-n-Shoot.pdf">Application Note: Fly 'n' Shoot Game Example</a>.
+The "Fly 'n' Shoot" game example is described in the <a class="extern" target="_blank" href="https://www.state-machine.com/doc/AN_Fly-n-Shoot.pdf">Application Note: Fly 'n' Shoot Game Example</a>.
 
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_Fly-n-Shoot.pdf"><img border="0" src="img/AN.jpg" title="Download PDF"></a>
+<a target="_blank" href="https://www.state-machine.com/doc/AN_Fly-n-Shoot.pdf"><img border="0" src="img/AN.jpg" title="Download PDF"></a>
 <div class="caption">
 Application Note: Fly 'n' Shoot Game Example
 </div>
@@ -125,11 +125,11 @@ Application Note: Fly 'n' Shoot Game Example
 /*##########################################################################*/
 /*! @page pelican PEdestrian LIgtht CONtrolled (PELICAN) Crossing
 
-The "Fly 'n' Shoot" game example is described in the <a class="extern" target="_blank" href="http://www.state-machine.com/doc/AN_PELICAN.pdf">Application Note: PEdestrian LIght CONtrolled (PELICAN) Crossing Example</a>.
+The "Fly 'n' Shoot" game example is described in the <a class="extern" target="_blank" href="https://www.state-machine.com/doc/AN_PELICAN.pdf">Application Note: PEdestrian LIght CONtrolled (PELICAN) Crossing Example</a>.
 
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_PELICAN.pdf"><img border="0" src="img/AN.jpg" title="Download PDF"></a>
+<a target="_blank" href="https://www.state-machine.com/doc/AN_PELICAN.pdf"><img border="0" src="img/AN.jpg" title="Download PDF"></a>
 <div class="caption">
 Application Note: PEdestrian LIght CONtrolled (PELICAN) Crossing Example
 </div>

doxygen/exa_mware.dox

@@ -13,23 +13,23 @@
 /*##########################################################################*/
 /*! @page lwip_ek-lm3s6965 lwIP on EK-LM3S6965
 
-@image html bd_EK-LM3S6965.jpg EK-LM3S6965 board
+@image html bd_EK-LM3S6965.jpg EK-LM3S6965 board
 
 lwIP example for Texas Instruments EK-LM3S6965 (Cortex-M3) with GNU-ARM and IAR-ARM toolsets.
 
-@image html bd_EK-LM3S6965_lwip.jpg QP-lwIP on EK-LM3S6965
+@image html bd_EK-LM3S6965_lwip.jpg QP-lwIP on EK-LM3S6965
 @n@n
-@image html under_construction.jpg
+@image html under_construction.jpg
 
 */
 
 /*##########################################################################*/
 /*! @page exa_emwin emWin Embedded GUI
 
-<p>The <a href="http://www.state-machine.com/doc/AN_QP_emWin.pdf" target="_blank" class="extern"><strong>Application Note "QP and emWin Embedded GUI"</strong></a> describes how to use QP&trade; with the <a href="https://www.segger.com/emwin.html" target="_blank" class="extern">emWin&trad; Embedded GUI from SEGGER</a> and also <a href="https://www.micrium.com/rtos/gui/" target="_blank" class="extern">µC/GUI from Micriµm</a>, which technically are the same products.
+<p>The <a href="https://www.state-machine.com/doc/AN_QP_emWin.pdf" target="_blank" class="extern"><strong>Application Note "QP and emWin Embedded GUI"</strong></a> describes how to use QP&trade; with the <a href="https://www.segger.com/emwin.html" target="_blank" class="extern">emWin&trad; Embedded GUI from SEGGER</a> and also <a href="https://www.micrium.com/rtos/gui/" target="_blank" class="extern">µC/GUI from Micriµm</a>, which technically are the same products.
 </p>
 
-@image html emWin_demo.jpg QP-emWin demo (DPP) running on Windows 
+@image html emWin_demo.jpg QP-emWin demo (DPP) running on Windows
 
 
 To demonstrate the working examples, this Application Note uses the emWin Simulation on Windows, which is available for a <a href="https://www.segger.com/downloads/emwin" target="_blank" class="extern">free download from the SEGGER</a> (requires registration). You need only a Windows-based PC to execute the examples provided in this Application Note. Additionally, you’d need Microsoft Visual Studio 2013 (could be the free Express Edition) or higher to re-build and debug the provided examples.

doxygen/exa_native.dox

@@ -1,5 +1,5 @@
-namespace QP {
+namespace QP {
-
+
 /*##########################################################################*/
 /*! @page exa_native Native Examples (Built-in Kernels)
 
@@ -148,7 +148,7 @@ You can hover the mouse cursor over the <span class="board"></span>&nbsp;&nbsp;
 /*##########################################################################*/
 /*! @page arm-cm_blinky_ek-tm4c123gxl Blinky on EK-TM4C123GXL
 
-@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
+@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
 @n
 @n
 @image html blinky_ek-tm4c123gxl.gif Blinky on EK-TM4C123GLX (TivaC LaunchPad)
@@ -158,110 +158,110 @@ Simple "Blinky" example for Texas Instruments TivaC123GXL MCU (Cortex-M4F), ARM
 @image html blinky_win32.png Blinky emulation running in a Windows console
 @n
 @n
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_blinky_efm32-slstk3401a Blinky on EFM32-SLSTK3401A
 
-@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board
+@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board
 @n
 Simple "Blinky" example for for Silicon Labs Pearl Gecko MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets.
 @n
 @image html blinky_win32.png Blinky emulation running in a Windows console
 @n
 @n
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_dpp_ek-tm4c123gxl DPP on EK-TM4C123GXL
 
-@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
+@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
 
 Dining Philosophers Problem (DPP) example for Texas Instruments TivaC123GXL MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets.
 
 @image html dpp_win32.png DPP emulation running in Windows GUI
 @n
 @n
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_dpp_efm32-slstk3401a DPP on EFM32-SLSTK3401A
 
-@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board
+@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board
 @n
 Dining Philosophers Problem (DPP) example for for Silicon Labs Pearl Gecko MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets.
 @n
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_dpp_mbed-lpc1768 DPP on mbed-LPC1768
 
-@image html bd_mbed-LPC1768.jpg mbed-LPC1768 board
+@image html bd_mbed-LPC1768.jpg mbed-LPC1768 board
 
 Dining Philosophers Problem (DPP) example for  NXP LPC1768 MCU (Cortex-M3) with GNU-ARM toolset.
 
-@image html mbed-LPC1768_button.jpg Adding External Button to mbed-LPC1768
+@image html mbed-LPC1768_button.jpg Adding External Button to mbed-LPC1768
 @n
 @n
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_dpp_nucleo-l053r8 DPP on NUCLEO-L053R8
 
-@image html bd_nucleo-l053r8.jpg NUCLEO-L053R8 board
+@image html bd_nucleo-l053r8.jpg NUCLEO-L053R8 board
 
 Dining Philosophers Problem (DPP) example for STM32-L053R8T6 MCU (Cortex-M0+) with ARM-Keil, GNU-ARM, and IAR-ARM toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_dpp_nucleo-l152re DPP on NUCLEO-L152RE
 
-@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board
+@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board
 
 Dining Philosophers Problem (DPP) example for STM32-L152RET6 MCU (Cortex-M3) with ARM-Keil, GNU-ARM, and IAR-ARM toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_dpp_stm32f746g-disco DPP on STM32F746G-Discovery
 
-@image html bd_STM32F746G-Disco.jpg STM32F746G-Discovery
+@image html bd_STM32F746G-Disco.jpg STM32F746G-Discovery
 
 Dining Philosophers Problem (DPP) example for STM32F746G-Discovery MCU (Cortex-M7) with ARM-Keil, GNU-ARM, and IAR-ARM toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cm_game_efm32-slstk3401a "Fly 'n' Shoot" Game on EFM32-SLSTK3401A
 
-@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board
+@image html bd_EFM32-SLSTK3401A.jpg EFM32-SLSTK3401A board
 
 "Fly 'n' Shoot" game example for Silicon Labs Pearl Gecko MCU (Cortex-M4F), ARM (MDK-ARM), GNU-ARM, IAR EWARM toolsets.
 
 @image html game_win32.png Game emulation running in Windows GUI
 @n
 @n
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 
 /*##########################################################################*/
 /*! @page arm-cr_blinky_launchxl2-tms57012 Blinky on LAUNCHXL2-TMS57012
 
-@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012
+@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012
 
 @ref blinky "Blinky" example for LAUNCHXL2-TMS57012 MCU (Cortex-R, Hercules) with IAR-ARM and TI toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page arm-cr_dpp_launchxl2-tms57012 DPP on LAUNCHXL2-TMS57012
 
-@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012
+@image html bd_LAUNCHXL2-TMS57012.jpg LAUNCHXL2-TMS57012
 
 Dining Philosophers Problem (DPP) example for LAUNCHXL2-TMS57012 MCU (Cortex-R, Hercules) with IAR-ARM and TI toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 
 /*##########################################################################*/
@@ -278,11 +278,11 @@ The native (bare-metal) QP/C examples for the "classic" ARM7/ARM9 are as follows
 /*##########################################################################*/
 /*! @page arm7-9_dpp_at91sam7s-ek DPP on AT91SAM7S-EK
 
-@image html bd_AT91SAM7S-EK.jpg AT91SAM7S-EK board
+@image html bd_AT91SAM7S-EK.jpg AT91SAM7S-EK board
 
 Dining Philosophers Problem (DPP) example for Atmel AT91SAM7S MCU (ARM7) with GNU-ARM toolset.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page exa_msp430 MSP430
@@ -300,25 +300,25 @@ The native (bare-metal) QP/C examples for MSP430 are as follows:
 /*##########################################################################*/
 /*! @page msp430_blinky_msp-exp430g2 Blinky on MSP-EXP430G2
 
-@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board
+@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board
 
 Simple Blinky example for MSP-EXP430G2 with CCS-430 and IAR-430 toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page msp430_blinky_msp-exp430f5529lp Blinky on MSP-EXP430F5529LP
 
-@image html bd_MSP-EXP430F5529LP.jpg MSP-EXP430F5529LP board
+@image html bd_MSP-EXP430F5529LP.jpg MSP-EXP430F5529LP board
 
 Simple Blinky example for MSP-EXP430F5529LP with CCS-430 and IAR-430 toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
 /*##########################################################################*/
 /*! @page msp430_dpp_msp-exp430g2 DPP on MSP-EXP430G2
 
-@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board
+@image html bd_MSP-EXP430G2.jpg MSP-EXP430G2 board
 
 DPP example for MSP-EXP430G2 with CCS-430 and IAR-430 toolsets.
 
@@ -333,12 +333,12 @@ qspy -cCOM_PORT -b9600 -O2 -F2 -E1 -P1 -B1
 
 where `COM_PORT` denotes the Virtual COM port, which you can find out in the Device Manager (see the screen shot below):
 
-@image html com_msp-exp430g2.png Virtual COM port of the MSP-EXP430G2 board
+@image html com_msp-exp430g2.png Virtual COM port of the MSP-EXP430G2 board
 
 @note
 To receive the QS data over the Virtual COM Port, you need to make sure that the jumper J3 on the MSP-EXP430G2 board is configured for the "Hardware UART" (the first two jumpers should be in the horizontal setting, as shown in the picture of the MSP-EXP430G2 board on top of this page.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 */
-
+
 } // namespace QP

doxygen/exa_os.dox

@@ -1,66 +1,66 @@
 /*! @page exa_os Examples for Third-Party OS
 
 - @subpage exa_posix "POSIX"
-- @subpage exa_win32
+- @subpage exa_win32
-- @subpage exa_win32-qv
+- @subpage exa_win32-qv
 
-@next{exa_posix}
+@next{exa_posix}
 */
 /*##########################################################################*/
 /*! @page exa_posix POSIX (Linux, VxWorks, QNX, INTEGRITY, etc.)
 
-<p>The <span class="img folder">examples/posix</span> folder contains the following examples:
+<p>The <span class="img folder">examples/posix</span> folder contains the following examples:
-</p>
+</p>
-
-- <span class="img folder">blinky</span> Simple "Blinky" (command-line)
-- <span class="img folder">dpp</span> DPP (command-line)
-- <span class="img folder">qmsmtst</span> Test State Machine based on QP::QMsm with QM model
-- <span class="img folder">qhsmtst</span> Test State Machine based on QP::QHsm with QM model
 
-@next{exa_win32}
+- <span class="img folder">blinky</span> Simple "Blinky" (command-line)
+- <span class="img folder">dpp</span> DPP (command-line)
+- <span class="img folder">qmsmtst</span> Test State Machine based on QP::QMsm with QM model
+- <span class="img folder">qhsmtst</span> Test State Machine based on QP::QHsm with QM model
+
+@next{exa_win32}
 */
-
+
-/*##########################################################################*/
+/*##########################################################################*/
-/*! @page exa_win32 Win32 API (Windows)
+/*! @page exa_win32 Win32 API (Windows)
-
+
-<p>The <span class="img folder">examples/win32</span> folder contains all examples described in the book <a class="extern" target="_blank" href="http://www.state-machine.com/psicc2" >Practical UML Statecharts in C/C++, 2nd Edition</a>. These examples include:
+<p>The <span class="img folder">examples/win32</span> folder contains all examples described in the book <a class="extern" target="_blank" href="https://www.state-machine.com/psicc2" >Practical UML Statecharts in C/C++, 2nd Edition</a>. These examples include:
-</p>
+</p>
-
+
-- <span class="img folder">blinky</span> Simple "Blinky" for Windows (command line)
+- <span class="img folder">blinky</span> Simple "Blinky" for Windows (command line)
-- <span class="img folder">calc</span> Calculator example from Chapter 2 of PSiCC2
+- <span class="img folder">calc</span> Calculator example from Chapter 2 of PSiCC2
-- <span class="img folder">comp</span> Orthogonal Component design pattern
+- <span class="img folder">comp</span> Orthogonal Component design pattern
-- <span class="img folder">comp_qm</span> Orthogonal Component with QM model design pattern
+- <span class="img folder">comp_qm</span> Orthogonal Component with QM model design pattern
-- <span class="img folder">defer</span> Deferred Event design pattern
+- <span class="img folder">defer</span> Deferred Event design pattern
-- <span class="img folder">dpp</span> DPP (command-line)
+- <span class="img folder">dpp</span> DPP (command-line)
-- <span class="img folder">dpp-gui</span> DPP (with GUI on Windows)
+- <span class="img folder">dpp-gui</span> DPP (with GUI on Windows)
-- <span class="img folder">game-gui</span> "Fly 'n' Shoot" game from Chapter 1 of PSiCC2
+- <span class="img folder">game-gui</span> "Fly 'n' Shoot" game from Chapter 1 of PSiCC2
-- <span class="img folder">history_qhsm</span> Transition-to-History (with ::QHsm class)
+- <span class="img folder">history_qhsm</span> Transition-to-History (with ::QHsm class)
-- <span class="img folder">history_qmsm</span> Transition-to-History (with ::QMsm class)
+- <span class="img folder">history_qmsm</span> Transition-to-History (with ::QMsm class)
-- <span class="img folder">qmsmtst</span> Test State Machine based on ::QMsm with QM model
+- <span class="img folder">qmsmtst</span> Test State Machine based on ::QMsm with QM model
-- <span class="img folder">qhsmtst</span> Test State Machine based on ::QHsm with QM model
+- <span class="img folder">qhsmtst</span> Test State Machine based on ::QHsm with QM model
-- <span class="img folder">reminder</span> Reminder design pattern from Chapter 5 of PSiCC2
+- <span class="img folder">reminder</span> Reminder design pattern from Chapter 5 of PSiCC2
 - <span class="img folder">reminder</span> Reminder design pattern different version
 
 @sa
-- @ref exa_win32-qv
+- @ref exa_win32-qv
-- @ref win32
+- @ref win32
 
-@next{exa_win32-qv}
+@next{exa_win32-qv}
-*/
+*/
-
+
-/*##########################################################################*/
+/*##########################################################################*/
-/*! @page exa_win32-qv Win32-QV (Windows)
+/*! @page exa_win32-qv Win32-QV (Windows)
-
+
-<p>The <span class="img folder">examples/win32-qv</span> folder contains examples for Win32 API with the cooperative QV kernel. In the Win32-QV port all active objects share only one Win32 thread and are scheduled exactly as in the \ref comp_qv "cooperative QV kernel". The following examples are provided:
+<p>The <span class="img folder">examples/win32-qv</span> folder contains examples for Win32 API with the cooperative QV kernel. In the Win32-QV port all active objects share only one Win32 thread and are scheduled exactly as in the \ref comp_qv "cooperative QV kernel". The following examples are provided:
 </p>
-
+
-- <span class="img folder">dpp</span> DPP (command-line)
+- <span class="img folder">dpp</span> DPP (command-line)
-- <span class="img folder">game-gui</span> "Fly 'n' Shoot" game from Chapter 1 of PSiCC2
+- <span class="img folder">game-gui</span> "Fly 'n' Shoot" game from Chapter 1 of PSiCC2
 
 @note
-All examples for @ref exa_win32 will also work with the @ref win32-qv "Win32-QV port" without any modifications to the source code, because @ref win32-qv "Win32-QV port" is designed as a drop-in replacement for the standard @ref win32 "Win32 port". To build the examples with @ref win32-qv "Win32-QV port" you merely need to include <span class="img folder">ports/win32-qv</span> instead of <span class="img folder">ports/win32</span> and you need to link the @ref win32-qv "Win32-QV" QP library.  
+All examples for @ref exa_win32 will also work with the @ref win32-qv "Win32-QV port" without any modifications to the source code, because @ref win32-qv "Win32-QV port" is designed as a drop-in replacement for the standard @ref win32 "Win32 port". To build the examples with @ref win32-qv "Win32-QV port" you merely need to include <span class="img folder">ports/win32-qv</span> instead of <span class="img folder">ports/win32</span> and you need to link the @ref win32-qv "Win32-QV" QP library.
 
 @sa
-- @ref exa_win32
+- @ref exa_win32
-- @ref win32-qv
+- @ref win32-qv
 */

doxygen/exa_rtos.dox

@@ -36,7 +36,7 @@ You can hover the mouse cursor over the <span class="board"></span>&nbsp;&nbsp;
 
 The @ref dpp "DPP example" for embOS on STM32F4-Discovery board is located directory <span class="img folder">examples/embos/arm-cm/dpp_stm32f429-discovery</span>.
 
-@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board
+@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board
 
 The sub-directory <span class="img folder">iar</span> contains the workspace and project file that you can open in IAR EWARM IDE.
 
@@ -57,7 +57,7 @@ VDD                | VCC
 GND                | GND
 </center>
 
-@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter 
+@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter
 
 The output is generated at 115200 baud rate.
 
@@ -90,7 +90,7 @@ You can hover the mouse cursor over the <span class="board"></span>&nbsp;&nbsp;
 
 The @ref dpp "DPP example" for ThreadX on STM32F4-Discovery board is located directory <span class="img folder">examples/threadx/arm-cm/dpp_stm32f429-discovery</span>.
 
-@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board
+@image html bd_STM32F4-Discovery.jpg STM32F4-Discovery board
 
 The sub-directory <span class="img folder">iar</span> contains the workspace and project file that you can open in IAR EWARM IDE.
 
@@ -115,7 +115,7 @@ VDD                | VCC
 GND                | GND
 </center>
 
-@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter 
+@image html bd_STM32F4-Discovery_RS232.jpg STM32F4-Discovery board connected to RS232 level shifter
 
 The output is generated at 115200 baud rate.
 
@@ -129,7 +129,7 @@ The actual COM port number might be different on your Windows machine. Please ch
 
 @next{exa_ti-rtos examples}
 */
-
+
 /*##########################################################################*/
 /*! @page exa_ti-rtos TI-RTOS
 @htmlonly
@@ -164,10 +164,10 @@ You can hover the mouse cursor over the <span class="board"></span>&nbsp;&nbsp;
 
 The @ref dpp "DPP example" for TI-RTOS on EK-TM4C123GXL board is located directory <span class="img folder">examples/ti-rtos/arm-cm/dpp_ek-tm4c123gxl</span>.
 
-@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
+@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
 
-@attention
+@attention
-The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the <span class="img folder">3rd_party/</span> directory in the QP/C++ distribution. Therefore, you need to **download and install TI-RTOS** on your machine before you can build any examples (preferably in the default location <span class="img folder">C:/TI</span>). Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: <a href="http://www.ti.com/lit/ug/spruhu5d/spruhu5d.pdf" target="_blank" class="extern">SPRUHU5D</a>) for more information.
+The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the <span class="img folder">3rd_party/</span> directory in the QP/C++ distribution. Therefore, you need to **download and install TI-RTOS** on your machine before you can build any examples (preferably in the default location <span class="img folder">C:/TI</span>). Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: <a href="http://www.ti.com/lit/ug/spruhu5d/spruhu5d.pdf" target="_blank" class="extern">SPRUHU5D</a>) for more information.
 
 The sub-directory <span class="img folder">ccs</span> contains the project files that you can **import** into the TI CCS IDE.
 
@@ -334,22 +334,22 @@ You can hover the mouse cursor over the <span class="board"></span>&nbsp;&nbsp;
 /*##########################################################################*/
 /*! @page ucos-ii_dpp_ek-tm4c123gxl DPP on EK-TM4C123GXL
 
-@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
+@image html bd_EK-TM4C123GXL.jpg EK-TM4C123GXL board
 
 DPP example for Texas Instruments TivaC123GXL MCU (Cortex-M4F) and IAR EWARM toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
 @next{exa_os examples}
 */
 /*##########################################################################*/
 /*! @page ucos-ii_dpp_nucleo-l152re DPP on NUCLEO-L152RE
 
-@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board
+@image html bd_nucleo-l152re.jpg NUCLEO-L152RE board
 
 DPP example for Texas Instruments STM32 L152RET6 MCU (Cortex-M3) and IAR EWARM toolsets.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
 @next{exa_os examples}
 */

doxygen/gs.dox

@@ -37,16 +37,16 @@ When the *Tree View* is **unlinked** from the Current Topic, the *Tree View* wil
 
 ------------------------------------------------------------------------------
 @section gs_an Getting Started with QP/C App Note
-The Quantum Leaps Application Note <a class="extern" target="_blank" href="http://www.state-machine.com/doc/AN_Getting_Started_with_QPC.pdf"><strong>Getting Started with QP/C</strong></a> provides step-by-step instructions on how to download, install, and get started with QP/C quickly. The application note also contains a **QP/C Tutorial**, in which you build a simple "Blinky" application.
+The Quantum Leaps Application Note <a class="extern" target="_blank" href="https://www.state-machine.com/doc/AN_Getting_Started_with_QPC.pdf"><strong>Getting Started with QP/C</strong></a> provides step-by-step instructions on how to download, install, and get started with QP/C quickly. The application note also contains a **QP/C Tutorial**, in which you build a simple "Blinky" application.
 
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_Getting_Started_with_QPC.pdf"><img border="0" src="img/AN_Getting_Started_with_QPC.jpg" title="Download PDF"></a>
+<a target="_blank" href="https://www.state-machine.com/doc/AN_Getting_Started_with_QPC.pdf"><img border="0" src="img/AN_Getting_Started_with_QPC.jpg" title="Download PDF"></a>
 <div class="caption">
 Application Note: Getting Started with QP/C
 </div>
 </div>
 @endhtmlonly
-
+
-@next{struct}
+@next{struct}
-*/
+*/

doxygen/img/img.htm

@@ -4,38 +4,39 @@
 <head>
 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
 <title>QP built-in images</title>
-
+
-<img src="AN.jpg">
+<img src="AN.jpg">
-<img src="AN_Coding_Standard.jpg">
+<img src="AN_Coding_Standard.jpg">
-<img src="AN_Getting_Started_with_QPC.jpg">
+<img src="AN_Getting_Started_with_QPC.jpg">
-<img src="AN_MISRA-QPC.jpg">
+<img src="AN_MISRA-QPC.jpg">
-<img src="AN_OOP_in_C.gif">
+<img src="AN_OOP_in_C.gif">
-<img src="AN_Active_Objects_for_Embedded.jpg">
+<img src="AN_Active_Objects_for_Embedded.jpg">
-<img src="AN_Crash_Course_in_UML_State_Machines.gif">
+<img src="AN_Crash_Course_in_UML_State_Machines.gif">
-<img src="tree-view_linked.png">
+<img src="tree-view_linked.png">
-<img src="tree-view_unlinked.png">
+<img src="tree-view_unlinked.png">
-<img src="logo_qp.gif">
+<img src="logo_qp.gif">
-<img src="board.png">
+<img src="logo_qwin.jpg">
-<img src="checkboxoff.png">
+<img src="board.png">
-<img src="checkboxon.png">
+<img src="checkboxoff.png">
-<img src="extern.png">
+<img src="checkboxon.png">
-<img src="file.png">
+<img src="extern.png">
-<img src="file_doc.png">
+<img src="file.png">
-<img src="file_h.png">
+<img src="file_doc.png">
-<img src="file_c.png">
+<img src="file_h.png">
-<img src="file_cpp.png">
+<img src="file_c.png">
-<img src="file_tcl.png">
+<img src="file_cpp.png">
-<img src="file_wish.png">
+<img src="file_tcl.png">
-<img src="folder.png">
+<img src="file_wish.png">
-<img src="forbidden.png">
+<img src="folder.png">
-<img src="header_bg.png">
+<img src="forbidden.png">
-<img src="img.htm">
+<img src="header_bg.png">
-<img src="minus.png">
+<img src="img.htm">
-<img src="model.png">
+<img src="minus.png">
-<img src="movie.png">
+<img src="model.png">
-<img src="qp_link.png">
+<img src="movie.png">
-<img src="radiooff.png">
+<img src="qp_link.png">
-<img src="radioon.png">
+<img src="radiooff.png">
-
+<img src="radioon.png">
+
 </body>
 </html>

doxygen/main.dox

@@ -1,14 +1,15 @@
 /*! @mainpage About QP/C™
 
-@tableofcontents
+@image html qp_banner.jpg
 
 @section ab_about What is it?
-<a class="extern" target="_blank" href="http://www.state-machine.com/products/"><strong>QP/C&trade; (Quantum Platform in C)</strong></a> is a lightweight, open source <a class="extern" target="_blank" href="http://www.state-machine.com/doc/concepts.html#Framework"><strong>active object (actor) framework</strong></a> for building responsive and modular real-time embedded applications as systems of asynchronous event-driven <a class="extern" target="_blank" href="http://www.state-machine.com/doc/concepts.html#Active"><strong>active objects</strong></a> (<a href="http://en.wikipedia.org/wiki/Actor_model">actors</a>). The QP/C&trade; framework is a member of a larger family consisting of QP/C, <a href="http://www.state-machine.com/qpcpp" target="_blank" class="extern">QP/C++</a>, and <a href="http://www.state-machine.com/qpn" target="_blank" class="extern">QP-nano</a> frameworks, which are all strictly quality controlled, thoroughly documented, and available under @ref licensing "dual licensing model".
+<a class="extern" target="_blank" href="https://state-machine.com/products/"><strong>QP/C&trade; (Quantum Platform in C)</strong></a> is a lightweight, open source <a class="extern" target="_blank" href="https://state-machine.com/doc/concepts#Framework"><strong>active object (actor) framework</strong></a> for building modern,
+<a href="https://en.wikipedia.org/wiki/Reactive_programming" target="_blank" class="extern">reactive</a>, real-time embedded applications as systems of asynchronous event-driven <a class="extern" target="_blank" href="https://state-machine.com/doc/concepts#Active"><strong>active objects</strong></a> (<a href="http://en.wikipedia.org/wiki/Actor_model">actors</a>). The QP/C&trade; framework is a member of a larger family consisting of QP/C, <a href="https://state-machine.com/qpcpp" target="_blank" class="extern">QP/C++</a>, and <a href="https://state-machine.com/qpn" target="_blank" class="extern">QP-nano</a> frameworks, which are all strictly quality controlled, thoroughly documented, and available under @ref licensing "dual licensing model".
 
-The behavior of active objects is specified in QP/C by means of hierarchical state machines (UML statecharts). The framework supports manual coding of UML state machines in C as well as automatic code generation by means of the free <a href="http://www.state-machine.com/qm">QM&trade; modeling tool</a>.
+The behavior of active objects is specified in QP/C by means of <a href="https://state-machine.com/doc/concepts#HSM" target="_blank" class="extern"><strong>hierarchical state machines</strong></a> (UML statecharts). The framework supports manual coding of UML state machines in C as well as automatic code generation by means of the free <a href="https://state-machine.com/qm"><strong>QM&trade; modeling tool</strong></a>.
 
 @attention
-To use QP/C&trade; effectively, you need to understand the <a href="http://www.state-machine.com/doc/concepts.html" target="_blank" class="extern"><strong>key concepts</strong></a> that underline the architecture of the framework and your applications based on the framework.
+To use QP/C&trade; effectively, you need to understand the <a href="https://state-machine.com/doc/concepts" target="_blank" class="extern"><strong>key concepts</strong></a> that underline the architecture of the framework and your applications based on the framework.
 
 <div style="clear:both"></div>
 
@@ -20,20 +21,20 @@ To use QP/C&trade; effectively, you need to understand the <a href="http://www.s
 
 @section ab_goals What does it do?
 The main goals of the QP/C&trade; framework are:
-- to provide a reusable **architecture** based on <a class="extern" target="_blank" href="http://www.state-machine.com/doc/concepts.html#Framework">active objects (actors)</a>, which is _safer_ and easier to understand than "free-threading" with a traditional RTOS.
+- to provide a reusable event-driven **architecture** based on <a class="extern" target="_blank" href="https://state-machine.com/doc/concepts#Framework">active objects (actors)</a>, which is inherently **safer**, more extensible, and easier to understand than the usual _shared-state concurrency_ based on a traditional Real-Time Operating System (RTOS).
-- to provide a simple-to-use coding techniques for <a class="extern" target="_blank" href="http://www.state-machine.com/doc/concepts.html#HSM">hierarchical state machines</a>, with which to implement the behavior of active objects.
+- to provide a simple-to-use coding techniques for <a class="extern" target="_blank" href="https://state-machine.com/doc/concepts#HSM">hierarchical state machines</a>, with which to implement the behavior of active objects.
-- to provide efficient and thread-safe event-driven mechanisms for active objects to communicate, such as direct event passing and publish-subscribe.
+- to provide efficient and thread-safe asynchronous mechanisms for active objects to communicate, such as direct event passing and publish-subscribe.
 - to provide event-driven timing services (time events).
 - to provide a selection of built-in real-time kernels to run the QP applications, such as the cooperative @ref qv "QV kernel", the preemptive non-blocking @ref qk "QK kernel", and the preemptive blocking @ref qxk "QXK kernel".
-- to provide testing support for applications based on software tracing (@ref qs "Q-Spy").
+- to provide **unit testing** support for applications based on software tracing (<a href="https://state-machine.com/qtools/qutest.html"><strong>QUTest&trade;</strong></a>).
 - to provide portability layer and ready-to-use ports to @ref ports_rtos "3rd-party RTOSes" and desktop operating systems such as @ref posix "Linux" and @ref win32 "Windows".
-- to provide a target for modeling and automatic code generation from the <a href="http://www.state-machine.com/qm" target="_blank" class="extern">QM modeling tool</a>.
+- to provide a target for modeling and automatic code generation from the <a href="https://state-machine.com/qm" target="_blank" class="extern"><strong>QM&trade; modeling tool</strong></a>.
 
 
 ------------------------------------------------------------------------------
 @section ab_special What's special about it?
 
-The QP/C&trade; framework is a unique offering on the embedded software market. It provides a modern, reusable **architecture** of embedded applications, which combines object-orientation with the particular model of concurrency, known as <a class="extern" target="_blank" href="http://www.state-machine.com/doc/concepts.html#Active"><strong>active objects</strong></a> (actors). This architecture is generally **safer**, more responsive and easier to understand than "free threading" with a traditional Real-Time Operating System (RTOS). It also provides high enough level of abstraction and the right abstractions to effectively apply modeling and code generation to deeply embedded systems.
+The QP/C&trade; framework is a unique offering on the embedded software market. It provides a modern, reusable **architecture** of embedded applications, which combines object-orientation with the particular model of concurrency, known as <a class="extern" target="_blank" href="https://state-machine.com/doc/concepts#Active"><strong>active objects</strong></a> (actors). This architecture is generally **safer**, more responsive and easier to understand than "free threading" with a traditional Real-Time Operating System (RTOS). It also provides higher level of abstraction and the right abstractions to effectively apply modeling and code generation to deeply embedded systems.
 
 
 <div class="separate"></div>
@@ -41,11 +42,11 @@ The QP/C&trade; framework is a unique offering on the embedded software market.
 Even though it is written in @ref misra "MISRA-compliant" ANSI-C, QP/C&trade; is fundamentally an **object-oriented** framework, which means that the framework itself and your applications derived from the framework are fundamentally composed of <a href="https://en.wikipedia.org/wiki/Class_(computer_programming)" target="_blank" class="extern">classes</a> and only classes can have @ref sm "state machines" associated with them.<br>
 
 @note
-If you program in C and object-oriented programming is new to you, please refer to the Application Note <a class="pdf" target="_blank" href="http://www.state-machine.com/doc/AN_Simple_OOP_in_C.pdf">"Simple Object-Oriented Programming in C"</a>, which describes how you can implement the concepts of _classes_, _inheritance_, and _polymorphism_ to portable ANSI-C.
+If you program in C and object-oriented programming is new to you, please refer to the Application Note <a class="pdf" target="_blank" href="https://state-machine.com/doc/AN_Simple_OOP_in_C.pdf">"Simple Object-Oriented Programming in C"</a>, which describes how you can implement the concepts of _classes_, _inheritance_, and _polymorphism_ to portable ANSI-C.
 <br>
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_OOP_in_C.pdf"><img border="0" src="img/AN_OOP_in_C.gif" title="Download PDF"></a>
+<a target="_blank" href="https://state-machine.com/doc/AN_OOP_in_C.pdf"><img border="0" src="img/AN_OOP_in_C.gif" title="Download PDF"></a>
 <div class="caption">
 Application Note: Object-Oriented Programming in C
 </div>
@@ -54,80 +55,79 @@ Application Note: Object-Oriented Programming in C
 
 
 <div class="separate"></div>
-@subsection lightweight Lightweight
+@subsection lightweight Lightweight
 The most unique characteristic of the QP/C&trade; framework is its very small footprint, especially in RAM. In this respect, QP/C&trade; requires less resources than even the smallest conventional Real-Time Operating System (RTOS) kernel. At the same time, QP gives you a much higher level of abstraction than a conventional RTOS. With QP, you work at the level of active objects, state machines and events, as opposed to "naked" threads of an RTOS.
 
 
 <div class="separate"></div>
-@subsection hsms Hierarchical State Machines
+@subsection hsms Hierarchical State Machines
 The behavior of active objects is specified in QP by means of
-<a class="extern" target="_blank" href="http://www.state-machine.com/doc/concepts.html#HSM">hierarchical state machines (UML statecharts)</a>. The frameworks support manual coding of UML state machines in C or C++ as well as fully automatic code generation by means of the free graphical <a class="extern" target="_blank" href="http://www.state-machine.com/qm">QM&trade; modeling tool</a>.
+<a class="extern" target="_blank" href="https://state-machine.com/doc/concepts#HSM">hierarchical state machines (UML statecharts)</a>. The frameworks support manual coding of UML state machines in C or C++ as well as fully automatic code generation by means of the free graphical <a class="extern" target="_blank" href="https://state-machine.com/qm">QM&trade; modeling tool</a>.
 
 
 <div class="separate"></div>
-@subsection kernels Built-in Kernels
+@subsection kernels Built-in Kernels
 The QP&trade;/C framework can run on @ref exa_native "bare-metal single-chip microcontrollers", completely replacing a traditional RTOS. The framework contains a selection of built-in real-time kernels, such as the cooperative @ref qv "QV kernel", the preemptive non-blocking @ref qk "QK kernel", and the preemptive, dual-mode, blocking @ref qxk "QXK kernel". The QXK kernel <span class="highlight">provides all the features you might expect from a traditional <strong>RTOS kernel</strong></span> and has been specifically designed for mixing event-driven active objects with traditional blocking code, such as commercial middleware (TCP/IP stacks, UDP stacks, embedded file systems, etc.) or legacy software. @ref ports_native "Native QP ports" and ready-to-use @ref exa_native "examples" are provided for major @ref exa_ref_mcu "CPU families".
 
 
 <div class="separate"></div>
-@subsection inter Interoperability
+@subsection inter Interoperability
 QP/C can also work with many traditional @ref exa_rtos "RTOSes" and @ref exa_rtos "desktop OSes" (such as Windows and Linux).
 
 
 <div class="separate"></div>
-@subsection popular Popularity &amp; Maturity
+@subsection popular Popularity &amp; Maturity
-With over 15 years of continuous development and <a class="extern" target="_blank" href="https://sourceforge.net/projects/qpc/files/stats/timeline?dates=2016-01-01+to+2016-12-31">60,000 downloads a year</a>, the QP&trade; framework family is the most mature and popular such solution on the embedded software market.
+With over 15 years of continuous development and <a class="extern" target="_blank" href="https://sourceforge.net/projects/qpc/files/stats/timeline?dates=2016-01-01+to+2016-12-31">60,000 downloads a year</a>, the QP&trade; framework family is the most mature and popular such solution on the embedded software market.
 
-The QP&trade; frameworks are used in <a href="http://www.state-machine.com/about/customers.html" target="_blank" class="extern">millions of products worldwide</a> in aerospace, medical devices, consumer electronics, wired and wireless telecommunications, industrial automation, transportation, robotics, and many more.
+The QP&trade; frameworks are used in <a href="https://state-machine.com/about/customers" target="_blank" class="extern">millions of products worldwide</a> in aerospace, medical devices, consumer electronics, wired and wireless telecommunications, industrial automation, transportation, robotics, and many more.
 
 
 <div class="separate"></div>
 @subsection psicc2 Book
-The book, <a class="extern" target="_blank" href="http://www.state-machine.com/psicc2" ><strong>Practical UML Statecharts in C/C++, 2nd Edition</strong></a> provides a detailed design study of the QP frameworks and explains all the related concepts.
+The book, <a class="extern" target="_blank" href="https://state-machine.com/psicc2" ><strong>Practical UML Statecharts in C/C++, 2nd Edition</strong></a> provides a detailed design study of the QP frameworks and explains all the related concepts.
 
-@image html PSiCC2-3D.jpg "Practical UML Statecharts in C/C++, 2nd Edition"
+@image html PSiCC2-3D.jpg "Practical UML Statecharts in C/C++, 2nd Edition"
 
-
+
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
-@section licensing How is it licensed?
+@section licensing How is it licensed?
-
+
-QP/C is licensed under the increasingly popular <a class="extern" target="_blank" href="http://www.state-machine.com/licensing">dual licensing model</a>, in which both the open source software distribution mechanism and traditional closed source software distribution models are combined.
+QP/C is licensed under the increasingly popular <a class="extern" target="_blank" href="https://state-machine.com/licensing">dual licensing model</a>, in which both the open source software distribution mechanism and traditional closed source software distribution models are combined.
-
+
-@note If your company has a policy forbidding open source in your product, all QP frameworks can be licensed commercially, in which case you don't use any open source license and you do not violate your policy.
+@note If your company has a policy forbidding open source in your product, all QP frameworks can be licensed commercially, in which case you don't use any open source license and you do not violate your policy.
 
 
 <div class="separate"></div>
-@subsection open-source Open Source Projects
+@subsection open-source Open Source Projects
-If you are developing and distributing open source applications under the GNU General Public License (GPL), as published by the Free Software Foundation, then you are free to use the Quantum Leaps software under the <a class="extern" target="_blank" href="http://www.gnu.org/copyleft/gpl.html">GPL version 3</a> of the License, or (at your option) any later version. Please note that GPL requires that all modifications to the original code as well as your application code (Derivative Works as defined in the Copyright Law) must also be released under the terms of the GPL open source license.
+If you are developing and distributing open source applications under the GNU General Public License (GPL), as published by the Free Software Foundation, then you are free to use the Quantum Leaps software under the <a class="extern" target="_blank" href="http://www.gnu.org/copyleft/gpl.html">GPL version 3</a> of the License, or (at your option) any later version. Please note that GPL requires that all modifications to the original code as well as your application code (Derivative Works as defined in the Copyright Law) must also be released under the terms of the GPL open source license.
-
+
 
 <div class="separate"></div>
-@subsection closed-source Closed Source Projects
+@subsection closed-source Closed Source Projects
-If you are developing and distributing traditional closed source applications, you can purchase one of <a class="extern" target="_blank" href="http://www.state-machine.com/licensing/index.html#Commercial">Quantum Leaps commercial licenses</a>, which are specifically designed for users interested in retaining the proprietary status of their code. All Quantum Leaps commercial licenses expressly supersede the GPL open source license. This means that when you license Quantum Leaps software under a commercial license, you specifically do not use the software under the open source license and therefore you are not subject to any of its terms. 
+If you are developing and distributing traditional closed source applications, you can purchase one of <a class="extern" target="_blank" href="https://state-machine.com/licensing/#Commercial">Quantum Leaps commercial licenses</a>, which are specifically designed for users interested in retaining the proprietary status of their code. All Quantum Leaps commercial licenses expressly supersede the GPL open source license. This means that when you license Quantum Leaps software under a commercial license, you specifically do not use the software under the open source license and therefore you are not subject to any of its terms.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section help How to get help?
 Please post any **technical questions** to the <a class="extern" target="_blank" href="http://sourceforge.net/p/qpc/discussion/668726"><strong>Free Support Forum</strong></a> hosted on SourceForge.net. Posts to this forum benefit the whole community and are typically answered the same day.
 
 Direct **Commercial Support** is available to the commercial licensees. Every commercial license includes one year of Technical Support for the licensed software. The support term can be extended annually.
-
+
-Training and consulting services are also available from Quantum Leaps. Please refer to the <a class="extern" target="_blank" href="http://www.state-machine.com/contact.html">Contact web-page</a> for more information.
+Training and consulting services are also available from Quantum Leaps. Please refer to the <a class="extern" target="_blank" href="https://state-machine.com/contact">Contact web-page</a> for more information.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
-@section contact Contact Information
+@section ab_help How to get help?
-
-- Quantum Leaps Web site:   <a class="extern" target="_blank" href="http://www.state-machine.com">www.state-machine.com</a>
-
-- Quantum Leaps licensing:  <a class="extern" target="_blank" href="http://www.state-machine.com">www.state-machine.com/licensing</a>
 
-- QP/QM on SourceForge.net: <a class="extern" target="_blank" href="http://sourceforge.net/projects/qpc">sourceforge.net/projects/qpc</a>
+- <a class="extern" target="_blank" class="extern" href="https://sourceforge.net/p/qpc/discussion/668726">Free Support Forum</a>
+- <a class="extern" target="_blank" class="extern" href="https://sourceforge.net/p/qpc/bugs/">Bug Reports</a>
+- <a class="extern" target="_blank" class="extern" href="https://sourceforge.net/p/qpc/feature-requests/">Feature Requests</a>
+- <a class="extern" target="_blank" href="https://state-machine.com">Quantum Leaps website</a>
+- <a class="extern" target="_blank" href="mailto:info@state-machine.com?subject=QP/C">info@state-machine.com</a>@n
 
-- e-mail: <a class="extern" target="_blank" href="mailto:info@state-machine.com">info@state-machine.com</a>
+@image html logo_ql_TM.jpg
 
-@image html logo_ql_TM.jpg
+Copyright &copy; 2002-2017 Quantum Leaps, LLC. All Rights Reserved.@n
-Copyright &copy; 2002-2017 Quantum Leaps, LLC. All Rights Reserved.
 
-@next{gs}
+@next{gs}
-*/
+*/

doxygen/make.bat

@@ -1,8 +1,8 @@
 @echo off
 :: ==========================================================================
 :: Product: QP/C script for generating Doxygen documentation
-:: Last Updated for Version: 5.8.2
+:: Last Updated for Version: 5.9.0
-:: Date of the Last Update:  2017-02-07
+:: Date of the Last Update:  2017-05-03
 ::
 ::                    Q u a n t u m     L e a P s
 ::                    ---------------------------
@@ -29,7 +29,7 @@
 :: along with this program. If not, see <http://www.gnu.org/licenses/>.
 ::
 :: Contact information:
-:: http://www.state-machine.com
+:: https://state-machine.com
 :: mailto:info@state-machine.com
 :: ==========================================================================
 setlocal
@@ -38,7 +38,7 @@ echo usage:
 echo make
 echo make -CHM
 
-set VERSION=5.8.2
+set VERSION=5.9.0
 
 :: Generate Resource Standard Metrics for QP/C ............................... 
 set DOXHOME="C:\tools\doxygen\bin"

doxygen/modules.dox

@@ -5,31 +5,31 @@ Hierarchical Event Processor
 
 QEP is a universal, UML-compliant event processor that enables developers to code UML state machines in highly readable ANSI-C, in which every state machine element is mapped to code precisely, unambiguously, and exactly once (traceability). QEP fully supports hierarchical state nesting, which is the fundamental mechanism for reusing behavior across many states instead of repeating the same actions and transitions over and over again.
 */
-
+
-/*###########################################################################*/
+/*###########################################################################*/
 /*! @defgroup qf QF
 
 @brief
-Active Object (Actor) Framework
+Active Object (Actor) Framework
 
 QF is a portable, event-driven, real-time framework for execution of active objects (concurrent state machines) specifically designed for real-time embedded (RTE) systems.
 */
-
+
-/*###########################################################################*/
+/*###########################################################################*/
 /*! @defgroup qs QS
 
 @brief
-Software Tracing Instrumentation
+Software Tracing Instrumentation
 
 QS is software tracing system that enables developers to monitor live event-driven QP applications with minimal target system resources and without stopping or significantly slowing down the code. QS is an ideal tool for testing, troubleshooting, and optimizing QP applications. QS can even be used to support acceptance testing in product manufacturing.
 */
-
+
-/*###########################################################################*/
+/*###########################################################################*/
-/*! @defgroup qv QV
+/*! @defgroup qv QV
-
+
-@brief
+@brief
-Cooperative Kernel
+Cooperative Kernel
-
+
 @description
 QV is a simple **cooperative** kernel (previously called "Vanilla" kernel). This kernel executes active objects one at a time, with priority-based scheduling performed before processing of each event. Due to naturally short duration of event processing in state machines, the simple QV kernel is often adequate for many real-time systems.
 
@@ -44,14 +44,14 @@ The QV scheduler can also very easily detect when all event queues are empty, at
 
 Given the simplicity, portability, and low-resource consumption, the QV scheduler is very attractive. It allows you to partition the problem into active objects and execute these active objects orderly. The task-level response of this scheduler is the longest RTC step in the whole system, but because event-driven active objects don’t block, the RTC steps tend to be very short (typically just a few microseconds). Also, often you can break up longer RTC steps into shorter pieces, by posting an event to self and returning (“Reminder” state pattern). The self-posted event then triggers the continuation of longer processing.
 
- 
+
-*/
+*/
-
+
-/*###########################################################################*/
+/*###########################################################################*/
 /*! @defgroup qk QK
 
 @brief
-Preemptive Non-Blocking Kernel
+Preemptive Non-Blocking Kernel
 
 QK is a tiny **preemptive**, priority-based, non-blocking kernel designed specifically for executing active objects. QK runs active objects in the same way as prioritized interrupt controller (such as NVIC in ARM Cortex-M) runs interrupts using the single stack (MSP in Cortex-M). Active objects process their events in run-to-completion fashion and remove themselves from the call stack, the same way as nested interrupts. At the same time high-priority active objects can preempt lower-priority active objects, in the same way as interrupts can preempt each other under a prioritized interrupt controller. QK meets all the requirement of the Rate Monotonic Scheduling (a.k.a. Rate Monotonic Analysis RMA) and can be used in hard real-time systems.
 
@@ -63,10 +63,10 @@ Sometimes it is not practical to break up long RTC steps, and consequently the t
 
 */
 
-/*###########################################################################*/
/*! @defgroup qxk QXK
+/*###########################################################################*//*! @defgroup qxk QXK
 
 @brief
-Preemptive Dual-Mode Blocking RTOS Kernel
+Preemptive Dual-Mode Blocking RTOS Kernel
 
 QXK is a small, preemptive, priority-based, dual-mode **blocking** kernel that executes active objects like the @ref qk "QK kernel", but can also execute traditional __blocking__ threads (extended threads). In this respect, QXK behaves exactly as a conventional __RTOS__ (Real-Time Operating System). QXK has been designed specifically for mixing event-driven active objects with traditional blocking code, such as commercial middleware (TCP/IP stacks, UDP stacks, embedded file systems, etc.) or legacy software.
 
@@ -89,14 +89,14 @@ Example illustrates: 6 active objects plus two extended threads, QXK blocking de
 
 ------------------------------------------------------------------------------
 @section qxk_overview QXK Overview
-
+
 QXK distinguishes two kinds of threads: **basic**-threads (non-blocking, run-to-completion activations) and **extended**-threads (blocking, typically structrued as endless loops). The basic-threads all nest on the same stack (Main Stack Pointer in ARM Cortex-M). The extended-threads use private per-thread stacks, as in conventional RTOS kernels. Any switching from basic- to extended-thread or extended- to extended-thread requires full context switch. On the other hand, switching from basic-thread to another basic-thread requires only activation of the basic-thread, which is much simpler and faster.
 
 <div class="separate"></div>
 @subsection qxk_classes Classes in QXK
 The figure below shows the main classes introduced in the QXK kernel and their relation to the classes of the QP framework.
 
-@image html qxk_classes.gif "Classes of the QXK blocking kernel"
+@image html qxk_classes.gif "Classes of the QXK blocking kernel"
 
 <ul class="tag">
   <li><span class="tag">0</span> The abstract ::QActive class represents active objects in QP. This class contains the @c thread object of the underlying kernel (QXK thread-control-block in this case) as well as the event queue and the unique priority of the active object.
@@ -212,7 +212,7 @@ As you can see in the list below, <span class="highlight">QXK provides most feat
 
 */
 
-/*###########################################################################*/
/*! @dir ../include
+/*###########################################################################*//*! @dir ../include
 
 Platform-independent QP/C API
 
@@ -220,7 +220,7 @@ Platform-independent QP/C API
 The QP/C <span class="img folder">include</span> directory needs to be added to the compiler's include path in the applications using QP/C.
 */
 
-/*###########################################################################*/
/*! @dir ../source
+/*###########################################################################*//*! @dir ../source
 
 Platform-independent QP/C implementation
 

doxygen/ports_native.dox

@@ -3,14 +3,14 @@
 
 - @subpage lint (generic C compiler)
 - @subpage arm-cm (Cortex-M0/M0+/M3/M4/M4F)
-    - @ref arm-cm_qv  (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets)
+    - @ref arm-cm_qv  (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets)
     - @ref arm-cm_qk  (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets)
     - @ref arm-cm_qxk (ARM-KEIL, GNU-ARM, IAR-ARM, TI-CCS toolsets)
 - @subpage arm-cr (Cortex-R)
-    - @ref arm-cr_qv (GNU-ARM, IAR-ARM, TI-CCS toolsets)
+    - @ref arm-cr_qv (GNU-ARM, IAR-ARM, TI-CCS toolsets)
     - @ref arm-cr_qk (GNU-ARM, IAR-ARM, TI-CCS toolsets)
 - @subpage arm7-9 ("classic" ARM)
-    - @ref arm7-9_qv (GNU-ARM, IAR-ARM toolsets)
+    - @ref arm7-9_qv (GNU-ARM, IAR-ARM toolsets)
     - @ref arm7-9_qk (GNU-ARM, IAR-ARM toolsets)
 - @subpage msp430 ("classic" MSP430 and "extended" MSP430X)
     - @ref msp430_qv (TI-CCS, IAR toolsets)
@@ -20,20 +20,20 @@
 /*##########################################################################*/
 /*! @page lint PC-Lint
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
 */
-/*##########################################################################*/
+/*##########################################################################*/
-/*! @page arm-cm ARM Cortex-M
+/*! @page arm-cm ARM Cortex-M
-
+
 ------------------------------------------------------------------------------
-@section arm-cm_qv Cooperative QV Kernel
+@section arm-cm_qv Cooperative QV Kernel
-The QV port to ARM Cortex-M has been described in detail in Section 3 of the Quantum Leaps Application Note: <a href="http://www.state-machine.com/doc/AN_QP_and_ARM-Cortex-M-ARM-KEIL.pdf" target="_blank" class="extern" title="Read PDF">QP and ARM Cortex-M with ARM-KEIL</a>. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM.
+The QV port to ARM Cortex-M has been described in detail in Section 3 of the Quantum Leaps Application Note: <a href="https://www.state-machine.com/doc/AN_QP_and_ARM-Cortex-M-ARM-KEIL.pdf" target="_blank" class="extern" title="Read PDF">QP and ARM Cortex-M with ARM-KEIL</a>. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section arm-cm_qk Preemptive Non-Blocking QK Kernel
-The QK port to ARM Cortex-M has been described in detail in Section 4 of the Quantum Leaps Application Note: <a href="http://www.state-machine.com/doc/AN_QP_and_ARM-Cortex-M-ARM-KEIL.pdf" target="_blank" class="extern" title="Read PDF">QP and ARM Cortex-M with ARM-KEIL</a>. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM.
+The QK port to ARM Cortex-M has been described in detail in Section 4 of the Quantum Leaps Application Note: <a href="https://www.state-machine.com/doc/AN_QP_and_ARM-Cortex-M-ARM-KEIL.pdf" target="_blank" class="extern" title="Read PDF">QP and ARM Cortex-M with ARM-KEIL</a>. The Application Note focuses on the ARM-KEIL toolset, but the general principles apply to all supported toolsets, such as IAR-ARM, GNU-ARM, and TI-ARM.
 
 
 ------------------------------------------------------------------------------
@@ -54,7 +54,7 @@ The preemptive, blocking QXK kernel works on ARM Cortex-M as follows:
 @n
 > NOTE: Right before starting multitasking, the QXK kernel re-uses the main C-stack as the Main Stack (for interrupts and exceptions), and assigns the provided idle stack to the internal idle thread.
 
-5. You need to explicitly **assign priorities of the all interrupts** used in your application, according to the Application Note: <a href="http://www.state-machine.com/doc/AN_ARM-Cortex-M_Interrupt-Priorities.pdf" target="_blank" class="extern" title="Read PDF">Setting ARM Cortex-M Interrupt Priorities in QP 5.1 and Higher</a>.
+5. You need to explicitly **assign priorities of the all interrupts** used in your application, according to the Application Note: <a href="https://www.state-machine.com/doc/AN_ARM-Cortex-M_Interrupt-Priorities.pdf" target="_blank" class="extern" title="Read PDF">Setting ARM Cortex-M Interrupt Priorities in QP 5.1 and Higher</a>.
 
 6. It is strongly recommended that you do not assign the lowest NVIC priority (0xFF) to any interrupt in your application, because it is used by the PendSV handler. For example, with 3 bits of priority implemented in the NVIC, this leaves the following 7 priority levels for you (listed from the lowest to the highest urgency): 0xC0, 0xA0, 0x80, 0x60, 0x40, 0x20, and 0x00 (the highest priority).
 @n
@@ -76,13 +76,13 @@ If you have the Cortex-M4F/M7 CPU and your application is compiled with the VFP
 @note
 A QXK thread (both an active object thread and a "naked" blocking thread) that uses the VFP will use 136 more bytes of its private stack space than a thread that does not use the VFP. Also, a thread that uses the VFP will take longer to perform the context switch.
 
-*/
+*/
 /*##########################################################################*/
 /*! @page arm-cr ARM Cortex-R
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
-@section arm-cr_qk Preemptive QK Kernel 
+@section arm-cr_qk Preemptive QK Kernel
 
 \includelineno ports/arm-cr/qk/iar/qk_port.s
 
@@ -92,9 +92,9 @@ A QXK thread (both an active object thread and a "naked" blocking thread) that u
 /*##########################################################################*/
 /*! @page arm7-9 ARM7/ARM9
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
-@section arm7-9_qk Preemptive QK Kernel 
+@section arm7-9_qk Preemptive QK Kernel
 
 \includelineno ports/arm7-9/qk/iar/qk_port.s
 
@@ -104,10 +104,10 @@ A QXK thread (both an active object thread and a "naked" blocking thread) that u
 /*##########################################################################*/
 /*! @page msp430 MSP430
 
-@image html under_construction.jpg
+@image html under_construction.jpg
+
+@section msp430_qk Preemptive QK Kernel
 
-@section msp430_qk Preemptive QK Kernel 
-
 @section msp430_qv Cooperative QV Kernel
 
 */

doxygen/ports_os.dox

@@ -2,25 +2,25 @@
 /*! @page ports_os Ports to Third-Party OS
 
 - @subpage posix (Linux, embedded-Linux, BSD, etc.)
-- @subpage win32 API (Windows)
+- @subpage win32 API (Windows)
-- @subpage win32-qv (Windows with QV)
+- @subpage win32-qv (Windows with QV)
 
 */
 /*##########################################################################*/
 /*! @page posix POSIX
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
 */
-/*##########################################################################*/
+/*##########################################################################*/
-/*! @page win32 Win32 API (Windows)
+/*! @page win32 Win32 API (Windows)
 
-@image html under_construction.jpg
+@image html under_construction.jpg
-
-*/
-/*##########################################################################*/
-/*! @page win32-qv Win32-QV (Windows with QV)
 
-@image html under_construction.jpg
+*/
-
+/*##########################################################################*/
-*/
+/*! @page win32-qv Win32-QV (Windows with QV)
+
+@image html under_construction.jpg
+
+*/

doxygen/ports_rtos.dox

@@ -1,34 +1,41 @@
 /*##########################################################################*/
 /*! @page ports_rtos Ports to Third-Party RTOS
 
-The main purpose of integrating QP/C with conventional RTOSes is to enable you to incorporate various communication stacks (TCP/IP, USB, CAN, etc.) as well as other middleware, which requires the ability to **block** the task code.
+<p>The most important reason why you might consider using a traditional RTOS kernel for executing event-driven QP/C applications is compatibility with the existing software. For example, most communication stacks (TCP/IP, USB, CAN, etc.) are designed for a traditional **blocking** kernel. In addition, a lot of legacy code requires blocking mechanisms, such as semaphores or time-delays. A conventional RTOS allows you to run the existing software components as regular "blocking" tasks in parallel to the event-driven QP/C application.
+</p>
+
+Another reason you might be interested in running QP/C on top of a conventional RTOS is **safety certification**, which your RTOS kernel might have but the built-in QP kernels currently don't provide.
+
+@note
+You do **not** need to use a traditional RTOS just to achieve preemptive multitasking with QP. The @ref comp_qk "preemptive QK kernel", available as part of the QP package, supports preemptive priority-based multitasking and is fully compatible with Rate Monotonic Scheduling to achieve guaranteed, hard real-time performance. The preemptive, run-to-completion QK kernel perfectly matches the run-to-completion execution semantics of active objects, yet it is simpler, faster, and more efficient than any traditional blocking kernel.
+
+The QP/C framework can work with virtually any traditional real-time operating
+system (RTOS). The currently supported 3rd-party RTOS kernels are:
 
 - @subpage embos
 - @subpage threadx
 - @subpage ti-rtos
 - @subpage ucos-ii
+- <a href="http://erika.tuxfamily.org/drupal/news/qp-framework-erika-enterprise" target="_blank" class="extern">OSEK/VDX RTOS ERIKA Enterprise</a>
+
+Combined with a conventional RTOS, QP/C takes full advantage of the multitasking capabilities of the RTOS by executing each active object in a separate RTOS task. The QP/C Platform Abstraction Layer (PAL) includes an abstract RTOS interface to enable integration between QP/C and the underlying RTOS. Specifically, the PAL allows adapting most message queue variants as event queues of active objects as well as most memory partitions as QP/C event pools.
 
 @attention
 Starting from version 5.6.0, QP/C includes the conventional, preemptive @ref qxk " blocking QXK kernel", which is recommended as the preferred RTOS kernel for applications that need to mix active objects with traditional blocking code. Due to the tight and optimal integration between QXK and the rest of QP, QXK offers better performance and smaller memory footprint than any @ref ports_rtos "QP port to a 3rd-party RTOS". Additionally, QXK is already included in QP, so you avoid additional licensing costs of 3rd-party kernels.
 
-\n
-@note
-You do **not** need to use a traditional RTOS just to achieve preemptive multitasking with QP. The @ref comp_qk "preemptive QK kernel", available as part of the QP package, supports preemptive priority-based multitasking and is fully compatible with Rate Monotonic Scheduling to achieve guaranteed, hard real-time performance. The preemptive, run-to-completion QK kernel perfectly matches the run-to-completion execution semantics of active objects, yet it is simpler, faster, and more efficient than any traditional blocking kernel.
-
-
 */
 /*##########################################################################*/
 /*! @page embos embOS
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
 */
 /*##########################################################################*/
 /*! @page threadx ThreadX
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
-*/
+*/
 /*##########################################################################*/
 /*! @page ti-rtos TI-RTOS Kernel (SYS/BIOS)
 
@@ -37,9 +44,9 @@ You do **not** need to use a traditional RTOS just to achieve preemptive multita
 @section ti-rtos_about About the QP Port to TI-RTOS
 The <span class="img folder">ports/ti-rtos/</span> directory contains a generic platform-independent QP/C port to <a href="http://processors.wiki.ti.com/index.php/Category:SYSBIOS" target="_blank" class="extern">TI-RTOS kernel (SYS/BIOS)</a>. The provided QP port to TI-RTOS has been designed *generically* to rely exclusively on the existing TI-RTOS API. This means that the port should run without changes on any CPU/compiler platform supported by TI-RTOS.
 
-@attention
+@attention
-The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the <span class="img folder">3rd_party/</span> directory in the QP/C distribution. Therefore, you need to **download and install** TI-RTOS on your machine before you can build any examples. Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: <a href="http://www.ti.com/lit/ug/spruhu5d/spruhu5d.pdf" target="_blank" class="extern">SPRUHU5D</a>) for more information.
+The TI-RTOS requires its own tooling (XDCTOOLS) and is too big to fit into the <span class="img folder">3rd_party/</span> directory in the QP/C distribution. Therefore, you need to **download and install** TI-RTOS on your machine before you can build any examples. Please refer to the TI Application Note "TI-RTOS for TivaC Getting Started Guide" (Literature Number: <a href="http://www.ti.com/lit/ug/spruhu5d/spruhu5d.pdf" target="_blank" class="extern">SPRUHU5D</a>) for more information.
-
+
 
 The QP-TI-RTOS port works as follows:
 
@@ -334,6 +341,6 @@ qpc
 @note
 Specifically, the QP source files qf_actq.c and qf_mem.c must **NOT** be included in the build, because this functionality is taken from uC/OS-II.
 
-@image html under_construction.jpg
+@image html under_construction.jpg
 
 */

doxygen/rsm.bat

@@ -29,7 +29,7 @@
 :: along with this program. If not, see <http://www.gnu.org/licenses/>.
 ::
 :: Contact information:
-:: http://www.state-machine.com
+:: https://state-machine.com
 :: mailto:info@state-machine.com
 ::  ==========================================================================
 setlocal

doxygen/sas.dox

@@ -6,9 +6,9 @@
 
 - @subpage sas_intro
   + @ref sas_purpose
-  + @ref sas_conv
+  + @ref sas_conv
   + @ref sas_scope
-  + @ref sas_audience
+  + @ref sas_audience
   + @ref sas_refs
 - @subpage sas_descr
   + @ref sas_prod
@@ -26,15 +26,15 @@
   + @ref sas_constr
 
 
-@next{sas_intro}
+@next{sas_intro}
 */
 /*##########################################################################*/
-/*! @page sas_intro Introduction
+/*! @page sas_intro Introduction
 
 Embedded software developers from different industries are independently re-discovering patterns for building concurrent software that is safer, more responsive and easier to understand than naked threads and various blocking mechanisms of a traditional Real-Time Operating System (RTOS). These best practices universally favor event-driven, asynchronous, non-blocking, encapsulated state machines instead of naked, blocking RTOS threads.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_purpose Purpose
 <p>The specification of the QP/C @termref{ao} @termref{framework} is to represent a reusable @termref{architecture}, which supports efficient implementation of the @termref{ao} model of computation for deeply embedded applications, such as single-chip microcontrollers.
 </p>
@@ -42,7 +42,7 @@ Embedded software developers from different industries are independently re-disc
 <strong>QP/C</strong> (Quantum Platform in C) is a lightweight software @termref{framework, framework} for building responsive and modular real-time embedded applications as systems of cooperating, event-driven  @termref{ao, active objects} (@termref{ao, actors}).
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_conv Document Conventions
 
 <div class="separate"></div>
@@ -54,11 +54,11 @@ Embedded software developers from different industries are independently re-disc
 Requirement definitions use consistent terminology to indicate whether something is mandatory or desirable. _Shall_ is used to denote **mandatory** behavior. _Should_ is used to denote a **desirable** behavior that should typically take place, but might not happen all the time or might be optional in uncommon cases.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_scope Project Scope
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_audience Intended Audience
 
 This SRS document is primarily intended for **embedded software engineers**, who develop applications based on the QP/C framework.
@@ -66,34 +66,34 @@ This SRS document is primarily intended for **embedded software engineers**, who
 This SRS can be also of interest to test engineers, software architects, system engineers, quality-assurance engineers, hardware engineers, as well as managers overseeing the software development.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_refs References
 
 
-
+
-@next{sas_descr}
+@next{sas_descr}
 */
 /*##########################################################################*/
-/*! @page sas_descr Overall Description
+/*! @page sas_descr Overall Description
-
+
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_prod Product Perspective
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_funct Product Functions
 
 - @reqref{RQPC101}
 - @reqref{RQPC102}
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_user User Characteristics
 The main users of the QP/C framework are **embedded software engineers**, who develop applications based on the QP/C framework.
 
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_assume Assumptions and Dependencies
 
 @next{sas}
@@ -102,7 +102,7 @@ The main users of the QP/C framework are **embedded software engineers**, who de
 /*! @page sas Architecture Elements
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_fun Functional Requirements
 
 <div class="separate"></div>
@@ -133,7 +133,7 @@ This is a useful thing to have
 <div class="separate"></div>
 @subsection sas_qxk Preemptive Blocking Kernel
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_non-fun Non-functional Requirements
 
 <div class="separate"></div>
@@ -156,7 +156,7 @@ This is a useful thing to have
 @subsection sas_secure Security Requirements
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sas_constr Constraints
 
 <div class="separate"></div>

doxygen/sds.dox

@@ -6,9 +6,9 @@
 
 - @subpage sds_intro
   + @ref sds_purpose
-  + @ref sds_conv
+  + @ref sds_conv
   + @ref sds_scope
-  + @ref sds_audience
+  + @ref sds_audience
   + @ref sds_refs
 - @subpage sds_over
   + @ref sds_req
@@ -34,16 +34,16 @@
     - @ref sds_qk
     - @ref sds_qxk
 
-@next{sds_intro}
+@next{sds_intro}
 */
 /*##########################################################################*/
-/*! @page sds_intro Introduction
+/*! @page sds_intro Introduction
-
+
 @section sds_purpose Purpose
 <strong>QP/C</strong> (Quantum Platform in C) is a lightweight software @termref{framework, framework} for building responsive and modular real-time embedded applications as systems of cooperating, event-driven  @termref{ao, active objects} (@termref{ao, actors}).
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_conv Document Conventions
 
 <div class="separate"></div>
@@ -55,11 +55,11 @@
 Requirement definitions use consistent terminology to indicate whether something is mandatory or desirable. _Shall_ is used to denote **mandatory** behavior. _Should_ is used to denote a **desirable** behavior that should typically take place, but might not happen all the time or might be optional in uncommon cases.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_scope Project Scope
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_audience Intended Audience
 
 This SRS document is primarily intended for **embedded software engineers**, who develop applications based on the QP/C framework.
@@ -67,91 +67,91 @@ This SRS document is primarily intended for **embedded software engineers**, who
 This SRS can be also of interest to test engineers, software architects, system engineers, quality-assurance engineers, hardware engineers, as well as managers overseeing the software development.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_refs References
 
 
-@next{sds_over}
+@next{sds_over}
 */
 /*##########################################################################*/
-/*! @page sds_over Software Overview
+/*! @page sds_over Software Overview
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_req Allocation of Requirements
 
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_arch Software Architecture
 
-@next{sds_viewpoints}
+@next{sds_viewpoints}
 */
 /*##########################################################################*/
-/*! @page sds_viewpoints Design Viewpoints
+/*! @page sds_viewpoints Design Viewpoints
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_context Context Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_composition Composition Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_logical Logical Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_dependency Dependency Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_information Information Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_use Patterns Use Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_interface Interface Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_structure Structure Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_interaction Interaction Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_state State Dynamics Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_algorithm Algorithm Viewpoint
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_resource Resource Viewpoint
 
 
-@next{sds}
+@next{sds}
 */
 /*##########################################################################*/
-/*! @page sds Software Module Description
+/*! @page sds Software Module Description
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_req Allocation of Requirements
 
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section sds_arch Software Architecture
 
-@next{sds}
+@next{sds}
 */

doxygen/spec.dox

@@ -1,13 +1,13 @@
-/*! @page spec Specifications
+/*! @page spec Specifications
 
 The following documents contain specifications for the QP/C software framework.
-
+
-- @subpage srs_toc (Software Requirements Specification)
+- @subpage srs_toc (Software Requirements Specification)
-- @subpage sas_toc (Software Architecture Specification)
+- @subpage sas_toc (Software Architecture Specification)
-- @subpage sds_toc (Software Design Specification, a.k.a. Software Design Description SDD)
+- @subpage sds_toc (Software Design Specification, a.k.a. Software Design Description SDD)
 
 @note
 The specification documents are included as an integral part of the "QP/C Reference Manual" for bi-directional @termref{traceabilty, traceabilty} of the @ref srs_toc "requirements" to the @ref sas_toc "architecture", the @ref sds_toc "design", the <a href="files.html"><strong>code</strong></a>, and the tests. Specifically, the electronic, hyper-text format of all these documents enables creating *hyper-links*, so it possible, for example, to simply click on a hyper-link to a requirement to get to its description.
-
+
-@next{srs_toc}
+@next{srs_toc}
 */

doxygen/srs.dox

@@ -8,9 +8,9 @@
   + @ref srs_concepts
   + @ref srs_purpose
   + @ref srs_scope
-  + @ref srs_audience
+  + @ref srs_audience
   + @ref srs_conv
-  + @ref srs_refs
+  + @ref srs_refs
 - @subpage srs_descr
   + @ref srs_prod
   + @ref srs_funct
@@ -27,10 +27,10 @@
   + @ref srs_constr
 
 
-@next{srs_intro}
+@next{srs_intro}
 */
 /*##########################################################################*/
-/*! @page srs_intro Introduction
+/*! @page srs_intro Introduction
 
 @tableofcontents
 
@@ -50,7 +50,7 @@
 This document describes the requirements of the QP/C software framework, which provides such a reusable software architecture for real-time embedded (RTE) systems. This architecture is based on event-driven, asynchronous, non-blocking, encapsulated @ref srs_ao "active objects".
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_concepts Key Concepts
 This section introduces the key concepts related to this increasingly popular "reactive approach", and specifically how they apply to the QP/C active object framework. Please refer to the Section @ref srs_refs for more information about the concepts.
 
@@ -101,16 +101,16 @@ In contrast, event-driven active objects don't need to block, because in event-d
 As suggested in the UML specification and similar as in <span title="&quot;Real-Time Object-Oriented Modeling&quot; Wikipedia"><a class="extern" target="_blank" href="https://en.wikipedia.org/wiki/Real-Time_Object-Oriented_Modeling">ROOM</a></span>, the behavior of each Active Object can be specified by means of a <span class="label label-primary">hierarchical state machine</span> (<span title="&quot;UML state machine&quot;, Wikipedia"><a class="extern" target="_blank" href="http://en.wikipedia.org/wiki/UML_state_machine">UML statechart</a></span>), which is a very effective and elegant technique of decomposing event-driven behavior.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_purpose Purpose
 The purpose of the QP/C @termref{ao} @termref{framework} is to provide a reusable software @termref{architecture} and efficient implementation of the @termref{ao} model of computation for deeply embedded applications, such as single-chip microcontrollers.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_scope Project Scope
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_audience Intended Audience
 
 This SRS document is primarily intended for **embedded software engineers**, who develop applications based on the QP/C framework.
@@ -118,7 +118,7 @@ This SRS document is primarily intended for **embedded software engineers**, who
 This SRS can be also of interest to test engineers, software architects, system engineers, quality-assurance engineers, hardware engineers, as well as managers overseeing the software development.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_conv Document Conventions
 
 <div class="separate"></div>
@@ -130,33 +130,33 @@ This SRS can be also of interest to test engineers, software architects, system
 Requirement definitions use consistent terminology to indicate whether something is mandatory or desirable. _Shall_ is used to denote **mandatory** behavior. _Should_ is used to denote a **desirable** behavior that should typically take place, but might not happen all the time or might be optional in uncommon cases.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_refs References
 
 
-@next{srs_descr}
+@next{srs_descr}
 */
 /*##########################################################################*/
-/*! @page srs_descr Overall Description
+/*! @page srs_descr Overall Description
-
+
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_prod Product Perspective
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_funct Product Functions
 
 - @reqref{RQPC101}
 - @reqref{RQPC102}
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_user User Characteristics
 The main users of the QP/C framework are **embedded software engineers**, who develop applications based on the QP/C framework.
 
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_assume Assumptions and Dependencies
 
 @next{srs}
@@ -165,7 +165,7 @@ The main users of the QP/C framework are **embedded software engineers**, who de
 /*! @page srs Requirements
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_fun Functional Requirements
 
 <div class="separate"></div>
@@ -196,7 +196,7 @@ This is a useful thing to have
 <div class="separate"></div>
 @subsection srs_qxk Preemptive Blocking Kernel
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_non-fun Non-functional Requirements
 
 <div class="separate"></div>
@@ -219,7 +219,7 @@ This is a useful thing to have
 @subsection srs_secure Security Requirements
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section srs_constr Constraints
 
 <div class="separate"></div>

doxygen/struct.dox

@@ -1,7 +1,7 @@
 /*! @page struct Structure and Features
 
 @tableofcontents
-
+
 @section files Directories and Files
 
 The following annotated directory tree lists the top-level directories provided in the standard QP/C distribution.
@@ -29,19 +29,19 @@ The standard QP/C distribution contains many @ref exa "Example Projects", which
 
 ------------------------------------------------------------------------------
 @section comp Components of QP/C
-<p>As shown in the diagram below, the QP/C framework has a layered structure. The Target hardware sits at the bottom. The Board Support Package (BSP) above it provides access to the board-specific features, such as the peripherals. The real-time kernel (QV, QK, QXK, or a conventional 3rd-party RTOS) provides the foundation for multitasking, such as task scheduling, context-switching, and inter-task communication. Based on these services, the event-driven framework (QF) supplies the event-driven infrastructure for executing <a href="http://www.state-machine.com/doc/concepts.html#Active" target="_blank" class="extern">active objects</a> and ensuring thread-safe event-driven exchanges among them. Finally, the event-processor (QEP) implements the hierarchical state machine semantics (based on UML statecharts). The top layer is the application-level code consisting of loosely-coupled active objects.
+<p>As shown in the diagram below, the QP/C framework has a layered structure. The Target hardware sits at the bottom. The Board Support Package (BSP) above it provides access to the board-specific features, such as the peripherals. The real-time kernel (QV, QK, QXK, or a conventional 3rd-party RTOS) provides the foundation for multitasking, such as task scheduling, context-switching, and inter-task communication. Based on these services, the event-driven framework (QF) supplies the event-driven infrastructure for executing <a href="https://www.state-machine.com/doc/concepts#Active" target="_blank" class="extern">active objects</a> and ensuring thread-safe event-driven exchanges among them. Finally, the event-processor (QEP) implements the hierarchical state machine semantics (based on UML statecharts). The top layer is the application-level code consisting of loosely-coupled active objects.
 </p>
 
-@image html qp_components.jpg "Components of the QP Framework"
+@image html qp_components.jpg "Components of the QP Framework"
 @n
 
 <div class="separate"></div>
 @subsection comp_qep QEP Hierarchical Event Processor
-QEP is a universal, UML-compliant event processor that provides implementation of <a href="http://www.state-machine.com/doc/concepts.html#HSM" target="_blank" class="extern">hierarchical state machines</a> (UML statecharts) in highly readable ANSI-C. The hallmark of QEP implementation strategy is **traceability**, which means that every state machine element is mapped to code precisely, unambiguously, and exactly once. QEP fully supports hierarchical state nesting, which is the fundamental mechanism for reusing behavior across many states instead of repeating the same actions and transitions over and over again. (<span class="highlight">See @ref qep for detailed documentation</span>).
+QEP is a universal, UML-compliant event processor that provides implementation of <a href="https://www.state-machine.com/doc/concepts#HSM" target="_blank" class="extern">hierarchical state machines</a> (UML statecharts) in highly readable ANSI-C. The hallmark of QEP implementation strategy is **traceability**, which means that every state machine element is mapped to code precisely, unambiguously, and exactly once. QEP fully supports hierarchical state nesting, which is the fundamental mechanism for reusing behavior across many states instead of repeating the same actions and transitions over and over again. (<span class="highlight">See @ref qep for detailed documentation</span>).
 
 <div class="separate"></div>
 @subsection comp_qf QF Active-Object Framework
-QF is a lightweight, event-driven, <a href="http://www.state-machine.com/doc/concepts.html#Framework" target="_blank" class="extern">active object framework</a> specifically designed for real-time embedded (RTE) systems. The main job of the framework is  to guarantee **thread-safe**, run-to-completion event processing within each <a href="http://www.state-machine.com/doc/concepts.html#Active" target="_blank" class="extern">active object</a>. This includes direct event posting as well as publish-subscribe event delivery, event queuing, and time events (time-delayed requests for posing events). (<span class="highlight">See @ref qf  for detailed documentation</span>).
+QF is a lightweight, event-driven, <a href="https://www.state-machine.com/doc/concepts#Framework" target="_blank" class="extern">active object framework</a> specifically designed for real-time embedded (RTE) systems. The main job of the framework is  to guarantee **thread-safe**, run-to-completion event processing within each <a href="https://www.state-machine.com/doc/concepts#Active" target="_blank" class="extern">active object</a>. This includes direct event posting as well as publish-subscribe event delivery, event queuing, and time events (time-delayed requests for posing events). (<span class="highlight">See @ref qf  for detailed documentation</span>).
 
 <div class="separate"></div>
 @subsection comp_qv  QV Cooperative Kernel
@@ -61,27 +61,27 @@ QXK has most features you might expect of a traditional blocking RTOS kernel and
 
 <div class="separate"></div>
 @subsection comp_qs QS Software Tracing System
-QS is software tracing system that enables developers to monitor live event-driven QP applications with minimal target system resources and without stopping or significantly slowing down the code. QS is an ideal tool for testing, troubleshooting, and optimizing QP applications. QS can even be used to support acceptance testing in product manufacturing. (<span class="highlight">See @ref qs for detailed documentation</span>).
+QS is software tracing system that enables developers to monitor live event-driven QP applications with minimal target system resources and without stopping or significantly slowing down the code. QS is an ideal tool for testing, troubleshooting, and optimizing QP applications. QS can even be used to support acceptance testing in product manufacturing. (<span class="highlight">See @ref qs for detailed documentation</span>).
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
-@section classes Classes in QP/C
+@section classes Classes in QP/C
 The figure below shows the main classes comprising the QP/C framework and their relation to the application-level code, such as the @ref game example application (shown at the bottom 1/3 of the diagram).
 
-@image html qp_classes.gif "Main Classes in the QP Framework"
+@image html qp_classes.gif "Main Classes in the QP Framework"
 
 <ul class="tag">
   <li><span class="tag">0</span> The ::QEvt class represents events without parameters and serves as the base class for derivation of time events and any events with parameters. For example, application-level events `ObjectPosEvt` and `ObjectImageEvt` inherit ::QEvt and add to it some parameters (see [8]).
   </li>
 
-  <li><span class="tag">1</span> The abstract ::QHsm class represents a Hierarchical State Machine (HSM) with full support for hierarchical nesting of states, entry/exit actions, initial transitions, and transitions to history in any composite state. This class is designed for ease of manual coding of HSMs in C, but it is also supported by the <a class="extern" target="_blank" href="http://www.state-machine.com/qm">QM modeling tool</a>.
+  <li><span class="tag">1</span> The abstract ::QHsm class represents a Hierarchical State Machine (HSM) with full support for hierarchical nesting of states, entry/exit actions, initial transitions, and transitions to history in any composite state. This class is designed for ease of manual coding of HSMs in C, but it is also supported by the <a class="extern" target="_blank" href="https://www.state-machine.com/qm">QM modeling tool</a>.
-::QHsm is also the base class for the ::QMsm state machine, which provides a superior efficiency, but requires the use of the <a class="extern" target="_blank" href="http://www.state-machine.com/qm">QM modeling tool</a> to generate code.
+::QHsm is also the base class for the ::QMsm state machine, which provides a superior efficiency, but requires the use of the <a class="extern" target="_blank" href="https://www.state-machine.com/qm">QM modeling tool</a> to generate code.
   </li>
 
-  <li><span class="tag">2</span> The abstract ::QActive class represents an active object that uses the ::QHsm style implementation strategy for state machines. This strategy is tailored to manual coding, but it is also supported by the <a class="extern" target="_blank" href="http://www.state-machine.com/qm">QM modeling tool</a>. The resulting code is slower than in the ::QMsm-style implementation strategy. The @ref game application provides an example of application-level classes deriving from ::QActive and ::QHsm (see [6] and [7]).
+  <li><span class="tag">2</span> The abstract ::QActive class represents an active object that uses the ::QHsm style implementation strategy for state machines. This strategy is tailored to manual coding, but it is also supported by the <a class="extern" target="_blank" href="https://www.state-machine.com/qm">QM modeling tool</a>. The resulting code is slower than in the ::QMsm-style implementation strategy. The @ref game application provides an example of application-level classes deriving from ::QActive and ::QHsm (see [6] and [7]).
   </li>
 
-  <li><span class="tag">3</span> The abstract ::QMsm class (QM State Machine) derives from ::QHsm and implements the fastest and the most efficient strategy for coding hierarchical state machines, but this strategy is not human-maintainable and requires the use of the <a class="extern" target="_blank" href="http://www.state-machine.com/qm">QM modeling tool</a>. The class is abstract, meaning that it is not designed to be instantiated directly, but rather only for inheritance.
+  <li><span class="tag">3</span> The abstract ::QMsm class (QM State Machine) derives from ::QHsm and implements the fastest and the most efficient strategy for coding hierarchical state machines, but this strategy is not human-maintainable and requires the use of the <a class="extern" target="_blank" href="https://www.state-machine.com/qm">QM modeling tool</a>. The class is abstract, meaning that it is not designed to be instantiated directly, but rather only for inheritance.
   </li>
 
   <li><span class="tag">4</span> The abstract ::QMActive class represents an active object that uses the ::QMsm state machine implementation strategy. This strategy requires the use of the QM modeling tool to generate state machine code automatically, but the code is faster than in the ::QHsm style implementation strategy and needs less run-time support (smaller event-processor).
@@ -102,16 +102,16 @@ The figure below shows the main classes comprising the QP/C framework and their
 </ul>
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
-@section sm State Machines
+@section sm State Machines
 
-The behavior of each active object in QP/C is specified by means of a <a href="http://www.state-machine.com/doc/concepts.html#HSM" target="_blank" class="extern">hierarchical state machine</a> (UML statechart), which is the most effective and elegant technique of decomposing event-driven behavior. The most important innovation of UML state machines over classical finite state machines (FSMs) is the hierarchical state nesting. The value of state nesting lies in avoiding repetitions, which are inevitable in the traditional "flat" FSM formalism and are the main reason for the "state-transition explosion" in FSMs. The semantics of state nesting allow substates to define only the differences of behavior from the superstates, thus promoting sharing and reusing behavior.
+The behavior of each active object in QP/C is specified by means of a <a href="https://www.state-machine.com/doc/concepts#HSM" target="_blank" class="extern">hierarchical state machine</a> (UML statechart), which is the most effective and elegant technique of decomposing event-driven behavior. The most important innovation of UML state machines over classical finite state machines (FSMs) is the hierarchical state nesting. The value of state nesting lies in avoiding repetitions, which are inevitable in the traditional "flat" FSM formalism and are the main reason for the "state-transition explosion" in FSMs. The semantics of state nesting allow substates to define only the differences of behavior from the superstates, thus promoting sharing and reusing behavior.
 
-@note
+@note
-The Quantum Leaps Application Note <a class="extern" target="_blank" href="http://www.state-machine.com/doc/AN_Crash_Course_in_UML_State_Machines.pdf"><strong>A Crash Course in UML State Machines</strong></a> introduces the main state machine concepts backed up by examples.
+The Quantum Leaps Application Note <a class="extern" target="_blank" href="https://www.state-machine.com/doc/AN_Crash_Course_in_UML_State_Machines.pdf"><strong>A Crash Course in UML State Machines</strong></a> introduces the main state machine concepts backed up by examples.
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_Crash_Course_in_UML_State_Machines.pdf"><img border="0" src="img/AN_Crash_Course_in_UML_State_Machines.gif" title="Download PDF"></a>
+<a target="_blank" href="https://www.state-machine.com/doc/AN_Crash_Course_in_UML_State_Machines.pdf"><img border="0" src="img/AN_Crash_Course_in_UML_State_Machines.gif" title="Download PDF"></a>
 <div class="caption">
 Application Note: A Crash Course in UML State Machines
 </div>
@@ -124,13 +124,13 @@ Application Note: A Crash Course in UML State Machines
 The hallmark of the QP/C implementation of UML state machines is **traceability**, which is direct, precise, and unambiguous mapping of every state machine element to human-readable, portable, MISRA-compliant C code. Preserving the traceability from requirements through design to code is essential for mission-critical systems, such as medical devices or avionic systems.
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section coding Coding Standard
-The QP/C framework has been developed in strict adherence to the documented <a class="extern" target="_blank" href="http://www.state-machine.com/doc/AN_QL_Coding_Standard.pdf"><strong>Quantum Leaps Coding Standard</strong></a>.
+The QP/C framework has been developed in strict adherence to the documented <a class="extern" target="_blank" href="https://www.state-machine.com/doc/AN_QL_Coding_Standard.pdf"><strong>Quantum Leaps Coding Standard</strong></a>.
 
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_QL_Coding_Standard.pdf"><img border="0" src="img/AN_Coding_Standard.jpg " title="Download PDF"></a>
+<a target="_blank" href="https://www.state-machine.com/doc/AN_QL_Coding_Standard.pdf"><img border="0" src="img/AN_Coding_Standard.jpg " title="Download PDF"></a>
 <div class="caption">
 Application Note: Quantum Leaps C/C++ Coding Standard
 </div>
@@ -138,7 +138,7 @@ Application Note: Quantum Leaps C/C++ Coding Standard
 @endhtmlonly
 
 
-------------------------------------------------------------------------------
+------------------------------------------------------------------------------
 @section misra MISRA Compliance
 
 <p>The QP/C framework complies with most of the Motor Industry Software Reliability Association (MISRA) MISRA-C:2004 rules.
@@ -146,14 +146,14 @@ Application Note: Quantum Leaps C/C++ Coding Standard
 
 @htmlonly
 <div class="image">
-<a target="_blank" href="http://www.state-machine.com/doc/AN_QP-C_MISRA.pdf"><img border="0" src="img/AN_MISRA-QPC.jpg" title="Download PDF"></a>
+<a target="_blank" href="https://www.state-machine.com/doc/AN_QP-C_MISRA.pdf"><img border="0" src="img/AN_MISRA-QPC.jpg" title="Download PDF"></a>
 <div class="caption">
 Application Note: QP/C MISRA-C:2004 Compliance Matrix
 </div>
 </div>
 @endhtmlonly
 
-All deviations are carefully limited into very specific contexts and are documented with the Application Note: <a class="extern" target="_blank" href="http://www.state-machine.com/doc/AN_QP-C_MISRA.pdf"><strong>QP/C MISRA-C:2004 Compliance Matrix</strong></a>.
+All deviations are carefully limited into very specific contexts and are documented with the Application Note: <a class="extern" target="_blank" href="https://www.state-machine.com/doc/AN_QP-C_MISRA.pdf"><strong>QP/C MISRA-C:2004 Compliance Matrix</strong></a>.
 
 @note
 MISRA and MISRA C are registered trademarks of MIRA Ltd, held on behalf of the MISRA Consortium.
@@ -168,6 +168,6 @@ The QP/C framework comes with extensive support for automatic rule checking by m
 
 @sa @ref lint "Lint Port"
 
-@next{exa}
+@next{exa}
-*/
+*/
-
+

examples/arm-cm/blinky_efm32-slstk3401a/blinky.h

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* Web  : https://state-machine.com
 * Email: info@state-machine.com
 *****************************************************************************/
 #ifndef blinky_h

examples/arm-cm/blinky_efm32-slstk3401a/bsp.h

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* Web  : https://state-machine.com
 * Email: info@state-machine.com
 *****************************************************************************/
 #ifndef bsp_h

examples/arm-cm/blinky_efm32-slstk3401a/main.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* Web  : https://state-machine.com
 * Email: info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_efm32-slstk3401a/qk/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_efm32-slstk3401a/qk/gnu/qf_act.dasm

@@ -0,0 +1,70 @@
+
+dbg\qf_act.o:     file format elf32-littlearm
+
+
+Disassembly of section .text.QF_add_:
+
+00000000 <QF_add_>:
+   0:	b538      	push	{r3, r4, r5, lr}
+   2:	4605      	mov	r5, r0
+   4:	6a84      	ldr	r4, [r0, #40]	; 0x28
+   6:	1e63      	subs	r3, r4, #1
+   8:	2b1f      	cmp	r3, #31
+   a:	d803      	bhi.n	14 <QF_add_+0x14>
+   c:	4b0a      	ldr	r3, [pc, #40]	; (38 <QF_add_+0x38>)
+   e:	f853 3024 	ldr.w	r3, [r3, r4, lsl #2]
+  12:	b11b      	cbz	r3, 1c <QF_add_+0x1c>
+  14:	2164      	movs	r1, #100	; 0x64
+  16:	4809      	ldr	r0, [pc, #36]	; (3c <QF_add_+0x3c>)
+  18:	f7ff fffe 	bl	0 <Q_onAssert>
+  1c:	f3ef 8311 	mrs	r3, BASEPRI
+  20:	b672      	cpsid	i
+  22:	223f      	movs	r2, #63	; 0x3f
+  24:	f382 8811 	msr	BASEPRI, r2
+  28:	b662      	cpsie	i
+  2a:	4a03      	ldr	r2, [pc, #12]	; (38 <QF_add_+0x38>)
+  2c:	f842 5024 	str.w	r5, [r2, r4, lsl #2]
+  30:	f383 8811 	msr	BASEPRI, r3
+  34:	bd38      	pop	{r3, r4, r5, pc}
+  36:	bf00      	nop
+	...
+
+Disassembly of section .text.QF_remove_:
+
+00000000 <QF_remove_>:
+   0:	b538      	push	{r3, r4, r5, lr}
+   2:	4604      	mov	r4, r0
+   4:	6a85      	ldr	r5, [r0, #40]	; 0x28
+   6:	1e6b      	subs	r3, r5, #1
+   8:	2b1f      	cmp	r3, #31
+   a:	d804      	bhi.n	16 <QF_remove_+0x16>
+   c:	4b0b      	ldr	r3, [pc, #44]	; (3c <QF_remove_+0x3c>)
+   e:	f853 3025 	ldr.w	r3, [r3, r5, lsl #2]
+  12:	4298      	cmp	r0, r3
+  14:	d003      	beq.n	1e <QF_remove_+0x1e>
+  16:	21c8      	movs	r1, #200	; 0xc8
+  18:	4809      	ldr	r0, [pc, #36]	; (40 <QF_remove_+0x40>)
+  1a:	f7ff fffe 	bl	0 <Q_onAssert>
+  1e:	f3ef 8311 	mrs	r3, BASEPRI
+  22:	b672      	cpsid	i
+  24:	223f      	movs	r2, #63	; 0x3f
+  26:	f382 8811 	msr	BASEPRI, r2
+  2a:	b662      	cpsie	i
+  2c:	2200      	movs	r2, #0
+  2e:	4903      	ldr	r1, [pc, #12]	; (3c <QF_remove_+0x3c>)
+  30:	f841 2025 	str.w	r2, [r1, r5, lsl #2]
+  34:	6062      	str	r2, [r4, #4]
+  36:	f383 8811 	msr	BASEPRI, r3
+  3a:	bd38      	pop	{r3, r4, r5, pc}
+	...
+
+Disassembly of section .text.QF_bzero:
+
+00000000 <QF_bzero>:
+   0:	b129      	cbz	r1, e <QF_bzero+0xe>
+   2:	1841      	adds	r1, r0, r1
+   4:	2300      	movs	r3, #0
+   6:	f800 3b01 	strb.w	r3, [r0], #1
+   a:	4281      	cmp	r1, r0
+   c:	d1fb      	bne.n	6 <QF_bzero+0x6>
+   e:	4770      	bx	lr

examples/arm-cm/blinky_efm32-slstk3401a/qv/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_efm32-slstk3401a/qv/gnu/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_efm32-slstk3401a/win32-qv/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_efm32-slstk3401a/win32/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_efm32-slstk3401a/win32/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_ek-tm4c123gxl/blinky.h

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* Web  : https://state-machine.com
 * Email: info@state-machine.com
 *****************************************************************************/
 #ifndef blinky_h

examples/arm-cm/blinky_ek-tm4c123gxl/bsp.h

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #ifndef bsp_h

examples/arm-cm/blinky_ek-tm4c123gxl/main.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* Web  : https://state-machine.com
 * Email: info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_ek-tm4c123gxl/qk/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_ek-tm4c123gxl/qk/gnu/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_ek-tm4c123gxl/qv/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_ek-tm4c123gxl/qv/gnu/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_ek-tm4c123gxl/win32-qv/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/blinky_ek-tm4c123gxl/win32/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/blinky_ek-tm4c123gxl/win32/bsp.c

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"

examples/arm-cm/dpp_efm32-slstk3401a/bsp.h

@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #ifndef bsp_h

examples/arm-cm/dpp_efm32-slstk3401a/qk/arm/dpp-qk.uvprojx

@@ -310,7 +310,7 @@
           </ArmAdsMisc>
           <Cads>
             <interw>0</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
             <OneElfS>1</OneElfS>
@@ -1562,7 +1562,7 @@
           </ArmAdsMisc>
           <Cads>
             <interw>0</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
             <OneElfS>1</OneElfS>

examples/arm-cm/dpp_efm32-slstk3401a/qk/bsp.c

@@ -1,7 +1,7 @@
 /*****************************************************************************
 * Product: DPP example, EFM32-SLSTK3401A board, preemptive QK kernel
-* Last Updated for Version: 5.8.1
+* Last Updated for Version: 5.9.0
-* Date of the Last Update:  2016-12-14
+* Date of the Last Update:  2017-4-13
 *
 *                    Q u a n t u m     L e a P s
 *                    ---------------------------
@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"
@@ -118,7 +118,7 @@ void SysTick_Handler(void) {
 #endif
 
     //QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */
-    QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); // post to Ticker0 */
+    QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); /* post to Ticker0 */
 
     /* Perform the debouncing of buttons. The algorithm for debouncing
     * adapted from the book "Embedded Systems Dictionary" by Jack Ganssle
@@ -144,7 +144,7 @@ void SysTick_Handler(void) {
     QK_ISR_EXIT();  /* inform QK about exiting an ISR */
 }
 /*..........................................................................*/
-void GPIO_EVEN_IRQHandler(void) { /* to be triggered from debugger, NOTE03 */
+void GPIO_EVEN_IRQHandler(void) { /* for testing, NOTE03 */
     QK_ISR_ENTRY(); /* inform QK about entering an ISR */
 
     QACTIVE_POST(AO_Table, Q_NEW(QEvt, MAX_PUB_SIG), /* for testing... */
@@ -232,6 +232,12 @@ void BSP_init(void) {
 }
 /*..........................................................................*/
 void BSP_displayPhilStat(uint8_t n, char const *stat) {
+    QS_TEST_PROBE_DEF(&BSP_displayPhilStat)
+
+    QS_TEST_PROBE_ID(1,
+        stat = "Unknown";
+    )
+
     if (stat[0] == 'e') {
         GPIO->P[LED_PORT].DOUT |=  (1U << LED0_PIN);
     }
@@ -473,13 +479,19 @@ void QS_onReset(void) {
 }
 /*..........................................................................*/
 /*! callback function to execute a user command (to be implemented in BSP) */
-void QS_onCommand(uint8_t cmdId, uint32_t param) {
+void QS_onCommand(uint8_t cmdId,
+                  uint32_t param1, uint32_t param2, uint32_t param3)
+{
     void assert_failed(char const *module, int loc);
     (void)cmdId;
-    (void)param;
+    (void)param1;
+    (void)param2;
+    (void)param3;
     QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */
         QS_U8(2, cmdId);
-        QS_U32(8, param);
+        QS_U32(8, param1);
+        QS_U32(8, param2);
+        QS_U32(8, param3);
     QS_END()
 
     if (cmdId == 10U) {
@@ -519,6 +531,11 @@ void QS_onCommand(uint8_t cmdId, uint32_t param) {
 * execution time contributes to the brightness of the User LED.
 *
 * NOTE03:
-* To trigger GPIO_EVEN_IRQHandler() from debugger:
+* GPIO_EVEN_IRQHandler() is for testing various preemption scenarios in QK.
-* IAR EWARM: go to the NVIC_ISPR0 register and write 0x200 to SETPEND.
+* The general testing strategy is to trigger this IRQ manually from the
+* debugger. To do so in IAR, you need to:
+* 1. open the Register view
+* 2. open NVIC registers
+* 3. scroll down to NVIC_ISPR0 register
+* 4. write 0x200 to NVIC_ISPR0.SETPEND register
 */

examples/arm-cm/dpp_efm32-slstk3401a/qk/gnu/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/dpp_efm32-slstk3401a/qk/main.c

@@ -1,13 +1,13 @@
 /*****************************************************************************
 * Product: DPP example
-* Last Updated for Version: 5.8.1
+* Last Updated for Version: 5.9.0
-* Date of the Last Update:  2016-12-14
+* Date of the Last Update:  2017-03-13
 *
 *                    Q u a n t u m     L e a P s
 *                    ---------------------------
 *                    innovating embedded systems
 *
-* Copyright (C) Quantum Leaps, LLC. state-machine.com.
+* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved.
 *
 * This program is open source software: you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as published
@@ -28,8 +28,8 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* https://state-machine.com
-* Email: info@state-machine.com
+* mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"
 #include "dpp.h"

examples/arm-cm/dpp_efm32-slstk3401a/qspy/dpp.tcl

@@ -1,381 +0,0 @@
-#-----------------------------------------------------------------------------
-# Product: QSpyView -- Customization example for DPP application
-# Last updated for version 5.6.4
-# Last updated on  2016-04-25
-#
-#                    Q u a n t u m     L e a P s
-#                    ---------------------------
-#                    innovating embedded systems
-#
-# Copyright (C) Quantum Leaps, LLC, All rights reserved.
-#
-# This program is open source software: you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as published
-# by the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# Alternatively, this program may be distributed and modified under the
-# terms of Quantum Leaps commercial licenses, which expressly supersede
-# the GNU General Public License and are specifically designed for
-# licensees interested in retaining the proprietary status of their code.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-# Contact information:
-# http://www.state-machine.com
-# mailto:info@state-machine.com
-#-----------------------------------------------------------------------------
-
-# command handlers ===========================================================
-proc onMyCommand {} {
-    # do something here, for example:
-    # - inject an event to the Target
-    # - send a command to the Target
-    # - peek memory
-    # - poke memory
-    # - exectute system tick in the Target
-    # - open a dialog box...
-    # - etc.
-
-    # as an example, the following code sends a command to the Target
-    variable ::qspy::QS_RX
-    ::qspy::sendPkt [binary format cci $::qspy::QS_RX(COMMAND) 1 12345]
-}
-
-proc onPause {} {
-    global theButtonId theBtnState
-    if {[string equal $theBtnState BTN_UP]} {    ;# is DWN?
-         set theBtnState BTN_DWN
-         ::qspy::sendEvent 6 6 0
-    } else {
-         set theBtnState BTN_UP
-         ::qspy::sendEvent 6 7 0
-    }
-    .canv.c itemconfigure $theButtonId -image ::img::$theBtnState
-}
-
-# additinal menu options =====================================================
-.mbar.cust add command -label "MyCommand" -command onMyCommand
-
-
-# specific canvas for DPP ====================================================
-set scriptFolder [file dirname [file normalize [info script]]]
-
-image create photo ::img::e       -file $scriptFolder/img/eating.gif
-image create photo ::img::h       -file $scriptFolder/img/hungry.gif
-image create photo ::img::t       -file $scriptFolder/img/thinking.gif
-image create photo ::img::BTN_UP  -file $scriptFolder/img/BTN_UP.gif
-image create photo ::img::BTN_DWN -file $scriptFolder/img/BTN_DWN.gif
-
-wm geometry .canv =400x260
-.canv.c configure -width  400
-.canv.c configure -height 260
-
-set thePhiloId [.canv.c create image 190  57 -image ::img::t]
-.canv.c create image 273 100 -image ::img::t
-.canv.c create image 237 185 -image ::img::t
-.canv.c create image 146 184 -image ::img::t
-.canv.c create image 107 100 -image ::img::t
-
-
-set theButtonId [.canv.c create image 200 120 -image ::img::BTN_UP]
-set theBtnState BTN_UP
-.canv.c bind $theButtonId <ButtonPress-1> onPause
-
-# QS record handlers =========================================================
-
-# user record handlers [70..0x7C] --------------------------------------------
-proc ::qspy::rec70  {} { ;# QS_USER
-    variable thePkt
-    variable theFmt
-    binary scan $thePkt xx$theFmt(tstamp)xcxa* \
-           tstamp philoNum stat
-
-    dispTxt [format "%010u Philo %1d is %s" $tstamp $philoNum $stat]
-
-    global thePhiloId
-    set img [string index $stat 0]
-    .canv.c itemconfigure [expr $thePhiloId + $philoNum] -image ::img::$img
-}
-#.............................................................................
-proc ::qspy::rec71  {} { ;# QS_USER + 1
-    variable thePkt
-    variable theFmt
-    binary scan $thePkt xx$theFmt(tstamp)xcxi \
-           tstamp cmdId param
-    dispTxt [format "%010u cmd=%d param=%d" $tstamp $cmdId $param]
-}
-
-proc ::qspy::rec72  {} { ;# QS_USER + 2
-}
-proc ::qspy::rec73  {} { ;# QS_USER + 3
-}
-proc ::qspy::rec74  {} { ;# QS_USER + 4
-}
-proc ::qspy::rec75  {} { ;# QS_USER + 5
-}
-proc ::qspy::rec76  {} { ;# QS_USER + 6
-}
-proc ::qspy::rec77  {} { ;# QS_USER + 7
-}
-proc ::qspy::rec78  {} { ;# QS_USER + 8
-}
-proc ::qspy::rec79  {} { ;# QS_USER + 9
-}
-proc ::qspy::rec80  {} { ;# QS_USER + 10
-}
-proc ::qspy::rec81  {} { ;# QS_USER + 11
-}
-proc ::qspy::rec82  {} { ;# QS_USER + 12
-}
-proc ::qspy::rec83  {} { ;# QS_USER + 13
-}
-proc ::qspy::rec84  {} { ;# QS_USER + 14
-}
-proc ::qspy::rec85  {} { ;# QS_USER + 15
-}
-proc ::qspy::rec86  {} { ;# QS_USER + 16
-}
-proc ::qspy::rec87  {} { ;# QS_USER + 17
-}
-proc ::qspy::rec88  {} { ;# QS_USER + 18
-}
-proc ::qspy::rec89  {} { ;# QS_USER + 19
-}
-proc ::qspy::rec90  {} { ;# QS_USER + 20
-}
-proc ::qspy::rec91  {} { ;# QS_USER + 21
-}
-proc ::qspy::rec92  {} { ;# QS_USER + 22
-}
-proc ::qspy::rec93  {} { ;# QS_USER + 23
-}
-proc ::qspy::rec94  {} { ;# QS_USER + 24
-}
-proc ::qspy::rec95  {} { ;# QS_USER + 25
-}
-proc ::qspy::rec96  {} { ;# QS_USER + 26
-}
-proc ::qspy::rec97  {} { ;# QS_USER + 27
-}
-proc ::qspy::rec98  {} { ;# QS_USER + 28
-}
-proc ::qspy::rec99  {} { ;# QS_USER + 29
-}
-proc ::qspy::rec100 {} { ;# QS_USER + 30
-}
-proc ::qspy::rec101 {} { ;# QS_USER + 31
-}
-proc ::qspy::rec102 {} { ;# QS_USER + 32
-}
-proc ::qspy::rec103 {} { ;# QS_USER + 33
-}
-proc ::qspy::rec104 {} { ;# QS_USER + 34
-}
-proc ::qspy::rec105 {} { ;# QS_USER + 35
-}
-proc ::qspy::rec106 {} { ;# QS_USER + 36
-}
-proc ::qspy::rec107 {} { ;# QS_USER + 37
-}
-proc ::qspy::rec108 {} { ;# QS_USER + 38
-}
-proc ::qspy::rec109 {} { ;# QS_USER + 39
-}
-proc ::qspy::rec110 {} { ;# QS_USER + 40
-}
-proc ::qspy::rec111 {} { ;# QS_USER + 41
-}
-proc ::qspy::rec112 {} { ;# QS_USER + 42
-}
-proc ::qspy::rec113 {} { ;# QS_USER + 43
-}
-proc ::qspy::rec114 {} { ;# QS_USER + 44
-}
-proc ::qspy::rec115 {} { ;# QS_USER + 45
-}
-proc ::qspy::rec116 {} { ;# QS_USER + 46
-}
-proc ::qspy::rec117 {} { ;# QS_USER + 47
-}
-proc ::qspy::rec118 {} { ;# QS_USER + 48
-}
-proc ::qspy::rec119 {} { ;# QS_USER + 49
-}
-proc ::qspy::rec120 {} { ;# QS_USER + 50
-}
-proc ::qspy::rec121 {} { ;# QS_USER + 51
-}
-proc ::qspy::rec122 {} { ;# QS_USER + 52
-}
-proc ::qspy::rec123 {} { ;# QS_USER + 53
-}
-proc ::qspy::rec124 {} { ;# QS_USER + 54
-}
-
-
-# special record handlers ----------------------------------------------------
-proc ::qspy::recRESET {} { ;# target reset callback
-}
-proc ::qspy::recINFO  {} { ;# target info callback
-}
-
-# standard record handlers [1..54] -------------------------------------------
-proc ::qspy::rec0 {} { ;# QS_EMPTY
-}
-
-# [1] QEP records...
-proc ::qspy::rec1 {} { ;# QS_QEP_STATE_ENTRY
-}
-proc ::qspy::rec2 {} { ;# QS_QEP_STATE_EXIT
-}
-proc ::qspy::rec3 {} { ;# QS_QEP_STATE_INIT
-}
-proc ::qspy::rec4 {} { ;# QS_QEP_INIT_TRAN
-}
-proc ::qspy::rec5 {} { ;# QS_QEP_INTERN_TRAN
-}
-proc ::qspy::rec6 {} { ;# QS_QEP_TRAN
-}
-proc ::qspy::rec7 {} { ;# QS_QEP_IGNORED
-}
-proc ::qspy::rec8 {} { ;# QS_QEP_DISPATCH
-}
-proc ::qspy::rec9 {} { ;# QS_QEP_UNHANDLED
-}
-
-# [10] QF records...
-proc ::qspy::rec10 {} { ;# QS_QF_ACTIVE_ADD
-}
-proc ::qspy::rec11 {} { ;# QS_QF_ACTIVE_REMOVE
-}
-proc ::qspy::rec12 {} { ;# QS_QF_ACTIVE_SUBSCRIBE
-}
-proc ::qspy::rec13 {} { ;# QS_QF_ACTIVE_UNSUBSCRIBE
-}
-proc ::qspy::rec14 {} { ;# QS_QF_ACTIVE_POST_FIFO
-}
-proc ::qspy::rec15 {} { ;# QS_QF_ACTIVE_POST_LIFO
-}
-proc ::qspy::rec16 {} { ;# QS_QF_ACTIVE_GET
-}
-proc ::qspy::rec17 {} { ;# QS_QF_ACTIVE_GET_LAST
-}
-proc ::qspy::rec18 {} { ;# QS_QF_EQUEUE_INIT
-}
-proc ::qspy::rec19 {} { ;# QS_QF_EQUEUE_POST_FIFO
-}
-proc ::qspy::rec20 {} { ;# QS_QF_EQUEUE_POST_LIFO
-}
-proc ::qspy::rec21 {} { ;# QS_QF_EQUEUE_GET
-}
-proc ::qspy::rec22 {} { ;# QS_QF_EQUEUE_GET_LAST
-}
-proc ::qspy::rec23 {} { ;# QS_QF_MPOOL_INIT
-}
-proc ::qspy::rec24 {} { ;# QS_QF_MPOOL_GET
-}
-proc ::qspy::rec25 {} { ;# QS_QF_MPOOL_PUT
-}
-proc ::qspy::rec26 {} { ;# QS_QF_PUBLISH
-}
-proc ::qspy::rec27 {} { ;# QS_QF_RESERVED8
-}
-proc ::qspy::rec28 {} { ;# QS_QF_NEW
-}
-proc ::qspy::rec29 {} { ;# QS_QF_GC_ATTEMPT
-}
-proc ::qspy::rec30 {} { ;# QS_QF_GC
-}
-proc ::qspy::rec31 {} { ;# QS_QF_TICK
-}
-proc ::qspy::rec32 {} { ;# QS_QF_TIMEEVT_ARM
-}
-proc ::qspy::rec33 {} { ;# QS_QF_TIMEEVT_AUTO_DISARM
-}
-proc ::qspy::rec34 {} { ;# QS_QF_TIMEEVT_DISARM_ATTEMPT
-}
-proc ::qspy::rec35 {} { ;# QS_QF_TIMEEVT_DISARM
-}
-proc ::qspy::rec36 {} { ;# QS_QF_TIMEEVT_REARM
-}
-proc ::qspy::rec37 {} { ;# QS_QF_TIMEEVT_POST
-}
-proc ::qspy::rec38 {} { ;# QS_QF_TIMEEVT_CTR
-}
-proc ::qspy::rec39 {} { ;# QS_QF_CRIT_ENTRY
-}
-proc ::qspy::rec40 {} { ;# QS_QF_CRIT_EXIT
-}
-proc ::qspy::rec41 {} { ;# QS_QF_ISR_ENTRY
-}
-proc ::qspy::rec42 {} { ;# QS_QF_ISR_EXIT
-}
-proc ::qspy::rec43 {} { ;# QS_QF_INT_DISABLE
-}
-proc ::qspy::rec44 {} { ;# QS_QF_INT_ENABLE
-}
-proc ::qspy::rec45 {} { ;# QS_QF_ACTIVE_POST_ATTEMPT
-}
-proc ::qspy::rec46 {} { ;# QS_QF_EQUEUE_POST_ATTEMPT
-}
-proc ::qspy::rec47 {} { ;# QS_QF_MPOOL_GET_ATTEMPT
-}
-proc ::qspy::rec48 {} { ;# QS_QF_RESERVED1
-}
-proc ::qspy::rec49 {} { ;# QS_QF_RESERVED0
-}
-
-# [50] QK/QV records
-proc ::qspy::rec50 {} { ;# QS_QK_MUTEX_LOCK
-}
-proc ::qspy::rec51 {} { ;# QS_QK_MUTEX_UNLOCK
-}
-proc ::qspy::rec52 {} { ;# QS_QVK_SCHEDULE
-}
-proc ::qspy::rec53 {} { ;# QS_QVK_IDLE
-}
-proc ::qspy::rec54 {} { ;# QS_QK_RESUME
-}
-
-# [55] Additional QEP records
-proc ::qspy::rec55 {} { ;# QS_QEP_TRAN_HIST
-}
-proc ::qspy::rec56 {} { ;# QS_QEP_TRAN_EP
-}
-proc ::qspy::rec57 {} { ;# QS_QEP_TRAN_XP
-}
-proc ::qspy::rec58 {} { ;# QS_QEP_RESERVED1
-}
-proc ::qspy::rec59 {} { ;# QS_QEP_RESERVED0
-}
-
-# Miscellaneous QS records
-proc ::qspy::rec60 {} { ;# QS_SIG_DICT
-}
-proc ::qspy::rec61 {} { ;# QS_OBJ_DICT
-}
-proc ::qspy::rec62 {} { ;# QS_FUN_DICT
-}
-proc ::qspy::rec63 {} { ;# QS_USR_DICT
-}
-
-# proc ::qspy::64 ;# QS_TARGET_INFO not used, see proc recINFO
-
-proc ::qspy::rec65 {} { ;# QS_RESERVED0
-}
-proc ::qspy::rec66 {} { ;# QS_RX_STATUS
-}
-proc ::qspy::rec67 {} { ;# QS_TEST_STATUS
-}
-proc ::qspy::rec68 {} { ;# QS_PEEK_DATA
-}
-proc ::qspy::rec69 {} { ;# QS_ASSERT_FAIL
-}
-

examples/arm-cm/dpp_efm32-slstk3401a/qspy/qspyview.bat

@@ -1 +0,0 @@
-wish C:\qp\qtools\qspy\qspyview\qspyview.tcl dpp.tcl

examples/arm-cm/dpp_efm32-slstk3401a/qspyview/dpp.tcl

@@ -0,0 +1,381 @@
+#-----------------------------------------------------------------------------
+# Product: QSpyView -- Customization example for DPP application
+# Last updated for version 5.8.3
+# Last updated on  2017-03-06
+#
+#                    Q u a n t u m     L e a P s
+#                    ---------------------------
+#                    innovating embedded systems
+#
+# Copyright (C) Quantum Leaps, LLC, All rights reserved.
+#
+# This program is open source software: you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as published
+# by the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# Alternatively, this program may be distributed and modified under the
+# terms of Quantum Leaps commercial licenses, which expressly supersede
+# the GNU General Public License and are specifically designed for
+# licensees interested in retaining the proprietary status of their code.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+# Contact information:
+# https://state-machine.com
+# mailto:info@state-machine.com
+#-----------------------------------------------------------------------------
+
+# command handlers ===========================================================
+proc onMyCommand {} {
+    # do something here, for example:
+    # - inject an event to the Target
+    # - send a command to the Target
+    # - peek memory
+    # - poke memory
+    # - exectute system tick in the Target
+    # - open a dialog box...
+    # - etc.
+
+    # as an example, the following code sends a command to the Target
+    variable qspy::QS_RX
+    qspy::sendPkt [binary format cciii $qspy::QS_RX(COMMAND) 1 12345 0 0]
+}
+
+proc onPause {} {
+    global theButtonId theBtnState
+    if {[string equal $theBtnState BTN_UP]} {    ;# is DWN?
+         set theBtnState BTN_DWN
+         qspy::sendEvent 6 6 0
+    } else {
+         set theBtnState BTN_UP
+         qspy::sendEvent 6 7 0
+    }
+    .canv.c itemconfigure $theButtonId -image ::img::$theBtnState
+}
+
+# additinal menu options =====================================================
+.mbar.cust add command -label "MyCommand" -command onMyCommand
+
+
+# specific canvas for DPP ====================================================
+set scriptFolder [file dirname [file normalize [info script]]]
+
+image create photo ::img::e       -file $scriptFolder/img/eating.gif
+image create photo ::img::h       -file $scriptFolder/img/hungry.gif
+image create photo ::img::t       -file $scriptFolder/img/thinking.gif
+image create photo ::img::BTN_UP  -file $scriptFolder/img/BTN_UP.gif
+image create photo ::img::BTN_DWN -file $scriptFolder/img/BTN_DWN.gif
+
+wm geometry .canv =400x260
+.canv.c configure -width  400
+.canv.c configure -height 260
+
+set thePhiloId [.canv.c create image 190  57 -image ::img::t]
+.canv.c create image 273 100 -image ::img::t
+.canv.c create image 237 185 -image ::img::t
+.canv.c create image 146 184 -image ::img::t
+.canv.c create image 107 100 -image ::img::t
+
+
+set theButtonId [.canv.c create image 200 120 -image ::img::BTN_UP]
+set theBtnState BTN_UP
+.canv.c bind $theButtonId <ButtonPress-1> onPause
+
+# QS record handlers =========================================================
+
+# user record handlers [70..0x7C] --------------------------------------------
+proc qspy::rec70  {} { ;# QS_USER
+    variable thePkt
+    variable theFmt
+    binary scan $thePkt xx$theFmt(tstamp)xcxa* \
+           tstamp philoNum stat
+
+    dispTxt [format "%010u Philo %1d is %s" $tstamp $philoNum $stat]
+
+    global thePhiloId
+    set img [string index $stat 0]
+    .canv.c itemconfigure [expr $thePhiloId + $philoNum] -image ::img::$img
+}
+#.............................................................................
+proc qspy::rec71  {} { ;# QS_USER + 1
+    variable thePkt
+    variable theFmt
+    binary scan $thePkt xx$theFmt(tstamp)xcxi \
+           tstamp cmdId param
+    dispTxt [format "%010u cmd=%d param=%d" $tstamp $cmdId $param]
+}
+
+proc qspy::rec72  {} { ;# QS_USER + 2
+}
+proc qspy::rec73  {} { ;# QS_USER + 3
+}
+proc qspy::rec74  {} { ;# QS_USER + 4
+}
+proc qspy::rec75  {} { ;# QS_USER + 5
+}
+proc qspy::rec76  {} { ;# QS_USER + 6
+}
+proc qspy::rec77  {} { ;# QS_USER + 7
+}
+proc qspy::rec78  {} { ;# QS_USER + 8
+}
+proc qspy::rec79  {} { ;# QS_USER + 9
+}
+proc qspy::rec80  {} { ;# QS_USER + 10
+}
+proc qspy::rec81  {} { ;# QS_USER + 11
+}
+proc qspy::rec82  {} { ;# QS_USER + 12
+}
+proc qspy::rec83  {} { ;# QS_USER + 13
+}
+proc qspy::rec84  {} { ;# QS_USER + 14
+}
+proc qspy::rec85  {} { ;# QS_USER + 15
+}
+proc qspy::rec86  {} { ;# QS_USER + 16
+}
+proc qspy::rec87  {} { ;# QS_USER + 17
+}
+proc qspy::rec88  {} { ;# QS_USER + 18
+}
+proc qspy::rec89  {} { ;# QS_USER + 19
+}
+proc qspy::rec90  {} { ;# QS_USER + 20
+}
+proc qspy::rec91  {} { ;# QS_USER + 21
+}
+proc qspy::rec92  {} { ;# QS_USER + 22
+}
+proc qspy::rec93  {} { ;# QS_USER + 23
+}
+proc qspy::rec94  {} { ;# QS_USER + 24
+}
+proc qspy::rec95  {} { ;# QS_USER + 25
+}
+proc qspy::rec96  {} { ;# QS_USER + 26
+}
+proc qspy::rec97  {} { ;# QS_USER + 27
+}
+proc qspy::rec98  {} { ;# QS_USER + 28
+}
+proc qspy::rec99  {} { ;# QS_USER + 29
+}
+proc qspy::rec100 {} { ;# QS_USER + 30
+}
+proc qspy::rec101 {} { ;# QS_USER + 31
+}
+proc qspy::rec102 {} { ;# QS_USER + 32
+}
+proc qspy::rec103 {} { ;# QS_USER + 33
+}
+proc qspy::rec104 {} { ;# QS_USER + 34
+}
+proc qspy::rec105 {} { ;# QS_USER + 35
+}
+proc qspy::rec106 {} { ;# QS_USER + 36
+}
+proc qspy::rec107 {} { ;# QS_USER + 37
+}
+proc qspy::rec108 {} { ;# QS_USER + 38
+}
+proc qspy::rec109 {} { ;# QS_USER + 39
+}
+proc qspy::rec110 {} { ;# QS_USER + 40
+}
+proc qspy::rec111 {} { ;# QS_USER + 41
+}
+proc qspy::rec112 {} { ;# QS_USER + 42
+}
+proc qspy::rec113 {} { ;# QS_USER + 43
+}
+proc qspy::rec114 {} { ;# QS_USER + 44
+}
+proc qspy::rec115 {} { ;# QS_USER + 45
+}
+proc qspy::rec116 {} { ;# QS_USER + 46
+}
+proc qspy::rec117 {} { ;# QS_USER + 47
+}
+proc qspy::rec118 {} { ;# QS_USER + 48
+}
+proc qspy::rec119 {} { ;# QS_USER + 49
+}
+proc qspy::rec120 {} { ;# QS_USER + 50
+}
+proc qspy::rec121 {} { ;# QS_USER + 51
+}
+proc qspy::rec122 {} { ;# QS_USER + 52
+}
+proc qspy::rec123 {} { ;# QS_USER + 53
+}
+proc qspy::rec124 {} { ;# QS_USER + 54
+}
+
+
+# special record handlers ----------------------------------------------------
+proc qspy::recRESET {} { ;# target reset callback
+}
+proc qspy::recINFO  {} { ;# target info callback
+}
+
+# standard record handlers [1..54] -------------------------------------------
+proc qspy::rec0 {} { ;# QS_EMPTY
+}
+
+# [1] QEP records...
+proc qspy::rec1 {} { ;# QS_QEP_STATE_ENTRY
+}
+proc qspy::rec2 {} { ;# QS_QEP_STATE_EXIT
+}
+proc qspy::rec3 {} { ;# QS_QEP_STATE_INIT
+}
+proc qspy::rec4 {} { ;# QS_QEP_INIT_TRAN
+}
+proc qspy::rec5 {} { ;# QS_QEP_INTERN_TRAN
+}
+proc qspy::rec6 {} { ;# QS_QEP_TRAN
+}
+proc qspy::rec7 {} { ;# QS_QEP_IGNORED
+}
+proc qspy::rec8 {} { ;# QS_QEP_DISPATCH
+}
+proc qspy::rec9 {} { ;# QS_QEP_UNHANDLED
+}
+
+# [10] QF records...
+proc qspy::rec10 {} { ;# QS_QF_ACTIVE_ADD
+}
+proc qspy::rec11 {} { ;# QS_QF_ACTIVE_REMOVE
+}
+proc qspy::rec12 {} { ;# QS_QF_ACTIVE_SUBSCRIBE
+}
+proc qspy::rec13 {} { ;# QS_QF_ACTIVE_UNSUBSCRIBE
+}
+proc qspy::rec14 {} { ;# QS_QF_ACTIVE_POST_FIFO
+}
+proc qspy::rec15 {} { ;# QS_QF_ACTIVE_POST_LIFO
+}
+proc qspy::rec16 {} { ;# QS_QF_ACTIVE_GET
+}
+proc qspy::rec17 {} { ;# QS_QF_ACTIVE_GET_LAST
+}
+proc qspy::rec18 {} { ;# QS_QF_EQUEUE_INIT
+}
+proc qspy::rec19 {} { ;# QS_QF_EQUEUE_POST_FIFO
+}
+proc qspy::rec20 {} { ;# QS_QF_EQUEUE_POST_LIFO
+}
+proc qspy::rec21 {} { ;# QS_QF_EQUEUE_GET
+}
+proc qspy::rec22 {} { ;# QS_QF_EQUEUE_GET_LAST
+}
+proc qspy::rec23 {} { ;# QS_QF_MPOOL_INIT
+}
+proc qspy::rec24 {} { ;# QS_QF_MPOOL_GET
+}
+proc qspy::rec25 {} { ;# QS_QF_MPOOL_PUT
+}
+proc qspy::rec26 {} { ;# QS_QF_PUBLISH
+}
+proc qspy::rec27 {} { ;# QS_QF_RESERVED8
+}
+proc qspy::rec28 {} { ;# QS_QF_NEW
+}
+proc qspy::rec29 {} { ;# QS_QF_GC_ATTEMPT
+}
+proc qspy::rec30 {} { ;# QS_QF_GC
+}
+proc qspy::rec31 {} { ;# QS_QF_TICK
+}
+proc qspy::rec32 {} { ;# QS_QF_TIMEEVT_ARM
+}
+proc qspy::rec33 {} { ;# QS_QF_TIMEEVT_AUTO_DISARM
+}
+proc qspy::rec34 {} { ;# QS_QF_TIMEEVT_DISARM_ATTEMPT
+}
+proc qspy::rec35 {} { ;# QS_QF_TIMEEVT_DISARM
+}
+proc qspy::rec36 {} { ;# QS_QF_TIMEEVT_REARM
+}
+proc qspy::rec37 {} { ;# QS_QF_TIMEEVT_POST
+}
+proc qspy::rec38 {} { ;# QS_QF_TIMEEVT_CTR
+}
+proc qspy::rec39 {} { ;# QS_QF_CRIT_ENTRY
+}
+proc qspy::rec40 {} { ;# QS_QF_CRIT_EXIT
+}
+proc qspy::rec41 {} { ;# QS_QF_ISR_ENTRY
+}
+proc qspy::rec42 {} { ;# QS_QF_ISR_EXIT
+}
+proc qspy::rec43 {} { ;# QS_QF_INT_DISABLE
+}
+proc qspy::rec44 {} { ;# QS_QF_INT_ENABLE
+}
+proc qspy::rec45 {} { ;# QS_QF_ACTIVE_POST_ATTEMPT
+}
+proc qspy::rec46 {} { ;# QS_QF_EQUEUE_POST_ATTEMPT
+}
+proc qspy::rec47 {} { ;# QS_QF_MPOOL_GET_ATTEMPT
+}
+proc qspy::rec48 {} { ;# QS_QF_RESERVED1
+}
+proc qspy::rec49 {} { ;# QS_QF_RESERVED0
+}
+
+# [50] QK/QV records
+proc qspy::rec50 {} { ;# QS_QK_MUTEX_LOCK
+}
+proc qspy::rec51 {} { ;# QS_QK_MUTEX_UNLOCK
+}
+proc qspy::rec52 {} { ;# QS_QVK_SCHEDULE
+}
+proc qspy::rec53 {} { ;# QS_QVK_IDLE
+}
+proc qspy::rec54 {} { ;# QS_QK_RESUME
+}
+
+# [55] Additional QEP records
+proc qspy::rec55 {} { ;# QS_QEP_TRAN_HIST
+}
+proc qspy::rec56 {} { ;# QS_QEP_TRAN_EP
+}
+proc qspy::rec57 {} { ;# QS_QEP_TRAN_XP
+}
+proc qspy::rec58 {} { ;# QS_QEP_RESERVED1
+}
+proc qspy::rec59 {} { ;# QS_QEP_RESERVED0
+}
+
+# Miscellaneous QS records
+proc qspy::rec60 {} { ;# QS_SIG_DICT
+}
+proc qspy::rec61 {} { ;# QS_OBJ_DICT
+}
+proc qspy::rec62 {} { ;# QS_FUN_DICT
+}
+proc qspy::rec63 {} { ;# QS_USR_DICT
+}
+
+# proc qspy::64 ;# QS_TARGET_INFO not used, see proc recINFO
+
+proc qspy::rec65 {} { ;# QS_RESERVED0
+}
+proc qspy::rec66 {} { ;# QS_RX_STATUS
+}
+proc qspy::rec67 {} { ;# QS_TEST_STATUS
+}
+proc qspy::rec68 {} { ;# QS_PEEK_DATA
+}
+proc qspy::rec69 {} { ;# QS_ASSERT_FAIL
+}
+

examples/arm-cm/dpp_efm32-slstk3401a/qspyview/qspyview.bat

@@ -0,0 +1,4 @@
+if "%QTOOLS%"=="" (
+    set QTOOLS=C:\qp\qtools
+)
+wish %QTOOLS%\qspy\tcl\qspyview.tcl dpp.tcl

examples/arm-cm/dpp_efm32-slstk3401a/qv/bsp.c

@@ -1,7 +1,7 @@
 /*****************************************************************************
 * Product: DPP example, EFM32-SLSTK3401A board, cooperative QV kernel
-* Last Updated for Version: 5.6.5
+* Last Updated for Version: 5.9.0
-* Date of the Last Update:  2016-05-08
+* Date of the Last Update:  2017-04-14
 *
 *                    Q u a n t u m     L e a P s
 *                    ---------------------------
@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"
@@ -114,7 +114,8 @@ void SysTick_Handler(void) {
     }
 #endif
 
-    QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */
+    //QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */
+    QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); /* post to Ticker0 */
 
     /* Perform the debouncing of buttons. The algorithm for debouncing
     * adapted from the book "Embedded Systems Dictionary" by Jack Ganssle
@@ -139,7 +140,7 @@ void SysTick_Handler(void) {
 
 }
 /*..........................................................................*/
-void GPIO_EVEN_IRQHandler(void) {
+void GPIO_EVEN_IRQHandler(void) { /* for testing, NOTE03 */
     QACTIVE_POST(AO_Table, Q_NEW(QEvt, MAX_PUB_SIG), /* for testing... */
                  &l_GPIO_EVEN_IRQHandler);
 }
@@ -462,13 +463,19 @@ void QS_onReset(void) {
 }
 /*..........................................................................*/
 /*! callback function to execute a user command (to be implemented in BSP) */
-void QS_onCommand(uint8_t cmdId, uint32_t param) {
+void QS_onCommand(uint8_t cmdId,
+                  uint32_t param1, uint32_t param2, uint32_t param3)
+{
     void assert_failed(char const *module, int loc);
     (void)cmdId;
-    (void)param;
+    (void)param1;
+    (void)param2;
+    (void)param3;
     QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */
         QS_U8(2, cmdId);
-        QS_U32(8, param);
+        QS_U32(8, param1);
+        QS_U32(8, param2);
+        QS_U32(8, param3);
     QS_END()
 
     if (cmdId == 10U) {
@@ -512,4 +519,13 @@ void QS_onCommand(uint8_t cmdId, uint32_t param) {
 * of the LED is proportional to the frequency of invcations of the idle loop.
 * Please note that the LED is toggled with interrupts locked, so no interrupt
 * execution time contributes to the brightness of the User LED.
+*
+* NOTE03:
+* GPIO_EVEN_IRQHandler() is for testing various preemption scenarios in QV.
+* The general testing strategy is to trigger this IRQ manually from the
+* debugger. To do so in IAR, you need to:
+* 1. open the Register view
+* 2. open NVIC registers
+* 3. scroll down to NVIC_ISPR0 register
+* 4. write 0x200 to NVIC_ISPR0.SETPEND register
 */

examples/arm-cm/dpp_efm32-slstk3401a/qv/gnu/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile:

examples/arm-cm/dpp_efm32-slstk3401a/qv/main.c

@@ -1,13 +1,13 @@
 /*****************************************************************************
 * Product: DPP example
-* Last Updated for Version: 5.6.2
+* Last Updated for Version: 5.9.0
-* Date of the Last Update:  2016-03-23
+* Date of the Last Update:  2017-03-13
 *
 *                    Q u a n t u m     L e a P s
 *                    ---------------------------
 *                    innovating embedded systems
 *
-* Copyright (C) Quantum Leaps, LLC. state-machine.com.
+* Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved.
 *
 * This program is open source software: you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as published
@@ -28,13 +28,16 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* Web  : http://www.state-machine.com
+* https://state-machine.com
-* Email: info@state-machine.com
+* mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"
 #include "dpp.h"
 #include "bsp.h"
 
+static QTicker l_ticker0;
+QActive *the_Ticker0 = &l_ticker0;
+
 /*..........................................................................*/
 int main() {
     static QEvt const *tableQueueSto[N_PHILO];
@@ -45,6 +48,7 @@ int main() {
 
     Philo_ctor(); /* instantiate all Philosopher active objects */
     Table_ctor(); /* instantiate the Table active object */
+    QTicker_ctor(&l_ticker0, 0U); /* ticker AO for tick rate 0 */
 
     QF_init();    /* initialize the framework and the underlying RT kernel */
     BSP_init();   /* initialize the Board Support Package */
@@ -64,18 +68,20 @@ int main() {
     /* initialize event pools... */
     QF_poolInit(smlPoolSto, sizeof(smlPoolSto), sizeof(smlPoolSto[0]));
 
+    QACTIVE_START(the_Ticker0, 1U, 0, 0, 0, 0, 0);
+
     /* start the active objects... */
     for (n = 0U; n < N_PHILO; ++n) {
         QACTIVE_START(AO_Philo[n],           /* AO to start */
-                      (uint_fast8_t)(n + 1), /* QP priority of the AO */
+                      (uint_fast8_t)(n + 2), /* QP priority of the AO */
                       philoQueueSto[n],      /* event queue storage */
                       Q_DIM(philoQueueSto[n]), /* queue length [events] */
                       (void *)0,             /* stack storage (not used) */
                       0U,                    /* size of the stack [bytes] */
-                     (QEvt *)0);             /* initialization event */
+                      (QEvt *)0);            /* initialization event */
     }
     QACTIVE_START(AO_Table,                  /* AO to start */
-                  (uint_fast8_t)(N_PHILO + 1), /* QP priority of the AO */
+                  (uint_fast8_t)(N_PHILO + 2), /* QP priority of the AO */
                   tableQueueSto,             /* event queue storage */
                   Q_DIM(tableQueueSto),      /* queue length [events] */
                   (void *)0,                 /* stack storage (not used) */

examples/arm-cm/dpp_efm32-slstk3401a/qxk/bsp.c

@@ -1,7 +1,7 @@
 /*****************************************************************************
 * Product: DPP example, EFM32-SLSTK3401A board, preemptive QXK kernel
-* Last Updated for Version: 5.7.2
+* Last Updated for Version: 5.9.0
-* Date of the Last Update:  2016-09-29
+* Date of the Last Update:  2017-04-14
 *
 *                    Q u a n t u m     L e a P s
 *                    ---------------------------
@@ -28,7 +28,7 @@
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Contact information:
-* http://www.state-machine.com
+* https://state-machine.com
 * mailto:info@state-machine.com
 *****************************************************************************/
 #include "qpc.h"
@@ -48,7 +48,7 @@ Q_DEFINE_THIS_FILE
 * DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
 */
 enum KernelUnawareISRs { /* see NOTE00 */
-    UART0_PRIO,
+    USART0_RX_PRIO,
     /* ... */
     MAX_KERNEL_UNAWARE_CMSIS_PRI  /* keep always last */
 };
@@ -118,7 +118,8 @@ void SysTick_Handler(void) {
     }
 #endif
 
-    QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */
+    //QF_TICK_X(0U, &l_SysTick_Handler); /* process time events for rate 0 */
+    QACTIVE_POST(the_Ticker0, 0, &l_SysTick_Handler); // post to Ticker0 */
 
     /* Perform the debouncing of buttons. The algorithm for debouncing
     * adapted from the book "Embedded Systems Dictionary" by Jack Ganssle
@@ -144,15 +145,7 @@ void SysTick_Handler(void) {
     QXK_ISR_EXIT(); /* inform QXK about exiting an ISR */
 }
 /*..........................................................................*/
-/* The following IRQ handler is for testing various preemption scenarios
+void GPIO_EVEN_IRQHandler(void) { /* for testing, NOTE03 */
-* in QXK. The general testing strategy is to trigger this IRQ manually
-* from the debugger. To do so in IAR, you need to:
-* 1. open the Register view
-* 2. open NVIC registers
-* 3. scroll down to NVIC_ISPR0 register
-* 4. write 0x200 to NVIC_ISPR0.SETPEND register
-*/
-void GPIO_EVEN_IRQHandler(void) {
     QXK_ISR_ENTRY(); /* inform QXK about entering an ISR */
 
 //    QACTIVE_POST(AO_Table, Q_NEW(QEvt, TEST_SIG), /* for testing... */
@@ -301,7 +294,7 @@ void QF_onStartup(void) {
     * Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority().
     * DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
     */
-    NVIC_SetPriority(USART0_RX_IRQn, UART0_PRIO);
+    NVIC_SetPriority(USART0_RX_IRQn, USART0_RX_PRIO);
     NVIC_SetPriority(SysTick_IRQn,   SYSTICK_PRIO);
     NVIC_SetPriority(GPIO_EVEN_IRQn, GPIO_EVEN_PRIO);
     /* ... */
@@ -486,13 +479,19 @@ void QS_onReset(void) {
 }
 /*..........................................................................*/
 /*! callback function to execute a user command (to be implemented in BSP) */
-void QS_onCommand(uint8_t cmdId, uint32_t param) {
+void QS_onCommand(uint8_t cmdId,
+                  uint32_t param1, uint32_t param2, uint32_t param3)
+{
     void assert_failed(char const *module, int loc);
     (void)cmdId;
-    (void)param;
+    (void)param1;
-    QS_BEGIN(COMMAND_STAT, (void *)0) /* application-specific record begin */
+    (void)param2;
+    (void)param3;
+    QS_BEGIN(COMMAND_STAT, (void *)1) /* application-specific record begin */
         QS_U8(2, cmdId);
-        QS_U32(8, param);
+        QS_U32(8, param1);
+        QS_U32(8, param2);
+        QS_U32(8, param3);
     QS_END()
 
     if (cmdId == 10U) {
@@ -530,4 +529,13 @@ void QS_onCommand(uint8_t cmdId, uint32_t param) {
 * of the LED is proportional to the frequency of invcations of the idle loop.
 * Please note that the LED is toggled with interrupts locked, so no interrupt
 * execution time contributes to the brightness of the User LED.
+*
+* NOTE03:
+* GPIO_EVEN_IRQHandler() is for testing various preemption scenarios in QXK.
+* The general testing strategy is to trigger this IRQ manually from the
+* debugger. To do so in IAR, you need to:
+* 1. open the Register view
+* 2. open NVIC registers
+* 3. scroll down to NVIC_ISPR0 register
+* 4. write 0x200 to NVIC_ISPR0.SETPEND register
 */

examples/arm-cm/dpp_efm32-slstk3401a/qxk/gnu/Makefile

@@ -28,7 +28,7 @@
 # along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 # Contact information:
-# http://www.state-machine.com
+# https://state-machine.com
 # mailto:info@state-machine.com
 ##############################################################################
 # examples of invoking this Makefile: