From 3a6276e77b8c89f07540ed42cdfbdce421a4a572 Mon Sep 17 00:00:00 2001 From: MMS Date: Thu, 28 Jan 2021 18:03:46 -0500 Subject: [PATCH] 6.9.2a fixed bug https://sourceforge.net/p/qpc/bugs/293/ --- .../qk/armclang/blinky-qk.uvoptx | 4 +- .../qv/armclang/dpp-qv.uvoptx | 4 +- examples/qutest/self_test/test/test_assert.py | 19 + .../qutest/self_test/test/test_efm32.uvoptx | 593 ++++++++++++++++++ .../qutest/self_test/test/test_efm32.uvprojx | 547 ++++++++++++++++ examples/qutest/self_test/test/test_qutest.c | 15 +- .../self_test/test/test_tm4c123-arm.uvoptx | 46 +- examples/qutest/target_efm32/qutest_port.c | 6 +- examples/qutest/target_tm4c123/qutest_port.c | 8 +- src/qs/qs_rx.c | 17 +- 10 files changed, 1236 insertions(+), 23 deletions(-) create mode 100644 examples/qutest/self_test/test/test_assert.py create mode 100644 examples/qutest/self_test/test/test_efm32.uvoptx create mode 100644 examples/qutest/self_test/test/test_efm32.uvprojx diff --git a/examples/arm-cm/blinky_efm32-slstk3401a/qk/armclang/blinky-qk.uvoptx b/examples/arm-cm/blinky_efm32-slstk3401a/qk/armclang/blinky-qk.uvoptx index 922d6900..0c42b07a 100644 --- a/examples/arm-cm/blinky_efm32-slstk3401a/qk/armclang/blinky-qk.uvoptx +++ b/examples/arm-cm/blinky_efm32-slstk3401a/qk/armclang/blinky-qk.uvoptx @@ -75,7 +75,7 @@ 1 0 - 0 + 1 3 @@ -269,7 +269,7 @@ 1 0 - 1 + 0 3 diff --git a/examples/arm-cm/dpp_efm32-slstk3401a/qv/armclang/dpp-qv.uvoptx b/examples/arm-cm/dpp_efm32-slstk3401a/qv/armclang/dpp-qv.uvoptx index 070f10ef..f8faded1 100644 --- a/examples/arm-cm/dpp_efm32-slstk3401a/qv/armclang/dpp-qv.uvoptx +++ b/examples/arm-cm/dpp_efm32-slstk3401a/qv/armclang/dpp-qv.uvoptx @@ -75,7 +75,7 @@ 1 0 - 0 + 1 3 @@ -264,7 +264,7 @@ 1 0 - 1 + 0 3 diff --git a/examples/qutest/self_test/test/test_assert.py b/examples/qutest/self_test/test/test_assert.py new file mode 100644 index 00000000..41b1b461 --- /dev/null +++ b/examples/qutest/self_test/test/test_assert.py @@ -0,0 +1,19 @@ +# test-script for QUTest unit testing harness +# see https://www.state-machine.com/qtools/qutest.html + +# preamble... +def on_setup(): + expect("@timestamp FIXTURE_SETUP") + +def on_teardown(): + expect("@timestamp FIXTURE_TEARDOWN") + +# tests... +test("Assert 0") +command("COMMAND_A", 0) +expect("@timestamp =ASSERT= Mod=test_qutest,Loc=100") + +test("Assert 1") +command("COMMAND_A", 1) +expect("@timestamp COMMAND_A 1") +expect("@timestamp Trg-Done QS_RX_COMMAND") diff --git a/examples/qutest/self_test/test/test_efm32.uvoptx b/examples/qutest/self_test/test/test_efm32.uvoptx new file mode 100644 index 00000000..bb3582c9 --- /dev/null +++ b/examples/qutest/self_test/test/test_efm32.uvoptx @@ -0,0 +1,593 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + test_efm32 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 1 + 0 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\dbg_armclang\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 3 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + DLGUARM + d + + + 0 + JL2CM3 + -U440060969 -O207 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0GECKOP2.FLM -FS00 -FL040000 -FP0($$Device:EFM32PG1B200F256GM48$Flash\GECKOP2.FLM) + + + 0 + UL2CM3 + UL2CM3(-O207 -S0 -C0 -FO7 -FN1 -FC1000 -FD20000000 -FF0GECKOP2 -FL040000 -FS00 -FP0($$Device:EFM32PG1B200F256GM48$Flash\GECKOP2.FLM) + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + + + 0 + 0 + 100 + 1 +
8370
+ 0 + 0 + 0 + 0 + 0 + 1 + .\test_qutest.c + + \\test_efm32\test_qutest.c\100 + + + + + 0 + 1 + QS_rxPriv_ + + + + + 1 + 2 + 0x20000200 + 0 + + + + + 2 + 0 + 0x400 + 0 + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + Applicatioin + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\..\..\include\qstamp.c + qstamp.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\test_qutest.c + test_qutest.c + 0 + 0 + + + + + efm32pg1b + 1 + 0 + 0 + 0 + + 2 + 3 + 2 + 0 + 0 + 0 + ..\..\..\..\3rd_party\efm32pg1b\arm\startup_efm32pg1b.s + startup_efm32pg1b.s + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\3rd_party\efm32pg1b\system_efm32pg1b.c + system_efm32pg1b.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\3rd_party\efm32pg1b\em_cmu.c + em_cmu.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\3rd_party\efm32pg1b\em_emu.c + em_emu.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\3rd_party\efm32pg1b\em_gpio.c + em_gpio.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\3rd_party\efm32pg1b\em_system.c + em_system.c + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\3rd_party\efm32pg1b\em_usart.c + em_usart.c + 0 + 0 + + + + + QP + 1 + 0 + 0 + 0 + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qep_hsm.c + qep_hsm.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qep_msm.c + qep_msm.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_act.c + qf_act.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_actq.c + qf_actq.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_defer.c + qf_defer.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_dyn.c + qf_dyn.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_mem.c + qf_mem.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_ps.c + qf_ps.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_qact.c + qf_qact.c + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_qeq.c + qf_qeq.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_qmact.c + qf_qmact.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qf\qf_time.c + qf_time.c + 0 + 0 + + + 3 + 22 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qs\qs.c + qs.c + 0 + 0 + + + 3 + 23 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qs\qs_64bit.c + qs_64bit.c + 0 + 0 + + + 3 + 24 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qs\qs_fp.c + qs_fp.c + 0 + 0 + + + 3 + 25 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qs\qs_rx.c + qs_rx.c + 0 + 0 + + + 3 + 26 + 1 + 0 + 0 + 0 + ..\..\..\..\src\qs\qutest.c + qutest.c + 0 + 0 + + + + + QP_port + 1 + 0 + 0 + 0 + + 4 + 27 + 1 + 0 + 0 + 0 + ..\..\target_efm32\qutest_port.c + qutest_port.c + 0 + 0 + + + + diff --git a/examples/qutest/self_test/test/test_efm32.uvprojx b/examples/qutest/self_test/test/test_efm32.uvprojx new file mode 100644 index 00000000..22cec57e --- /dev/null +++ b/examples/qutest/self_test/test/test_efm32.uvprojx @@ -0,0 +1,547 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + test_efm32 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + EFM32PG1B200F256GM48 + Silicon Labs + SiliconLabs.EFM32PG1B_DFP.5.5.0 + https://www.silabs.com/documents/public/cmsis-packs/ + IRAM(0x20000000,0x00008000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GECKOP2 -FS00 -FL040000 -FP0($$Device:EFM32PG1B200F256GM48$Flash\GECKOP2.FLM)) + 0 + $$Device:EFM32PG1B200F256GM48$Device\SiliconLabs\EFM32PG1B\Include\em_device.h + + + + + + + + + + $$Device:EFM32PG1B200F256GM48$SVD\EFM32PG1B\EFM32PG1B200F256GM48.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\dbg_armclang\ + test_efm32 + 1 + 0 + 0 + 1 + 1 + .\dbg_armclang\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + cmd /c "del .\dbg_armclang\qstamp.o" + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin --output .\dbg_armclang\test_efm32.bin .\dbg_armclang\test_efm32.axf + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4097 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + Q_SPY Q_UTEST __FPU_PRESENT + + .;..\src;..\..\..\..\include;..\..\..\..\src;..\..\..\..\ports\arm-cm\qutest;..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\3rd_party\efm32pg1b + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + + + Stack_Size=1024 Heap_Size=16 + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + --entry Reset_Handler + + + + + + + + Applicatioin + + + qstamp.c + 1 + ..\..\..\..\include\qstamp.c + + + test_qutest.c + 1 + .\test_qutest.c + + + + + efm32pg1b + + + startup_efm32pg1b.s + 2 + ..\..\..\..\3rd_party\efm32pg1b\arm\startup_efm32pg1b.s + + + system_efm32pg1b.c + 1 + ..\..\..\..\3rd_party\efm32pg1b\system_efm32pg1b.c + + + em_cmu.c + 1 + ..\..\..\..\3rd_party\efm32pg1b\em_cmu.c + + + em_emu.c + 1 + ..\..\..\..\3rd_party\efm32pg1b\em_emu.c + + + em_gpio.c + 1 + ..\..\..\..\3rd_party\efm32pg1b\em_gpio.c + + + em_system.c + 1 + ..\..\..\..\3rd_party\efm32pg1b\em_system.c + + + em_usart.c + 1 + ..\..\..\..\3rd_party\efm32pg1b\em_usart.c + + + + + QP + + + qep_hsm.c + 1 + ..\..\..\..\src\qf\qep_hsm.c + + + qep_msm.c + 1 + ..\..\..\..\src\qf\qep_msm.c + + + qf_act.c + 1 + ..\..\..\..\src\qf\qf_act.c + + + qf_actq.c + 1 + ..\..\..\..\src\qf\qf_actq.c + + + qf_defer.c + 1 + ..\..\..\..\src\qf\qf_defer.c + + + qf_dyn.c + 1 + ..\..\..\..\src\qf\qf_dyn.c + + + qf_mem.c + 1 + ..\..\..\..\src\qf\qf_mem.c + + + qf_ps.c + 1 + ..\..\..\..\src\qf\qf_ps.c + + + qf_qact.c + 1 + ..\..\..\..\src\qf\qf_qact.c + + + qf_qeq.c + 1 + ..\..\..\..\src\qf\qf_qeq.c + + + qf_qmact.c + 1 + ..\..\..\..\src\qf\qf_qmact.c + + + qf_time.c + 1 + ..\..\..\..\src\qf\qf_time.c + + + qs.c + 1 + ..\..\..\..\src\qs\qs.c + + + qs_64bit.c + 1 + ..\..\..\..\src\qs\qs_64bit.c + + + qs_fp.c + 1 + ..\..\..\..\src\qs\qs_fp.c + + + qs_rx.c + 1 + ..\..\..\..\src\qs\qs_rx.c + + + qutest.c + 1 + ..\..\..\..\src\qs\qutest.c + + + + + QP_port + + + qutest_port.c + 1 + ..\..\target_efm32\qutest_port.c + + + + + + + + + + + + + + diff --git a/examples/qutest/self_test/test/test_qutest.c b/examples/qutest/self_test/test/test_qutest.c index 8c7eff98..1faa9128 100644 --- a/examples/qutest/self_test/test/test_qutest.c +++ b/examples/qutest/self_test/test/test_qutest.c @@ -1,7 +1,7 @@ /***************************************************************************** * Purpose: Fixture for QUTEST self-test -* Last Updated for Version: 6.9.2 -* Date of the Last Update: 2021-01-13 +* Last Updated for Version: 6.9.2a +* Date of the Last Update: 2021-01-28 * * Q u a n t u m L e a P s * ------------------------ @@ -33,7 +33,7 @@ *****************************************************************************/ #include "qpc.h" /* for QUTEST */ -Q_DEFINE_THIS_FILE +Q_DEFINE_THIS_MODULE("test_qutest") /*--------------------------------------------------------------------------*/ static uint8_t buffer[100]; @@ -42,6 +42,7 @@ static uint32_t myFun(void); enum { FIXTURE_SETUP = QS_USER, FIXTURE_TEARDOWN, + COMMAND_A, COMMAND_X, COMMAND_Y, COMMAND_Z, @@ -65,6 +66,7 @@ int main(int argc, char *argv[]) { QS_USR_DICTIONARY(FIXTURE_SETUP); QS_USR_DICTIONARY(FIXTURE_TEARDOWN); + QS_USR_DICTIONARY(COMMAND_A); QS_USR_DICTIONARY(COMMAND_X); QS_USR_DICTIONARY(COMMAND_Y); QS_USR_DICTIONARY(COMMAND_Z); @@ -94,6 +96,13 @@ void QS_onCommand(uint8_t cmdId, (void)param3; switch (cmdId) { + case COMMAND_A: { + Q_ASSERT_ID(100, param1 != 0U); + QS_BEGIN_ID(COMMAND_A, 0U) /* app-specific record */ + QS_U32(0, param1); + QS_END() + break; + } case COMMAND_X: { uint32_t x = myFun(); QS_BEGIN_ID(COMMAND_X, 0U) /* app-specific record */ diff --git a/examples/qutest/self_test/test/test_tm4c123-arm.uvoptx b/examples/qutest/self_test/test/test_tm4c123-arm.uvoptx index 09f1f127..2a7ee44a 100644 --- a/examples/qutest/self_test/test/test_tm4c123-arm.uvoptx +++ b/examples/qutest/self_test/test/test_tm4c123-arm.uvoptx @@ -117,6 +117,10 @@ BIN\lmidk-agdi.dll + + 0 + DLGUARM + 0 ARMRTXEVENTFLAGS @@ -143,7 +147,47 @@ -U0E2006F4 -O4622 -S4 -FO61 - + + + 0 + 0 + 438 + 1 +
15012
+ 0 + 0 + 0 + 0 + 0 + 1 + ..\..\..\..\src\qs\qutest.c + + \\test_tm4c123_arm\../../../../src/qs/qutest.c\438 + + + 1 + 0 + 100 + 1 +
7886
+ 0 + 0 + 0 + 0 + 0 + 1 + .\test_qutest.c + + \\test_tm4c123_arm\test_qutest.c\100 + + + + + 0 + 1 + QS_rxPriv_ + + 1 diff --git a/examples/qutest/target_efm32/qutest_port.c b/examples/qutest/target_efm32/qutest_port.c index c783fd36..760cc223 100644 --- a/examples/qutest/target_efm32/qutest_port.c +++ b/examples/qutest/target_efm32/qutest_port.c @@ -1,7 +1,7 @@ /***************************************************************************** * Product: QUTEST port for the EFM32-SLSTK3401A board -* Last updated for version 6.9.2 -* Last updated on 2021-01-13 +* Last updated for version 6.9.2a +* Last updated on 2021-01-28 * * Q u a n t u m L e a P s * ------------------------ @@ -98,6 +98,8 @@ uint8_t QS_onStartup(void const *arg) { 0 /* Auto CS Setup cycles */ }; + (void)arg; /* unused parameter */ + QS_initBuf (qsTxBuf, sizeof(qsTxBuf)); QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf)); diff --git a/examples/qutest/target_tm4c123/qutest_port.c b/examples/qutest/target_tm4c123/qutest_port.c index 341d5583..acdd3f9b 100644 --- a/examples/qutest/target_tm4c123/qutest_port.c +++ b/examples/qutest/target_tm4c123/qutest_port.c @@ -1,13 +1,13 @@ /***************************************************************************** * Product: QUTEST port for the EK-TM4C123GXL board -* Last updated for version 6.9.1 -* Last updated on 2020-10-06 +* Last updated for version 6.9.2a +* Last updated on 2021-01-28 * * Q u a n t u m L e a P s * ------------------------ * Modern Embedded Software * -* Copyright (C) 2005-2020 Quantum Leaps, LLC. All rights reserved. +* Copyright (C) 2005-2021 Quantum Leaps, LLC. All rights reserved. * * This program is open source software: you can redistribute it and/or * modify it under the terms of the GNU General Public License as published @@ -88,6 +88,8 @@ uint8_t QS_onStartup(void const *arg) { static uint8_t qsRxBuf[100]; /* buffer for QS receive channel */ uint32_t tmp; + (void)arg; /* unused parameter */ + QS_initBuf (qsTxBuf, sizeof(qsTxBuf)); QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf)); diff --git a/src/qs/qs_rx.c b/src/qs/qs_rx.c index 2891f395..4515bcbb 100644 --- a/src/qs/qs_rx.c +++ b/src/qs/qs_rx.c @@ -4,8 +4,8 @@ * @ingroup qs * @cond ****************************************************************************** -* Last updated for version 6.9.2 -* Last updated on 2021-01-22 +* Last updated for version 6.9.2a +* Last updated on 2021-01-28 * * Q u a n t u m L e a P s * ------------------------ @@ -390,14 +390,12 @@ void QS_queryCurrObj(uint8_t obj_kind) { /****************************************************************************/ void QS_rxParse(void) { QSCtr head = QS_rxPriv_.head; - QSCtr tail = QS_rxPriv_.tail; - QSCtr end = QS_rxPriv_.end; - while (head != tail) { /* QS-RX buffer NOT empty? */ - uint8_t b = *QS_RX_AT_(tail); + while (head != QS_rxPriv_.tail) { /* QS-RX buffer NOT empty? */ + uint8_t b = *QS_RX_AT_(QS_rxPriv_.tail); - ++tail; - if (tail == end) { - tail = 0U; + ++QS_rxPriv_.tail; + if (QS_rxPriv_.tail == QS_rxPriv_.end) { + QS_rxPriv_.tail = 0U; } if (l_rx.esc != 0U) { /* escaped byte arrived? */ @@ -431,7 +429,6 @@ void QS_rxParse(void) { QS_rxParseData_(b); } } - QS_rxPriv_.tail = tail; } /****************************************************************************/