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5.9.6-beta

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Quantum Leaps 2017-07-28 22:53:23 -04:00
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36 changed files with 10238 additions and 10427 deletions
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109
3rd_party/CMSIS/Include/cmsis_ccs.h vendored
View File

@ -1,9 +1,6 @@
//*****************************************************************************
// Updated by Quantum Leaps for CMIS 5.0.1
// 2016-12-12
//*****************************************************************************
//
// Copyright (C) 2012 - 2014 Texas Instruments Incorporated - http://www.ti.com/
// Copyright (C) 2012 - 2017 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
@ -40,51 +37,9 @@
#ifndef CMSIS_CCS_H_
#define CMSIS_CCS_H_
// Data Synchronization Barrier
__attribute__( ( always_inline ) ) static inline void __DSB(void)
{
__asm(" dsb");
}
// Instruction Synchronization Barrier
__attribute__( ( always_inline ) ) static inline void __ISB(void)
{
__asm(" isb");
}
#if (0)
// Get Main Stack Pointer
static inline uint32_t __get_MSP(void)
{
register uint32_t result;
//__asm (" mrs result, msp");
return(result);
}
// Set Main Stack Pointer
static inline void __set_MSP(uint32_t topOfMainStack)
{
asm(" .global topOfMainStack");
__asm (" msr msp, topOfMainStack");
}
// Get Priority Mask
static inline uint32_t __get_PRIMASK(void)
{
uint32_t result;
__asm (" mrs result, primask");
return(result);
}
// Set Priority Mask
static inline void __set_PRIMASK(uint32_t priMask)
{
__asm (" msr primask, priMask");
}
#endif
//*****************************************************************************
// CMSIS-compatible instruction calls
//*****************************************************************************
//
// v5e, v6, Cortex-M3, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
@ -94,9 +49,6 @@ static inline void __set_PRIMASK(uint32_t priMask)
#define __SXTH _sxth
#define __UXTB _uxtb
#define __UXTH _uxth
#define __NOP __nop
#define __WFI __wfi
// CCS supports intrinsics to take advantage of the shift operand left/right
// before saturation extension of SSAT, but CMSIS does not take advantage
// of those, so tell the compiler to use a sat & shift left with a shift
@ -108,9 +60,58 @@ static inline void __set_PRIMASK(uint32_t priMask)
// Only define M4 based intrinsics if we're not using an M4
//
#if defined (__TI_TMS470_V7M4__)
//
// Add definitions for enable and disable interrupts
//
#if defined (__TI_COMPILER_VERSION__)
#if (__TI_COMPILER_VERSION__ >= 5002000)
#define __enable_irq _enable_IRQ
#define __disable_irq _disable_IRQ
// No Operation
#define __NOP __nop
// Data Synchronization Barrier
#define __DSB _dsb
#define __ISB _isb
#elif (__TI_COMPILER_VERSION__ >= 4009000)
#define __enable_fault_irq _enable_interrupts
#define __disable_fault_irq _disable_interrupts
// No Operation
__attribute__( ( always_inline ) ) static inline void __nop(void)
{
__asm(" nop");
}
__attribute__( ( always_inline ) ) static inline void __NOP(void)
{
__asm(" nop");
}
// Data Synchronization Barrier
__attribute__( ( always_inline ) ) static inline void __DSB(void)
{
__asm(" dsb");
}
__attribute__( ( always_inline ) ) static inline void __ISB(void)
{
__asm(" isb");
}
#endif /*__TI_COMPILER_VERSION__ version*/
#endif /*__TI_COMPILER_VERSION__*/
//
// V5E, V6, Cortex-M4, Cortex-R4, and Cortex-A8 compiler intrinsics
//
#define __ROR __ror
#define __SXTB16(src) _sxtb16((src),0)
#define __QADD _sadd
#define __QDADD _sdadd
#define __QDSUB _sdsub
@ -157,7 +158,7 @@ static inline void __set_PRIMASK(uint32_t priMask)
#define __SHSUB8 _shsub8
#define __SMLAD _smlad
#define __SMLADX _smladx
#define __SMLALD _smlald
#define __SMLALD(src1, src2, accumulator) _smlald(accumulator, src1, src2)
#define __SMLALDX _smlaldx
#define __SMLSD _smlsd
#define __SMLSDX _smlsdx
@ -172,7 +173,7 @@ static inline void __set_PRIMASK(uint32_t priMask)
#define __SMUAD _smuad
#define __SMUADX _smuadx
#define __SMUSD _smusd
#define __SMUSDX _smusd
#define __SMUSDX _smusdx
#define __SSAT16 _ssat16
#define __SSUB16 _ssub16
#define __SSUB8 _ssub8

18
README.md
View File

@ -1,8 +1,9 @@
![QP framework](https://state-machine.com/img/qp_banner.jpg)
> **NOTE:** If your company has a policy forbidding open source in your product, all QP frameworks can be [licensed commercially](https://state-machine.com/licensing), in which case you don't use any open source license and you do not violate your policy.
# What's New?
View QP/C Revision History at:
https://state-machine.com/qpc/history.html
View QP/C Revision History at: https://state-machine.com/qpc/history.html
---------------------------------------------------------------------------
# About QP/C
@ -71,14 +72,19 @@ https://state-machine.com/doc/AN_Getting_Started_with_QPC.pdf
The guide also contains a tutorial, in which you build a simple "Blinky"
application.
> NOTE: QP/C can be unzipped anywhere in your file system, but the
recommended location is `C:\qp\qpcpp` on Windows and `~/qp/qpcpp`
> **NOTE:** QP/C can be unzipped anywhere in your file system, but the
recommended location is `C:\qp\qpc` on Windows and `~/qp/qpc`
on Linux/MacOS.
---------------------------------------------------------------------------
# QP/C Licensing
QP/C is licensed under the increasingly popular [dual licensing model](https://state-machine.com/licensing), in which both the open source software distribution mechanism and traditional closed source software distribution models are combined.
> **NOTE:** If your company has a policy forbidding open source in your product, all QP frameworks can be [licensed commercially](https://state-machine.com/licensing), in which case you don't use any open source license and you do not violate your policy.
---------------------------------------------------------------------------
# QP/C Documentation
The **QP/C Manual** is located online at:
- https://state-machine.com/qpc
The **QP/C Manual** is located online at: https://state-machine.com/qpc
---------------------------------------------------------------------------
# How to get help?

804
examples/arm-cm/dpp_efm32-slstk3401a/qv/iar/dpp-qv.ewd
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File diff suppressed because it is too large Load Diff

481
examples/arm-cm/dpp_efm32-slstk3401a/qv/iar/dpp-qv.ewp
View File

@ -1,7 +1,6 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<?xml version="1.0" encoding="UTF-8"?>
<project>
<fileVersion>2</fileVersion>
<fileVersion>3</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
@ -12,7 +11,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>24</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -31,23 +30,13 @@
<name>GEndianMode</name>
<state>0</state>
</option>
<option>
<name>Input variant</name>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
<state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
</option>
<option>
<name>Output variant</name>
<version>2</version>
<state>7</state>
<state>No specifier n, no float nor long long, no scan set, no assignment suppressing, without multibyte support.</state>
</option>
<option>
<name>Output description</name>
<state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
<state>No specifier a, A, no specifier n, no float nor long long, no flags, without multibyte support.</state>
</option>
<option>
<name>GOutputBinary</name>
@ -77,7 +66,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>7.70.1.11471</state>
<state>8.11.1.13270</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -127,7 +116,7 @@
</option>
<option>
<name>GBECoreSlave</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
@ -144,7 +133,7 @@
</option>
<option>
<name>CoreVariant</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
@ -167,16 +156,53 @@
</option>
<option>
<name>GFPUCoreSlave2</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
<name>OGCMSISPackSelectDevice</name>
</option>
<option>
<name>OgLibHeap</name>
<state>0</state>
</option>
<option>
<name>OGLibAdditionalLocale</name>
<state>0</state>
</option>
<option>
<name>OGPrintfVariant</name>
<version>0</version>
<state>4</state>
</option>
<option>
<name>OGPrintfMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>OGScanfVariant</name>
<version>0</version>
<state>3</state>
</option>
<option>
<name>OGScanfMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>GenLocaleTags</name>
<state></state>
</option>
<option>
<name>GenLocaleDisplayOnly</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>31</version>
<version>34</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -280,10 +306,6 @@
<name>CCRequirePrototypes</name>
<state>1</state>
</option>
<option>
<name>CCMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>CCDiagWarnAreErr</name>
<state>0</state>
@ -317,7 +339,7 @@
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..</state>
<state>$PROJ_DIR$\..\..\..\..\..\include</state>
<state>$PROJ_DIR$\..\..\..\..\..\source</state>
<state>$PROJ_DIR$\..\..\..\..\..\src</state>
<state>$PROJ_DIR$\..\..\..\..\..\ports\arm-cm\qv\iar</state>
<state>$PROJ_DIR$\..\..\..\..\..\3rd_party\CMSIS\Include</state>
<state>$PROJ_DIR$\..\..\..\..\..\3rd_party\efm32pg1b</state>
@ -330,10 +352,6 @@
<name>CCCodeSection</name>
<state>.text</state>
</option>
<option>
<name>IInterwork2</name>
<state>0</state>
</option>
<option>
<name>IProcessorMode2</name>
<state>1</state>
@ -385,18 +403,6 @@
<name>IccAllowVLA</name>
<state>0</state>
</option>
<option>
<name>IccCppDialect</name>
<state>1</state>
</option>
<option>
<name>IccExceptions</name>
<state>1</state>
</option>
<option>
<name>IccRTTI</name>
<state>1</state>
</option>
<option>
<name>IccStaticDestr</name>
<state>1</state>
@ -426,13 +432,37 @@
<name>CCGuardCalls</name>
<state>1</state>
</option>
<option>
<name>CCEncSource</name>
<state>0</state>
</option>
<option>
<name>CCEncOutput</name>
<state>0</state>
</option>
<option>
<name>CCEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>CCEncInput</name>
<state>0</state>
</option>
<option>
<name>IccExceptions2</name>
<state>0</state>
</option>
<option>
<name>IccRTTI2</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>9</version>
<version>10</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -560,10 +590,6 @@
<name>AOutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>AMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>ALimitErrorsCheck</name>
<state>0</state>
@ -636,7 +662,7 @@
<settings>
<name>BICOMP</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
<settings>
<name>BUILDACTION</name>
@ -650,7 +676,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>17</version>
<version>20</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -922,7 +948,7 @@
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<version>1</version>
<state>1</state>
</option>
<option>
@ -938,6 +964,30 @@
<name>IlinkLogCallGraph</name>
<state>0</state>
</option>
<option>
<name>IlinkIcfFile_AltDefault</name>
<state></state>
</option>
<option>
<name>IlinkEncInput</name>
<state>0</state>
</option>
<option>
<name>IlinkEncOutput</name>
<state>0</state>
</option>
<option>
<name>IlinkEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>IlinkHeapSelect</name>
<state>1</state>
</option>
<option>
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -964,12 +1014,12 @@
<settings>
<name>BILINK</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
<settings>
<name>Coder</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
</configuration>
<configuration>
@ -982,7 +1032,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>24</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1001,20 +1051,10 @@
<name>GEndianMode</name>
<state>0</state>
</option>
<option>
<name>Input variant</name>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
<state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
</option>
<option>
<name>Output variant</name>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
<state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
@ -1097,7 +1137,7 @@
</option>
<option>
<name>GBECoreSlave</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
@ -1114,7 +1154,7 @@
</option>
<option>
<name>CoreVariant</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
@ -1137,16 +1177,53 @@
</option>
<option>
<name>GFPUCoreSlave2</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
<name>OGCMSISPackSelectDevice</name>
</option>
<option>
<name>OgLibHeap</name>
<state>0</state>
</option>
<option>
<name>OGLibAdditionalLocale</name>
<state>0</state>
</option>
<option>
<name>OGPrintfVariant</name>
<version>0</version>
<state>4</state>
</option>
<option>
<name>OGPrintfMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>OGScanfVariant</name>
<version>0</version>
<state>3</state>
</option>
<option>
<name>OGScanfMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>GenLocaleTags</name>
<state></state>
</option>
<option>
<name>GenLocaleDisplayOnly</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>31</version>
<version>34</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1251,10 +1328,6 @@
<name>CCRequirePrototypes</name>
<state>1</state>
</option>
<option>
<name>CCMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>CCDiagWarnAreErr</name>
<state>0</state>
@ -1301,10 +1374,6 @@
<name>CCCodeSection</name>
<state>.text</state>
</option>
<option>
<name>IInterwork2</name>
<state>0</state>
</option>
<option>
<name>IProcessorMode2</name>
<state>1</state>
@ -1356,18 +1425,6 @@
<name>IccAllowVLA</name>
<state>0</state>
</option>
<option>
<name>IccCppDialect</name>
<state>1</state>
</option>
<option>
<name>IccExceptions</name>
<state>1</state>
</option>
<option>
<name>IccRTTI</name>
<state>1</state>
</option>
<option>
<name>IccStaticDestr</name>
<state>1</state>
@ -1397,13 +1454,37 @@
<name>CCGuardCalls</name>
<state>1</state>
</option>
<option>
<name>CCEncSource</name>
<state>0</state>
</option>
<option>
<name>CCEncOutput</name>
<state>0</state>
</option>
<option>
<name>CCEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>CCEncInput</name>
<state>0</state>
</option>
<option>
<name>IccExceptions2</name>
<state>0</state>
</option>
<option>
<name>IccRTTI2</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>9</version>
<version>10</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1531,10 +1612,6 @@
<name>AOutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>AMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>ALimitErrorsCheck</name>
<state>0</state>
@ -1607,7 +1684,7 @@
<settings>
<name>BICOMP</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
<settings>
<name>BUILDACTION</name>
@ -1621,7 +1698,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>17</version>
<version>20</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1893,7 +1970,7 @@
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<version>1</version>
<state>1</state>
</option>
<option>
@ -1909,6 +1986,30 @@
<name>IlinkLogCallGraph</name>
<state>0</state>
</option>
<option>
<name>IlinkIcfFile_AltDefault</name>
<state></state>
</option>
<option>
<name>IlinkEncInput</name>
<state>0</state>
</option>
<option>
<name>IlinkEncOutput</name>
<state>0</state>
</option>
<option>
<name>IlinkEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>IlinkHeapSelect</name>
<state>1</state>
</option>
<option>
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -1935,12 +2036,12 @@
<settings>
<name>BILINK</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
<settings>
<name>Coder</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
</configuration>
<configuration>
@ -1953,7 +2054,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>24</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -1972,20 +2073,10 @@
<name>GEndianMode</name>
<state>0</state>
</option>
<option>
<name>Input variant</name>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
<state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
</option>
<option>
<name>Output variant</name>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
<state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
@ -2068,7 +2159,7 @@
</option>
<option>
<name>GBECoreSlave</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
@ -2085,7 +2176,7 @@
</option>
<option>
<name>CoreVariant</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
@ -2108,16 +2199,53 @@
</option>
<option>
<name>GFPUCoreSlave2</name>
<version>24</version>
<version>25</version>
<state>39</state>
</option>
<option>
<name>OGCMSISPackSelectDevice</name>
</option>
<option>
<name>OgLibHeap</name>
<state>0</state>
</option>
<option>
<name>OGLibAdditionalLocale</name>
<state>0</state>
</option>
<option>
<name>OGPrintfVariant</name>
<version>0</version>
<state>4</state>
</option>
<option>
<name>OGPrintfMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>OGScanfVariant</name>
<version>0</version>
<state>3</state>
</option>
<option>
<name>OGScanfMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>GenLocaleTags</name>
<state></state>
</option>
<option>
<name>GenLocaleDisplayOnly</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>31</version>
<version>34</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -2222,10 +2350,6 @@
<name>CCRequirePrototypes</name>
<state>1</state>
</option>
<option>
<name>CCMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>CCDiagWarnAreErr</name>
<state>0</state>
@ -2272,10 +2396,6 @@
<name>CCCodeSection</name>
<state>.text</state>
</option>
<option>
<name>IInterwork2</name>
<state>0</state>
</option>
<option>
<name>IProcessorMode2</name>
<state>1</state>
@ -2327,18 +2447,6 @@
<name>IccAllowVLA</name>
<state>0</state>
</option>
<option>
<name>IccCppDialect</name>
<state>1</state>
</option>
<option>
<name>IccExceptions</name>
<state>1</state>
</option>
<option>
<name>IccRTTI</name>
<state>1</state>
</option>
<option>
<name>IccStaticDestr</name>
<state>1</state>
@ -2368,13 +2476,37 @@
<name>CCGuardCalls</name>
<state>1</state>
</option>
<option>
<name>CCEncSource</name>
<state>0</state>
</option>
<option>
<name>CCEncOutput</name>
<state>0</state>
</option>
<option>
<name>CCEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>CCEncInput</name>
<state>0</state>
</option>
<option>
<name>IccExceptions2</name>
<state>0</state>
</option>
<option>
<name>IccRTTI2</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>9</version>
<version>10</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -2502,10 +2634,6 @@
<name>AOutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>AMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>ALimitErrorsCheck</name>
<state>0</state>
@ -2578,7 +2706,7 @@
<settings>
<name>BICOMP</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
<settings>
<name>BUILDACTION</name>
@ -2592,7 +2720,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>17</version>
<version>20</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -2864,7 +2992,7 @@
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<version>1</version>
<state>1</state>
</option>
<option>
@ -2880,6 +3008,30 @@
<name>IlinkLogCallGraph</name>
<state>0</state>
</option>
<option>
<name>IlinkIcfFile_AltDefault</name>
<state></state>
</option>
<option>
<name>IlinkEncInput</name>
<state>0</state>
</option>
<option>
<name>IlinkEncOutput</name>
<state>0</state>
</option>
<option>
<name>IlinkEncOutputBom</name>
<state>1</state>
</option>
<option>
<name>IlinkHeapSelect</name>
<state>1</state>
</option>
<option>
<name>IlinkLocaleSelect</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
@ -2906,12 +3058,12 @@
<settings>
<name>BILINK</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
<settings>
<name>Coder</name>
<archiveVersion>0</archiveVersion>
<data/>
<data />
</settings>
</configuration>
<group>
@ -2968,49 +3120,43 @@
<group>
<name>QP</name>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qep_hsm.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qep_hsm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qep_msm.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qep_msm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_act.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_act.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_actq.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_actq.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_defer.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_defer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_dyn.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_dyn.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_mem.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_mem.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_pkg.h</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_ps.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_ps.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_qact.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_qact.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_qeq.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_qeq.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_qmact.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_qmact.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qf\qf_time.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qf_time.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qv.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qv_pkg.h</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qv\qv.c</name>
</file>
</group>
<group>
@ -3026,18 +3172,19 @@
<configuration>Release</configuration>
</excluded>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qs.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qs\qs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qs_fp.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qs\qs_64bit.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qs_pkg.h</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qs\qs_fp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\source\qs_rx.c</name>
<name>$PROJ_DIR$\..\..\..\..\..\src\qs\qs_rx.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\src\qs\qutest.c</name>
</file>
</group>
</project>

9
examples/arm-cm/dpp_efm32-slstk3401a/qxk/test.c
View File

@ -1,7 +1,7 @@
/*****************************************************************************
* Product: DPP example
* Last Updated for Version: 5.9.4
* Date of the Last Update: 2017-07-06
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -76,6 +76,7 @@ static void Thread1_run(QXThread * const me) {
/* some flating point code to exercise the VFP... */
x = 1.4142135F;
x = x * 1.4142135F;
//QXThread_delay(1U, 0U); /*asserts (blocking while holding a mutex)*/
QXMutex_unlock(&l_mutex);
QXThread_delay(BSP_TICKS_PER_SEC/7, 0U); /* BLOCK */
@ -106,7 +107,9 @@ static void Thread2_run(QXThread * const me) {
* that uses it. Alternatively, the semaphore can be initialized
* before any thread runs.
*/
QXSemaphore_init(&l_sema, 0U); /* start with zero count */
QXSemaphore_init(&l_sema,
0U, /* count==0 (signaling semaphore) */
1U); /* max_count==1 (binary semaphore) */
for (;;) {
QEvt const *e;

84
examples/arm-cm/dpp_ek-tm4c123gxl/qk/ti/.cproject
View File

@ -5,41 +5,41 @@
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@ -49,37 +49,37 @@
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@ -182,11 +182,11 @@
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13
examples/arm-cm/dpp_ek-tm4c123gxl/qk/ti/NewTargetConfiguration.ccxml
View File

@ -1,13 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="configuration_0">
<instance XML_version="1.2" desc="Stellaris In-Circuit Debug Interface" href="connections/Stellaris_ICDI_Connection.xml" id="Stellaris In-Circuit Debug Interface" xml="Stellaris_ICDI_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Stellaris In-Circuit Debug Interface">
<instance XML_version="1.2" href="drivers/stellaris_cs_dap.xml" id="drivers" xml="stellaris_cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/stellaris_cortex_m4.xml" id="drivers" xml="stellaris_cortex_m4.xml" xmlpath="drivers"/>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="Tiva TM4C123GH6PM" href="devices/tm4c123gh6pm.xml" id="Tiva TM4C123GH6PM" xml="tm4c123gh6pm.xml" xmlpath="devices"/>
</platform>
</connection>
</configuration>
</configurations>

8
examples/arm-cm/dpp_ek-tm4c123gxl/qxk/test.c
View File

@ -1,7 +1,7 @@
/*****************************************************************************
* Product: DPP example
* Last Updated for Version: 5.7.2
* Date of the Last Update: 2016-09-27
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -87,7 +87,9 @@ static void Thread2_run(QXThread * const me) {
* that uses it. Alternatively, the semaphore can be initialized
* before any thread runs.
*/
QXSemaphore_init(&l_sema, 0U); /* start with zero count */
QXSemaphore_init(&l_sema,
0U, /* count==0 (signaling semaphore) */
1U); /* max_count==1 (binary semaphore) */
for (;;) {
QEvt const *e;

80
examples/arm-cm/dpp_ek-tm4c123gxl/qxk/ti/.cproject
View File

@ -5,41 +5,41 @@
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@ -49,37 +49,37 @@
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</toolChain>
</folderInfo>
<sourceEntries>
@ -93,11 +93,11 @@
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<externalSettings/>
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<extension id="com.ti.ccstudio.binaryparser.CoffParser" point="org.eclipse.cdt.core.BinaryParser"/>
<extension id="com.ti.ccstudio.errorparser.CoffErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
@ -182,11 +182,11 @@
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8
examples/arm-cm/dpp_nucleo-l053r8/qxk/test.c
View File

@ -1,7 +1,7 @@
/*****************************************************************************
* Product: DPP example
* Last Updated for Version: 5.7.2
* Date of the Last Update: 2016-09-27
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -87,7 +87,9 @@ static void Thread2_run(QXThread * const me) {
* that uses it. Alternatively, the semaphore can be initialized
* before any thread runs.
*/
QXSemaphore_init(&l_sema, 0U); /* start with zero count */
QXSemaphore_init(&l_sema,
0U, /* count==0 (signaling semaphore) */
1U); /* max_count==1 (binary semaphore) */
for (;;) {
QEvt const *e;

8
examples/arm-cm/dpp_stm32f4-discovery/qxk/test.c
View File

@ -1,7 +1,7 @@
/*****************************************************************************
* Product: DPP example
* Last Updated for Version: 5.8.2
* Date of the Last Update: 2017-01-28
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -87,7 +87,9 @@ static void Thread2_run(QXThread * const me) {
* that uses it. Alternatively, the semaphore can be initialized
* before any thread runs.
*/
QXSemaphore_init(&l_sema, 0U); /* start with zero count */
QXSemaphore_init(&l_sema,
0U, /* count==0 (signaling semaphore) */
1U); /* max_count==1 (binary semaphore) */
for (;;) {
QEvt const *e;

8
examples/arm-cm/dpp_stm32f746g-discovery/qxk/test.c
View File

@ -1,7 +1,7 @@
/*****************************************************************************
* Product: DPP example
* Last Updated for Version: 5.8.2
* Date of the Last Update: 2017-01-28
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -87,7 +87,9 @@ static void Thread2_run(QXThread * const me) {
* that uses it. Alternatively, the semaphore can be initialized
* before any thread runs.
*/
QXSemaphore_init(&l_sema, 0U); /* start with zero count */
QXSemaphore_init(&l_sema,
0U, /* count==0 (signaling semaphore) */
1U); /* max_count==1 (binary semaphore) */
for (;;) {
QEvt const *e;

12
include/qxthread.h
View File

@ -4,8 +4,8 @@
* @ingroup qxk
* @cond
******************************************************************************
* Last updated for version 5.9.5
* Last updated on 2017-07-19
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -158,15 +158,17 @@ QEvt const *QXThread_queueGet(uint_fast16_t const nTicks,
/****************************************************************************/
/*! Counting Semaphore of the QXK preemptive kernel */
typedef struct {
uint_fast16_t count;
QPSet waitSet; /*!< set of extended-threads waiting on this semaphore */
uint_fast16_t count;
uint_fast16_t max_count;
} QXSemaphore;
/*! initialize the counting semaphore */
void QXSemaphore_init(QXSemaphore * const me, uint_fast16_t count);
void QXSemaphore_init(QXSemaphore * const me, uint_fast16_t count,
uint_fast16_t max_count);
/*! signal (unblock) the semaphore */
void QXSemaphore_signal(QXSemaphore * const me);
bool QXSemaphore_signal(QXSemaphore * const me);
/*! wait (block) on the semaphore */
bool QXSemaphore_wait(QXSemaphore * const me,

87
include/stdint_c.h Normal file
View File

@ -0,0 +1,87 @@
/**
* @file
* @brief Macros for casting strongly-typed integer constants.
*
* @description This header file provides the standard C99 and C++11
* macros of the form UINT8_C(), UINT_FAST8_C(), etc. for building
* strongly-typed constants of standard integers from <stdint.h>.
*
* @cond
******************************************************************************
* Last updated for version 5.9.5
* Last updated on 2017-07-20
*
* Q u a n t u m L e a P s
* ---------------------------
* innovating embedded systems
*
* Copyright (C) Quantum Leaps, LLC. All rights reserved.
*
* This program is open source software: you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published
* by the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* Alternatively, this program may be distributed and modified under the
* terms of Quantum Leaps commercial licenses, which expressly supersede
* the GNU General Public License and are specifically designed for
* licensees interested in retaining the proprietary status of their code.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* Contact information:
* https://state-machine.com
* mailto:info@state-machine.com
******************************************************************************
* @endcond
*/
#ifndef stdint_c_h
#define stdint_c_h
#ifndef UINT8_C
#define UINT8_C(x_) ((uint8_t)(x_))
#endif
#ifndef INT8_C
#define INT8_C(x_) ((int8_t)(x_))
#endif
#ifndef UINT_FAST8_C
#define UINT_FAST8_C(x_) ((uint_fast8_t)(x_))
#endif
#ifndef INT_FAST8_C
#define INT_FAST8_C(x_) ((int_fast8_t)(x_))
#endif
#ifndef UINT16_C
#define UINT16_C(x_) ((uint16_t)(x_))
#endif
#ifndef INT16_C
#define INT16_C(x_) ((int16_t)(x_))
#endif
#ifndef UINT_FAST16_C
#define UINT_FAST16_C(x_) ((uint_fast16_t)(x_))
#endif
#ifndef UINT32_C
#define UINT32_C(x_) ((uint32_t)(x_))
#endif
#ifndef INT32_C
#define INT32_C(x_) ((int32_t)(x_))
#endif
#ifndef UINT_FAST32_C
#define UINT_FAST32_C(x_) ((uint_fast32_t)(x_))
#endif
#endif /* stdint_c_h */

13
ports/arm-cm/qk/arm/qk_port.s
View File

@ -1,7 +1,7 @@
;*****************************************************************************
; Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), ARM-KEIL assembler
; Last Updated for Version: 5.9.0
; Date of the Last Update: 2017-03-17
; Last Updated for Version: 5.9.6
; Date of the Last Update: 2017-07-28
;
; Q u a n t u m L e a P s
; ---------------------------
@ -111,15 +111,16 @@ QK_init FUNCTION
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r3,=0xE000E004 ; Interrupt Controller Type Register
LDR r3,[r3] ; r3 := INTLINESUM
LDR r2,=0xE000E400 ; NVIC_PRI0 register
LDR r3,=0xE000E004 ; Interrupt Controller Type Register (ICTR)
LDR r3,[r3]
ANDS r3,r3,#7 ; r3 := ICTR[0:2] (INTLINESNUM)
LSLS r3,r3,#3
ADDS r3,r3,#8 ; r3 == number of NVIC_PRIO registers
ADDS r3,r3,#8 ; r3 == (# NVIC_PRIO registers)/4
; loop over all implemented NVIC_PRIO registers for IRQs...
QK_init_irq
SUBS r3,r3,#1
LDR r2,=0xE000E400 ; NVIC_PRI0 register
STR r1,[r2,r3,LSL #2] ; NVIC_PRI0[r3] := r1
CMP r3,#0
BNE QK_init_irq

14
ports/arm-cm/qk/gnu/qk_port.s
View File

@ -1,7 +1,7 @@
/*****************************************************************************
* Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), GNU-ARM assembler
* Last Updated for Version: 5.9.3
* Date of the Last Update: 2017-06-17
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-28
*
* Q u a n t u m L e a P s
* ---------------------------
@ -106,15 +106,17 @@ QK_init:
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r3,=0xE000E004 /* Interrupt Controller Type Register */
LDR r3,[r3] /* r3 := INTLINESUM */
LDR r2,=0xE000E400 /* NVIC_PRI0 register */
LDR r3,=0xE000E004 /* Interrupt Controller Type Register (ICTR) */
LDR r3,[r3]
LDR r3,[r3]
ANDS r3,r3,#7 /* r3 := ICTR[0:2] (INTLINESNUM) */
LSLS r3,r3,#3
ADDS r3,r3,#8 /* r3 == number of NVIC_PRIO registers */
ADDS r3,r3,#8 /* r3 == (# NVIC_PRIO registers)/4 */
/* loop over all implemented NVIC_PRIO registers for IRQs... */
QK_init_irq:
SUBS r3,r3,#1
LDR r2,=0xE000E400 /* NVIC_PRI0 register */
STR r1,[r2,r3,LSL #2] /* NVIC_PRI0[r3] := r1 */
CMP r3,#0
BNE QK_init_irq

13
ports/arm-cm/qk/iar/qk_port.s
View File

@ -1,7 +1,7 @@
;*****************************************************************************
; Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), IAR-ARM assembler
; Last Updated for Version: 5.9.0
; Date of the Last Update: 2017-03-17
; Last Updated for Version: 5.9.6
; Date of the Last Update: 2017-07-28
;
; Q u a n t u m L e a P s
; ---------------------------
@ -110,15 +110,16 @@ QK_init:
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r3,=0xE000E004 ; Interrupt Controller Type Register
LDR r3,[r3] ; r3 := INTLINESUM
LDR r2,=0xE000E400 ; NVIC_PRI0 register
LDR r3,=0xE000E004 ; Interrupt Controller Type Register (ICTR)
LDR r3,[r3]
ANDS r3,r3,#7 ; r3 := ICTR[0:2] (INTLINESNUM)
LSLS r3,r3,#3
ADDS r3,r3,#8 ; r3 == number of NVIC_PRIO registers
ADDS r3,r3,#8 ; r3 == (# NVIC_PRIO registers)/4
; loop over all implemented NVIC_PRIO registers for IRQs...
QK_init_irq:
SUBS r3,r3,#1
LDR r2,=0xE000E400 ; NVIC_PRI0 register
STR r1,[r2,r3,LSL #2] ; NVIC_PRI0[r3] := r1
CMP r3,#0
BNE QK_init_irq

13
ports/arm-cm/qk/ti/qk_port.s
View File

@ -1,7 +1,7 @@
;*****************************************************************************
; Product: QK port to ARM Cortex-M (M0,M0+,M3,M4,M7), TI-ARM assembler
; Last Updated for Version: 5.9.0
; Date of the Last Update: 2017-03-17
; Last Updated for Version: 5.9.6
; Date of the Last Update: 2017-07-28
;
; Q u a n t u m L e a P s
; ---------------------------
@ -109,15 +109,16 @@ QK_init: .asmfunc
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r3,ICTR_addr ; Interrupt Controller Type Register
LDR r3,[r3] ; r3 := INTLINESUM
LDR r2,PRI0_addr ; NVIC_PRI0 register
LDR r3,ICTR_addr ; Interrupt Controller Type Register (ICTR)
LDR r3,[r3] ; r3 := ICTR
ANDS r3,r3,#7 ; r3 := ICTR[0:2] (INTLINESNUM)
LSLS r3,r3,#3
ADDS r3,r3,#8 ; r3 == number of NVIC_PRIO registers
ADDS r3,r3,#8 ; r3 == (# NVIC_PRIO registers)/4
; loop over all implemented NVIC_PRIO registers for IRQs...
QK_init_irq:
SUBS r3,r3,#1
LDR r2,PRI0_addr ; NVIC_PRI0 register
STR r1,[r2,r3,LSL #2] ; NVIC_PRI0[r3] := r1
CMP r3,#0
BNE QK_init_irq

6
ports/arm-cm/qv/arm/qv_port.c
View File

@ -3,8 +3,8 @@
* @brief QV/C port to ARM Cortex-M, ARM-KEIL toolset
* @cond
******************************************************************************
* Last Updated for Version: 5.8.1
* Date of the Last Update: 2016-12-14
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-28
*
* Q u a n t u m L e a P s
* ---------------------------
@ -75,7 +75,7 @@ void QV_init(void) {
SCB_SYSPRI[3] |= (QF_BASEPRI << 24) | (QF_BASEPRI << 16) | QF_BASEPRI;
/* set all implemented IRQ priories to QF_BASEPRI... */
n = 8 + (*SCnSCB_ICTR << 3); /* # interrupt priority registers */
n = 8U + ((*SCnSCB_ICTR & 0x7U) << 3); /* (# NVIC_PRIO registers)/4 */
do {
--n;
NVIC_IP[n] = (QF_BASEPRI << 24) | (QF_BASEPRI << 16)

6
ports/arm-cm/qv/gnu/qv_port.c
View File

@ -3,8 +3,8 @@
* @brief QV/C port to ARM Cortex-M, GNU-ARM toolset
* @cond
******************************************************************************
* Last Updated for Version: 5.8.1
* Date of the Last Update: 2016-12-14
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-28
*
* Q u a n t u m L e a P s
* ---------------------------
@ -75,7 +75,7 @@ void QV_init(void) {
SCB_SYSPRI[3] |= (QF_BASEPRI << 24) | (QF_BASEPRI << 16) | QF_BASEPRI;
/* set all implemented IRQ priories to QF_BASEPRI... */
n = 8 + (*SCnSCB_ICTR << 3); /* # interrupt priority registers */
n = 8U + ((*SCnSCB_ICTR & 0x7U) << 3); /* (# NVIC_PRIO registers)/4 */
do {
--n;
NVIC_IP[n] = (QF_BASEPRI << 24) | (QF_BASEPRI << 16)

6
ports/arm-cm/qv/iar/qv_port.c
View File

@ -3,8 +3,8 @@
* @brief QV/C port to ARM Cortex-M, ARM-KEIL toolset
* @cond
******************************************************************************
* Last Updated for Version: 5.8.1
* Date of the Last Update: 2016-12-14
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-28
*
* Q u a n t u m L e a P s
* ---------------------------
@ -75,7 +75,7 @@ void QV_init(void) {
SCB_SYSPRI[3] |= (QF_BASEPRI << 24) | (QF_BASEPRI << 16) | QF_BASEPRI;
/* set all implemented IRQ priories to QF_BASEPRI... */
n = 8 + (*SCnSCB_ICTR << 3); /* # interrupt priority registers */
n = 8U + ((*SCnSCB_ICTR & 0x7U) << 3); /* (# NVIC_PRIO registers)/4 */
do {
--n;
NVIC_IP[n] = (QF_BASEPRI << 24) | (QF_BASEPRI << 16)

13
ports/arm-cm/qv/ti/qv_port.s
View File

@ -1,7 +1,7 @@
;*****************************************************************************
; Product: QV port to ARM Cortex-M (M0,M0+,M1,M3,M4,M7), TI-ARM assembler
; Last Updated for Version: 5.9.0
; Date of the Last Update: 2017-03-17
; Product: QV port to ARM Cortex-M (M0,M0+,M3,M4,M7), TI-ARM assembler
; Last Updated for Version: 5.9.6
; Date of the Last Update: 2017-07-28
;
; Q u a n t u m L e a P s
; ---------------------------
@ -139,15 +139,16 @@ QV_init: .asmfunc
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r2,PRI0_addr ; NVIC_PRI0 register
LDR r3,ICTR_addr ; Interrupt Controller Type Register
LDR r3,[r3] ; r3 := INTLINESUM
LDR r3,[r3] ; r3 := ICTR
ANDS r3,r3,#7 ; r3 := ICTR[0:2] (INTLINESNUM)
LSLS r3,r3,#3
ADDS r3,r3,#8 ; r3 == number of NVIC_PRIO registers
ADDS r3,r3,#8 ; r3 == (# NVIC_PRIO registers)/4
; loop over all implemented NVIC_PRIO registers for IRQs...
QV_init_irq:
SUBS r3,r3,#1
LDR r2,PRI0_addr ; NVIC_PRI0 register
STR r1,[r2,r3,LSL #2] ; NVIC_PRI0[r3] := r1
CMP r3,#0
BNE QV_init_irq

17
ports/arm-cm/qxk/arm/qxk_port.s
View File

@ -1,7 +1,7 @@
;*****************************************************************************
; Product: QXK port to ARM Cortex-M (M0,M0+,M1,M3,M4,M7), ARM-Keil assembler
; Last Updated for Version: 5.9.4
; Date of the Last Update: 2017-07-06
; Product: QXK port to ARM Cortex-M (M0,M0+,M3,M4,M7), ARM-Keil assembler
; Last Updated for Version: 5.9.6
; Date of the Last Update: 2017-07-28
;
; Q u a n t u m L e a P s
; ---------------------------
@ -83,7 +83,7 @@ QXK_init FUNCTION
ELSE ; Cortex-M3/M4/..
; NOTE:
; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of
; On Cortex-M3/M4/M7.., this QXK port disables interrupts by means of
; the BASEPRI register. However, this method cannot disable interrupt
; priority zero, which is the default for all interrupts out of reset.
; The following code changes the SysTick priority and all IRQ priorities
@ -124,15 +124,16 @@ QXK_init FUNCTION
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r3,=0xE000E004 ; Interrupt Controller Type Register
LDR r3,[r3] ; r3 := INTLINESUM
LDR r2,=0xE000E400 ; NVIC_PRI0 register
LDR r3,=0xE000E004 ; Interrupt Controller Type Register (ICTR)
LDR r3,[r3]
ANDS r3,r3,#7 ; r3 := ICTR[0:2] (INTLINESNUM)
LSLS r3,r3,#3
ADDS r3,r3,#8 ; r3 == number of NVIC_PRIO registers
ADDS r3,r3,#8 ; r3 == (# NVIC_PRIO registers)/4
; loop over all implemented NVIC_PRIO registers for IRQs...
QXK_init_irq
SUBS r3,r3,#1
LDR r2,=0xE000E400 ; NVIC_PRI0 register
STR r1,[r2,r3,LSL #2] ; NVIC_PRI0[r3] := r1
CMP r3,#0
BNE QXK_init_irq

15
ports/arm-cm/qxk/gnu/qxk_port.s
View File

@ -1,7 +1,7 @@
/*****************************************************************************
* Product: QXK port to ARM Cortex-M (M0,M0+,M1,M3,M4,M7), GNU-ARM assembler
* Last Updated for Version: 5.9.4
* Date of the Last Update: 2017-07-06
* Product: QXK port to ARM Cortex-M (M0,M0+,M3,M4,M7), GNU-ARM assembler
* Last Updated for Version: 5.9.6
* Date of the Last Update: 2017-07-28
*
* Q u a n t u m L e a P s
* ---------------------------
@ -114,15 +114,16 @@ QXK_init:
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r3,=0xE000E004 /* Interrupt Controller Type Register */
LDR r3,[r3] /* r3 := INTLINESUM */
LDR r2,=0xE000E400 /* NVIC_PRI0 register */
LDR r3,=0xE000E004 /* Interrupt Controller Type Register (ICTR) */
LDR r3,[r3]
ANDS r3,r3,#7 /* r3 := ICTR[0:2] (INTLINESNUM) */
LSLS r3,r3,#3
ADDS r3,r3,#8 /* r3 == number of NVIC_PRIO registers */
ADDS r3,r3,#8 /* r3 == (# NVIC_PRIO registers)/4 */
/* loop over all implemented NVIC_PRIO registers for IRQs... */
QXK_init_irq:
SUBS r3,r3,#1
LDR r2,=0xE000E400 /* NVIC_PRI0 register */
STR r1,[r2,r3,LSL #2] /* NVIC_PRI0[r3] := r1 */
CMP r3,#0
BNE QXK_init_irq

15
ports/arm-cm/qxk/iar/qxk_port.s
View File

@ -1,7 +1,7 @@
;*****************************************************************************
; Product: QXK port to ARM Cortex-M (M0,M0+,M3,M4,M7), IAR-ARM assembler
; Last Updated for Version: 5.9.4
; Date of the Last Update: 2017-07-06
; Last Updated for Version: 5.9.6
; Date of the Last Update: 2017-07-28
;
; Q u a n t u m L e a P s
; ---------------------------
@ -123,20 +123,21 @@ QXK_init:
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r3,=0xE000E004 ; Interrupt Controller Type Register
LDR r3,[r3] ; r3 := INTLINESUM
LDR r2,=0xE000E400 ; NVIC_PRI0 register
LDR r3,=0xE000E004 ; Interrupt Controller Type Register (ICTR)
LDR r3,[r3]
ANDS r3,r3,#7 ; r3 := ICTR[0:2] (INTLINESNUM)
LSLS r3,r3,#3
ADDS r3,r3,#8 ; r3 == number of NVIC_PRIO registers
ADDS r3,r3,#8 ; r3 == (# NVIC_PRIO registers)/4
; loop over all implemented NVIC_PRIO registers for IRQs...
QXK_init_irq:
SUBS r3,r3,#1
LDR r2,=0xE000E400 ; NVIC_PRI0 register
STR r1,[r2,r3,LSL #2] ; NVIC_PRI0[r3] := r1
CMP r3,#0
BNE QXK_init_irq
#endif ; Cortex-M3/M4/...
#endif ; Cortex-M3/M4/M7
MOV r0,r12 ; r0 := original PRIMASK
MSR PRIMASK,r0 ; PRIMASK := r0

15
ports/arm-cm/qxk/ti/qxk_port.s
View File

@ -1,7 +1,7 @@
;*****************************************************************************
; Product: QXK port to ARM Cortex-M (M0,M0+,M3,M4,M7), TI-ARM assembler
; Last Updated for Version: 5.9.4
; Date of the Last Update: 2017-07-06
; Last Updated for Version: 5.9.6
; Date of the Last Update: 2017-07-28
;
; Q u a n t u m L e a P s
; ---------------------------
@ -59,7 +59,7 @@ QXK_NEXT .equ 4
QXK_TOP_PRIO .equ 8
; NOTE: keep in synch with the QMActive struct in "qf.h/qxk.h" !!!
QMACTIVE_OSOBJ .equ 44
QMACTIVE_OSOBJ .equ 40
QMACTIVE_PRIO .equ 48
.text
@ -77,7 +77,7 @@ QXK_init: .asmfunc
.if __TI_TMS470_V7M3__ | __TI_TMS470_V7M4__ ; | __TI_TMS470_V7M7__ ; M3/4/7?
; NOTE:
; On Cortex-M3/M4/M7.., this QK port disables interrupts by means of
; On Cortex-M3/M4/M7.., this QXK port disables interrupts by means of
; the BASEPRI register. However, this method cannot disable interrupt
; priority zero, which is the default for all interrupts out of reset.
; The following code changes the SysTick priority and all IRQ priorities
@ -118,15 +118,16 @@ QXK_init: .asmfunc
LSLS r1,r1,#8
ORRS r1,r1,#QF_BASEPRI
LDR r2,PRI0_addr ; NVIC_PRI0 register
LDR r3,ICTR_addr ; Interrupt Controller Type Register
LDR r3,[r3] ; r3 := INTLINESUM
LDR r3,[r3] ; r3 := INTLINESNUM
ANDS r3,r3,#7 ; r3 := ICTR[0:2] (INTLINESNUM)
LSLS r3,r3,#3
ADDS r3,r3,#8 ; r3 == number of NVIC_PRIO registers
ADDS r3,r3,#8 ; r3 == (# NVIC_PRIO registers)/4
; loop over all implemented NVIC_PRIO registers for IRQs...
QXK_init_irq:
SUBS r3,r3,#1
LDR r2,PRI0_addr ; NVIC_PRI0 register
STR r1,[r2,r3,LSL #2] ; NVIC_PRI0[r3] := r1
CMP r3,#0
BNE QXK_init_irq

11
source/qxk.c
View File

@ -4,8 +4,8 @@
* @ingroup qxk
* @cond
******************************************************************************
* Last updated for version 5.9.5
* Last updated on 2017-07-19
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -58,7 +58,7 @@ Q_DEFINE_THIS_MODULE("qxk")
QXK_Attr QXK_attr_; /* global attributes of the QXK kernel */
/* Local-scope objects ******************************************************/
static QXThread l_idleThread;
static QActive l_idleThread;
/****************************************************************************/
/**
@ -86,7 +86,7 @@ void QF_init(void) {
QXK_attr_.lockPrio = (uint_fast8_t)(QF_MAX_ACTIVE + 1);
/* setup the QXK idle loop... */
QF_active_[0] = &l_idleThread.super; /* register idle thread with QF */
QF_active_[0] = &l_idleThread; /* register idle thread with QF */
QXK_attr_.actPrio = (uint_fast8_t)0; /* set the idle thread priority */
#ifdef QXK_INIT
@ -434,6 +434,9 @@ struct QActive *QXK_current(void) {
QF_CRIT_ENTRY_();
curr = QXK_attr_.curr;
if (curr == (struct QActive *)0) { /* basic thread? */
curr = QF_active_[QXK_attr_.actPrio];
}
QF_CRIT_EXIT_();
/** @post the current thread must be valid */

30
source/qxk_mutex.c
View File

@ -4,8 +4,8 @@
* @brief QXMutex_init(), QXMutex_lock and QXMutex_unlock() definitions.
* @cond
******************************************************************************
* Last updated for version 5.9.4
* Last updated on 2017-07-05
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -111,7 +111,7 @@ void QXMutex_lock(QXMutex * const me) {
QF_CRIT_STAT_
QF_CRIT_ENTRY_();
/** @pre scheduler cannot be locked from the ISR context
/** @pre The mutex cannot be locked from the ISR context
* and the mutex must be unused
*/
Q_REQUIRE_ID(700, (!QXK_ISR_CONTEXT_())
@ -130,7 +130,7 @@ void QXMutex_lock(QXMutex * const me) {
QS_BEGIN_NOCRIT_(QS_SCHED_LOCK, (void *)0, (void *)0)
QS_TIME_(); /* timestamp */
QS_2U8_((uint8_t)me->prevPrio, /* the previouis lock prio */
QS_2U8_((uint8_t)me->prevPrio, /* the previous lock prio */
(uint8_t)QXK_attr_.lockPrio); /* the new lock prio */
QS_END_NOCRIT_()
@ -168,8 +168,8 @@ void QXMutex_unlock(QXMutex * const me) {
QF_CRIT_STAT_
QF_CRIT_ENTRY_();
/** @pre scheduler cannot be unlocked from the ISR context
* and the mutex must NOT be unused
/** @pre The mutex cannot be unlocked from the ISR context
* and the mutex must be used (NOT unused)
*/
Q_REQUIRE_ID(800, (!QXK_ISR_CONTEXT_())
&& (me->prevPrio != (uint_fast8_t)MUTEX_UNUSED));
@ -178,25 +178,27 @@ void QXMutex_unlock(QXMutex * const me) {
me->prevPrio = (uint_fast8_t)MUTEX_UNUSED;
QXK_attr_.lockHolder = me->prevHolder; /* restore previous lock holder */
if (QXK_attr_.lockPrio > p) {
QS_BEGIN_NOCRIT_(QS_SCHED_UNLOCK, (void *)0, (void *)0)
QS_TIME_(); /* timestamp */
if (QXK_attr_.lockPrio > p) {
QS_2U8_((uint8_t)QXK_attr_.lockPrio, /* previouis lock priority */
(uint8_t)p); /* new lock priority */
}
else {
p = QXK_attr_.lockPrio;
QS_2U8_((uint8_t)p, /* previouis lock priority */
(uint8_t)p); /* new lock priority */
}
QS_END_NOCRIT_()
if (QXK_attr_.lockPrio > p) {
QXK_attr_.lockPrio = p; /* restore the previous lock prio */
/* find the highest-prio thread ready to run */
if (QXK_sched_() != (uint_fast8_t)0) { /* priority found? */
QXK_activate_(); /* activate any unlocked basic threads */
}
}
else {
QS_BEGIN_NOCRIT_(QS_SCHED_UNLOCK, (void *)0, (void *)0)
QS_TIME_(); /* timestamp */
p = QXK_attr_.lockPrio;
QS_2U8_((uint8_t)p, /* previouis lock priority */
(uint8_t)p); /* new lock priority */
QS_END_NOCRIT_()
}
QF_CRIT_EXIT_();
}

58
source/qxk_sema.c
View File

@ -4,8 +4,8 @@
* @ingroup qxk
* @cond
******************************************************************************
* Last updated for version 5.9.5
* Last updated on 2017-07-20
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -57,21 +57,30 @@ Q_DEFINE_THIS_MODULE("qxk_sema")
/****************************************************************************/
/**
* @description
* Initializes a semaphore with the specified count. If the semaphore is used
* for resource sharing, the initial value of the semaphore count should be
* set to the number of identical resources guarded by the semaphore. If the
* semaphore is used as a signaling mechanism, the initial count should set
* to 0.
* Initializes a semaphore with the specified count and maximum count.
* If the semaphore is used for resource sharing, both the initial count
* and maximum count should be set to the number of identical resources
* guarded by the semaphore. If the semaphore is used as a signaling
* mechanism, the initial count should set to 0 and maximum count to 1
* (binary semaphore).
*
* @param[in,out] me pointer (see @ref oop)
* @param[in] count initial value of the semaphore counter
* @param[in] max_count maximum value of the semaphore counter.
* The purpose of the max_count is to limit the counter
* so that the semaphore cannot unblock more times than
* the maximum.
*
* @note
* QXSemaphore_init() must be called **before** the semaphore can be used
* (signaled or waited on).
*/
void QXSemaphore_init(QXSemaphore * const me, uint_fast16_t count) {
void QXSemaphore_init(QXSemaphore * const me, uint_fast16_t count,
uint_fast16_t max_count)
{
Q_REQUIRE_ID(100, max_count > (uint_fast16_t)0);
me->count = count;
me->max_count = max_count;
QPSet_setEmpty(&me->waitSet);
}
@ -109,9 +118,15 @@ bool QXSemaphore_wait(QXSemaphore * const me,
QF_CRIT_ENTRY_();
thr = (QXThread *)QXK_attr_.curr;
Q_REQUIRE_ID(100, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
/** @pre this function must:
* (1) NOT be called from an ISR; (2) be called from an extended thread;
* (3) the thread must NOT be holding a mutex and
* (4) the thread must NOT be already blocked on any object.
*/
Q_REQUIRE_ID(200, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
&& (thr != (QXThread *)0) /* current thread must be extended */
&& (thr->super.super.temp.obj == (QMState const *)0)); /* !blocked */
&& (QXK_attr_.lockPrio == (uint_fast8_t)0) /* not holding a mutex */
&& (thr->super.super.temp.obj == (QMState *)0)); /* not blocked */
if (me->count > (uint_fast16_t)0) {
--me->count;
@ -129,7 +144,7 @@ bool QXSemaphore_wait(QXSemaphore * const me,
QF_CRIT_ENTRY_();
/* the blocking object must be this semaphore */
Q_ASSERT_ID(110, thr->super.super.temp.obj == (QMState const *)me);
Q_ASSERT_ID(210, thr->super.super.temp.obj == (QMState const *)me);
thr->super.super.temp.obj = (QMState const *)0; /* clear */
}
QF_CRIT_EXIT_();
@ -150,11 +165,15 @@ bool QXSemaphore_wait(QXSemaphore * const me,
*
* @param[in,out] me pointer (see @ref oop)
*
* @returns true when the semaphore signaled and false when the semaphore
* count exceeded the maximum.
*
* @note
* A semaphore can be signaled from many places, including from ISRs, basic
* threads (AOs), and extended threads.
*/
void QXSemaphore_signal(QXSemaphore * const me) {
bool QXSemaphore_signal(QXSemaphore * const me) {
bool signaled = true; /* assume that the semaphore will be signaled */
QF_CRIT_STAT_
QF_CRIT_ENTRY_();
@ -162,14 +181,14 @@ void QXSemaphore_signal(QXSemaphore * const me) {
uint_fast8_t p;
QXThread *thr;
/* find the highest-priority thread waiting on this semaphore */
QPSet_findMax(&me->waitSet, p);
QPSet_insert(&QXK_attr_.readySet, p);
QPSet_remove(&me->waitSet, p);
thr = (QXThread *)QF_active_[p];
thr = (QXThread *)QF_active_[p]; /* thread waiting on the semaphore */
Q_ASSERT_ID(210,
(thr->super.osObject != (struct QActive *)0) /* must be extended */
Q_ASSERT_ID(210, (thr != (QXThread *)0) /* must be registered */
&& (thr->super.osObject != (struct QActive *)0) /* extended thr.*/
&& (me->count == (uint_fast16_t)0)); /* sema counter must be 0 */
/* disarm the internal time event */
@ -180,8 +199,15 @@ void QXSemaphore_signal(QXSemaphore * const me) {
}
}
else {
if (me->count < me->max_count) {
++me->count;
}
else {
signaled = false; /* semaphore NOT signaled */
}
}
QF_CRIT_EXIT_();
return signaled;
}

27
source/qxk_xthr.c
View File

@ -4,8 +4,8 @@
* @ingroup qxk
* @cond
******************************************************************************
* Last updated for version 5.9.4
* Last updated on 2017-07-06
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -386,9 +386,15 @@ QEvt const *QXThread_queueGet(uint_fast16_t const nTicks,
QF_CRIT_ENTRY_();
thr = (QXThread *)QXK_attr_.curr;
/** @pre this function must:
* (1) NOT be called from an ISR; (2) be called from an extended thread;
* (3) the thread must NOT be holding a mutex and
* (4) the thread must NOT be already blocked on any object.
*/
Q_REQUIRE_ID(500, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
&& (thr != (QXThread *)0) /* current thread must be extended */
&& (thr->super.super.temp.obj == (QMState const *)0)); /* !blocked */
&& (QXK_attr_.lockPrio == (uint_fast8_t)0) /* not holding a mutex */
&& (thr->super.super.temp.obj == (QMState *)0)); /* not blocked */
/* is the queue empty? */
if (thr->super.eQueue.frontEvt == (QEvt *)0) {
@ -467,7 +473,7 @@ QEvt const *QXThread_queueGet(uint_fast16_t const nTicks,
* must be called from within a critical section
*/
void QXThread_block_(QXThread const * const me) {
/*! @pre the thread holding the lock cannot block! */
/** @pre the thread holding the lock cannot block! */
Q_REQUIRE_ID(600, me->super.prio != QXK_attr_.lockPrio);
QPSet_remove(&QXK_attr_.readySet, me->super.prio);
(void)QXK_sched_();
@ -503,7 +509,7 @@ void QXThread_teArm_(QXThread * const me,
QSignal sig,
uint_fast16_t const nTicks, uint_fast8_t const tickRate)
{
/* the time event must be unused */
/** @pre the time event must be unused */
Q_REQUIRE_ID(700, me->timeEvt.ctr == (QTimeEvtCtr)0);
me->timeEvt.super.sig = sig;
@ -564,8 +570,15 @@ bool QXThread_delay(uint_fast16_t const nTicks, uint_fast8_t const tickRate) {
QF_CRIT_ENTRY_();
thr = (QXThread *)QXK_attr_.curr;
/* the delaying thread must not be blocked on any object */
Q_REQUIRE_ID(900, thr->super.super.temp.obj == (QMState const *)0);
/** @pre this function must:
* (1) NOT be called from an ISR; (2) be called from an extended thread;
* (3) the thread must NOT be holding a mutex and
* (4) the thread must NOT be already blocked on any object.
*/
Q_REQUIRE_ID(900, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
&& (thr != (QXThread *)0) /* current thread must be extended */
&& (QXK_attr_.lockPrio == (uint_fast8_t)0) /* not holding a mutex */
&& (thr->super.super.temp.obj == (QMState *)0)); /* not blocked */
/* remember the blocking object */
thr->super.super.temp.obj = (QMState const *)&thr->timeEvt;

11
src/qxk/qxk.c
View File

@ -4,8 +4,8 @@
* @ingroup qxk
* @cond
******************************************************************************
* Last updated for version 5.9.5
* Last updated on 2017-07-19
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -58,7 +58,7 @@ Q_DEFINE_THIS_MODULE("qxk")
QXK_Attr QXK_attr_; /* global attributes of the QXK kernel */
/* Local-scope objects ******************************************************/
static QXThread l_idleThread;
static QActive l_idleThread;
/****************************************************************************/
/**
@ -86,7 +86,7 @@ void QF_init(void) {
QXK_attr_.lockPrio = (uint_fast8_t)(QF_MAX_ACTIVE + 1);
/* setup the QXK idle loop... */
QF_active_[0] = &l_idleThread.super; /* register idle thread with QF */
QF_active_[0] = &l_idleThread; /* register idle thread with QF */
QXK_attr_.actPrio = (uint_fast8_t)0; /* set the idle thread priority */
#ifdef QXK_INIT
@ -434,6 +434,9 @@ struct QActive *QXK_current(void) {
QF_CRIT_ENTRY_();
curr = QXK_attr_.curr;
if (curr == (struct QActive *)0) { /* basic thread? */
curr = QF_active_[QXK_attr_.actPrio];
}
QF_CRIT_EXIT_();
/** @post the current thread must be valid */

30
src/qxk/qxk_mutex.c
View File

@ -4,8 +4,8 @@
* @brief QXMutex_init(), QXMutex_lock and QXMutex_unlock() definitions.
* @cond
******************************************************************************
* Last updated for version 5.9.4
* Last updated on 2017-07-05
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -111,7 +111,7 @@ void QXMutex_lock(QXMutex * const me) {
QF_CRIT_STAT_
QF_CRIT_ENTRY_();
/** @pre scheduler cannot be locked from the ISR context
/** @pre The mutex cannot be locked from the ISR context
* and the mutex must be unused
*/
Q_REQUIRE_ID(700, (!QXK_ISR_CONTEXT_())
@ -130,7 +130,7 @@ void QXMutex_lock(QXMutex * const me) {
QS_BEGIN_NOCRIT_(QS_SCHED_LOCK, (void *)0, (void *)0)
QS_TIME_(); /* timestamp */
QS_2U8_((uint8_t)me->prevPrio, /* the previouis lock prio */
QS_2U8_((uint8_t)me->prevPrio, /* the previous lock prio */
(uint8_t)QXK_attr_.lockPrio); /* the new lock prio */
QS_END_NOCRIT_()
@ -168,8 +168,8 @@ void QXMutex_unlock(QXMutex * const me) {
QF_CRIT_STAT_
QF_CRIT_ENTRY_();
/** @pre scheduler cannot be unlocked from the ISR context
* and the mutex must NOT be unused
/** @pre The mutex cannot be unlocked from the ISR context
* and the mutex must be used (NOT unused)
*/
Q_REQUIRE_ID(800, (!QXK_ISR_CONTEXT_())
&& (me->prevPrio != (uint_fast8_t)MUTEX_UNUSED));
@ -178,25 +178,27 @@ void QXMutex_unlock(QXMutex * const me) {
me->prevPrio = (uint_fast8_t)MUTEX_UNUSED;
QXK_attr_.lockHolder = me->prevHolder; /* restore previous lock holder */
if (QXK_attr_.lockPrio > p) {
QS_BEGIN_NOCRIT_(QS_SCHED_UNLOCK, (void *)0, (void *)0)
QS_TIME_(); /* timestamp */
if (QXK_attr_.lockPrio > p) {
QS_2U8_((uint8_t)QXK_attr_.lockPrio, /* previouis lock priority */
(uint8_t)p); /* new lock priority */
}
else {
p = QXK_attr_.lockPrio;
QS_2U8_((uint8_t)p, /* previouis lock priority */
(uint8_t)p); /* new lock priority */
}
QS_END_NOCRIT_()
if (QXK_attr_.lockPrio > p) {
QXK_attr_.lockPrio = p; /* restore the previous lock prio */
/* find the highest-prio thread ready to run */
if (QXK_sched_() != (uint_fast8_t)0) { /* priority found? */
QXK_activate_(); /* activate any unlocked basic threads */
}
}
else {
QS_BEGIN_NOCRIT_(QS_SCHED_UNLOCK, (void *)0, (void *)0)
QS_TIME_(); /* timestamp */
p = QXK_attr_.lockPrio;
QS_2U8_((uint8_t)p, /* previouis lock priority */
(uint8_t)p); /* new lock priority */
QS_END_NOCRIT_()
}
QF_CRIT_EXIT_();
}

58
src/qxk/qxk_sema.c
View File

@ -4,8 +4,8 @@
* @ingroup qxk
* @cond
******************************************************************************
* Last updated for version 5.9.5
* Last updated on 2017-07-20
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -57,21 +57,30 @@ Q_DEFINE_THIS_MODULE("qxk_sema")
/****************************************************************************/
/**
* @description
* Initializes a semaphore with the specified count. If the semaphore is used
* for resource sharing, the initial value of the semaphore count should be
* set to the number of identical resources guarded by the semaphore. If the
* semaphore is used as a signaling mechanism, the initial count should set
* to 0.
* Initializes a semaphore with the specified count and maximum count.
* If the semaphore is used for resource sharing, both the initial count
* and maximum count should be set to the number of identical resources
* guarded by the semaphore. If the semaphore is used as a signaling
* mechanism, the initial count should set to 0 and maximum count to 1
* (binary semaphore).
*
* @param[in,out] me pointer (see @ref oop)
* @param[in] count initial value of the semaphore counter
* @param[in] max_count maximum value of the semaphore counter.
* The purpose of the max_count is to limit the counter
* so that the semaphore cannot unblock more times than
* the maximum.
*
* @note
* QXSemaphore_init() must be called **before** the semaphore can be used
* (signaled or waited on).
*/
void QXSemaphore_init(QXSemaphore * const me, uint_fast16_t count) {
void QXSemaphore_init(QXSemaphore * const me, uint_fast16_t count,
uint_fast16_t max_count)
{
Q_REQUIRE_ID(100, max_count > (uint_fast16_t)0);
me->count = count;
me->max_count = max_count;
QPSet_setEmpty(&me->waitSet);
}
@ -109,9 +118,15 @@ bool QXSemaphore_wait(QXSemaphore * const me,
QF_CRIT_ENTRY_();
thr = (QXThread *)QXK_attr_.curr;
Q_REQUIRE_ID(100, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
/** @pre this function must:
* (1) NOT be called from an ISR; (2) be called from an extended thread;
* (3) the thread must NOT be holding a mutex and
* (4) the thread must NOT be already blocked on any object.
*/
Q_REQUIRE_ID(200, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
&& (thr != (QXThread *)0) /* current thread must be extended */
&& (thr->super.super.temp.obj == (QMState const *)0)); /* !blocked */
&& (QXK_attr_.lockPrio == (uint_fast8_t)0) /* not holding a mutex */
&& (thr->super.super.temp.obj == (QMState *)0)); /* not blocked */
if (me->count > (uint_fast16_t)0) {
--me->count;
@ -129,7 +144,7 @@ bool QXSemaphore_wait(QXSemaphore * const me,
QF_CRIT_ENTRY_();
/* the blocking object must be this semaphore */
Q_ASSERT_ID(110, thr->super.super.temp.obj == (QMState const *)me);
Q_ASSERT_ID(210, thr->super.super.temp.obj == (QMState const *)me);
thr->super.super.temp.obj = (QMState const *)0; /* clear */
}
QF_CRIT_EXIT_();
@ -150,11 +165,15 @@ bool QXSemaphore_wait(QXSemaphore * const me,
*
* @param[in,out] me pointer (see @ref oop)
*
* @returns true when the semaphore signaled and false when the semaphore
* count exceeded the maximum.
*
* @note
* A semaphore can be signaled from many places, including from ISRs, basic
* threads (AOs), and extended threads.
*/
void QXSemaphore_signal(QXSemaphore * const me) {
bool QXSemaphore_signal(QXSemaphore * const me) {
bool signaled = true; /* assume that the semaphore will be signaled */
QF_CRIT_STAT_
QF_CRIT_ENTRY_();
@ -162,14 +181,14 @@ void QXSemaphore_signal(QXSemaphore * const me) {
uint_fast8_t p;
QXThread *thr;
/* find the highest-priority thread waiting on this semaphore */
QPSet_findMax(&me->waitSet, p);
QPSet_insert(&QXK_attr_.readySet, p);
QPSet_remove(&me->waitSet, p);
thr = (QXThread *)QF_active_[p];
thr = (QXThread *)QF_active_[p]; /* thread waiting on the semaphore */
Q_ASSERT_ID(210,
(thr->super.osObject != (struct QActive *)0) /* must be extended */
Q_ASSERT_ID(210, (thr != (QXThread *)0) /* must be registered */
&& (thr->super.osObject != (struct QActive *)0) /* extended thr.*/
&& (me->count == (uint_fast16_t)0)); /* sema counter must be 0 */
/* disarm the internal time event */
@ -180,8 +199,15 @@ void QXSemaphore_signal(QXSemaphore * const me) {
}
}
else {
if (me->count < me->max_count) {
++me->count;
}
else {
signaled = false; /* semaphore NOT signaled */
}
}
QF_CRIT_EXIT_();
return signaled;
}

27
src/qxk/qxk_xthr.c
View File

@ -4,8 +4,8 @@
* @ingroup qxk
* @cond
******************************************************************************
* Last updated for version 5.9.4
* Last updated on 2017-07-06
* Last updated for version 5.9.6
* Last updated on 2017-07-27
*
* Q u a n t u m L e a P s
* ---------------------------
@ -386,9 +386,15 @@ QEvt const *QXThread_queueGet(uint_fast16_t const nTicks,
QF_CRIT_ENTRY_();
thr = (QXThread *)QXK_attr_.curr;
/** @pre this function must:
* (1) NOT be called from an ISR; (2) be called from an extended thread;
* (3) the thread must NOT be holding a mutex and
* (4) the thread must NOT be already blocked on any object.
*/
Q_REQUIRE_ID(500, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
&& (thr != (QXThread *)0) /* current thread must be extended */
&& (thr->super.super.temp.obj == (QMState const *)0)); /* !blocked */
&& (QXK_attr_.lockPrio == (uint_fast8_t)0) /* not holding a mutex */
&& (thr->super.super.temp.obj == (QMState *)0)); /* not blocked */
/* is the queue empty? */
if (thr->super.eQueue.frontEvt == (QEvt *)0) {
@ -467,7 +473,7 @@ QEvt const *QXThread_queueGet(uint_fast16_t const nTicks,
* must be called from within a critical section
*/
void QXThread_block_(QXThread const * const me) {
/*! @pre the thread holding the lock cannot block! */
/** @pre the thread holding the lock cannot block! */
Q_REQUIRE_ID(600, me->super.prio != QXK_attr_.lockPrio);
QPSet_remove(&QXK_attr_.readySet, me->super.prio);
(void)QXK_sched_();
@ -503,7 +509,7 @@ void QXThread_teArm_(QXThread * const me,
QSignal sig,
uint_fast16_t const nTicks, uint_fast8_t const tickRate)
{
/* the time event must be unused */
/** @pre the time event must be unused */
Q_REQUIRE_ID(700, me->timeEvt.ctr == (QTimeEvtCtr)0);
me->timeEvt.super.sig = sig;
@ -564,8 +570,15 @@ bool QXThread_delay(uint_fast16_t const nTicks, uint_fast8_t const tickRate) {
QF_CRIT_ENTRY_();
thr = (QXThread *)QXK_attr_.curr;
/* the delaying thread must not be blocked on any object */
Q_REQUIRE_ID(900, thr->super.super.temp.obj == (QMState const *)0);
/** @pre this function must:
* (1) NOT be called from an ISR; (2) be called from an extended thread;
* (3) the thread must NOT be holding a mutex and
* (4) the thread must NOT be already blocked on any object.
*/
Q_REQUIRE_ID(900, (!QXK_ISR_CONTEXT_()) /* can't block inside an ISR */
&& (thr != (QXThread *)0) /* current thread must be extended */
&& (QXK_attr_.lockPrio == (uint_fast8_t)0) /* not holding a mutex */
&& (thr->super.super.temp.obj == (QMState *)0)); /* not blocked */
/* remember the blocking object */
thr->super.super.temp.obj = (QMState const *)&thr->timeEvt;