2.1
### uVision Project, (C) Keil Software
dpp-dbg 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC STM32L053R8 STMicroelectronics Keil.STM32L0xx_DFP.1.3.0 http://www.keil.com/pack/ IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L0xx_64 -FS08000000 -FL010000 -FP0($$Device:STM32L053R8$Flash\STM32L0xx_64.FLM)) 0 $$Device:STM32L053R8$Device\Include\stm32l0xx.h $$Device:STM32L053R8$SVD\STM32L053x.svd 0 0 0 0 0 0 1 .\dbg\ dpp-qv 1 0 0 1 1 .\dbg\ 1 0 0 0 0 0 0 0 0 1 0 cmd /c "del .\dbg\qstamp.o" 0 0 0 0 1 0 fromelf --bin --output .\dbg\dpp-qv.bin .\dbg\dpp-qv.axf 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 3 1 SARMCM3.DLL DARMCM1.DLL -pCM0+ SARMCM3.DLL TARMCM1.DLL -pCM0+ 1 0 0 0 16 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 0 1 0 11 STLink\ST-LINKIII-KEIL_SWO.dll 1 0 0 1 1 4096 1 BIN\UL2CM3.DLL "" () 0 0 1 1 1 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 "Cortex-M0+" 0 0 0 1 1 0 0 0 0 0 8 0 0 0 0 3 3 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x2000 1 0x8000000 0x10000 0 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x8000000 0x10000 1 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x2000 0 0x0 0x0 0 1 0 0 1 0 0 0 0 0 2 0 1 0 0 0 0 0 0 ..\..;..\..\..\..\..\include;..\..\..\..\..\source;..\..\..\..\..\ports\arm-cm\qv\arm;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-l053r8 1 0 0 0 0 0 0 1 0 Stack_Size=1024 Heap_Size=0 1 0 0 0 1 0 0x00000000 0x20000000 --entry Reset_Handler Source Code bsp.c 1 ..\bsp.c bsp.h 5 ..\..\bsp.h dpp.h 5 ..\..\dpp.h main.c 1 ..\..\main.c philo.c 1 ..\..\philo.c table.c 1 ..\..\table.c qstamp.c 1 ..\..\..\..\..\include\qstamp.c nucleo-l053r8 stm32l0xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\stm32l0xx.h stm32l053xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\stm32l053xx.h system_stm32l0xx.c 1 ..\..\..\..\..\3rd_party\nucleo-l053r8\system_stm32l0xx.c system_stm32l0xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\system_stm32l0xx.h startup_stm32l053xx.s 2 ..\..\..\..\..\3rd_party\nucleo-l053r8\arm\startup_stm32l053xx.s QP qep_hsm.c 1 ..\..\..\..\..\source\qep_hsm.c qep_msm.c 1 ..\..\..\..\..\source\qep_msm.c qf_act.c 1 ..\..\..\..\..\source\qf_act.c qf_actq.c 1 ..\..\..\..\..\source\qf_actq.c qf_defer.c 1 ..\..\..\..\..\source\qf_defer.c qf_dyn.c 1 ..\..\..\..\..\source\qf_dyn.c qf_mem.c 1 ..\..\..\..\..\source\qf_mem.c qf_pkg.h 5 ..\..\..\..\..\source\qf_pkg.h qf_ps.c 1 ..\..\..\..\..\source\qf_ps.c qf_qact.c 1 ..\..\..\..\..\source\qf_qact.c qf_qeq.c 1 ..\..\..\..\..\source\qf_qeq.c qf_qmact.c 1 ..\..\..\..\..\source\qf_qmact.c qf_time.c 1 ..\..\..\..\..\source\qf_time.c qv.c 1 ..\..\..\..\..\source\qv.c QP_port qep_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qep_port.h qf_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qf_port.h qv_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qv_port.h qs_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qs_port.h QS 0 0 0 0 0 0 2 2 2 2 11 1 2 0 2 2 2 2 2 2 2 2 2 2 2 2 2 0 0 0 0 2 2 2 2 2 2 2 2 2 qs.c 1 ..\..\..\..\..\source\qs.c qs_64bit.c 1 ..\..\..\..\..\source\qs_64bit.c qs_fp.c 1 ..\..\..\..\..\source\qs_fp.c qs_pkg.h 5 ..\..\..\..\..\source\qs_pkg.h dpp-rel 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC STM32L053R8 STMicroelectronics Keil.STM32L0xx_DFP.1.3.0 http://www.keil.com/pack/ IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L0xx_64 -FS08000000 -FL010000 -FP0($$Device:STM32L053R8$Flash\STM32L0xx_64.FLM)) 0 $$Device:STM32L053R8$Device\Include\stm32l0xx.h $$Device:STM32L053R8$SVD\STM32L053x.svd 0 0 0 0 0 0 1 .\rel\ dpp-qv 1 0 0 0 0 .\rel\ 1 0 0 0 0 0 0 0 0 1 0 cmd /c "del .\rel\qstamp.o" 0 0 0 0 1 0 fromelf --bin --output .\rel\dpp-qv.bin .\rel\dpp-qv.axf 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 3 1 SARMCM3.DLL DARMCM1.DLL -pCM0+ SARMCM3.DLL TARMCM1.DLL -pCM0+ 1 0 0 0 16 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 0 1 0 11 STLink\ST-LINKIII-KEIL_SWO.dll 1 0 0 1 1 4097 1 BIN\UL2CM3.DLL 0 0 1 1 1 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 "Cortex-M0+" 0 0 0 1 1 0 0 0 0 0 8 0 0 0 0 3 3 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x2000 1 0x8000000 0x10000 0 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x8000000 0x10000 1 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x2000 0 0x0 0x0 0 4 0 0 1 0 0 0 0 0 2 0 1 0 0 0 0 0 0 NDEBUG ..\..;..\..\..\..\..\include;..\..\..\..\..\source;..\..\..\..\..\ports\arm-cm\qv\arm;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-l053r8 1 0 0 0 0 0 0 1 0 Stack_Size=1024 Heap_Size=0 1 0 0 0 1 0 0x00000000 0x20000000 dpp-qv.sct --entry Reset_Handler Source Code bsp.c 1 ..\bsp.c bsp.h 5 ..\..\bsp.h dpp.h 5 ..\..\dpp.h main.c 1 ..\..\main.c philo.c 1 ..\..\philo.c table.c 1 ..\..\table.c qstamp.c 1 ..\..\..\..\..\include\qstamp.c nucleo-l053r8 stm32l0xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\stm32l0xx.h stm32l053xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\stm32l053xx.h system_stm32l0xx.c 1 ..\..\..\..\..\3rd_party\nucleo-l053r8\system_stm32l0xx.c system_stm32l0xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\system_stm32l0xx.h startup_stm32l053xx.s 2 ..\..\..\..\..\3rd_party\nucleo-l053r8\arm\startup_stm32l053xx.s QP qep_hsm.c 1 ..\..\..\..\..\source\qep_hsm.c qep_msm.c 1 ..\..\..\..\..\source\qep_msm.c qf_act.c 1 ..\..\..\..\..\source\qf_act.c qf_actq.c 1 ..\..\..\..\..\source\qf_actq.c qf_defer.c 1 ..\..\..\..\..\source\qf_defer.c qf_dyn.c 1 ..\..\..\..\..\source\qf_dyn.c qf_mem.c 1 ..\..\..\..\..\source\qf_mem.c qf_pkg.h 5 ..\..\..\..\..\source\qf_pkg.h qf_ps.c 1 ..\..\..\..\..\source\qf_ps.c qf_qact.c 1 ..\..\..\..\..\source\qf_qact.c qf_qeq.c 1 ..\..\..\..\..\source\qf_qeq.c qf_qmact.c 1 ..\..\..\..\..\source\qf_qmact.c qf_time.c 1 ..\..\..\..\..\source\qf_time.c qv.c 1 ..\..\..\..\..\source\qv.c QP_port qep_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qep_port.h qf_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qf_port.h qv_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qv_port.h qs_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qs_port.h QS 0 0 0 0 0 0 2 2 2 2 11 1 2 0 2 2 2 2 2 2 2 2 2 2 2 2 2 0 0 0 0 2 2 2 2 2 2 2 2 2 qs.c 1 ..\..\..\..\..\source\qs.c qs_64bit.c 1 ..\..\..\..\..\source\qs_64bit.c qs_fp.c 1 ..\..\..\..\..\source\qs_fp.c qs_pkg.h 5 ..\..\..\..\..\source\qs_pkg.h dpp-spy 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC STM32L053R8 STMicroelectronics Keil.STM32L0xx_DFP.1.3.0 http://www.keil.com/pack/ IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L0xx_64 -FS08000000 -FL010000 -FP0($$Device:STM32L053R8$Flash\STM32L0xx_64.FLM)) 0 $$Device:STM32L053R8$Device\Include\stm32l0xx.h $$Device:STM32L053R8$SVD\STM32L053x.svd 0 0 0 0 0 0 1 .\spy\ dpp-qv 1 0 0 1 1 .\spy\ 1 0 0 0 0 0 0 0 0 1 0 cmd /c "del .\spy\qstamp.o" 0 0 0 0 1 0 fromelf --bin --output .\spy\dpp-qv.bin .\spy\dpp-qv.axf 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 3 1 SARMCM3.DLL DARMCM1.DLL -pCM0+ SARMCM3.DLL TARMCM1.DLL -pCM0+ 1 0 0 0 16 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 0 1 0 11 STLink\ST-LINKIII-KEIL_SWO.dll 1 0 0 1 1 4096 1 BIN\UL2CM3.DLL "" () 0 0 1 1 1 1 1 1 1 0 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 "Cortex-M0+" 0 0 0 1 1 0 0 0 0 0 8 0 0 0 0 3 3 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x2000 1 0x8000000 0x10000 0 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x8000000 0x10000 1 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x2000 0 0x0 0x0 0 1 0 0 1 0 0 0 0 0 2 0 1 0 0 0 0 0 0 Q_SPY ..\..;..\..\..\..\..\include;..\..\..\..\..\source;..\..\..\..\..\ports\arm-cm\qv\arm;..\..\..\..\..\3rd_party\CMSIS\Include;..\..\..\..\..\3rd_party\nucleo-l053r8 1 0 0 0 0 0 0 1 0 Stack_Size=1024 Heap_Size=0 1 0 0 0 1 0 0x00000000 0x20000000 dpp-qv.sct --entry Reset_Handler Source Code bsp.c 1 ..\bsp.c bsp.h 5 ..\..\bsp.h dpp.h 5 ..\..\dpp.h main.c 1 ..\..\main.c philo.c 1 ..\..\philo.c table.c 1 ..\..\table.c qstamp.c 1 ..\..\..\..\..\include\qstamp.c nucleo-l053r8 stm32l0xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\stm32l0xx.h stm32l053xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\stm32l053xx.h system_stm32l0xx.c 1 ..\..\..\..\..\3rd_party\nucleo-l053r8\system_stm32l0xx.c system_stm32l0xx.h 5 ..\..\..\..\..\3rd_party\nucleo-l053r8\system_stm32l0xx.h startup_stm32l053xx.s 2 ..\..\..\..\..\3rd_party\nucleo-l053r8\arm\startup_stm32l053xx.s QP qep_hsm.c 1 ..\..\..\..\..\source\qep_hsm.c qep_msm.c 1 ..\..\..\..\..\source\qep_msm.c qf_act.c 1 ..\..\..\..\..\source\qf_act.c qf_actq.c 1 ..\..\..\..\..\source\qf_actq.c qf_defer.c 1 ..\..\..\..\..\source\qf_defer.c qf_dyn.c 1 ..\..\..\..\..\source\qf_dyn.c qf_mem.c 1 ..\..\..\..\..\source\qf_mem.c qf_pkg.h 5 ..\..\..\..\..\source\qf_pkg.h qf_ps.c 1 ..\..\..\..\..\source\qf_ps.c qf_qact.c 1 ..\..\..\..\..\source\qf_qact.c qf_qeq.c 1 ..\..\..\..\..\source\qf_qeq.c qf_qmact.c 1 ..\..\..\..\..\source\qf_qmact.c qf_time.c 1 ..\..\..\..\..\source\qf_time.c qv.c 1 ..\..\..\..\..\source\qv.c QP_port qep_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qep_port.h qf_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qf_port.h qv_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qv_port.h qs_port.h 5 ..\..\..\..\..\ports\arm-cm\qv\arm\qs_port.h QS qs.c 1 ..\..\..\..\..\source\qs.c qs_64bit.c 1 ..\..\..\..\..\source\qs_64bit.c qs_fp.c 1 ..\..\..\..\..\source\qs_fp.c qs_pkg.h 5 ..\..\..\..\..\source\qs_pkg.h