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339 lines
14 KiB
ArmAsm
339 lines
14 KiB
ArmAsm
;//*****************************************************************************
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;//
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;// Copyright (C) 2012 - 2018 Texas Instruments Incorporated - http://www.ti.com/
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;//
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;// Redistribution and use in source and binary forms, with or without
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;// modification, are permitted provided that the following conditions
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;// are met:
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;//
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;// Redistributions of source code must retain the above copyright
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;// notice, this list of conditions and the following disclaimer.
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;//
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;// Redistributions in binary form must reproduce the above copyright
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;// notice, this list of conditions and the following disclaimer in the
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;// documentation and/or other materials provided with the
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;// distribution.
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;//
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;// Neither the name of Texas Instruments Incorporated nor the names of
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;// its contributors may be used to endorse or promote products derived
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;// from this software without specific prior written permission.
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;//
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;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;//
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;// MSP432 startup file
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;//
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;//****************************************************************************
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;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000200
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD PSS_IRQHandler ; 0: PSS Interrupt
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DCD CS_IRQHandler ; 1: CS Interrupt
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DCD PCM_IRQHandler ; 2: PCM Interrupt
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DCD WDT_A_IRQHandler ; 3: WDT_A Interrupt
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DCD FPU_IRQHandler ; 4: FPU Interrupt
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DCD FLCTL_IRQHandler ; 5: Flash Controller Interrupt
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DCD COMP_E0_IRQHandler ; 6: COMP_E0 Interrupt
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DCD COMP_E1_IRQHandler ; 7: COMP_E1 Interrupt
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DCD TA0_0_IRQHandler ; 8: TA0_0 Interrupt
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DCD TA0_N_IRQHandler ; 9: TA0_N Interrupt
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DCD TA1_0_IRQHandler ; 10: TA1_0 Interrupt
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DCD TA1_N_IRQHandler ; 11: TA1_N Interrupt
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DCD TA2_0_IRQHandler ; 12: TA2_0 Interrupt
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DCD TA2_N_IRQHandler ; 13: TA2_N Interrupt
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DCD TA3_0_IRQHandler ; 14: TA3_0 Interrupt
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DCD TA3_N_IRQHandler ; 15: TA3_N Interrupt
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DCD EUSCIA0_IRQHandler ; 16: EUSCIA0 Interrupt
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DCD EUSCIA1_IRQHandler ; 17: EUSCIA1 Interrupt
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DCD EUSCIA2_IRQHandler ; 18: EUSCIA2 Interrupt
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DCD EUSCIA3_IRQHandler ; 19: EUSCIA3 Interrupt
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DCD EUSCIB0_IRQHandler ; 20: EUSCIB0 Interrupt
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DCD EUSCIB1_IRQHandler ; 21: EUSCIB1 Interrupt
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DCD EUSCIB2_IRQHandler ; 22: EUSCIB2 Interrupt
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DCD EUSCIB3_IRQHandler ; 23: EUSCIB3 Interrupt
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DCD ADC14_IRQHandler ; 24: ADC14 Interrupt
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DCD T32_INT1_IRQHandler ; 25: T32_INT1 Interrupt
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DCD T32_INT2_IRQHandler ; 26: T32_INT2 Interrupt
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DCD T32_INTC_IRQHandler ; 27: T32_INTC Interrupt
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DCD AES256_IRQHandler ; 28: AES256 Interrupt
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DCD RTC_C_IRQHandler ; 29: RTC_C Interrupt
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DCD DMA_ERR_IRQHandler ; 30: DMA_ERR Interrupt
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DCD DMA_INT3_IRQHandler ; 31: DMA_INT3 Interrupt
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DCD DMA_INT2_IRQHandler ; 32: DMA_INT2 Interrupt
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DCD DMA_INT1_IRQHandler ; 33: DMA_INT1 Interrupt
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DCD DMA_INT0_IRQHandler ; 34: DMA_INT0 Interrupt
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DCD PORT1_IRQHandler ; 35: Port1 Interrupt
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DCD PORT2_IRQHandler ; 36: Port2 Interrupt
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DCD PORT3_IRQHandler ; 37: Port3 Interrupt
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DCD PORT4_IRQHandler ; 38: Port4 Interrupt
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DCD PORT5_IRQHandler ; 39: Port5 Interrupt
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DCD PORT6_IRQHandler ; 40: Port6 Interrupt
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DCD 0 ; 41: Reserved
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DCD 0 ; 42: Reserved
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DCD 0 ; 43: Reserved
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DCD 0 ; 44: Reserved
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DCD 0 ; 45: Reserved
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DCD 0 ; 46: Reserved
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DCD 0 ; 47: Reserved
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DCD 0 ; 48: Reserved
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DCD 0 ; 49: Reserved
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DCD 0 ; 50: Reserved
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DCD 0 ; 51: Reserved
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DCD 0 ; 52: Reserved
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DCD 0 ; 53: Reserved
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DCD 0 ; 54: Reserved
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DCD 0 ; 55: Reserved
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DCD 0 ; 56: Reserved
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DCD 0 ; 57: Reserved
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DCD 0 ; 58: Reserved
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DCD 0 ; 59: Reserved
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DCD 0 ; 60: Reserved
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DCD 0 ; 61: Reserved
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DCD 0 ; 62: Reserved
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DCD 0 ; 63: Reserved
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DCD 0 ; 64: Reserved
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT PSS_IRQHandler [WEAK]
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EXPORT CS_IRQHandler [WEAK]
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EXPORT PCM_IRQHandler [WEAK]
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EXPORT WDT_A_IRQHandler [WEAK]
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EXPORT FPU_IRQHandler [WEAK]
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EXPORT FLCTL_IRQHandler [WEAK]
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EXPORT COMP_E0_IRQHandler [WEAK]
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EXPORT COMP_E1_IRQHandler [WEAK]
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EXPORT TA0_0_IRQHandler [WEAK]
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EXPORT TA0_N_IRQHandler [WEAK]
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EXPORT TA1_0_IRQHandler [WEAK]
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EXPORT TA1_N_IRQHandler [WEAK]
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EXPORT TA2_0_IRQHandler [WEAK]
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EXPORT TA2_N_IRQHandler [WEAK]
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EXPORT TA3_0_IRQHandler [WEAK]
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EXPORT TA3_N_IRQHandler [WEAK]
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EXPORT EUSCIA0_IRQHandler [WEAK]
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EXPORT EUSCIA1_IRQHandler [WEAK]
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EXPORT EUSCIA2_IRQHandler [WEAK]
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EXPORT EUSCIA3_IRQHandler [WEAK]
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EXPORT EUSCIB0_IRQHandler [WEAK]
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EXPORT EUSCIB1_IRQHandler [WEAK]
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EXPORT EUSCIB2_IRQHandler [WEAK]
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EXPORT EUSCIB3_IRQHandler [WEAK]
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EXPORT ADC14_IRQHandler [WEAK]
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EXPORT T32_INT1_IRQHandler [WEAK]
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EXPORT T32_INT2_IRQHandler [WEAK]
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EXPORT T32_INTC_IRQHandler [WEAK]
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EXPORT AES256_IRQHandler [WEAK]
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EXPORT RTC_C_IRQHandler [WEAK]
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EXPORT DMA_ERR_IRQHandler [WEAK]
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EXPORT DMA_INT3_IRQHandler [WEAK]
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EXPORT DMA_INT2_IRQHandler [WEAK]
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EXPORT DMA_INT1_IRQHandler [WEAK]
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EXPORT DMA_INT0_IRQHandler [WEAK]
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EXPORT PORT1_IRQHandler [WEAK]
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EXPORT PORT2_IRQHandler [WEAK]
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EXPORT PORT3_IRQHandler [WEAK]
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EXPORT PORT4_IRQHandler [WEAK]
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EXPORT PORT5_IRQHandler [WEAK]
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EXPORT PORT6_IRQHandler [WEAK]
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PSS_IRQHandler
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CS_IRQHandler
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PCM_IRQHandler
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WDT_A_IRQHandler
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FPU_IRQHandler
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FLCTL_IRQHandler
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COMP_E0_IRQHandler
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COMP_E1_IRQHandler
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TA0_0_IRQHandler
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TA0_N_IRQHandler
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TA1_0_IRQHandler
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TA1_N_IRQHandler
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TA2_0_IRQHandler
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TA2_N_IRQHandler
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TA3_0_IRQHandler
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TA3_N_IRQHandler
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EUSCIA0_IRQHandler
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EUSCIA1_IRQHandler
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EUSCIA2_IRQHandler
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EUSCIA3_IRQHandler
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EUSCIB0_IRQHandler
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EUSCIB1_IRQHandler
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EUSCIB2_IRQHandler
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EUSCIB3_IRQHandler
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ADC14_IRQHandler
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T32_INT1_IRQHandler
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T32_INT2_IRQHandler
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T32_INTC_IRQHandler
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AES256_IRQHandler
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RTC_C_IRQHandler
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DMA_ERR_IRQHandler
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DMA_INT3_IRQHandler
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DMA_INT2_IRQHandler
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DMA_INT1_IRQHandler
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DMA_INT0_IRQHandler
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PORT1_IRQHandler
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PORT2_IRQHandler
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PORT3_IRQHandler
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PORT4_IRQHandler
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PORT5_IRQHandler
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PORT6_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap PROC
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ENDP
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ALIGN
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ENDIF
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END
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