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67 lines
2.3 KiB
NASM
67 lines
2.3 KiB
NASM
;-------------------------------------------------------------------------------
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; sys_intvecs.asm
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;
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; Copyright (C) 2009-2016 Texas Instruments Incorporated - www.ti.com
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;
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the
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; distribution.
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;
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; Neither the name of Texas Instruments Incorporated nor the names of
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; its contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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;
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;
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.sect ".intvecs"
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.arm
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;-------------------------------------------------------------------------------
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; import reference for interrupt routines
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.ref _c_int00
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.ref _dabort
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.ref phantomInterrupt
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.def resetEntry
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;-------------------------------------------------------------------------------
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; interrupt vectors
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resetEntry
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b _c_int00
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undefEntry
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b undefEntry
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svcEntry
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b svcEntry
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prefetchEntry
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b prefetchEntry
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b _dabort
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b phantomInterrupt
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ldr pc,[pc,#-0x1b0]
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ldr pc,[pc,#-0x1b0]
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;-------------------------------------------------------------------------------
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