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471 lines
13 KiB
NASM
471 lines
13 KiB
NASM
;-------------------------------------------------------------------------------
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; sys_mpu.asm
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;
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; Copyright (C) 2009-2016 Texas Instruments Incorporated - www.ti.com
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;
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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;
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; Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the
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; distribution.
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;
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; Neither the name of Texas Instruments Incorporated nor the names of
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; its contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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;
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;
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.text
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.arm
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;-------------------------------------------------------------------------------
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; Initalize Mpu
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; SourceId : MPU_SourceId_001
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; DesignId : MPU_DesignId_001
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; Requirements : HL_SR487
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.def _mpuInit_
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.asmfunc
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_mpuInit_
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; Disable mpu
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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; Disable background region
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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; Setup region 1
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mov r0, #0
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r1Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1000
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (1 << 12) + (1 << 11) + (1 << 10) + (1 << 9) + (1 << 8) + (0x1F << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 2
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mov r0, #1
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r2Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x0600
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region
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mov r0, #2
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r3Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x11 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 4
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mov r0, #3
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r4Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x11 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 5
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mov r0, #4
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r5Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0000
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x19 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 6
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mov r0, #5
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r6Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0000
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x1A << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 7
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mov r0, #6
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r7Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1200
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x16 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 8
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mov r0, #7
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r8Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0010
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x17 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 9
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mov r0, #8
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r9Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0010
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x08 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 10
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mov r0, #9
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r10Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0010
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x17 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 11
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mov r0, #10
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r11Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1100
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x0A << 1) + (0))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 12
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mov r0, #11
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r12Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (0))
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mcr p15, #0, r0, c6, c1, #2
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; Enable mpu background region
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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; Enable mpu
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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bx lr
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r1Base .word 0x00000000
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r2Base .word 0x00000000
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r3Base .word 0x08000000
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r4Base .word 0x08400000
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r5Base .word 0x60000000
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r6Base .word 0x80000000
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r7Base .word 0xF0000000
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r8Base .word 0xFC000000
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r9Base .word 0xFE000000
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r10Base .word 0xFF000000
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r11Base .word 0x08001000
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r12Base .word 0x20000000
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Enable Mpu
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; SourceId : MPU_SourceId_002
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; DesignId : MPU_DesignId_002
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; Requirements : HL_SR488
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.def _mpuEnable_
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.asmfunc
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_mpuEnable_
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Disable Mpu
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; SourceId : MPU_SourceId_003
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; DesignId : MPU_DesignId_003
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; Requirements : HL_SR488
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.def _mpuDisable_
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.asmfunc
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_mpuDisable_
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Enable Mpu background region
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; SourceId : MPU_SourceId_004
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; DesignId : MPU_DesignId_004
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; Requirements : HL_SR488
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.def _mpuEnableBackgroundRegion_
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.asmfunc
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_mpuEnableBackgroundRegion_
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Disable Mpu background region
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; SourceId : MPU_SourceId_005
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; DesignId : MPU_DesignId_005
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; Requirements : HL_SR488
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.def _mpuDisableBackgroundRegion_
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.asmfunc
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_mpuDisableBackgroundRegion_
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Returns number of implemented Mpu regions
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; SourceId : MPU_SourceId_006
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; DesignId : MPU_DesignId_006
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; Requirements : HL_SR490
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.def _mpuGetNumberOfRegions_
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.asmfunc
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_mpuGetNumberOfRegions_
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mrc p15, #0, r0, c0, c0, #4
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uxtb r0, r0, ROR #8
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Returns the type of the implemented mpu regions
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; SourceId : MPU_SourceId_007
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; DesignId : MPU_DesignId_007
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; Requirements : HL_SR490
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.def _mpuAreRegionsSeparate_
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.asmfunc
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_mpuAreRegionsSeparate_
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mrc p15, #0, r0, c0, c0, #4
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uxtb r0, r0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set mpu region number
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; SourceId : MPU_SourceId_008
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; DesignId : MPU_DesignId_008
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; Requirements : HL_SR489
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.def _mpuSetRegion_
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.asmfunc
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_mpuSetRegion_
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mcr p15, #0, r0, c6, c2, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get mpu region number
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; SourceId : MPU_SourceId_009
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; DesignId : MPU_DesignId_009
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; Requirements : HL_SR490
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.def _mpuGetRegion_
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.asmfunc
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_mpuGetRegion_
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mrc p15, #0, r0, c6, c2, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set base address
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; SourceId : MPU_SourceId_010
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; DesignId : MPU_DesignId_010
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; Requirements : HL_SR489
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.def _mpuSetRegionBaseAddress_
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.asmfunc
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_mpuSetRegionBaseAddress_
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mcr p15, #0, r0, c6, c1, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get base address
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; SourceId : MPU_SourceId_011
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; DesignId : MPU_DesignId_011
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; Requirements : HL_SR490
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.def _mpuGetRegionBaseAddress_
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.asmfunc
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_mpuGetRegionBaseAddress_
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mrc p15, #0, r0, c6, c1, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set type and permission
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; SourceId : MPU_SourceId_012
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; DesignId : MPU_DesignId_012
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; Requirements : HL_SR489
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.def _mpuSetRegionTypeAndPermission_
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.asmfunc
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_mpuSetRegionTypeAndPermission_
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orr r0, r0, r1
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mcr p15, #0, r0, c6, c1, #4
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get type
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; SourceId : MPU_SourceId_013
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; DesignId : MPU_DesignId_013
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; Requirements : HL_SR490
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.def _mpuGetRegionType_
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.asmfunc
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_mpuGetRegionType_
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mrc p15, #0, r0, c6, c1, #4
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bic r0, r0, #0xFF00
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get permission
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; SourceId : MPU_SourceId_014
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; DesignId : MPU_DesignId_014
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; Requirements : HL_SR490
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.def _mpuGetRegionPermission_
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.asmfunc
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_mpuGetRegionPermission_
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mrc p15, #0, r0, c6, c1, #4
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bic r0, r0, #0xFF
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set region size register value
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; SourceId : MPU_SourceId_015
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; DesignId : MPU_DesignId_015
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; Requirements : HL_SR489
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.def _mpuSetRegionSizeRegister_
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.asmfunc
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_mpuSetRegionSizeRegister_
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mcr p15, #0, r0, c6, c1, #2
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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