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100 lines
3.3 KiB
C
100 lines
3.3 KiB
C
/*============================================================================
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* QP/C Real-Time Embedded Framework (RTEF)
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* Copyright (C) 2005 Quantum Leaps, LLC. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-3.0-or-later OR LicenseRef-QL-commercial
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*
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* This software is dual-licensed under the terms of the open source GNU
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* General Public License version 3 (or any later version), or alternatively,
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* under the terms of one of the closed source Quantum Leaps commercial
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* licenses.
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*
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* The terms of the open source GNU General Public License version 3
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* can be found at: <www.gnu.org/licenses/gpl-3.0>
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*
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* The terms of the closed source Quantum Leaps commercial licenses
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* can be found at: <www.state-machine.com/licensing>
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*
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* Redistributions in source code must retain this top-level comment block.
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* Plagiarizing this software to sidestep the license obligations is illegal.
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*
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* Contact information:
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* <www.state-machine.com>
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* <info@state-machine.com>
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============================================================================*/
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/*!
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* @date Last updated on: 2022-12-18
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* @version Last updated for: @ref qpc_7_2_0
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*
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* @file
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* @brief QXK/C port to ARM Cortex-M, ARM-CLANG compiler
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*/
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#ifndef QXK_PORT_H
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#define QXK_PORT_H
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/* determination if the code executes in the ISR context */
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#define QXK_ISR_CONTEXT_() (QXK_get_IPSR() != 0U)
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__attribute__((always_inline))
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static inline uint32_t QXK_get_IPSR(void) {
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uint32_t regIPSR;
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__asm volatile ("mrs %0,ipsr" : "=r" (regIPSR));
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return regIPSR;
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}
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/* trigger the PendSV exception to pefrom the context switch */
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#define QXK_CONTEXT_SWITCH_() \
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*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (1U << 28U)
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/* QXK ISR entry and exit */
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#define QXK_ISR_ENTRY() ((void)0)
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#define QXK_ISR_EXIT() do { \
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QF_INT_DISABLE(); \
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if (QXK_sched_() != 0U) { \
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QXK_CONTEXT_SWITCH_(); \
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} \
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QF_INT_ENABLE(); \
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QXK_ARM_ERRATUM_838869(); \
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} while (false)
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#if (__ARM_ARCH == 6) /* ARMv6-M? */
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#define QXK_ARM_ERRATUM_838869() ((void)0)
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#else /* ARMv7-M or higher */
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/* The following macro implements the recommended workaround for the
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* ARM Erratum 838869. Specifically, for Cortex-M3/M4/M7 the DSB
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* (memory barrier) instruction needs to be added before exiting an ISR.
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*/
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#define QXK_ARM_ERRATUM_838869() \
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__asm volatile ("dsb" ::: "memory")
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#endif /* ARMv6-M */
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/* Use a given ARM Cortex-M IRQ to return to thread mode (default NMI)
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*
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* NOTE:
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* If you need the NMI for other purposes, you can define the macros
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* QXK_USE_IRQ_NUM and QXK_USE_IRQ_HANDLER to use thus specified IRQ
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* instead of the NMI (the IRQ should not be used for anything else).
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* These two macros can be defined on the command line to the compiler
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* and are actually needed only to compile the qxk_port.c file.
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*/
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//#define QXK_USE_IRQ_NUM 25
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//#define QXK_USE_IRQ_HANDLER CRYPTO_IRQHandler
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/* initialization of the QXK kernel */
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#define QXK_INIT() QXK_init()
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void QXK_init(void);
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void QXK_thread_ret(void);
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#if (__ARM_FP != 0) /* if VFP available... */
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/* When the FPU is configured, clear the FPCA bit in the CONTROL register
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* to prevent wasting the stack space for the FPU context.
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*/
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#define QXK_START() __asm volatile ("msr CONTROL,%0" :: "r" (0) : )
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#endif
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#include "qxk.h" /* QXK platform-independent public interface */
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#endif /* QXK_PORT_H */
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