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105 lines
3.6 KiB
C
105 lines
3.6 KiB
C
/**
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* @file
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* @brief QF/C port to ARM7-9, cooperative QV kernel, IAR-ARM toolset
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* @cond
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******************************************************************************
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* Last Updated for Version: 5.4.0
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* Date of the Last Update: 2015-04-08
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*
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* Q u a n t u m L e a P s
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* ---------------------------
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* innovating embedded systems
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*
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* Copyright (C) Quantum Leaps, LLC. state-machine.com.
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*
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* This program is open source software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published
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* by the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Alternatively, this program may be distributed and modified under the
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* terms of Quantum Leaps commercial licenses, which expressly supersede
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* the GNU General Public License and are specifically designed for
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* licensees interested in retaining the proprietary status of their code.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Contact information:
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* Web: www.state-machine.com
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* Email: info@state-machine.com
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******************************************************************************
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* @endcond
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*/
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#ifndef qf_port_h
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#define qf_port_h
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/* The maximum number of active objects in the application, see NOTE1 */
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#define QF_MAX_ACTIVE 32
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/* The maximum number of system clock tick rates */
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#define QF_MAX_TICK_RATE 2
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/* fast unconditional interrupt disabling/enabling for ARM state, NOTE2 */
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#define QF_INT_DISABLE() __asm("MSR cpsr_c,#(0x1F | 0x80)")
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#define QF_INT_ENABLE() __asm("MSR cpsr_c,#(0x1F)")
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/* QF critical section entry/exit... */
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#if (__CPU_MODE__ == 1) /* THUMB mode? */
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/* QF interrupt disabling/enabling policy */
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#define QF_CRIT_STAT_TYPE unsigned int
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#define QF_CRIT_ENTRY(stat_) ((stat_) = QF_int_disable_SYS())
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#define QF_CRIT_EXIT(stat_) QF_int_enable_SYS(stat_)
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QF_CRIT_STAT_TYPE QF_int_disable_SYS(void);
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void QF_int_enable_SYS(QF_CRIT_STAT_TYPE stat);
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#elif (__CPU_MODE__ == 2) /* ARM mode? */
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#define QF_CRIT_STAT_TYPE unsigned int
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#define QF_CRIT_ENTRY(stat_) do { \
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(stat_) = __get_CPSR(); \
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QF_INT_DISABLE(); \
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} while (0)
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#define QF_CRIT_EXIT(stat_) __set_CPSR(stat_)
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#include <intrinsics.h> /* for __get_CPSR()/__set_CPSR() */
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#else
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#error Incorrect __CPU_MODE__. Must be ARM or THUMB.
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#endif
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void QF_reset(void);
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void QF_undef(void);
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void QF_swi(void);
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void QF_pAbort(void);
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void QF_dAbort(void);
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void QF_reserved(void);
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#include "qep_port.h" /* QEP port */
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#include "qv_port.h" /* QV cooperative kernel port */
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#include "qf.h" /* QF platform-independent public interface */
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/*****************************************************************************
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* NOTE1:
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* The maximum number of active objects QF_MAX_ACTIVE can be increased
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* up to 63, if necessary. Here it is set to a lower level to save some RAM.
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*
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* NOTE2:
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* The disabling/enabling of interrutps is only defined for the ARM state.
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* The policy is to disable only the IRQ and NOT to disable the FIQ, which
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* means that FIQ is a "QF-unaware" from the kernel perspective. This means
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* that FIQ has "zero latency", but it also means that FIQ *cannot* call any
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* QP services. Specifically FIQ cannot post or publish events.
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*/
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#endif /* qf_port_h */
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