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208 lines
8.0 KiB
C
208 lines
8.0 KiB
C
/*****************************************************************************
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* Product: "Blinky" example, EK-TM4C123GXL board, FreeRTOS kernel
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* Last Updated for Version: 5.4.0
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* Date of the Last Update: 2015-04-16
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*
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* Q u a n t u m L e a P s
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* ---------------------------
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* innovating embedded systems
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*
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* Copyright (C) Quantum Leaps, LLC. www.state-machine.com.
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*
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* This program is open source software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published
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* by the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Alternatively, this program may be distributed and modified under the
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* terms of Quantum Leaps commercial licenses, which expressly supersede
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* the GNU General Public License and are specifically designed for
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* licensees interested in retaining the proprietary status of their code.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Contact information:
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* Web: http://www.state-machine.com
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* Email: info@state-machine.com
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*****************************************************************************/
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#include "qpc.h"
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#include "blinky.h"
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#include "bsp.h"
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#include "TM4C123GH6PM.h" /* the device specific header (TI) */
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#include "rom.h" /* the built-in ROM functions (TI) */
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#include "sysctl.h" /* system control driver (TI) */
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#include "gpio.h" /* GPIO driver (TI) */
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/* add other drivers if necessary... */
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Q_DEFINE_THIS_FILE /* define the name of this file for assertions */
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#ifdef Q_SPY
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#error Simple Blinky Application does not provide Spy build configuration
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#endif
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/*!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! CAUTION !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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* Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority().
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* DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
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*/
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enum KernelUnawareISRs { /* see NOTE1 */
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/* ... */
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MAX_KERNEL_UNAWARE_CMSIS_PRI /* keep always last */
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};
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/* "kernel-unaware" interrupts can't overlap "kernel-aware" interrupts */
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Q_ASSERT_COMPILE(MAX_KERNEL_UNAWARE_CMSIS_PRI
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<= configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
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enum KernelAwareISRs {
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SYSTICK_PRIO = configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY, /* NOTE1 */
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/* ... */
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MAX_KERNEL_AWARE_CMSIS_PRI /* keep always last */
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};
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/* "kernel-aware" interrupts should not overlap the PendSV priority */
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Q_ASSERT_COMPILE(MAX_KERNEL_AWARE_CMSIS_PRI <= (0xFF >>(8-__NVIC_PRIO_BITS)));
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/* LEDs and Switches of the EK-TM4C123GXL board ............................*/
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#define LED_RED (1U << 1)
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#define LED_GREEN (1U << 3)
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#define LED_BLUE (1U << 2)
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static uint32_t const l_led_pin[] = {
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LED_RED,
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LED_GREEN,
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LED_BLUE
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};
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#define BTN_SW1 (1U << 4)
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#define BTN_SW2 (1U << 0)
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/* Application hooks used in this project ==================================*/
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void vApplicationTickHook(void) {
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QF_CRIT_STAT_TYPE intStat;
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BaseType_t lHigherPriorityTaskWoken = pdFALSE;
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QF_ISR_ENTRY(intStat); /* <=== inform QF about ISR entry */
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QF_TICK_X(0U, (void *)0); /* process all armed time events */
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QF_ISR_EXIT(intStat, lHigherPriorityTaskWoken); /* <=== ISR exit */
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/* yield only when needed... */
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if (lHigherPriorityTaskWoken != pdFALSE) {
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vTaskMissedYield();
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}
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}
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/*..........................................................................*/
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void vApplicationIdleHook(void) {
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#ifdef NDEBUG
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/* Put the CPU and peripherals to the low-power mode.
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* you might need to customize the clock management for your application,
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* see the datasheet for your particular Cortex-M MCU.
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*/
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__WFI(); /* Wait-For-Interrupt */
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#endif
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}
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/*..........................................................................*/
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void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) {
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(void)xTask;
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(void)pcTaskName;
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Q_ERROR();
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}
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/* BSP functions ===========================================================*/
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void BSP_init(void) {
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/* NOTE: SystemInit() already called from the startup code
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* but SystemCoreClock needs to be updated
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*/
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SystemCoreClockUpdate();
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/* configure the FPU
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* Do NOT to use the automatic FPU state preservation and
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* do NOT to use the FPU lazy stacking.
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*/
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FPU->FPCCR &= ~((1U << FPU_FPCCR_ASPEN_Pos) | (1U << FPU_FPCCR_LSPEN_Pos));
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/* enable clock to the peripherals used by the application */
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SYSCTL->RCGC2 |= (1U << 5); /* enable clock to GPIOF */
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__NOP(); /* wait after enabling clocks */
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__NOP();
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__NOP();
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/* configure the LEDs and push buttons */
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GPIOF->DIR |= (LED_RED | LED_GREEN | LED_BLUE); /* set as output */
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GPIOF->DEN |= (LED_RED | LED_GREEN | LED_BLUE);/* digital enable */
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GPIOF->DATA_Bits[LED_RED] = 0U; /* turn the LED off */
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GPIOF->DATA_Bits[LED_GREEN] = 0U; /* turn the LED off */
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GPIOF->DATA_Bits[LED_BLUE] = 0U; /* turn the LED off */
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/* configure the User Switches */
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GPIOF->DIR &= ~(BTN_SW1 | BTN_SW2); /* set direction: input */
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ROM_GPIOPadConfigSet(GPIOF_BASE, (BTN_SW1 | BTN_SW2),
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GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
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}
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/*..........................................................................*/
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void BSP_ledOff(uint_fast8_t n) {
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GPIOF->DATA_Bits[l_led_pin[n]] = 0U;
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}
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/*..........................................................................*/
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void BSP_ledOn(uint_fast8_t n) {
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GPIOF->DATA_Bits[l_led_pin[n]] = 0xFFU;
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}
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/* QF callbacks ============================================================*/
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void QF_onStartup(void) {
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/* set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate */
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SysTick_Config(SystemCoreClock / BSP_TICKS_PER_SEC);
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/* assing all priority bits for preemption-prio. and none to sub-prio. */
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NVIC_SetPriorityGrouping(0U);
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/* set priorities of ALL ISRs used in the system, see NOTE00
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*
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* !!!!!!!!!!!!!!!!!!!!!!!!!!!! CAUTION !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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* Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority().
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* DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
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*/
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NVIC_SetPriority(SysTick_IRQn, SYSTICK_PRIO);
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/* ... */
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/* enable IRQs... */
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}
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/*..........................................................................*/
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void QF_onCleanup(void) {
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}
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/*..........................................................................*/
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/* NOTE Q_onAssert() defined in assembly in startup_TM4C123GH6PM.s */
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/*****************************************************************************
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* NOTE1:
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* The configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY constant comes from the
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* "qf_int_config.h" header file and specifies the highest ISR priority that
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* is disabled by the QF framework. The value is suitable for the
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* NVIC_SetPriority() CMSIS function.
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*
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* Only ISRs prioritized at or below the
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* configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY level (i.e.,
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* with the numerical values of priorities equal or higher than
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* configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY) are allowed to call any
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* QP/FreeRTOS services. These ISRs are "kernel-aware".
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*
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* Conversely, any ISRs prioritized above the
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* configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY priority level (i.e., with
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* the numerical values of priorities less than
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* configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY) are never disabled and are
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* not aware of the kernel. Such "kernel-unaware" ISRs cannot call any
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* QP/FreeRTOS services. The only mechanism by which a "kernel-unaware" ISR
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* can communicate with the QF framework is by triggering a "kernel-aware"
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* ISR, which can post/publish events.
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*
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* For more information, see article "Running the RTOS on a ARM Cortex-M Core"
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* http://www.freertos.org/RTOS-Cortex-M3-M4.html
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*/
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