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103 lines
3.8 KiB
C
103 lines
3.8 KiB
C
/**
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* @file
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* @brief QF/C port to Cortex-R, cooperative QV kernel, GNU-ARM toolset
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* @cond
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******************************************************************************
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* Last Updated for Version: 5.7.0
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* Date of the Last Update: 2016-08-31
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*
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* Q u a n t u m L e a P s
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* ---------------------------
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* innovating embedded systems
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*
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* Copyright (C) 2002-2016 Quantum Leaps, LLC. All rights reserved.
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*
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* This program is open source software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published
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* by the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Alternatively, this program may be distributed and modified under the
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* terms of Quantum Leaps commercial licenses, which expressly supersede
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* the GNU General Public License and are specifically designed for
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* licensees interested in retaining the proprietary status of their code.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <www.gnu.org/licenses/>.
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*
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* Contact information:
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* <www.state-machine.com/licensing>
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* <info@state-machine.com>
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******************************************************************************
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* @endcond
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*/
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#ifndef QF_PORT_H
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#define QF_PORT_H
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/* The maximum number of active objects in the application, see NOTE1 */
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#define QF_MAX_ACTIVE 32U
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/* The maximum number of system clock tick rates */
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#define QF_MAX_TICK_RATE 2U
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/* QF interrupt disable/enable, see NOTE2 */
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#ifdef __thumb__ /* THUMB mode? */
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#define QF_INT_DISABLE() __asm volatile ("cpsid i")
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#define QF_INT_ENABLE() __asm volatile ("cpsie i")
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#define QF_INT_ENABLE_ALL() __asm volatile ("cpsie if")
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#elif (defined __arm__) /* ARM mode? */
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#define QF_INT_DISABLE() \
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__asm volatile ("MSR cpsr_c,#(0x1F | 0x80)" ::: "cc")
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#define QF_INT_ENABLE() \
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__asm volatile ("MSR cpsr_c,#(0x1F)" ::: "cc")
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#define QF_INT_ENABLE_ALL() \
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__asm volatile ("MSR cpsr_c,#(0x1F | 0x80 | 0x40)" ::: "cc")
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#else
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#error Incorrect CPU mode. Must be either __arm__ or __thumb__.
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#endif
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/* Cortex-R provide the CLZ instruction for fast LOG2 */
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#define QF_LOG2(n_) ((uint8_t)(32U - __builtin_clz(n_)))
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/* QF critical section entry/exit, see NOTE3 */
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#define QF_CRIT_STAT_TYPE uint32_t
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#define QF_CRIT_ENTRY(stat_) do { \
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__asm volatile ("MRS %0,cpsr" : "=r" (stat_) :: "cc"); \
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QF_INT_DISABLE(); \
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} while (false)
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#define QF_CRIT_EXIT(stat_) \
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__asm volatile ("MSR cpsr_c,%0" :: "r" (stat_) : "cc")
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#define QF_CRIT_EXIT_NOP() __asm volatile ("ISB")
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#include "qep_port.h" /* QEP port */
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#include "qv_port.h" /* QV port */
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#include "qf.h" /* QF platform-independent public interface */
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/*****************************************************************************
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* NOTE1:
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* The maximum number of active objects QF_MAX_ACTIVE can be increased
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* up to 63, if necessary. Here it is set to a lower level to save some RAM.
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*
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* NOTE2:
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* The FIQ-type interrupts are NEVER disabled in this port, so the FIQ is
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* a "kernel-unaware" interrupt. If the FIQ is ever used in the application,
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* it must be an "ARM FIQ"-type function. For this to work, the FIQ
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* stack needs to be initialized.
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*
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* NOTE3:
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* This port implements the "save and restore" interrupt status policy,
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* which again never disables the FIQ-type interrupts. This policy allows
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* for nesting critical sections, which is necessary inside IRQ-type
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* interrupts that run with interrupts (IRQ) disabled.
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*/
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#endif /* QF_PORT_H */
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