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88 lines
2.9 KiB
C
88 lines
2.9 KiB
C
/**
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* @file
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* @brief QXK/C port to ARM Cortex-M, GNU-ARM compiler
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* @cond
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******************************************************************************
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* Last updated for version 6.9.2a
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* Last updated on 2021-01-31
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*
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* Q u a n t u m L e a P s
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* ------------------------
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* Modern Embedded Software
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*
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* Copyright (C) 2005-2021 Quantum Leaps, LLC. All rights reserved.
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*
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* This program is open source software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published
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* by the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Alternatively, this program may be distributed and modified under the
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* terms of Quantum Leaps commercial licenses, which expressly supersede
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* the GNU General Public License and are specifically designed for
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* licensees interested in retaining the proprietary status of their code.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <www.gnu.org/licenses/>.
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*
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* Contact information:
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* <www.state-machine.com/licensing>
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* <info@state-machine.com>
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******************************************************************************
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* @endcond
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*/
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#ifndef QXK_PORT_H
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#define QXK_PORT_H
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/* determination if the code executes in the ISR context */
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#define QXK_ISR_CONTEXT_() (QXK_get_IPSR() != 0U)
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__attribute__((always_inline))
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static inline uint32_t QXK_get_IPSR(void) {
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uint32_t regIPSR;
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__asm volatile ("mrs %0,ipsr" : "=r" (regIPSR));
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return regIPSR;
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}
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/* trigger the PendSV exception to pefrom the context switch */
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#define QXK_CONTEXT_SWITCH_() \
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*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (1U << 28U)
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/* QXK ISR entry and exit */
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#define QXK_ISR_ENTRY() ((void)0)
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#define QXK_ISR_EXIT() do { \
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QF_INT_DISABLE(); \
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if (QXK_sched_() != 0U) { \
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QXK_CONTEXT_SWITCH_(); \
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} \
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QF_INT_ENABLE(); \
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QXK_ARM_ERRATUM_838869(); \
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} while (false)
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#if (__ARM_ARCH == 6) /* Cortex-M0/M0+/M1 (v6-M, v6S-M)? */
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#define QXK_ARM_ERRATUM_838869() ((void)0)
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#else /* Cortex-M3/M4/M7 (v7-M) */
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/* The following macro implements the recommended workaround for the
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* ARM Erratum 838869. Specifically, for Cortex-M3/M4/M7 the DSB
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* (memory barrier) instruction needs to be added before exiting an ISR.
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*/
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#define QXK_ARM_ERRATUM_838869() \
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__asm volatile ("dsb" ::: "memory")
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#endif
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/* initialization of the QXK kernel */
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#define QXK_INIT() QXK_init()
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void QXK_init(void);
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void QXK_thread_ret(void);
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#include "qxk.h" /* QXK platform-independent public interface */
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#endif /* QXK_PORT_H */
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