mirror of
https://github.com/QuantumLeaps/qpcpp.git
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435 lines
23 KiB
C
435 lines
23 KiB
C
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/* File: startup_TM4C123GH6PM.c
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* Purpose: startup file for TM4C123GH6PM Cortex-M4 device.
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* Should be used with TI CCS-ARM Compiler
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* Version: CMSIS 4.3.0
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* Date: 2015-Nov-10
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*
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* Created from the CMSIS template for the specified device
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* Quantum Leaps, www.state-machine.com
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*
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* NOTE:
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* The function assert_failed defined at the end of this file defines
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* the error/assertion handling policy for the application and might
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* need to be customized for each project. This function is defined in
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* assembly to re-set the stack pointer, in case it is corrupted by the
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* time assert_failed is called.
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*/
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//****************************************************************************
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//
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// Startup code for use with TI's Code Composer Studio.
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//
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// Copyright (c) 2011-2014 Texas Instruments Inc. All rights reserved.
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// Software License Agreement
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//
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// Software License Agreement
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//
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// Texas Instruments (TI) is supplying this software for use solely and
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// exclusively on TI's microcontroller products. The software is owned by
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// TI and/or its suppliers, and is protected under applicable copyright
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// laws. You may not combine this software with "viral" open-source
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// software in order to form a larger program.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
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// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
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// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
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// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
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// DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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//****************************************************************************
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/* top of stack defined in the linker script -------------------------------*/
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extern int __STACK_TOP;
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/* Function prototypes -----------------------------------------------------*/
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void Reset_Handler (void); /* Reset Handler */
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void Default_Handler(void); /* Default empty handler */
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/*--------------------------------------------------------------------------*/
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/* Cortex-M Processor fault exceptions... */
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void NMI_Handler (void);
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void HardFault_Handler (void);
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void MemManage_Handler (void);
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void BusFault_Handler (void);
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void UsageFault_Handler (void);
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/* Cortex-M Processor non-fault exceptions... */
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void SVC_Handler (void);
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void DebugMon_Handler (void);
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void PendSV_Handler (void);
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void SysTick_Handler (void);
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/* external interrupts... */
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void GPIOPortA_IRQHandler (void);
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void GPIOPortB_IRQHandler (void);
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void GPIOPortC_IRQHandler (void);
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void GPIOPortD_IRQHandler (void);
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void GPIOPortE_IRQHandler (void);
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void UART0_IRQHandler (void);
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void UART1_IRQHandler (void);
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void SSI0_IRQHandler (void);
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void I2C0_IRQHandler (void);
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void PWMFault_IRQHandler (void);
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void PWMGen0_IRQHandler (void);
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void PWMGen1_IRQHandler (void);
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void PWMGen2_IRQHandler (void);
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void QEI0_IRQHandler (void);
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void ADCSeq0_IRQHandler (void);
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void ADCSeq1_IRQHandler (void);
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void ADCSeq2_IRQHandler (void);
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void ADCSeq3_IRQHandler (void);
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void Watchdog_IRQHandler (void);
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void Timer0A_IRQHandler (void);
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void Timer0B_IRQHandler (void);
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void Timer1A_IRQHandler (void);
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void Timer1B_IRQHandler (void);
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void Timer2A_IRQHandler (void);
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void Timer2B_IRQHandler (void);
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void Comp0_IRQHandler (void);
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void Comp1_IRQHandler (void);
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void Comp2_IRQHandler (void);
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void SysCtrl_IRQHandler (void);
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void FlashCtrl_IRQHandler (void);
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void GPIOPortF_IRQHandler (void);
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void GPIOPortG_IRQHandler (void);
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void GPIOPortH_IRQHandler (void);
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void UART2_IRQHandler (void);
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void SSI1_IRQHandler (void);
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void Timer3A_IRQHandler (void);
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void Timer3B_IRQHandler (void);
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void I2C1_IRQHandler (void);
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void QEI1_IRQHandler (void);
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void CAN0_IRQHandler (void);
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void CAN1_IRQHandler (void);
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void CAN2_IRQHandler (void);
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void Hibernate_IRQHandler (void);
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void USB0_IRQHandler (void);
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void PWMGen3_IRQHandler (void);
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void uDMAST_IRQHandler (void);
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void uDMAError_IRQHandler (void);
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void ADC1Seq0_IRQHandler (void);
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void ADC1Seq1_IRQHandler (void);
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void ADC1Seq2_IRQHandler (void);
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void ADC1Seq3_IRQHandler (void);
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void GPIOPortJ_IRQHandler (void);
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void GPIOPortK_IRQHandler (void);
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void GPIOPortL_IRQHandler (void);
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void SSI2_IRQHandler (void);
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void SSI3_IRQHandler (void);
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void UART3_IRQHandler (void);
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void UART4_IRQHandler (void);
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void UART5_IRQHandler (void);
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void UART6_IRQHandler (void);
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void UART7_IRQHandler (void);
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void I2C2_IRQHandler (void);
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void I2C3_IRQHandler (void);
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void Timer4A_IRQHandler (void);
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void Timer4B_IRQHandler (void);
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void Timer5A_IRQHandler (void);
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void Timer5B_IRQHandler (void);
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void WideTimer0A_IRQHandler(void);
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void WideTimer0B_IRQHandler(void);
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void WideTimer1A_IRQHandler(void);
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void WideTimer1B_IRQHandler(void);
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void WideTimer2A_IRQHandler(void);
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void WideTimer2B_IRQHandler(void);
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void WideTimer3A_IRQHandler(void);
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void WideTimer3B_IRQHandler(void);
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void WideTimer4A_IRQHandler(void);
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void WideTimer4B_IRQHandler(void);
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void WideTimer5A_IRQHandler(void);
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void WideTimer5B_IRQHandler(void);
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void FPU_IRQHandler (void);
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void I2C4_IRQHandler (void);
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void I2C5_IRQHandler (void);
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void GPIOPortM_IRQHandler (void);
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void GPIOPortN_IRQHandler (void);
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void QEI2_IRQHandler (void);
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void GPIOPortP0_IRQHandler (void);
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void GPIOPortP1_IRQHandler (void);
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void GPIOPortP2_IRQHandler (void);
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void GPIOPortP3_IRQHandler (void);
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void GPIOPortP4_IRQHandler (void);
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void GPIOPortP5_IRQHandler (void);
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void GPIOPortP6_IRQHandler (void);
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void GPIOPortP7_IRQHandler (void);
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void GPIOPortQ0_IRQHandler (void);
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void GPIOPortQ1_IRQHandler (void);
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void GPIOPortQ2_IRQHandler (void);
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void GPIOPortQ3_IRQHandler (void);
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void GPIOPortQ4_IRQHandler (void);
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void GPIOPortQ5_IRQHandler (void);
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void GPIOPortQ6_IRQHandler (void);
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void GPIOPortQ7_IRQHandler (void);
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void GPIOPortR_IRQHandler (void);
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void GPIOPortS_IRQHandler (void);
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void PWM1Gen0_IRQHandler (void);
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void PWM1Gen1_IRQHandler (void);
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void PWM1Gen2_IRQHandler (void);
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void PWM1Gen3_IRQHandler (void);
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void PWM1Fault_IRQHandler (void);
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//*****************************************************************************
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//
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// The vector table. Note that the proper constructs must be placed on this to
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// ensure that it ends up at physical address 0x0000.0000 or at the start of
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// the program if located at a start address other than 0.
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//
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// !!!!!! NOTE !!!!!!
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// You must MANUALLY remove the (int)&Default_Handler from the interrupts
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// that you actually wish to handle in your application!
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//*****************************************************************************
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#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
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int const g_pfnVectors[] = {
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(int)&__STACK_TOP, /* The initial stack pointer */
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(int)&Reset_Handler, /* Reset Handler */
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(int)&NMI_Handler, /* NMI Handler */
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(int)&HardFault_Handler, /* Hard Fault Handler */
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(int)&MemManage_Handler, /* The MPU fault handler */
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(int)&BusFault_Handler, /* The bus fault handler */
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(int)&UsageFault_Handler, /* The usage fault handler */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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(int)&Default_Handler, //(int)&SVC_Handler, /* SVCall handler */
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(int)&DebugMon_Handler, /* Debug monitor handler */
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0, /* Reserved */
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(int)&PendSV_Handler, /* The PendSV handler */
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(int)&SysTick_Handler, /* The SysTick handler */
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/* IRQ handlers... */
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(int)&Default_Handler, //(int)&GPIOPortA_IRQHandler, /* GPIO Port A */
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(int)&Default_Handler, //(int)&GPIOPortB_IRQHandler, /* GPIO Port B */
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(int)&Default_Handler, //(int)&GPIOPortC_IRQHandler, /* GPIO Port C */
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(int)&Default_Handler, //(int)&GPIOPortD_IRQHandler, /* GPIO Port D */
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(int)&Default_Handler, //(int)&GPIOPortE_IRQHandler, /* GPIO Port E */
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(int)&UART0_IRQHandler, /* UART0 Rx and Tx */
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(int)&Default_Handler, //(int)&UART1_IRQHandler, /* UART1 Rx and Tx */
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(int)&Default_Handler, //(int)&SSI0_IRQHandler, /* SSI0 Rx and Tx */
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(int)&Default_Handler, //(int)&I2C0_IRQHandler, /* I2C0 Master and Slave */
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(int)&Default_Handler, //(int)&PWMFault_IRQHandler, /* PWM Fault */
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(int)&Default_Handler, //(int)&PWMGen0_IRQHandler, /* PWM Generator 0 */
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(int)&Default_Handler, //(int)&PWMGen1_IRQHandler, /* PWM Generator 1 */
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(int)&Default_Handler, //(int)&PWMGen2_IRQHandler, /* PWM Generator 2 */
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(int)&Default_Handler, //(int)&QEI0_IRQHandler, /* Quadrature Encoder 0 */
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(int)&Default_Handler, //(int)&ADCSeq0_IRQHandler, /* ADC Sequence 0 */
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(int)&Default_Handler, //(int)&ADCSeq1_IRQHandler, /* ADC Sequence 1 */
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(int)&Default_Handler, //(int)&ADCSeq2_IRQHandler, /* ADC Sequence 2 */
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(int)&Default_Handler, //(int)&ADCSeq3_IRQHandler, /* ADC Sequence 3 */
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(int)&Default_Handler, //(int)&Watchdog_IRQHandler, /* Watchdog timer */
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(int)&Default_Handler, //(int)&Timer0A_IRQHandler, /* Timer 0 subtimer A */
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(int)&Default_Handler, //(int)&Timer0B_IRQHandler, /* Timer 0 subtimer B */
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(int)&Default_Handler, //(int)&Timer1A_IRQHandler, /* Timer 1 subtimer A */
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(int)&Default_Handler, //(int)&Timer1B_IRQHandler, /* Timer 1 subtimer B */
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(int)&Default_Handler, //(int)&Timer2A_IRQHandler, /* Timer 2 subtimer A */
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(int)&Default_Handler, //(int)&Timer2B_IRQHandler, /* Timer 2 subtimer B */
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(int)&Default_Handler, //(int)&Comp0_IRQHandler, /* Analog Comparator 0 */
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(int)&Default_Handler, //(int)&Comp1_IRQHandler, /* Analog Comparator 1 */
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(int)&Default_Handler, //(int)&Comp2_IRQHandler, /* Analog Comparator 2 */
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(int)&Default_Handler, //(int)&SysCtrl_IRQHandler, /* System Control (PLL, OSC, BO) */
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(int)&Default_Handler, //(int)&FlashCtrl_IRQHandler, /* FLASH Control */
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(int)&Default_Handler, //(int)&GPIOPortF_IRQHandler, /* GPIO Port F */
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(int)&Default_Handler, //(int)&GPIOPortG_IRQHandler, /* GPIO Port G */
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(int)&Default_Handler, //(int)&GPIOPortH_IRQHandler, /* GPIO Port H */
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(int)&Default_Handler, //(int)&UART2_IRQHandler, /* UART2 Rx and Tx */
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(int)&Default_Handler, //(int)&SSI1_IRQHandler, /* SSI1 Rx and Tx */
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(int)&Default_Handler, //(int)&Timer3A_IRQHandler, /* Timer 3 subtimer A */
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(int)&Default_Handler, //(int)&Timer3B_IRQHandler, /* Timer 3 subtimer B */
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(int)&Default_Handler, //(int)&I2C1_IRQHandler, /* I2C1 Master and Slave */
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(int)&Default_Handler, //(int)&QEI1_IRQHandler, /* Quadrature Encoder 1 */
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(int)&Default_Handler, //(int)&CAN0_IRQHandler, /* CAN0 */
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(int)&Default_Handler, //(int)&CAN1_IRQHandler, /* CAN1 */
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(int)&Default_Handler, //(int)&CAN2_IRQHandler, /* CAN2 */
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(int)&Default_Handler, //0, /* Reserved */
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(int)&Default_Handler, //(int)&Hibernate_IRQHandler, /* Hibernate */
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(int)&Default_Handler, //(int)&USB0_IRQHandler, /* USB0 */
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(int)&Default_Handler, //(int)&PWMGen3_IRQHandler, /* PWM Generator 3 */
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(int)&Default_Handler, //(int)&uDMAST_IRQHandler, /* uDMA Software Transfer */
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(int)&Default_Handler, //(int)&uDMAError_IRQHandler, /* uDMA Error */
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(int)&Default_Handler, //(int)&ADC1Seq0_IRQHandler, /* ADC1 Sequence 0 */
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(int)&Default_Handler, //(int)&ADC1Seq1_IRQHandler, /* ADC1 Sequence 1 */
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(int)&Default_Handler, //(int)&ADC1Seq2_IRQHandler, /* ADC1 Sequence 2 */
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(int)&Default_Handler, //(int)&ADC1Seq3_IRQHandler, /* ADC1 Sequence 3 */
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0, /* Reserved */
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0, /* Reserved */
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(int)&Default_Handler, //(int)&GPIOPortJ_IRQHandler, /* GPIO Port J */
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(int)&Default_Handler, //(int)&GPIOPortK_IRQHandler, /* GPIO Port K */
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(int)&Default_Handler, //(int)&GPIOPortL_IRQHandler, /* GPIO Port L */
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(int)&Default_Handler, //(int)&SSI2_IRQHandler, /* SSI2 Rx and Tx */
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(int)&Default_Handler, //(int)&SSI3_IRQHandler, /* SSI3 Rx and Tx */
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(int)&Default_Handler, //(int)&UART3_IRQHandler, /* UART3 Rx and Tx */
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(int)&Default_Handler, //(int)&UART4_IRQHandler, /* UART4 Rx and Tx */
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(int)&Default_Handler, //(int)&UART5_IRQHandler, /* UART5 Rx and Tx */
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(int)&Default_Handler, //(int)&UART6_IRQHandler, /* UART6 Rx and Tx */
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(int)&Default_Handler, //(int)&UART7_IRQHandler, /* UART7 Rx and Tx */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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(int)&Default_Handler, //(int)&I2C2_IRQHandler, /* I2C2 Master and Slave */
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(int)&Default_Handler, //(int)&I2C3_IRQHandler, /* I2C3 Master and Slave */
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(int)&Default_Handler, //(int)&Timer4A_IRQHandler, /* Timer 4 subtimer A */
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(int)&Default_Handler, //(int)&Timer4B_IRQHandler, /* Timer 4 subtimer B */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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(int)&Default_Handler, //(int)&Timer5A_IRQHandler, /* Timer 5 subtimer A */
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(int)&Default_Handler, //(int)&Timer5B_IRQHandler, /* Timer 5 subtimer B */
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(int)&Default_Handler, //(int)&WideTimer0A_IRQHandler, /* Wide Timer 0 subtimer A */
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(int)&Default_Handler, //(int)&WideTimer0B_IRQHandler, /* Wide Timer 0 subtimer B */
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(int)&Default_Handler, //(int)&WideTimer1A_IRQHandler, /* Wide Timer 1 subtimer A */
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(int)&Default_Handler, //(int)&WideTimer1B_IRQHandler, /* Wide Timer 1 subtimer B */
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(int)&Default_Handler, //(int)&WideTimer2A_IRQHandler, /* Wide Timer 2 subtimer A */
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(int)&Default_Handler, //(int)&WideTimer2B_IRQHandler, /* Wide Timer 2 subtimer B */
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(int)&Default_Handler, //(int)&WideTimer3A_IRQHandler, /* Wide Timer 3 subtimer A */
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(int)&Default_Handler, //(int)&WideTimer3B_IRQHandler, /* Wide Timer 3 subtimer B */
|
||
|
|
(int)&Default_Handler, //(int)&WideTimer4A_IRQHandler, /* Wide Timer 4 subtimer A */
|
||
|
|
(int)&Default_Handler, //(int)&WideTimer4B_IRQHandler, /* Wide Timer 4 subtimer B */
|
||
|
|
(int)&Default_Handler, //(int)&WideTimer5A_IRQHandler, /* Wide Timer 5 subtimer A */
|
||
|
|
(int)&Default_Handler, //(int)&WideTimer5B_IRQHandler, /* Wide Timer 5 subtimer B */
|
||
|
|
(int)&Default_Handler, //(int)&FPU_IRQHandler, /* FPU */
|
||
|
|
0, /* Reserved */
|
||
|
|
0, /* Reserved */
|
||
|
|
(int)&Default_Handler, //(int)&I2C4_IRQHandler, /* I2C4 Master and Slave */
|
||
|
|
(int)&Default_Handler, //(int)&I2C5_IRQHandler, /* I2C5 Master and Slave */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortM_IRQHandler, /* GPIO Port M */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortN_IRQHandler, /* GPIO Port N */
|
||
|
|
(int)&Default_Handler, //(int)&QEI2_IRQHandler, /* Quadrature Encoder 2 */
|
||
|
|
0, /* Reserved */
|
||
|
|
0, /* Reserved */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP0_IRQHandler, /* GPIO Port P (Summary or P0) */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP1_IRQHandler, /* GPIO Port P1 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP2_IRQHandler, /* GPIO Port P2 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP3_IRQHandler, /* GPIO Port P3 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP4_IRQHandler, /* GPIO Port P4 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP5_IRQHandler, /* GPIO Port P5 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP6_IRQHandler, /* GPIO Port P6 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortP7_IRQHandler, /* GPIO Port P7 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ0_IRQHandler, /* GPIO Port Q (Summary or Q0) */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ1_IRQHandler, /* GPIO Port Q1 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ2_IRQHandler, /* GPIO Port Q2 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ3_IRQHandler, /* GPIO Port Q3 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ4_IRQHandler, /* GPIO Port Q4 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ5_IRQHandler, /* GPIO Port Q5 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ6_IRQHandler, /* GPIO Port Q6 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortQ7_IRQHandler, /* GPIO Port Q7 */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortR_IRQHandler, /* GPIO Port R */
|
||
|
|
(int)&Default_Handler, //(int)&GPIOPortS_IRQHandler, /* GPIO Port S */
|
||
|
|
(int)&Default_Handler, //(int)&PWM1Gen0_IRQHandler, /* PWM 1 Generator 0 */
|
||
|
|
(int)&Default_Handler, //(int)&PWM1Gen1_IRQHandler, /* PWM 1 Generator 1 */
|
||
|
|
(int)&Default_Handler, //(int)&PWM1Gen2_IRQHandler, /* PWM 1 Generator 2 */
|
||
|
|
(int)&Default_Handler, //(int)&PWM1Gen3_IRQHandler, /* PWM 1 Generator 3 */
|
||
|
|
(int)&Default_Handler, //(int)&PWM1Fault_IRQHandler, /* PWM 1 Fault */
|
||
|
|
};
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// This is the code that gets called when the processor first starts execution
|
||
|
|
// following a reset event. Only the absolutely necessary set is performed,
|
||
|
|
// after which the application supplied entry() routine is called. Any fancy
|
||
|
|
// actions (such as making decisions based on the reset cause register, and
|
||
|
|
// resetting the bits in that register) are left solely in the hands of the
|
||
|
|
// application.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void Reset_Handler(void) {
|
||
|
|
// First, call the CMSIS SystemInit() to set up the CPU clock.
|
||
|
|
// Next, jump to the CCS C initialization routine. This will enable the
|
||
|
|
// floating-point unit as well, so that does not need to be done here.
|
||
|
|
//
|
||
|
|
__asm volatile(
|
||
|
|
" .global _c_int00\n\r"
|
||
|
|
" .global SystemInit\n\r"
|
||
|
|
" bl.w SystemInit\n\r"
|
||
|
|
" b.w _c_int00\n\r");
|
||
|
|
}
|
||
|
|
|
||
|
|
/* fault exception handlers ------------------------------------------------*/
|
||
|
|
void Default_Handler(void) {
|
||
|
|
__asm volatile (
|
||
|
|
" .global assert_failed\n\r"
|
||
|
|
" mov r0,#0\n\r"
|
||
|
|
" mov r1,#0\n\r"
|
||
|
|
" b.w assert_failed\n\r"
|
||
|
|
);
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void NMI_Handler(void) {
|
||
|
|
__asm(
|
||
|
|
" .global assert_failed\n\r"
|
||
|
|
" mov r0,#0\n\r"
|
||
|
|
" mov r1,#1\n\r"
|
||
|
|
" b.w assert_failed\n\r"
|
||
|
|
);
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void MemManage_Handler(void) {
|
||
|
|
__asm(
|
||
|
|
" .global assert_failed\n\r"
|
||
|
|
" mov r0,#0\n\r"
|
||
|
|
" mov r1,#2\n\r"
|
||
|
|
" b.w assert_failed\n\r"
|
||
|
|
);
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void HardFault_Handler(void) {
|
||
|
|
__asm volatile (
|
||
|
|
" .global assert_failed\n\r"
|
||
|
|
" mov r0,#0\n\r"
|
||
|
|
" mov r1,#3\n\r"
|
||
|
|
" b.w assert_failed\n\r"
|
||
|
|
);
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void BusFault_Handler(void) {
|
||
|
|
__asm volatile (
|
||
|
|
" .global assert_failed\n\r"
|
||
|
|
" mov r0,#0\n\r"
|
||
|
|
" mov r1,#4\n\r"
|
||
|
|
" b.w assert_failed\n\r"
|
||
|
|
);
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void UsageFault_Handler(void) {
|
||
|
|
__asm volatile (
|
||
|
|
" .global assert_failed\n\r"
|
||
|
|
" mov r0,#0\n\r"
|
||
|
|
" mov r1,#5\n\r"
|
||
|
|
" b.w assert_failed\n\r"
|
||
|
|
);
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void DebugMon_Handler(void) {
|
||
|
|
__asm volatile (
|
||
|
|
" .global assert_failed\n\r"
|
||
|
|
" mov r0,#0\n\r"
|
||
|
|
" mov r1,#6\n\r"
|
||
|
|
" b.w assert_failed\n\r"
|
||
|
|
);
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void _init(void) { /* dummy */
|
||
|
|
}
|
||
|
|
/*..........................................................................*/
|
||
|
|
void _fini(void) { /* dummy */
|
||
|
|
}
|