2015-05-14 16:05:04 -04:00
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///***************************************************************************
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// Product: "Fly 'n' Shoot" game example on EK-LM3S811, cooperative QV kernel
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2015-09-29 11:34:38 -04:00
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// Last updated for version 5.5.0
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// Last updated on 2015-09-23
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2015-05-14 16:05:04 -04:00
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//
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// Q u a n t u m L e a P s
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// ---------------------------
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// innovating embedded systems
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//
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// Copyright (C) Quantum Leaps, LLC. All rights reserved.
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//
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// This program is open source software: you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Alternatively, this program may be distributed and modified under the
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// terms of Quantum Leaps commercial licenses, which expressly supersede
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// the GNU General Public License and are specifically designed for
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// licensees interested in retaining the proprietary status of their code.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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// Contact information:
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2015-09-29 11:34:38 -04:00
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// http://www.state-machine.com
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// mailto:info@state-machine.com
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2015-05-14 16:05:04 -04:00
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//****************************************************************************
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#include "qpcpp.h"
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#include "game.h"
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#include "bsp.h"
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#include "LM3S811.h" // the device specific header (TI)
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#include "display96x16x1.h" // the OLED display driver (TI)
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// add other drivers if necessary...
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// namespace GAME ************************************************************
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namespace GAME {
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Q_DEFINE_THIS_FILE
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// !!!!!!!!!!!!!!!!!!!!!!!!!!!!! CAUTION !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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// Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority().
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// DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
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//
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enum KernelUnawareISRs { // see NOTE00
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// ...
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MAX_KERNEL_UNAWARE_CMSIS_PRI // keep always last
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};
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// "kernel-unaware" interrupts can't overlap "kernel-aware" interrupts
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Q_ASSERT_COMPILE(MAX_KERNEL_UNAWARE_CMSIS_PRI <= QF_AWARE_ISR_CMSIS_PRI);
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enum KernelAwareISRs {
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ADCSEQ3_PRIO = QF_AWARE_ISR_CMSIS_PRI, // see NOTE00
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GPIOPORTA_PRIO,
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SYSTICK_PRIO,
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// ...
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MAX_KERNEL_AWARE_CMSIS_PRI // keep always last
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};
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// "kernel-aware" interrupts should not overlap the PendSV priority
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Q_ASSERT_COMPILE(MAX_KERNEL_AWARE_CMSIS_PRI <= (0xFF >>(8-__NVIC_PRIO_BITS)));
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// Local-scope objects -------------------------------------------------------
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// LEDs available on the board
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#define USER_LED (1U << 5)
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// Push-Button wired externally to DIP8 (P0.6)
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#define USER_BTN (1U << 4)
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// other useful registers...
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#define ADC_TRIGGER_TIMER 0x00000005U
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#define ADC_CTL_IE 0x00000040U
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#define ADC_CTL_END 0x00000020U
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#define ADC_CTL_CH0 0x00000000U
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#define ADC_SSFSTAT0_EMPTY 0x00000100U
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#define UART_FR_TXFE 0x00000080U
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#ifdef Q_SPY
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QP::QSTimeCtr QS_tickTime_;
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QP::QSTimeCtr QS_tickPeriod_;
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// event-source identifiers used for tracing
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static uint8_t const l_SysTick_Handler = 0U;
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static uint8_t const l_ADCSeq3_IRQHandler = 0U;
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static uint8_t const l_GPIOPortA_IRQHandler = 0U;
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#define UART_BAUD_RATE 115200U
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#define UART_TXFIFO_DEPTH 16U
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#endif
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// ISRs used in this project =================================================
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extern "C" {
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//............................................................................
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void SysTick_Handler(void); // prototype
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void SysTick_Handler(void) {
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#ifdef Q_SPY
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{
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uint32_t volatile tmp = SysTick->CTRL; // clear SysTick_CTRL_COUNTFLAG
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(void)tmp; // unused local variable
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QS_tickTime_ += QS_tickPeriod_; // account for the clock rollover
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}
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#endif
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static QP::QEvt const tickEvt = { TIME_TICK_SIG, 0U, 0U };
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QP::QF::TICK_X(0U, &l_SysTick_Handler); // process time events for rate 0
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QP::QF::PUBLISH(&tickEvt, &l_SysTick_Handler); // publish to subscribers
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}
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//............................................................................
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void ADCSeq3_IRQHandler(void); // prototype
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void ADCSeq3_IRQHandler(void) {
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static uint32_t adcLPS = 0U; // Low-Pass-Filtered ADC reading
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static uint32_t wheel = 0U; // the last wheel position
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uint32_t tmp;
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ADC->ISC = (1U << 3); // clear the ADCSeq3 interrupt
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// the ADC Sequence 3 FIFO must have a sample
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Q_ASSERT((ADC->SSFSTAT3 & ADC_SSFSTAT0_EMPTY) == 0U);
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// 1st order low-pass filter: time constant ~= 2^n samples
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// TF = (1/2^n)/(z-((2^n - 1)/2^n)),
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// eg, n=3, y(k+1) = y(k) - y(k)/8 + x(k)/8 => y += (x - y)/8
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//
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tmp = ADC->SSFIFO3; // read the data from the ADC
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adcLPS += (((int)tmp - (int)adcLPS + 4) >> 3);
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// compute the next position of the wheel
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tmp = (((1U << 10) - adcLPS)*(BSP_SCREEN_HEIGHT - 2U)) >> 10;
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if (tmp != wheel) { // did the wheel position change?
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ObjectPosEvt *ope = Q_NEW(ObjectPosEvt, PLAYER_SHIP_MOVE_SIG);
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ope->x = (uint8_t)GAME_SHIP_X; // x-position is fixed
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ope->y = (uint8_t)tmp;
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AO_Ship->POST(ope, &l_ADCSeq3_IRQHandler);
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wheel = tmp; // save the last position of the wheel
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}
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// Perform the debouncing of buttons. The algorithm for debouncing
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// adapted from the book "Embedded Systems Dictionary" by Jack Ganssle
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// and Michael Barr, page 71.
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//
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static struct ButtonsDebouncing {
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uint32_t depressed;
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uint32_t previous;
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} buttons = { ~0U, ~0U };
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uint32_t current;
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current = ~GPIOC->DATA; // read the port with the User Button
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tmp = buttons.depressed; // save the debounced depressed buttons
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buttons.depressed |= (buttons.previous & current); // set depressed
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buttons.depressed &= (buttons.previous | current); // clear released
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buttons.previous = current; // update the history
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tmp ^= buttons.depressed; // changed debounced depressed
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if ((tmp & USER_BTN) != 0U) { // debounced USER_BTN state changed?
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if ((buttons.depressed & USER_BTN) != 0U) { // is USER_BTN depressed?
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static QP::QEvt const fireEvt = { PLAYER_TRIGGER_SIG, 0U, 0U};
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QP::QF::PUBLISH(&fireEvt, &l_ADCSeq3_IRQHandler);
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}
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else { // the button is released
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}
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}
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}
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//............................................................................
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void GPIOPortA_IRQHandler(void); // prototype
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void GPIOPortA_IRQHandler(void) {
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AO_Tunnel->POST(Q_NEW(QP::QEvt, MAX_PUB_SIG), // for testing...
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&l_GPIOPortA_IRQHandler);
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}
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} // extern "C"
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// BSP functions =============================================================
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void BSP_init(void) {
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// NOTE: SystemInit() already called from the startup code
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// but SystemCoreClock needs to be updated
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//
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SystemCoreClockUpdate();
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// enable clock to the peripherals used by the application
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SYSCTL->RCGC0 |= (1U << 16); // enable clock to ADC
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SYSCTL->RCGC1 |= (1U << 16) | (1U << 17); // enable clock to TIMER0 & 1
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SYSCTL->RCGC2 |= (1U << 0) | (1U << 2); // enable clock to GPIOA & C
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__NOP(); // wait after enabling clocks
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__NOP();
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__NOP();
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// Configure the ADC Sequence 3 to sample the potentiometer when the
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// timer expires. Set the sequence priority to 0 (highest).
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//
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ADC->EMUX = (ADC->EMUX & ~(0xFU << (3*4)))
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| (ADC_TRIGGER_TIMER << (3*4));
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ADC->SSPRI = (ADC->SSPRI & ~(0xFU << (3*4)))
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| (0U << (3*4));
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// set ADC Sequence 3 step to 0
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ADC->SSMUX3 = (ADC->SSMUX3 & ~(0xFU << (0*4)))
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| ((ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END) << (0*4));
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ADC->SSCTL3 = (ADC->SSCTL3 & ~(0xFU << (0*4)))
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| (((ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END) >> 4) <<(0*4));
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ADC->ACTSS |= (1U << 3);
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// configure TIMER1 to trigger the ADC to sample the potentiometer
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TIMER1->CTL &= ~((1U << 0) | (1U << 16));
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TIMER1->CFG = 0x00U;
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TIMER1->TAMR = 0x02U;
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TIMER1->TAILR = SystemCoreClock / 120U;
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TIMER1->CTL |= 0x02U;
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TIMER1->CTL |= 0x20U;
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// configure the User LED...
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GPIOC->DIR |= USER_LED; // set direction: output
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GPIOC->DEN |= USER_LED; // digital enable
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GPIOC->DATA_Bits[USER_LED] = 0U; // turn the User LED off
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// configure the User Button...
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GPIOC->DIR &= ~USER_BTN; // set direction: input
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GPIOC->DEN |= USER_BTN; // digital enable
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Display96x16x1Init(1); // initialize the OLED display
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if (QS_INIT((void *)0) == 0U) { // initialize the QS software tracing
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Q_ERROR();
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}
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QS_OBJ_DICTIONARY(&l_SysTick_Handler);
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QS_OBJ_DICTIONARY(&l_ADCSeq3_IRQHandler);
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QS_OBJ_DICTIONARY(&l_GPIOPortA_IRQHandler);
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}
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//............................................................................
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void BSP_drawBitmap(uint8_t const *bitmap) {
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Display96x16x1ImageDraw(bitmap, 0, 0,
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BSP_SCREEN_WIDTH, (BSP_SCREEN_HEIGHT >> 3));
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}
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//............................................................................
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void BSP_drawBitmapXY(uint8_t const *bitmap, uint8_t x, uint8_t y) {
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Display96x16x1ImageDraw(bitmap, x, y,
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BSP_SCREEN_WIDTH, (BSP_SCREEN_HEIGHT >> 3));
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}
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//............................................................................
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void BSP_drawNString(uint8_t x, uint8_t y, char const *str) {
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Display96x16x1StringDraw(str, x, y);
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}
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//............................................................................
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void BSP_updateScore(uint16_t score) {
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// no room on the OLED display of the EV-LM3S811 board for the score
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}
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//............................................................................
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void BSP_displayOn(void) {
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Display96x16x1DisplayOn();
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}
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//............................................................................
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void BSP_displayOff(void) {
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Display96x16x1DisplayOff();
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}
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} // namespace GAME
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// namespace QP **************************************************************
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namespace QP {
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// QF callbacks ==============================================================
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void QF::onStartup(void) {
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// set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate
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SysTick_Config(SystemCoreClock / GAME::BSP_TICKS_PER_SEC);
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// assing all priority bits for preemption-prio. and none to sub-prio.
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NVIC_SetPriorityGrouping(0U);
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// set priorities of ALL ISRs used in the system, see NOTE00
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//
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// !!!!!!!!!!!!!!!!!!!!!!!!!!!! CAUTION !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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// Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority()
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// DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
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//
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NVIC_SetPriority(ADCSeq3_IRQn, GAME::ADCSEQ3_PRIO);
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NVIC_SetPriority(SysTick_IRQn, GAME::GPIOPORTA_PRIO);
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NVIC_SetPriority(SysTick_IRQn, GAME::SYSTICK_PRIO);
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// ...
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// enable ADC
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ADC->ISC = (1U << 3);
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ADC->IM |= (1U << 3);
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TIMER1->CTL |= ((1U << 0) | (1U << 16)); // enable TIMER1
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// enable IRQs...
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NVIC_EnableIRQ(GPIOPortA_IRQn);
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NVIC_EnableIRQ(ADCSeq3_IRQn);
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}
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//............................................................................
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void QF::onCleanup(void) {
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}
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//............................................................................
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void QV::onIdle(void) { // called with interrupts disabled, see NOTE01
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// toggle the User LED on and then off, see NOTE02
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QF_INT_DISABLE();
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GPIOC->DATA_Bits[USER_LED] = 0xFFU; // turn the User LED on
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GPIOC->DATA_Bits[USER_LED] = 0x00U; // turn the User LED off
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QF_INT_ENABLE();
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#ifdef Q_SPY
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if ((UART0->FR & UART_FR_TXFE) != 0U) { // TX done?
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uint16_t fifo = UART_TXFIFO_DEPTH; // max bytes we can accept
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uint8_t const *block;
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QF_INT_DISABLE();
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block = QS::getBlock(&fifo); // try to get next block to transmit
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QF_INT_ENABLE();
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while (fifo-- != 0U) { // any bytes in the block?
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UART0->DR = *block++; // put into the FIFO
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}
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}
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#elif defined NDEBUG
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// Put the CPU and peripherals to the low-power mode.
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// you might need to customize the clock management for your application,
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// see the datasheet for your particular Cortex-M3 MCU.
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//
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QV_CPU_SLEEP(); // atomically go to sleep and enable interrupts
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#else
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QF_INT_ENABLE(); // just enable interrupts
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#endif
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}
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//............................................................................
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2015-09-29 11:34:38 -04:00
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extern "C" void Q_onAssert(char const *module, int loc) {
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//
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// NOTE: add here your application-specific error handling
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//
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|
(void)module;
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|
(void)loc;
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QS_ASSERTION(module, loc, static_cast<uint32_t>(10000U));
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|
NVIC_SystemReset();
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}
|
2015-05-14 16:05:04 -04:00
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|
// QS callbacks ==============================================================
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#ifdef Q_SPY
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//............................................................................
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bool QS::onStartup(void const *arg) {
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static uint8_t qsBuf[2*1024]; // buffer for Quantum Spy
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initBuf(qsBuf, sizeof(qsBuf));
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|
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|
// enable the peripherals used by the UART0
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SYSCTL->RCGC1 |= (1U << 0); // enable clock to UART0
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SYSCTL->RCGC2 |= (1U << 0); // enable clock to GPIOA
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__NOP(); // wait after enabling clocks
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__NOP();
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__NOP();
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|
// configure UART0 pins for UART operation
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|
uint32_t tmp = (1U << 0) | (1U << 1);
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GPIOA->DIR &= ~tmp;
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|
GPIOA->AFSEL |= tmp;
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GPIOA->DR2R |= tmp; // set 2mA drive, DR4R and DR8R are cleared
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GPIOA->SLR &= ~tmp;
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GPIOA->ODR &= ~tmp;
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GPIOA->PUR &= ~tmp;
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|
GPIOA->PDR &= ~tmp;
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|
GPIOA->DEN |= tmp;
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|
|
// configure the UART for the desired baud rate, 8-N-1 operation
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|
tmp = (((SystemCoreClock * 8U) / UART_BAUD_RATE) + 1U) / 2U;
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|
UART0->IBRD = tmp / 64U;
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UART0->FBRD = tmp % 64U;
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|
UART0->LCRH = 0x60U; // configure 8-N-1 operation
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|
UART0->LCRH |= 0x10U;
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|
|
UART0->CTL |= (1U << 0) | (1U << 8) | (1U << 9);
|
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|
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|
|
GAME::QS_tickPeriod_ = SystemCoreClock / GAME::BSP_TICKS_PER_SEC;
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|
|
GAME::QS_tickTime_ = GAME::QS_tickPeriod_; // to start timestamp at zero
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|
|
// setup the QS filters...
|
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|
|
QS_FILTER_ON(QS_QEP_STATE_ENTRY);
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|
|
QS_FILTER_ON(QS_QEP_STATE_EXIT);
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|
|
QS_FILTER_ON(QS_QEP_STATE_INIT);
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|
|
QS_FILTER_ON(QS_QEP_INIT_TRAN);
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|
|
QS_FILTER_ON(QS_QEP_INTERN_TRAN);
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|
|
QS_FILTER_ON(QS_QEP_TRAN);
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|
|
QS_FILTER_ON(QS_QEP_IGNORED);
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|
|
QS_FILTER_ON(QS_QEP_DISPATCH);
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|
|
QS_FILTER_ON(QS_QEP_UNHANDLED);
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|
|
return true; // return success
|
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|
|
}
|
|
|
|
//............................................................................
|
|
|
|
void QS::onCleanup(void) {
|
|
|
|
}
|
|
|
|
//............................................................................
|
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|
|
QSTimeCtr QS::onGetTime(void) { // NOTE: invoked with interrupts DISABLED
|
|
|
|
if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0) { // not set?
|
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|
|
return GAME::QS_tickTime_ - static_cast<QSTimeCtr>(SysTick->VAL);
|
|
|
|
}
|
|
|
|
else { // the rollover occured, but the SysTick_ISR did not run yet
|
|
|
|
return GAME::QS_tickTime_ + GAME::QS_tickPeriod_
|
|
|
|
- static_cast<QSTimeCtr>(SysTick->VAL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
//............................................................................
|
|
|
|
void QS::onFlush(void) {
|
|
|
|
uint16_t fifo = UART_TXFIFO_DEPTH; // Tx FIFO depth
|
|
|
|
uint8_t const *block;
|
|
|
|
QF_INT_DISABLE();
|
|
|
|
while ((block = getBlock(&fifo)) != (uint8_t *)0) {
|
|
|
|
QF_INT_ENABLE();
|
|
|
|
// busy-wait until TX FIFO empty
|
|
|
|
while ((UART0->FR & UART_FR_TXFE) == 0U) {
|
|
|
|
}
|
|
|
|
|
|
|
|
while (fifo-- != 0U) { // any bytes in the block?
|
|
|
|
UART0->DR = *block++; // put into the TX FIFO
|
|
|
|
}
|
|
|
|
fifo = UART_TXFIFO_DEPTH; // re-load the Tx FIFO depth
|
|
|
|
QF_INT_DISABLE();
|
|
|
|
}
|
|
|
|
QF_INT_ENABLE();
|
|
|
|
}
|
2015-09-29 11:34:38 -04:00
|
|
|
//............................................................................
|
|
|
|
//! callback function to reset the target (to be implemented in the BSP)
|
|
|
|
void QS::onReset(void) {
|
|
|
|
//TBD
|
|
|
|
}
|
|
|
|
//............................................................................
|
|
|
|
//! callback function to execute a uesr command (to be implemented in BSP)
|
|
|
|
void QS::onCommand(uint8_t cmdId, uint32_t param) {
|
|
|
|
(void)cmdId;
|
|
|
|
(void)param;
|
|
|
|
//TBD
|
|
|
|
}
|
2015-05-14 16:05:04 -04:00
|
|
|
|
|
|
|
#endif // Q_SPY
|
|
|
|
//--------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
} // namespace QP
|
|
|
|
|
|
|
|
//****************************************************************************
|
|
|
|
// NOTE00:
|
|
|
|
// The QF_AWARE_ISR_CMSIS_PRI constant from the QF port specifies the highest
|
|
|
|
// ISR priority that is disabled by the QF framework. The value is suitable
|
|
|
|
// for the NVIC_SetPriority() CMSIS function.
|
|
|
|
//
|
|
|
|
// Only ISRs prioritized at or below the QF_AWARE_ISR_CMSIS_PRI level (i.e.,
|
|
|
|
// with the numerical values of priorities equal or higher than
|
|
|
|
// QF_AWARE_ISR_CMSIS_PRI) are allowed to call the QK_ISR_ENTRY/QK_ISR_ENTRY
|
|
|
|
// macros or any other QF/QK services. These ISRs are "QF-aware".
|
|
|
|
//
|
|
|
|
// Conversely, any ISRs prioritized above the QF_AWARE_ISR_CMSIS_PRI priority
|
|
|
|
// level (i.e., with the numerical values of priorities less than
|
|
|
|
// QF_AWARE_ISR_CMSIS_PRI) are never disabled and are not aware of the kernel.
|
|
|
|
// Such "QF-unaware" ISRs cannot call any QF/QK services. In particular they
|
|
|
|
// can NOT call the macros QK_ISR_ENTRY/QK_ISR_ENTRY. The only mechanism
|
|
|
|
// by which a "QF-unaware" ISR can communicate with the QF framework is by
|
|
|
|
// triggering a "QF-aware" ISR, which can post/publish events.
|
|
|
|
//
|
|
|
|
// NOTE01:
|
|
|
|
// The QV::onIdle() callback is called with interrupts disabled, because the
|
|
|
|
// determination of the idle condition might change by any interrupt posting
|
|
|
|
// an event. QV::onIdle() must internally enable interrupts, ideally
|
|
|
|
// atomically with putting the CPU to the power-saving mode.
|
|
|
|
//
|
|
|
|
// NOTE02:
|
|
|
|
// The User LED is used to visualize the idle loop activity. The brightness
|
|
|
|
// of the LED is proportional to the frequency of invcations of the idle loop.
|
|
|
|
// Please note that the LED is toggled with interrupts locked, so no interrupt
|
|
|
|
// execution time contributes to the brightness of the User LED.
|
|
|
|
//
|