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7.3.2

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fixed a typo bug in zephyr port
This commit is contained in:
MMS 2023-12-21 13:50:33 -05:00
parent 67a869d760
commit d2fbb4b05b
4 changed files with 12 additions and 13 deletions
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3
examples/arm-cm/dpp_nucleo-h743zi/qxk/bsp.cpp
View File

@ -355,9 +355,6 @@ void QF::onStartup() {
// NOTE: this might have been changed by STM32Cube.
NVIC_SetPriorityGrouping(0U);
// set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate
SysTick_Config(SystemCoreClock / BSP::TICKS_PER_SEC);
// set priorities of ALL ISRs used in the system, see NOTE1
NVIC_SetPriority(USART3_IRQn, 0U); // kernel UNAWARE interrupt
NVIC_SetPriority(SysTick_IRQn, QF_AWARE_ISR_CMSIS_PRI + 1U);

7
examples/arm-cm/dpp_nucleo-l552ze/qk/bsp.cpp
View File

@ -192,6 +192,10 @@ void init() {
//
HAL_Init();
// NOTE: SystemInit() has been already called from the startup code
// but SystemCoreClock needs to be updated
SystemCoreClockUpdate();
// Configure the system clock
RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
@ -370,9 +374,6 @@ void QF::onStartup() {
// NOTE: this might have been changed by STM32Cube.
NVIC_SetPriorityGrouping(0U);
// set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate
SysTick_Config(SystemCoreClock / BSP::TICKS_PER_SEC);
// set priorities of ALL ISRs used in the system, see NOTE1
NVIC_SetPriority(USART3_IRQn, 0U); // kernel UNAWARE interrupt
NVIC_SetPriority(SysTick_IRQn, QF_AWARE_ISR_CMSIS_PRI + 1U);

7
examples/arm-cm/dpp_nucleo-l552ze/qxk/bsp.cpp
View File

@ -192,6 +192,10 @@ void init() {
//
HAL_Init();
// NOTE: SystemInit() has been already called from the startup code
// but SystemCoreClock needs to be updated
SystemCoreClockUpdate();
// Configure the system clock
RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
@ -384,9 +388,6 @@ void QF::onStartup() {
// NOTE: this might have been changed by STM32Cube.
NVIC_SetPriorityGrouping(0U);
// set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate
SysTick_Config(SystemCoreClock / BSP::TICKS_PER_SEC);
// set priorities of ALL ISRs used in the system, see NOTE1
NVIC_SetPriority(USART3_IRQn, 0U); // kernel UNAWARE interrupt
NVIC_SetPriority(SysTick_IRQn, QF_AWARE_ISR_CMSIS_PRI + 1U);

8
zephyr/qf_port.cpp
View File

@ -22,8 +22,8 @@
// <www.state-machine.com>
// <info@state-machine.com>
//============================================================================
//! @date Last updated on: 2023-12-04
//! @version Last updated for @ref qpcpp_7_3_1
//! @date Last updated on: 2024-01-03
//! @version Last updated for: @ref qpc_7_3_2
//!
//! @file
//! @brief QF/C++ port to Zephyr RTOS kernel, all supported compilers
@ -133,7 +133,7 @@ void QActive::start(QPrioSpec const prioSpec,
void const * const par)
{
m_prio = static_cast<std::uint8_t>(prioSpec & 0xFFU); // QF-priority
m_pthre = static_cast<std::uint8_t>(prioSpec >> 8U); // preemption-thre.
m_pthre = 0U; // preemption-threshold (not used for AO registration)
register_(); // make QF aware of this active object
// initialize the Zephyr message queue
@ -162,7 +162,7 @@ void QActive::start(QPrioSpec const prioSpec,
// would result in a different relative priritization of AO's threads
// than indicated by the AO priorities assigned.
//
int zephyr_prio = (int)((int16_t)qp_prio >> 8);
int zephyr_prio = (int)((int16_t)prioSpec >> 8);
if (zephyr_prio == 0) {
zephyr_prio = (int)QF_MAX_ACTIVE - (int)m_prio;
}