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311 lines
10 KiB
C
311 lines
10 KiB
C
/********************************************************************
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* Copyright (C) 2003-2008 Texas Instruments Incorporated.
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* All Rights Reserved
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*********************************************************************
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* file: cslr_spi.h
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*
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* Brief: This file contains the Register Description for spi
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*
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*********************************************************************/
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#ifndef _CSLR_SPI_H_
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#define _CSLR_SPI_H_
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#include <cslr.h>
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#include <tistdtypes.h>
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#include <csl_general.h>
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/* Minimum unit = 2 bytes */
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/**************************************************************************\
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* Register Overlay Structure
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\**************************************************************************/
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typedef struct {
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volatile Uint16 SPICDR;
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volatile Uint16 SPICCR;
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volatile Uint16 SPIDCR1;
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volatile Uint16 SPIDCR2;
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volatile Uint16 SPICMD1;
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volatile Uint16 SPICMD2;
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volatile Uint16 SPISTAT1;
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volatile Uint16 SPISTAT2;
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volatile Uint16 SPIDR1;
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volatile Uint16 SPIDR2;
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} CSL_SpiRegs;
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/**************************************************************************\
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* Field Definition Macros
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\**************************************************************************/
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/* SPICDR */
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#define CSL_SPI_SPICDR_CLKDV_MASK (0xFFFFu)
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#define CSL_SPI_SPICDR_CLKDV_SHIFT (0x0000u)
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#define CSL_SPI_SPICDR_CLKDV_RESETVAL (0x0000u)
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#define CSL_SPI_SPICDR_RESETVAL (0x0000u)
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/* SPICCR */
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#define CSL_SPI_SPICCR_CLKEN_MASK (0x8000u)
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#define CSL_SPI_SPICCR_CLKEN_SHIFT (0x000Fu)
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#define CSL_SPI_SPICCR_CLKEN_RESETVAL (0x0000u)
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/*----CLKEN Tokens----*/
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#define CSL_SPI_SPICCR_CLKEN_DISABLED (0x0000u)
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#define CSL_SPI_SPICCR_CLKEN_ENABLED (0x0001u)
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#define CSL_SPI_SPICCR_RST_MASK (0x4000u)
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#define CSL_SPI_SPICCR_RST_SHIFT (0x000Eu)
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#define CSL_SPI_SPICCR_RST_RESETVAL (0x0000u)
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/*----RST Tokens----*/
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#define CSL_SPI_SPICCR_RST_RELEASE (0x0000u)
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#define CSL_SPI_SPICCR_RST_ASSERT (0x0001u)
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#define CSL_SPI_SPICCR_RESETVAL (0x0000u)
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/* SPIDCR1 */
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#define CSL_SPI_SPIDCR1_DD1_MASK (0x1800u)
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#define CSL_SPI_SPIDCR1_DD1_SHIFT (0x000Bu)
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#define CSL_SPI_SPIDCR1_DD1_RESETVAL (0x0000u)
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/*----DD1 Tokens----*/
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#define CSL_SPI_SPIDCR1_DD1_DELAY0 (0x0000u)
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#define CSL_SPI_SPIDCR1_DD1_DELAY1 (0x0001u)
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#define CSL_SPI_SPIDCR1_DD1_DELAY2 (0x0002u)
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#define CSL_SPI_SPIDCR1_DD1_DELAY3 (0x0003u)
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#define CSL_SPI_SPIDCR1_CKPH1_MASK (0x0400u)
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#define CSL_SPI_SPIDCR1_CKPH1_SHIFT (0x000Au)
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#define CSL_SPI_SPIDCR1_CKPH1_RESETVAL (0x0000u)
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/*----CKPH1 Tokens----*/
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#define CSL_SPI_SPIDCR1_CKPH1_LOW (0x0000u)
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#define CSL_SPI_SPIDCR1_CKPH1_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR1_CSP1_MASK (0x0200u)
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#define CSL_SPI_SPIDCR1_CSP1_SHIFT (0x0009u)
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#define CSL_SPI_SPIDCR1_CSP1_RESETVAL (0x0000u)
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/*----CSP1 Tokens----*/
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#define CSL_SPI_SPIDCR1_CSP1_LOW (0x0000u)
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#define CSL_SPI_SPIDCR1_CSP1_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR1_CKP1_MASK (0x0100u)
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#define CSL_SPI_SPIDCR1_CKP1_SHIFT (0x0008u)
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#define CSL_SPI_SPIDCR1_CKP1_RESETVAL (0x0000u)
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/*----CKP1 Tokens----*/
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#define CSL_SPI_SPIDCR1_CKP1_LOW (0x0000u)
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#define CSL_SPI_SPIDCR1_CKP1_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR1_DD0_MASK (0x0018u)
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#define CSL_SPI_SPIDCR1_DD0_SHIFT (0x0003u)
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#define CSL_SPI_SPIDCR1_DD0_RESETVAL (0x0000u)
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/*----DD0 Tokens----*/
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#define CSL_SPI_SPIDCR1_DD0_DELAY0 (0x0000u)
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#define CSL_SPI_SPIDCR1_DD0_DELAY1 (0x0001u)
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#define CSL_SPI_SPIDCR1_DD0_DELAY2 (0x0002u)
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#define CSL_SPI_SPIDCR1_DD0_DELAY3 (0x0003u)
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#define CSL_SPI_SPIDCR1_CKPH0_MASK (0x0004u)
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#define CSL_SPI_SPIDCR1_CKPH0_SHIFT (0x0002u)
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#define CSL_SPI_SPIDCR1_CKPH0_RESETVAL (0x0000u)
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/*----CKPH0 Tokens----*/
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#define CSL_SPI_SPIDCR1_CKPH0_LOW (0x0000u)
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#define CSL_SPI_SPIDCR1_CKPH0_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR1_CSP0_MASK (0x0002u)
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#define CSL_SPI_SPIDCR1_CSP0_SHIFT (0x0001u)
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#define CSL_SPI_SPIDCR1_CSP0_RESETVAL (0x0000u)
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/*----CSP0 Tokens----*/
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#define CSL_SPI_SPIDCR1_CSP0_LOW (0x0000u)
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#define CSL_SPI_SPIDCR1_CSP0_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR1_CKP0_MASK (0x0001u)
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#define CSL_SPI_SPIDCR1_CKP0_SHIFT (0x0000u)
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#define CSL_SPI_SPIDCR1_CKP0_RESETVAL (0x0000u)
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/*----CKP0 Tokens----*/
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#define CSL_SPI_SPIDCR1_CKP0_LOW (0x0000u)
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#define CSL_SPI_SPIDCR1_CKP0_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR1_RESETVAL (0x0000u)
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/* SPIDCR2 */
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#define CSL_SPI_SPIDCR2_LPBK_MASK (0x8000u)
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#define CSL_SPI_SPIDCR2_LPBK_SHIFT (0x000Fu)
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#define CSL_SPI_SPIDCR2_LPBK_RESETVAL (0x0000u)
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/*----LPBK Tokens----*/
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#define CSL_SPI_SPIDCR2_LPBK_DISABLE (0x0000u)
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#define CSL_SPI_SPIDCR2_LPBK_ENABLE (0x0001u)
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#define CSL_SPI_SPIDCR2_DD3_MASK (0x1800u)
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#define CSL_SPI_SPIDCR2_DD3_SHIFT (0x000Bu)
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#define CSL_SPI_SPIDCR2_DD3_RESETVAL (0x0000u)
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/*----DD3 Tokens----*/
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#define CSL_SPI_SPIDCR2_DD3_DELAY0 (0x0000u)
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#define CSL_SPI_SPIDCR2_DD3_DELAY1 (0x0001u)
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#define CSL_SPI_SPIDCR2_DD3_DELAY2 (0x0002u)
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#define CSL_SPI_SPIDCR2_DD3_DELAY3 (0x0003u)
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#define CSL_SPI_SPIDCR2_CKPH3_MASK (0x0400u)
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#define CSL_SPI_SPIDCR2_CKPH3_SHIFT (0x000Au)
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#define CSL_SPI_SPIDCR2_CKPH3_RESETVAL (0x0000u)
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/*----CKPH3 Tokens----*/
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#define CSL_SPI_SPIDCR2_CKPH3_LOW (0x0000u)
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#define CSL_SPI_SPIDCR2_CKPH3_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR2_CSP3_MASK (0x0200u)
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#define CSL_SPI_SPIDCR2_CSP3_SHIFT (0x0009u)
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#define CSL_SPI_SPIDCR2_CSP3_RESETVAL (0x0000u)
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/*----CSP3 Tokens----*/
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#define CSL_SPI_SPIDCR2_CSP3_LOW (0x0000u)
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#define CSL_SPI_SPIDCR2_CSP3_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR2_CKP3_MASK (0x0100u)
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#define CSL_SPI_SPIDCR2_CKP3_SHIFT (0x0008u)
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#define CSL_SPI_SPIDCR2_CKP3_RESETVAL (0x0000u)
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/*----CKP3 Tokens----*/
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#define CSL_SPI_SPIDCR2_CKP3_LOW (0x0000u)
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#define CSL_SPI_SPIDCR2_CKP3_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR2_DD2_MASK (0x0018u)
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#define CSL_SPI_SPIDCR2_DD2_SHIFT (0x0003u)
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#define CSL_SPI_SPIDCR2_DD2_RESETVAL (0x0000u)
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/*----DD2 Tokens----*/
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#define CSL_SPI_SPIDCR2_DD2_DELAY0 (0x0000u)
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#define CSL_SPI_SPIDCR2_DD2_DELAY1 (0x0001u)
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#define CSL_SPI_SPIDCR2_DD2_DELAY2 (0x0002u)
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#define CSL_SPI_SPIDCR2_DD2_DELAY3 (0x0003u)
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#define CSL_SPI_SPIDCR2_CKPH2_MASK (0x0004u)
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#define CSL_SPI_SPIDCR2_CKPH2_SHIFT (0x0002u)
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#define CSL_SPI_SPIDCR2_CKPH2_RESETVAL (0x0000u)
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/*----CKPH2 Tokens----*/
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#define CSL_SPI_SPIDCR2_CKPH2_LOW (0x0000u)
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#define CSL_SPI_SPIDCR2_CKPH2_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR2_CSP2_MASK (0x0002u)
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#define CSL_SPI_SPIDCR2_CSP2_SHIFT (0x0001u)
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#define CSL_SPI_SPIDCR2_CSP2_RESETVAL (0x0000u)
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/*----CSP2 Tokens----*/
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#define CSL_SPI_SPIDCR2_CSP2_LOW (0x0000u)
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#define CSL_SPI_SPIDCR2_CSP2_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR2_CKP2_MASK (0x0001u)
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#define CSL_SPI_SPIDCR2_CKP2_SHIFT (0x0000u)
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#define CSL_SPI_SPIDCR2_CKP2_RESETVAL (0x0000u)
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/*----CKP2 Tokens----*/
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#define CSL_SPI_SPIDCR2_CKP2_LOW (0x0000u)
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#define CSL_SPI_SPIDCR2_CKP2_HIGH (0x0001u)
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#define CSL_SPI_SPIDCR2_RESETVAL (0x0000u)
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/* SPICMD1 */
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#define CSL_SPI_SPICMD1_FIRQ_MASK (0x8000u)
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#define CSL_SPI_SPICMD1_FIRQ_SHIFT (0x000Fu)
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#define CSL_SPI_SPICMD1_FIRQ_RESETVAL (0x0000u)
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/*----FIRQ Tokens----*/
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#define CSL_SPI_SPICMD1_FIRQ_DISABLE (0x0000u)
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#define CSL_SPI_SPICMD1_FIRQ_ENABLE (0x0001u)
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#define CSL_SPI_SPICMD1_CIRQ_MASK (0x4000u)
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#define CSL_SPI_SPICMD1_CIRQ_SHIFT (0x000Eu)
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#define CSL_SPI_SPICMD1_CIRQ_RESETVAL (0x0000u)
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/*----CIRQ Tokens----*/
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#define CSL_SPI_SPICMD1_CIRQ_DISABLE (0x0000u)
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#define CSL_SPI_SPICMD1_CIRQ_ENABLE (0x0001u)
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#define CSL_SPI_SPICMD1_FLEN_MASK (0x0FFFu)
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#define CSL_SPI_SPICMD1_FLEN_SHIFT (0x0000u)
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#define CSL_SPI_SPICMD1_FLEN_RESETVAL (0x0000u)
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#define CSL_SPI_SPICMD1_RESETVAL (0x0000u)
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/* SPICMD2 */
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#define CSL_SPI_SPICMD2_CSNUM_MASK (0x3000u)
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#define CSL_SPI_SPICMD2_CSNUM_SHIFT (0x000Cu)
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#define CSL_SPI_SPICMD2_CSNUM_RESETVAL (0x0000u)
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/*----CSNUM Tokens----*/
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#define CSL_SPI_SPICMD2_CSNUM_CS0 (0x0000u)
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#define CSL_SPI_SPICMD2_CSNUM_CS1 (0x0001u)
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#define CSL_SPI_SPICMD2_CSNUM_CS2 (0x0002u)
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#define CSL_SPI_SPICMD2_CSNUM_CS3 (0x0003u)
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#define CSL_SPI_SPICMD2_CLEN_MASK (0x00F8u)
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#define CSL_SPI_SPICMD2_CLEN_SHIFT (0x0003u)
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#define CSL_SPI_SPICMD2_CLEN_RESETVAL (0x0000u)
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#define CSL_SPI_SPICMD2_CMD_MASK (0x0003u)
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#define CSL_SPI_SPICMD2_CMD_SHIFT (0x0000u)
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#define CSL_SPI_SPICMD2_CMD_RESETVAL (0x0000u)
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/*----CMD Tokens----*/
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#define CSL_SPI_SPICMD2_CMD_RSV1 (0x0000u)
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#define CSL_SPI_SPICMD2_CMD_READ (0x0001u)
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#define CSL_SPI_SPICMD2_CMD_WRITE (0x0002u)
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#define CSL_SPI_SPICMD2_CMD_RSV2 (0x0003u)
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#define CSL_SPI_SPICMD2_RESETVAL (0x0000u)
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/* SPISTAT1 */
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#define CSL_SPI_SPISTAT1_FC_MASK (0x0004u)
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#define CSL_SPI_SPISTAT1_FC_SHIFT (0x0002u)
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#define CSL_SPI_SPISTAT1_FC_RESETVAL (0x0000u)
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/*----FC Tokens----*/
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#define CSL_SPI_SPISTAT1_FC_NOTCOMPLETE (0x0000u)
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#define CSL_SPI_SPISTAT1_FC_COMPLETE (0x0001u)
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#define CSL_SPI_SPISTAT1_CC_MASK (0x0002u)
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#define CSL_SPI_SPISTAT1_CC_SHIFT (0x0001u)
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#define CSL_SPI_SPISTAT1_CC_RESETVAL (0x0000u)
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/*----CC Tokens----*/
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#define CSL_SPI_SPISTAT1_CC_NOTCOMPLETE (0x0000u)
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#define CSL_SPI_SPISTAT1_CC_COMPLETE (0x0001u)
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#define CSL_SPI_SPISTAT1_BSY_MASK (0x0001u)
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#define CSL_SPI_SPISTAT1_BSY_SHIFT (0x0000u)
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#define CSL_SPI_SPISTAT1_BSY_RESETVAL (0x0000u)
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/*----BSY Tokens----*/
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#define CSL_SPI_SPISTAT1_BSY_NOTBUSY (0x0000u)
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#define CSL_SPI_SPISTAT1_BSY_BUSY (0x0001u)
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#define CSL_SPI_SPISTAT1_RESETVAL (0x0000u)
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/* SPISTAT2 */
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#define CSL_SPI_SPISTAT2_CCNT_MASK (0x0FFFu)
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#define CSL_SPI_SPISTAT2_CCNT_SHIFT (0x0000u)
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#define CSL_SPI_SPISTAT2_CCNT_RESETVAL (0x0000u)
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#define CSL_SPI_SPISTAT2_RESETVAL (0x0000u)
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/* SPIDR1 */
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#define CSL_SPI_SPIDR1_DATA_MASK (0xFFFFu)
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#define CSL_SPI_SPIDR1_DATA_SHIFT (0x0000u)
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#define CSL_SPI_SPIDR1_DATA_RESETVAL (0x0000u)
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#define CSL_SPI_SPIDR1_RESETVAL (0x0000u)
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/* SPIDR2 */
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#define CSL_SPI_SPIDR2_DATA_MASK (0xFFFFu)
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#define CSL_SPI_SPIDR2_DATA_SHIFT (0x0000u)
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#define CSL_SPI_SPIDR2_DATA_RESETVAL (0x0000u)
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#define CSL_SPI_SPIDR2_RESETVAL (0x0000u)
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#endif
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