mirror of
https://github.com/QuantumLeaps/qpcpp.git
synced 2025-02-04 06:13:00 +08:00
2347 lines
80 KiB
C
2347 lines
80 KiB
C
/********************************************************************
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* Copyright (C) 2003-2008 Texas Instruments Incorporated.
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* All Rights Reserved
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*********************************************************************
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* file: cslr_usb.h
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*
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* Brief: This file contains the Register Description for usb
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*
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*********************************************************************/
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#ifndef _CSLR_USB_H_
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#define _CSLR_USB_H_
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#include <cslr.h>
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#include <tistdtypes.h>
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#include <csl_general.h>
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/* Minimum unit = 2 bytes */
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/**************************************************************************\
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* Register Overlay Structure for EPTRG
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\**************************************************************************/
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typedef struct {
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volatile Uint16 TXFUNCADDR;
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volatile Uint16 TXHUBADDR_TXHUBPORT;
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volatile Uint16 RSVD0[2];
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volatile Uint16 RXFUNCADDR;
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volatile Uint16 RXHUBADDR_RXHUBPORT;
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volatile Uint16 RSVD36[2];
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} CSL_UsbEptrgRegs;
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/**************************************************************************\
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* Register Overlay Structure for EPCSR
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\**************************************************************************/
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typedef struct {
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volatile Uint16 TXMAXP;
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volatile Uint16 PERI_TXCSR;
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volatile Uint16 RSVD0[2];
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volatile Uint16 RXMAXP;
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volatile Uint16 PERI_RXCSR;
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volatile Uint16 RSVD1[2];
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volatile Uint16 RXCOUNT;
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volatile Uint16 RSVD41[7];
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} CSL_UsbEpcsrRegs;
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/**************************************************************************\
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* Register Overlay Structure for CHANNEL
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\**************************************************************************/
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typedef struct {
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volatile Uint16 TXGCR1;
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volatile Uint16 TXGCR2;
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volatile Uint16 RSVD0[6];
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volatile Uint16 RXGCR1;
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volatile Uint16 RXGCR2;
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volatile Uint16 RSVD1[2];
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volatile Uint16 RXHPCR1A;
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volatile Uint16 RXHPCR2A;
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volatile Uint16 RSVD2[2];
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volatile Uint16 RXHPCR1B;
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volatile Uint16 RXHPCR2B;
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volatile Uint16 RSVD46[14];
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} CSL_UsbChannelRegs;
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/**************************************************************************\
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* Register Overlay Structure for CdmaScheTblWord
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\**************************************************************************/
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typedef struct {
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volatile Uint16 ENTRYLSW;
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volatile Uint16 ENTRYMSW;
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volatile Uint16 RSVD49[2];
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} CSL_UsbCdmaschetblwordRegs;
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/**************************************************************************\
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* Register Overlay Structure for QMMemRegR
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\**************************************************************************/
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typedef struct {
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volatile Uint16 QMEMRBASE1;
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volatile Uint16 QMEMRBASE2;
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volatile Uint16 RSVD0[2];
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volatile Uint16 QMEMRCTRL1;
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volatile Uint16 QMEMRCTRL2;
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volatile Uint16 RSVD63[10];
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} CSL_UsbQmmemregrRegs;
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/**************************************************************************\
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* Register Overlay Structure for QMQN
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\**************************************************************************/
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typedef struct {
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volatile Uint16 RSVD0[12];
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volatile Uint16 CTRL1D;
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volatile Uint16 CTRL2D;
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volatile Uint16 RSVD65[2];
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} CSL_UsbQmqnRegs;
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/**************************************************************************\
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* Register Overlay Structure for QMQNS
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\**************************************************************************/
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typedef struct {
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volatile Uint16 QSTATA;
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volatile Uint16 RSVD0[3];
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volatile Uint16 QSTAT1B;
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volatile Uint16 QSTAT2B;
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volatile Uint16 RSVD1[2];
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volatile Uint16 QSTAT1C;
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volatile Uint16 RSVD67[7];
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} CSL_UsbQmqnsRegs;
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/**************************************************************************\
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* Register Overlay Structure
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\**************************************************************************/
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typedef struct {
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volatile Uint16 REVID1; //0x8000
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volatile Uint16 REVID2; //0x8001
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volatile Uint16 RSVD0[2]; //0x8002/3
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volatile Uint16 CTRLR; //0x8004
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volatile Uint16 RSVD1[3]; //0x8005/6/7
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volatile Uint16 STATR; //0x8008
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volatile Uint16 RSVD2[3]; //0x8009/A/B
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volatile Uint16 EMUR; //0x800C
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volatile Uint16 RSVD3[3]; //0x800D/E/F
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volatile Uint16 MODE1; //0x8010
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volatile Uint16 MODE2; //0x8011
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volatile Uint16 RSVD4[2]; //0x8012/13
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volatile Uint16 AUTOREQ; //0x8014
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volatile Uint16 RSVD5[3]; //0x8015/16/17
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volatile Uint16 SPRFIXTIME1; //0x8018
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volatile Uint16 SPRFIXTIME2; //0x8019
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volatile Uint16 RSVD6[2]; //0x801A/1B
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volatile Uint16 TEARDOWN1; //0x801C
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volatile Uint16 TEARDOWN2; //0x801D
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volatile Uint16 RSVD7[2]; //0x801E/1F
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volatile Uint16 INTSRCR1; //0x8020
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volatile Uint16 INTSRCR2; //0x8021
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volatile Uint16 RSVD8[2]; //0x8022/23
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volatile Uint16 INTSETR1; //0x8024
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volatile Uint16 INTSETR2; //0x8025
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volatile Uint16 RSVD9[2]; //0x8026/27
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volatile Uint16 INTCLRR1; //0x8028
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volatile Uint16 INTCLRR2; //0x8029
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volatile Uint16 RSVD10[2]; //0x802A/2B
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volatile Uint16 INTMSKR1; //0x802C
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volatile Uint16 INTMSKR2; //0x802D
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volatile Uint16 RSVD11[2]; //0x802E/2F
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volatile Uint16 INTMSKSETR1; //0x8030
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volatile Uint16 INTMSKSETR2; //0x8031
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volatile Uint16 RSVD12[2]; //0x8032/33
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volatile Uint16 INTMSKCLRR1; //0x8034
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volatile Uint16 INTMSKCLRR2; //0x8035
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volatile Uint16 RSVD13[2]; //0x8036/37
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volatile Uint16 INTMASKEDR1; //0x8038
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volatile Uint16 INTMASKEDR2; //0x8039
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volatile Uint16 RSVD14[2]; //0x803A/3B
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volatile Uint16 EOIR; //0x803C
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volatile Uint16 RSVD15[3]; //0x803D/3E/3F
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volatile Uint16 INTVECTR1; //0x8040
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volatile Uint16 INTVECTR2; //0x8041
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volatile Uint16 RSVD16[14]; //0x8042-804F
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volatile Uint16 GREP1SZR1; //0x8050
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volatile Uint16 GREP1SZR2; //0x8051
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volatile Uint16 RSVD17[2]; //0x8052/53
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volatile Uint16 GREP2SZR1; //0x8054
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volatile Uint16 GREP2SZR2; //0x8055
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volatile Uint16 RSVD18[2]; //0x8056/57
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volatile Uint16 GREP3SZR1; //0x8058
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volatile Uint16 GREP3SZR2; //0x8059
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volatile Uint16 RSVD19[2]; //0x805A/5B
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volatile Uint16 GREP4SZR1; //0x805C
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volatile Uint16 GREP4SZR2; //0x805D
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#if (defined(CHIP_C5505_C5515) || defined(CHIP_C5504_C5514))
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volatile Uint16 RSVD20[931]; //0x805E - 0x83FF
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#else
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volatile Uint16 RSVD20[930]; //0x805E - 0x83FF
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#endif
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volatile Uint16 FADDR_POWER; //0x8400
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volatile Uint16 INTRTX; //0x8401
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volatile Uint16 RSVD21[2]; //0x8402/03
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volatile Uint16 INTRRX; //0x8404
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volatile Uint16 INTRTXE; //0x8405
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volatile Uint16 RSVD22[2]; //0x8406/07
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volatile Uint16 INTRRXE; //0x8408
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volatile Uint16 INTRUSB_INTRUSBE; //0x8409
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volatile Uint16 RSVD23[2]; //0x840A/0B
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volatile Uint16 FRAME; //0x840C
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volatile Uint16 INDEX_TESTMODE; //0x840D
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volatile Uint16 RSVD24[2]; //0x840E/0F
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volatile Uint16 TXMAXP_INDX; //0x8410
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volatile Uint16 PERI_CSR0_INDX; //0x8411
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volatile Uint16 RSVD25[2]; //0x8412/13
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volatile Uint16 RXMAXP_INDX; //0x8414
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volatile Uint16 PERI_RXCSR_INDX; //0x8415
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volatile Uint16 RSVD26[2]; //0x8416/17
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volatile Uint16 COUNT0_INDX; //0x8418
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volatile Uint16 RSVD27[4]; //0x8419/1A/1B/1C
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volatile Uint16 CONFIGDATA_INDX; //0x841D
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volatile Uint16 RSVD28[2]; //0x841E/1F
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volatile Uint16 FIFO0R1; //0x8420
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volatile Uint16 FIFO0R2; //0x8421
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volatile Uint16 RSVD29[2]; //0x8422/23
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volatile Uint16 FIFO1R1; //0x8424
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volatile Uint16 FIFO1R2; //0x8425
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volatile Uint16 RSVD30[2]; //0x8426/27
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volatile Uint16 FIFO2R1; //0x8428
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volatile Uint16 FIFO2R2; //0x8429
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volatile Uint16 RSVD31[2]; //0x842A/2B
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volatile Uint16 FIFO3R1; //0x842C
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volatile Uint16 FIFO3R2; //0x842D
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volatile Uint16 RSVD32[2]; //0x842E/2F
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volatile Uint16 FIFO4R1; //0x8430
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volatile Uint16 FIFO4R2; //0x8431
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volatile Uint16 RSVD33[46]; //0x8432 - 5F
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volatile Uint16 DEVCTL; //0x8460
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volatile Uint16 TXFIFOSZ_RXFIFOSZ; //0x8461
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volatile Uint16 RSVD34[2]; //0x8462/63
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volatile Uint16 TXFIFOADDR; //0x8464
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volatile Uint16 RXFIFOADDR; //0x8465
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volatile Uint16 RSVD35[6]; //0x8466 - 6B
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volatile Uint16 HWVERS; //0x846C
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volatile Uint16 RSVD37[19]; //0x846D - 7F
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CSL_UsbEptrgRegs EPTRG[5]; //0x8480 - A7
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volatile Uint16 RSVD38[89]; //0x84A8 - 500
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volatile Uint16 PERI_CSR0; //0x8501
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volatile Uint16 RSVD39[6]; //0x8502 - 507
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volatile Uint16 COUNT0; //0x8508
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volatile Uint16 RSVD40[4]; //0x8509 - 50C
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volatile Uint16 CONFIGDATA; //0x850D
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volatile Uint16 RSVD42[2]; //0x850E/F
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CSL_UsbEpcsrRegs EPCSR[4]; //0x8510 - 0x854f
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#if (defined(CHIP_C5505_C5515) || defined(CHIP_C5504_C5514))
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volatile Uint16 RSVD43[2735];
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#else
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volatile Uint16 RSVD43[2736]; //0x8550 - 0x8FFF
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#endif
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volatile Uint16 DMAREVID1; //0x9000
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volatile Uint16 DMAREVID2; //0x9001
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volatile Uint16 RSVD44[2]; //0x9002/3
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volatile Uint16 TDFDQ; //0x9004
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volatile Uint16 RSVD45[3]; //0x9005/6/7
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volatile Uint16 DMAEMU; //0x9008
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volatile Uint16 RSVD47[2039]; //0x9009
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CSL_UsbChannelRegs CHANNEL[4]; //0x9800 - 0x987F
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volatile Uint16 RSVD48[1920]; //0x9880 - 0x9FFF
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volatile Uint16 DMA_SCHED_CTRL1; //0xA000
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volatile Uint16 DMA_SCHED_CTRL2; //0xA001
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volatile Uint16 RSVD50[2046]; //0xA002 - A7FF
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CSL_UsbCdmaschetblwordRegs CDMASCHETBLWORD[64];//0xA800 - 0xA8FF
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volatile Uint16 RSVD51[5888]; //0xA900 - 0xBFFF
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volatile Uint16 QMGRREVID1; //0xC000
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volatile Uint16 QMGRREVID2; //0xC001
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volatile Uint16 RSVD52[6]; //0xC002 - 7
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volatile Uint16 DIVERSION1; //0xC008
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volatile Uint16 DIVERSION2; //0xC009
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volatile Uint16 RSVD53[22]; //0xC00A - 1F
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volatile Uint16 FDBSC0; //0xC020
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volatile Uint16 FDBSC1; //0xC021
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volatile Uint16 RSVD54[2]; //0xC022/23
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volatile Uint16 FDBSC2; //0xC024
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volatile Uint16 FDBSC3; //0xC025
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volatile Uint16 RSVD55[2]; //0xC026/7
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volatile Uint16 FDBSC4; //0xC028
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volatile Uint16 FDBSC5; //0xC029
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volatile Uint16 RSVD56[2]; //0xC02A/2B
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volatile Uint16 FDBSC6; //0xC02C
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volatile Uint16 FDBSC7; //0xC02D
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volatile Uint16 RSVD57[82]; //0xC02E - 7F
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volatile Uint16 LRAM0BASE1; //0xC080
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volatile Uint16 LRAM0BASE2; //0xC081
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volatile Uint16 RSVD58[2]; //0xC082/83
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volatile Uint16 LRAM0SIZE; //0xC084
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volatile Uint16 RSVD59[3]; //0xC085/6/7
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volatile Uint16 LRAM1BASE1; //0xC088
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volatile Uint16 LRAM1BASE2; //0xC089
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volatile Uint16 RSVD60[6]; //0xC08A - 8F
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volatile Uint16 PEND0; //0xC090
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volatile Uint16 PEND1; //0xC091
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volatile Uint16 RSVD61[2]; //0xC092/93
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volatile Uint16 PEND2; //0xC094
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volatile Uint16 PEND3; //0xC094
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volatile Uint16 RSVD62[2]; //0xC096/97
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volatile Uint16 PEND4; //0xC098
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volatile Uint16 PEND5; //0xC099
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volatile Uint16 RSVD64[3942]; //0xC09A - 0xCFFF
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CSL_UsbQmmemregrRegs QMMEMREGR[16]; //0xD000 - 0xD0FF
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volatile Uint16 RSVD66[3840]; //0xD100 - 0xDFFF
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CSL_UsbQmqnRegs QMQN[64]; //0xE000 - 0xE3FF
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volatile Uint16 RSVD68[1024]; //0xE400 - 0xE800
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CSL_UsbQmqnsRegs QMQNS[64]; //0xE800 - 0xEC00
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} CSL_UsbRegs;
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/**************************************************************************\
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* Field Definition Macros
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\**************************************************************************/
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/* TXFUNCADDR */
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#define CSL_USB_TXFUNCADDR_FUNCADDR_MASK (0x007Fu)
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#define CSL_USB_TXFUNCADDR_FUNCADDR_SHIFT (0x0000u)
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#define CSL_USB_TXFUNCADDR_FUNCADDR_RESETVAL (0x0000u)
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#define CSL_USB_TXFUNCADDR_RESETVAL (0x0000u)
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/* TXHUBADDR_TXHUBPORT */
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#define CSL_USB_TXHUBADDR_TXHUBPORT_HUBPORT_MASK (0x7F00u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_HUBPORT_SHIFT (0x0008u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_HUBPORT_RESETVAL (0x0000u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_MULT_TRANS_MASK (0x0080u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_MULT_TRANS_SHIFT (0x0007u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_MULT_TRANS_RESETVAL (0x0000u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_HUBADDR_MASK (0x007Fu)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_HUBADDR_SHIFT (0x0000u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_HUBADDR_RESETVAL (0x0000u)
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#define CSL_USB_TXHUBADDR_TXHUBPORT_RESETVAL (0x0000u)
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/* RXFUNCADDR */
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#define CSL_USB_RXFUNCADDR_FUNCADDR_MASK (0x007Fu)
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#define CSL_USB_RXFUNCADDR_FUNCADDR_SHIFT (0x0000u)
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#define CSL_USB_RXFUNCADDR_FUNCADDR_RESETVAL (0x0000u)
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#define CSL_USB_RXFUNCADDR_RESETVAL (0x0000u)
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/* RXHUBADDR_RXHUBPORT */
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#define CSL_USB_RXHUBADDR_RXHUBPORT_HUBPORT_MASK (0x7F00u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_HUBPORT_SHIFT (0x0008u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_HUBPORT_RESETVAL (0x0000u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_MULT_TRANS_MASK (0x0080u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_MULT_TRANS_SHIFT (0x0007u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_MULT_TRANS_RESETVAL (0x0000u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_HUBADDR_MASK (0x007Fu)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_HUBADDR_SHIFT (0x0000u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_HUBADDR_RESETVAL (0x0000u)
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#define CSL_USB_RXHUBADDR_RXHUBPORT_RESETVAL (0x0000u)
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/* TXMAXP */
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#define CSL_USB_TXMAXP_MAXPAYLOAD_MASK (0x07FFu)
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#define CSL_USB_TXMAXP_MAXPAYLOAD_SHIFT (0x0000u)
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#define CSL_USB_TXMAXP_MAXPAYLOAD_RESETVAL (0x0000u)
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#define CSL_USB_TXMAXP_RESETVAL (0x0000u)
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/* PERI_TXCSR */
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#define CSL_USB_PERI_TXCSR_AUTOSET_MASK (0x8000u)
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#define CSL_USB_PERI_TXCSR_AUTOSET_SHIFT (0x000Fu)
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#define CSL_USB_PERI_TXCSR_AUTOSET_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_ISO_MASK (0x4000u)
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#define CSL_USB_PERI_TXCSR_ISO_SHIFT (0x000Eu)
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#define CSL_USB_PERI_TXCSR_ISO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_MODE_MASK (0x2000u)
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#define CSL_USB_PERI_TXCSR_MODE_SHIFT (0x000Du)
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#define CSL_USB_PERI_TXCSR_MODE_RESETVAL (0x0001u)
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#define CSL_USB_PERI_TXCSR_DMAEN_MASK (0x1000u)
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#define CSL_USB_PERI_TXCSR_DMAEN_SHIFT (0x000Cu)
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#define CSL_USB_PERI_TXCSR_DMAEN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_FRCDATATOG_MASK (0x0800u)
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#define CSL_USB_PERI_TXCSR_FRCDATATOG_SHIFT (0x000Bu)
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#define CSL_USB_PERI_TXCSR_FRCDATATOG_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_DMAMODE_MASK (0x0400u)
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#define CSL_USB_PERI_TXCSR_DMAMODE_SHIFT (0x000Au)
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#define CSL_USB_PERI_TXCSR_DMAMODE_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_CLRDATATOG_MASK (0x0040u)
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#define CSL_USB_PERI_TXCSR_CLRDATATOG_SHIFT (0x0006u)
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#define CSL_USB_PERI_TXCSR_CLRDATATOG_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_SENTSTALL_MASK (0x0020u)
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#define CSL_USB_PERI_TXCSR_SENTSTALL_SHIFT (0x0005u)
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#define CSL_USB_PERI_TXCSR_SENTSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_SENDSTALL_MASK (0x0010u)
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#define CSL_USB_PERI_TXCSR_SENDSTALL_SHIFT (0x0004u)
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#define CSL_USB_PERI_TXCSR_SENDSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_FLUSHFIFO_MASK (0x0008u)
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#define CSL_USB_PERI_TXCSR_FLUSHFIFO_SHIFT (0x0003u)
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#define CSL_USB_PERI_TXCSR_FLUSHFIFO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_UNDERRUN_MASK (0x0004u)
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#define CSL_USB_PERI_TXCSR_UNDERRUN_SHIFT (0x0002u)
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#define CSL_USB_PERI_TXCSR_UNDERRUN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_FIFONOTEMPTY_MASK (0x0002u)
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#define CSL_USB_PERI_TXCSR_FIFONOTEMPTY_SHIFT (0x0001u)
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#define CSL_USB_PERI_TXCSR_FIFONOTEMPTY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_TXPKTRDY_MASK (0x0001u)
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#define CSL_USB_PERI_TXCSR_TXPKTRDY_SHIFT (0x0000u)
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#define CSL_USB_PERI_TXCSR_TXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_RESETVAL (0x2000u)
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/* RXMAXP */
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#define CSL_USB_RXMAXP_MAXPAYLOAD_MASK (0x07FFu)
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#define CSL_USB_RXMAXP_MAXPAYLOAD_SHIFT (0x0000u)
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#define CSL_USB_RXMAXP_MAXPAYLOAD_RESETVAL (0x0000u)
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#define CSL_USB_RXMAXP_RESETVAL (0x0000u)
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/* PERI_RXCSR */
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#define CSL_USB_PERI_RXCSR_AUTOCLEAR_MASK (0x8000u)
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#define CSL_USB_PERI_RXCSR_AUTOCLEAR_SHIFT (0x000Fu)
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#define CSL_USB_PERI_RXCSR_AUTOCLEAR_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_ISO_MASK (0x4000u)
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#define CSL_USB_PERI_RXCSR_ISO_SHIFT (0x000Eu)
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#define CSL_USB_PERI_RXCSR_ISO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_DMAEN_MASK (0x2000u)
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#define CSL_USB_PERI_RXCSR_DMAEN_SHIFT (0x000Du)
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#define CSL_USB_PERI_RXCSR_DMAEN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_DISNYET_MASK (0x1000u)
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#define CSL_USB_PERI_RXCSR_DISNYET_SHIFT (0x000Cu)
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#define CSL_USB_PERI_RXCSR_DISNYET_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_DMAMODE_MASK (0x0800u)
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#define CSL_USB_PERI_RXCSR_DMAMODE_SHIFT (0x000Bu)
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#define CSL_USB_PERI_RXCSR_DMAMODE_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_CLRDATATOG_MASK (0x0080u)
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#define CSL_USB_PERI_RXCSR_CLRDATATOG_SHIFT (0x0007u)
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#define CSL_USB_PERI_RXCSR_CLRDATATOG_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_SENTSTALL_MASK (0x0040u)
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#define CSL_USB_PERI_RXCSR_SENTSTALL_SHIFT (0x0006u)
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#define CSL_USB_PERI_RXCSR_SENTSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_SENDSTALL_MASK (0x0020u)
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#define CSL_USB_PERI_RXCSR_SENDSTALL_SHIFT (0x0005u)
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#define CSL_USB_PERI_RXCSR_SENDSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_FLUSHFIFO_MASK (0x0010u)
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#define CSL_USB_PERI_RXCSR_FLUSHFIFO_SHIFT (0x0004u)
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#define CSL_USB_PERI_RXCSR_FLUSHFIFO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_DATAERROR_MASK (0x0008u)
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#define CSL_USB_PERI_RXCSR_DATAERROR_SHIFT (0x0003u)
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#define CSL_USB_PERI_RXCSR_DATAERROR_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_OVERRUN_MASK (0x0004u)
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#define CSL_USB_PERI_RXCSR_OVERRUN_SHIFT (0x0002u)
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#define CSL_USB_PERI_RXCSR_OVERRUN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_FIFOFULL_MASK (0x0002u)
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#define CSL_USB_PERI_RXCSR_FIFOFULL_SHIFT (0x0001u)
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#define CSL_USB_PERI_RXCSR_FIFOFULL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_RXPKTRDY_MASK (0x0001u)
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#define CSL_USB_PERI_RXCSR_RXPKTRDY_SHIFT (0x0000u)
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#define CSL_USB_PERI_RXCSR_RXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_RESETVAL (0x0000u)
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/* RXCOUNT */
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#define CSL_USB_RXCOUNT_EPRXCOUNT_MASK (0x1FFFu)
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#define CSL_USB_RXCOUNT_EPRXCOUNT_SHIFT (0x0000u)
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#define CSL_USB_RXCOUNT_EPRXCOUNT_RESETVAL (0x0000u)
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#define CSL_USB_RXCOUNT_RESETVAL (0x0000u)
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/* TXGCR1 */
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#define CSL_USB_TXGCR1_TX_DEFAULT_QMGR_MASK (0x3000u)
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#define CSL_USB_TXGCR1_TX_DEFAULT_QMGR_SHIFT (0x000Cu)
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#define CSL_USB_TXGCR1_TX_DEFAULT_QMGR_RESETVAL (0x0000u)
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#define CSL_USB_TXGCR1_TX_DEFAULT_QNUM_MASK (0x0FFFu)
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#define CSL_USB_TXGCR1_TX_DEFAULT_QNUM_SHIFT (0x0000u)
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#define CSL_USB_TXGCR1_TX_DEFAULT_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_TXGCR1_RESETVAL (0x0000u)
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/* TXGCR2 */
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#define CSL_USB_TXGCR2_TX_ENABLE_MASK (0x8000u)
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#define CSL_USB_TXGCR2_TX_ENABLE_SHIFT (0x000Fu)
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#define CSL_USB_TXGCR2_TX_ENABLE_RESETVAL (0x0000u)
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/*----TX_ENABLE Tokens----*/
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#define CSL_USB_TXGCR2_TX_ENABLE_DISABLE (0x0000u)
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#define CSL_USB_TXGCR2_TX_ENABLE_ENABLE (0x0001u)
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#define CSL_USB_TXGCR2_TX_TEARDOWN_MASK (0x4000u)
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#define CSL_USB_TXGCR2_TX_TEARDOWN_SHIFT (0x000Eu)
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#define CSL_USB_TXGCR2_TX_TEARDOWN_RESETVAL (0x0000u)
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#define CSL_USB_TXGCR2_RESETVAL (0x0000u)
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/* RXGCR1 */
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#define CSL_USB_RXGCR1_RX_DEFAULTT_RQ_QNUM_MASK (0x0FFFu)
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#define CSL_USB_RXGCR1_RX_DEFAULTT_RQ_QNUM_SHIFT (0x0000u)
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#define CSL_USB_RXGCR1_RX_DEFAULTT_RQ_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_RXGCR1_RESETVAL (0x0000u)
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/* RXGCR2 */
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#define CSL_USB_RXGCR2_RX_ENABLE_MASK (0x8000u)
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#define CSL_USB_RXGCR2_RX_ENABLE_SHIFT (0x000Fu)
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#define CSL_USB_RXGCR2_RX_ENABLE_RESETVAL (0x0000u)
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/*----RX_ENABLE Tokens----*/
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#define CSL_USB_RXGCR2_RX_ENABLE_DISABLE (0x0000u)
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#define CSL_USB_RXGCR2_RX_ENABLE_ENABLE (0x0001u)
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#define CSL_USB_RXGCR2_RX_TEARDOWN_MASK (0x4000u)
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#define CSL_USB_RXGCR2_RX_TEARDOWN_SHIFT (0x000Eu)
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#define CSL_USB_RXGCR2_RX_TEARDOWN_RESETVAL (0x0000u)
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#define CSL_USB_RXGCR2_RX_ERROR_HANDLING_MASK (0x0100u)
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#define CSL_USB_RXGCR2_RX_ERROR_HANDLING_SHIFT (0x0008u)
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#define CSL_USB_RXGCR2_RX_ERROR_HANDLING_RESETVAL (0x0000u)
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/*----RX_ERROR_HANDLING Tokens----*/
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#define CSL_USB_RXGCR2_RX_ERROR_HANDLING_DROPPCKT (0x0000u)
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#define CSL_USB_RXGCR2_RX_ERROR_HANDLING_RETRYPCKT (0x0001u)
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#define CSL_USB_RXGCR2_RX_SOP_OFFSET_MASK (0x00FFu)
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#define CSL_USB_RXGCR2_RX_SOP_OFFSET_SHIFT (0x0000u)
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#define CSL_USB_RXGCR2_RX_SOP_OFFSET_RESETVAL (0x0000u)
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#define CSL_USB_RXGCR2_RESETVAL (0x0000u)
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/* RXHPCR1A */
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#define CSL_USB_RXHPCR1A_RX_HOST_FDQ0_QNUM_MASK (0x0FFFu)
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#define CSL_USB_RXHPCR1A_RX_HOST_FDQ0_QNUM_SHIFT (0x0000u)
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#define CSL_USB_RXHPCR1A_RX_HOST_FDQ0_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_RXHPCR1A_RESETVAL (0x0000u)
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/* RXHPCR2A */
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#define CSL_USB_RXHPCR2A_RX_HOST_FDQ1_QNUM_MASK (0x0FFFu)
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#define CSL_USB_RXHPCR2A_RX_HOST_FDQ1_QNUM_SHIFT (0x0000u)
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#define CSL_USB_RXHPCR2A_RX_HOST_FDQ1_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_RXHPCR2A_RESETVAL (0x0000u)
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/* RXHPCR1B */
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#define CSL_USB_RXHPCR1B_RX_HOST_FDQ2_QNUM_MASK (0x0FFFu)
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#define CSL_USB_RXHPCR1B_RX_HOST_FDQ2_QNUM_SHIFT (0x0000u)
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#define CSL_USB_RXHPCR1B_RX_HOST_FDQ2_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_RXHPCR1B_RESETVAL (0x0000u)
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/* RXHPCR2B */
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#define CSL_USB_RXHPCR2B_RX_HOST_FDQ3_QNUM_MASK (0x0FFFu)
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#define CSL_USB_RXHPCR2B_RX_HOST_FDQ3_QNUM_SHIFT (0x0000u)
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#define CSL_USB_RXHPCR2B_RX_HOST_FDQ3_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_RXHPCR2B_RESETVAL (0x0000u)
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/* ENTRYLSW */
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#define CSL_USB_ENTRYLSW_ENTRY1_RXTX_MASK (0x8000u)
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#define CSL_USB_ENTRYLSW_ENTRY1_RXTX_SHIFT (0x000Fu)
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#define CSL_USB_ENTRYLSW_ENTRY1_RXTX_RESETVAL (0x0000u)
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/*----ENTRY1_RXTX Tokens----*/
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#define CSL_USB_ENTRYLSW_ENTRY1_RXTX_XMTCH (0x0000u)
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#define CSL_USB_ENTRYLSW_ENTRY1_RXTX_RCVCH (0x0001u)
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#define CSL_USB_ENTRYLSW_ENTRY1_CHANNEL_MASK (0x1F00u)
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#define CSL_USB_ENTRYLSW_ENTRY1_CHANNEL_SHIFT (0x0008u)
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#define CSL_USB_ENTRYLSW_ENTRY1_CHANNEL_RESETVAL (0x0000u)
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#define CSL_USB_ENTRYLSW_ENTRY0_RXTX_MASK (0x0080u)
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#define CSL_USB_ENTRYLSW_ENTRY0_RXTX_SHIFT (0x0007u)
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#define CSL_USB_ENTRYLSW_ENTRY0_RXTX_RESETVAL (0x0000u)
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/*----ENTRY0_RXTX Tokens----*/
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#define CSL_USB_ENTRYLSW_ENTRY0_RXTX_XMTCH (0x0000u)
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#define CSL_USB_ENTRYLSW_ENTRY0_RXTX_RCVCH (0x0001u)
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#define CSL_USB_ENTRYLSW_ENTRY0_CHANNEL_MASK (0x001Fu)
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#define CSL_USB_ENTRYLSW_ENTRY0_CHANNEL_SHIFT (0x0000u)
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#define CSL_USB_ENTRYLSW_ENTRY0_CHANNEL_RESETVAL (0x0000u)
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#define CSL_USB_ENTRYLSW_RESETVAL (0x0000u)
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/* ENTRYMSW */
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#define CSL_USB_ENTRYMSW_ENTRY3_RXTX_MASK (0x8000u)
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#define CSL_USB_ENTRYMSW_ENTRY3_RXTX_SHIFT (0x000Fu)
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#define CSL_USB_ENTRYMSW_ENTRY3_RXTX_RESETVAL (0x0000u)
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/*----ENTRY3_RXTX Tokens----*/
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#define CSL_USB_ENTRYMSW_ENTRY3_RXTX_XMTCH (0x0000u)
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#define CSL_USB_ENTRYMSW_ENTRY3_RXTX_RCVCH (0x0001u)
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#define CSL_USB_ENTRYMSW_ENTRY3_CHANNEL_MASK (0x1F00u)
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#define CSL_USB_ENTRYMSW_ENTRY3_CHANNEL_SHIFT (0x0008u)
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#define CSL_USB_ENTRYMSW_ENTRY3_CHANNEL_RESETVAL (0x0000u)
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#define CSL_USB_ENTRYMSW_ENTRY2_RXTX_MASK (0x0080u)
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#define CSL_USB_ENTRYMSW_ENTRY2_RXTX_SHIFT (0x0007u)
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#define CSL_USB_ENTRYMSW_ENTRY2_RXTX_RESETVAL (0x0000u)
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/*----ENTRY2_RXTX Tokens----*/
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#define CSL_USB_ENTRYMSW_ENTRY2_RXTX_XMTCH (0x0000u)
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#define CSL_USB_ENTRYMSW_ENTRY2_RXTX_RCVCH (0x0001u)
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#define CSL_USB_ENTRYMSW_ENTRY2_CHANNEL_MASK (0x001Fu)
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#define CSL_USB_ENTRYMSW_ENTRY2_CHANNEL_SHIFT (0x0000u)
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#define CSL_USB_ENTRYMSW_ENTRY2_CHANNEL_RESETVAL (0x0000u)
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#define CSL_USB_ENTRYMSW_RESETVAL (0x0000u)
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/* QMEMRBASE1 */
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#define CSL_USB_QMEMRBASE1_REG_MASK (0xFFFFu)
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#define CSL_USB_QMEMRBASE1_REG_SHIFT (0x0000u)
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#define CSL_USB_QMEMRBASE1_REG_RESETVAL (0x0000u)
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#define CSL_USB_QMEMRBASE1_RESETVAL (0x0000u)
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/* QMEMRBASE2 */
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#define CSL_USB_QMEMRBASE2_REG_MASK (0xFFFFu)
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#define CSL_USB_QMEMRBASE2_REG_SHIFT (0x0000u)
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#define CSL_USB_QMEMRBASE2_REG_RESETVAL (0x0000u)
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#define CSL_USB_QMEMRBASE2_RESETVAL (0x0000u)
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/* QMEMRCTRL1 */
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_MASK (0x0F00u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SHIFT (0x0008u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RESETVAL (0x0000u)
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/*----DESC_SIZE Tokens----*/
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE32 (0x0000u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE64 (0x0001u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE128 (0x0002u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE256 (0x0003u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE512 (0x0004u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE1K (0x0005u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE2K (0x0006u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE4K (0x0007u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_SIZE8K (0x0008u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RSV1 (0x0009u)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RSV2 (0x000au)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RSV3 (0x000bu)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RSV4 (0x000cu)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RSV5 (0x000du)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RSV6 (0x000eu)
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#define CSL_USB_QMEMRCTRL1_DESC_SIZE_RSV7 (0x000fu)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_MASK (0x0007u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SHIFT (0x0000u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_RESETVAL (0x0000u)
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/*----REG_SIZE Tokens----*/
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE32 (0x0000u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE64 (0x0001u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE128 (0x0002u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE256 (0x0003u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE512 (0x0004u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE1K (0x0005u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE2K (0x0006u)
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#define CSL_USB_QMEMRCTRL1_REG_SIZE_SIZE4K (0x0007u)
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#define CSL_USB_QMEMRCTRL1_RESETVAL (0x0000u)
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/* QMEMRCTRL2 */
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#define CSL_USB_QMEMRCTRL2_START_INDEX_MASK (0x3FFFu)
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#define CSL_USB_QMEMRCTRL2_START_INDEX_SHIFT (0x0000u)
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#define CSL_USB_QMEMRCTRL2_START_INDEX_RESETVAL (0x0000u)
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#define CSL_USB_QMEMRCTRL2_RESETVAL (0x0000u)
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/* CTRL1D */
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|
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#define CSL_USB_CTRL1D_DESC_PTR_MASK (0xFFE0u)
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#define CSL_USB_CTRL1D_DESC_PTR_SHIFT (0x0005u)
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#define CSL_USB_CTRL1D_DESC_PTR_RESETVAL (0x0000u)
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|
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#define CSL_USB_CTRL1D_DESC_SIZE_MASK (0x001Fu)
|
|
#define CSL_USB_CTRL1D_DESC_SIZE_SHIFT (0x0000u)
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#define CSL_USB_CTRL1D_DESC_SIZE_RESETVAL (0x0000u)
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|
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#define CSL_USB_CTRL1D_RESETVAL (0x0000u)
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|
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/* CTRL2D */
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|
|
#define CSL_USB_CTRL2D_DESC_PTR_MASK (0xFFFFu)
|
|
#define CSL_USB_CTRL2D_DESC_PTR_SHIFT (0x0000u)
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|
#define CSL_USB_CTRL2D_DESC_PTR_RESETVAL (0x0000u)
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|
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#define CSL_USB_CTRL2D_RESETVAL (0x0000u)
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/* QSTATA */
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|
|
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|
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#define CSL_USB_QSTATA_QUEUE_ENTRY_COUNT_MASK (0x3FFFu)
|
|
#define CSL_USB_QSTATA_QUEUE_ENTRY_COUNT_SHIFT (0x0000u)
|
|
#define CSL_USB_QSTATA_QUEUE_ENTRY_COUNT_RESETVAL (0x0000u)
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|
|
#define CSL_USB_QSTATA_RESETVAL (0x0000u)
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|
|
/* QSTAT1B */
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|
|
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#define CSL_USB_QSTAT1B_QUEUE_BYTE_COUNT_MASK (0xFFFFu)
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#define CSL_USB_QSTAT1B_QUEUE_BYTE_COUNT_SHIFT (0x0000u)
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#define CSL_USB_QSTAT1B_QUEUE_BYTE_COUNT_RESETVAL (0x0000u)
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#define CSL_USB_QSTAT1B_RESETVAL (0x0000u)
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/* QSTAT2B */
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#define CSL_USB_QSTAT2B_QUEUE_BYTE_COUNT_MASK (0x0FFFu)
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#define CSL_USB_QSTAT2B_QUEUE_BYTE_COUNT_SHIFT (0x0000u)
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#define CSL_USB_QSTAT2B_QUEUE_BYTE_COUNT_RESETVAL (0x0000u)
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#define CSL_USB_QSTAT2B_RESETVAL (0x0000u)
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/* QSTAT1C */
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#define CSL_USB_QSTAT1C_PACKET_SIZE_MASK (0x3FFFu)
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#define CSL_USB_QSTAT1C_PACKET_SIZE_SHIFT (0x0000u)
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#define CSL_USB_QSTAT1C_PACKET_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_QSTAT1C_RESETVAL (0x0000u)
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/* REVID1 */
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#define CSL_USB_REVID1_REVLSB_MASK (0xFFFFu)
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#define CSL_USB_REVID1_REVLSB_SHIFT (0x0000u)
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#define CSL_USB_REVID1_REVLSB_RESETVAL (0x0800u)
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#define CSL_USB_REVID1_RESETVAL (0x0800u)
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/* REVID2 */
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#define CSL_USB_REVID2_REVMSB_MASK (0xFFFFu)
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#define CSL_USB_REVID2_REVMSB_SHIFT (0x0000u)
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#define CSL_USB_REVID2_REVMSB_RESETVAL (0x4EA1u)
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#define CSL_USB_REVID2_RESETVAL (0x4EA1u)
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/* CTRLR */
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#define CSL_USB_CTRLR_RNDIS_MASK (0x0010u)
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#define CSL_USB_CTRLR_RNDIS_SHIFT (0x0004u)
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#define CSL_USB_CTRLR_RNDIS_RESETVAL (0x0000u)
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/*----RNDIS Tokens----*/
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#define CSL_USB_CTRLR_RNDIS_DISABLED (0x0000u)
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#define CSL_USB_CTRLR_RNDIS_ENABLED (0x0001u)
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#define CSL_USB_CTRLR_UINT_MASK (0x0008u)
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#define CSL_USB_CTRLR_UINT_SHIFT (0x0003u)
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#define CSL_USB_CTRLR_UINT_RESETVAL (0x0000u)
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/*----UINT Tokens----*/
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#define CSL_USB_CTRLR_UINT_DISABLED (0x0000u)
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#define CSL_USB_CTRLR_UINT_ENABLED (0x0001u)
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#define CSL_USB_CTRLR_CLKFACK_MASK (0x0002u)
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#define CSL_USB_CTRLR_CLKFACK_SHIFT (0x0001u)
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#define CSL_USB_CTRLR_CLKFACK_RESETVAL (0x0000u)
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/*----CLKFACK Tokens----*/
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#define CSL_USB_CTRLR_CLKFACK_DISABLED (0x0000u)
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#define CSL_USB_CTRLR_CLKFACK_ENABLED (0x0001u)
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#define CSL_USB_CTRLR_RESET_MASK (0x0001u)
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#define CSL_USB_CTRLR_RESET_SHIFT (0x0000u)
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#define CSL_USB_CTRLR_RESET_RESETVAL (0x0000u)
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/*----RESET Tokens----*/
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#define CSL_USB_CTRLR_RESET_NONE (0x0000u)
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#define CSL_USB_CTRLR_RESET_START (0x0001u)
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#define CSL_USB_CTRLR_RESETVAL (0x0000u)
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/* STATR */
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#define CSL_USB_STATR_DRVVBUS_MASK (0x0001u)
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#define CSL_USB_STATR_DRVVBUS_SHIFT (0x0000u)
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#define CSL_USB_STATR_DRVVBUS_RESETVAL (0x0000u)
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/*----DRVVBUS Tokens----*/
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#define CSL_USB_STATR_DRVVBUS_LOGIC0 (0x0000u)
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#define CSL_USB_STATR_DRVVBUS_LOGIC1 (0x0001u)
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#define CSL_USB_STATR_RESETVAL (0x0000u)
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/* EMUR */
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#define CSL_USB_EMUR_RTSEL_MASK (0x0004u)
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#define CSL_USB_EMUR_RTSEL_SHIFT (0x0002u)
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#define CSL_USB_EMUR_RTSEL_RESETVAL (0x0000u)
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/*----RTSEL Tokens----*/
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#define CSL_USB_EMUR_RTSEL_ENABLE (0x0000u)
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#define CSL_USB_EMUR_RTSEL_NOEFFECT (0x0001u)
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#define CSL_USB_EMUR_SOFT_MASK (0x0002u)
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#define CSL_USB_EMUR_SOFT_SHIFT (0x0001u)
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#define CSL_USB_EMUR_SOFT_RESETVAL (0x0001u)
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/*----SOFT Tokens----*/
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#define CSL_USB_EMUR_SOFT_NOEFFECT (0x0000u)
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#define CSL_USB_EMUR_SOFT_ENABLE (0x0001u)
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#define CSL_USB_EMUR_FREERUN_MASK (0x0001u)
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#define CSL_USB_EMUR_FREERUN_SHIFT (0x0000u)
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#define CSL_USB_EMUR_FREERUN_RESETVAL (0x0001u)
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/*----FREERUN Tokens----*/
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#define CSL_USB_EMUR_FREERUN_NOEFFECT (0x0000u)
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#define CSL_USB_EMUR_FREERUN_ENABLE (0x0001u)
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#define CSL_USB_EMUR_RESETVAL (0x0003u)
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/* MODE1 */
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#define CSL_USB_MODE1_TX4MODE_MASK (0x3000u)
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#define CSL_USB_MODE1_TX4MODE_SHIFT (0x000Cu)
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#define CSL_USB_MODE1_TX4MODE_RESETVAL (0x0000u)
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/*----TX4MODE Tokens----*/
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#define CSL_USB_MODE1_TX4MODE_TRANS (0x0000u)
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#define CSL_USB_MODE1_TX4MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE1_TX4MODE_CDC (0x0002u)
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#define CSL_USB_MODE1_TX4MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE1_TX3MODE_MASK (0x0300u)
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#define CSL_USB_MODE1_TX3MODE_SHIFT (0x0008u)
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#define CSL_USB_MODE1_TX3MODE_RESETVAL (0x0000u)
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/*----TX3MODE Tokens----*/
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#define CSL_USB_MODE1_TX3MODE_TRANS (0x0000u)
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#define CSL_USB_MODE1_TX3MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE1_TX3MODE_CDC (0x0002u)
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#define CSL_USB_MODE1_TX3MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE1_TX2MODE_MASK (0x0030u)
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#define CSL_USB_MODE1_TX2MODE_SHIFT (0x0004u)
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#define CSL_USB_MODE1_TX2MODE_RESETVAL (0x0000u)
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/*----TX2MODE Tokens----*/
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#define CSL_USB_MODE1_TX2MODE_TRANS (0x0000u)
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#define CSL_USB_MODE1_TX2MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE1_TX2MODE_CDC (0x0002u)
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#define CSL_USB_MODE1_TX2MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE1_TX1MODE_MASK (0x0003u)
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#define CSL_USB_MODE1_TX1MODE_SHIFT (0x0000u)
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#define CSL_USB_MODE1_TX1MODE_RESETVAL (0x0000u)
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/*----TX1MODE Tokens----*/
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#define CSL_USB_MODE1_TX1MODE_TRANS (0x0000u)
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#define CSL_USB_MODE1_TX1MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE1_TX1MODE_CDC (0x0002u)
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#define CSL_USB_MODE1_TX1MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE1_RESETVAL (0x0000u)
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/* MODE2 */
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#define CSL_USB_MODE2_RX4MODE_MASK (0x3000u)
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#define CSL_USB_MODE2_RX4MODE_SHIFT (0x000Cu)
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#define CSL_USB_MODE2_RX4MODE_RESETVAL (0x0000u)
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/*----RX4MODE Tokens----*/
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#define CSL_USB_MODE2_RX4MODE_TRANS (0x0000u)
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#define CSL_USB_MODE2_RX4MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE2_RX4MODE_CDC (0x0002u)
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#define CSL_USB_MODE2_RX4MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE2_RX3MODE_MASK (0x0300u)
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#define CSL_USB_MODE2_RX3MODE_SHIFT (0x0008u)
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#define CSL_USB_MODE2_RX3MODE_RESETVAL (0x0000u)
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/*----RX3MODE Tokens----*/
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#define CSL_USB_MODE2_RX3MODE_TRANS (0x0000u)
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#define CSL_USB_MODE2_RX3MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE2_RX3MODE_CDC (0x0002u)
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#define CSL_USB_MODE2_RX3MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE2_RX2MODE_MASK (0x0030u)
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#define CSL_USB_MODE2_RX2MODE_SHIFT (0x0004u)
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#define CSL_USB_MODE2_RX2MODE_RESETVAL (0x0000u)
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/*----RX2MODE Tokens----*/
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#define CSL_USB_MODE2_RX2MODE_TRANS (0x0000u)
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#define CSL_USB_MODE2_RX2MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE2_RX2MODE_CDC (0x0002u)
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#define CSL_USB_MODE2_RX2MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE2_RX1MODE_MASK (0x0003u)
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#define CSL_USB_MODE2_RX1MODE_SHIFT (0x0000u)
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#define CSL_USB_MODE2_RX1MODE_RESETVAL (0x0000u)
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/*----RX1MODE Tokens----*/
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#define CSL_USB_MODE2_RX1MODE_TRANS (0x0000u)
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#define CSL_USB_MODE2_RX1MODE_RNDIS (0x0001u)
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#define CSL_USB_MODE2_RX1MODE_CDC (0x0002u)
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#define CSL_USB_MODE2_RX1MODE_GENRNDIS (0x0003u)
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#define CSL_USB_MODE2_RESETVAL (0x0000u)
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/* AUTOREQ */
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#define CSL_USB_AUTOREQ_RX4_AUTOREQ_MASK (0x00C0u)
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#define CSL_USB_AUTOREQ_RX4_AUTOREQ_SHIFT (0x0006u)
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#define CSL_USB_AUTOREQ_RX4_AUTOREQ_RESETVAL (0x0000u)
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/*----RX4_AUTOREQ Tokens----*/
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#define CSL_USB_AUTOREQ_RX4_AUTOREQ_NOAUTO (0x0000u)
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#define CSL_USB_AUTOREQ_RX4_AUTOREQ_AUTO (0x0001u)
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#define CSL_USB_AUTOREQ_RX4_AUTOREQ_RSV (0x0002u)
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#define CSL_USB_AUTOREQ_RX4_AUTOREQ_AUTOALWYS (0x0003u)
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#define CSL_USB_AUTOREQ_RX3_AUTOREQ_MASK (0x0030u)
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#define CSL_USB_AUTOREQ_RX3_AUTOREQ_SHIFT (0x0004u)
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#define CSL_USB_AUTOREQ_RX3_AUTOREQ_RESETVAL (0x0000u)
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/*----RX3_AUTOREQ Tokens----*/
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#define CSL_USB_AUTOREQ_RX3_AUTOREQ_NOAUTO (0x0000u)
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#define CSL_USB_AUTOREQ_RX3_AUTOREQ_AUTO (0x0001u)
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#define CSL_USB_AUTOREQ_RX3_AUTOREQ_RSV (0x0002u)
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#define CSL_USB_AUTOREQ_RX3_AUTOREQ_AUTOALWYS (0x0003u)
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#define CSL_USB_AUTOREQ_RX2_AUTOREQ_MASK (0x000Cu)
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#define CSL_USB_AUTOREQ_RX2_AUTOREQ_SHIFT (0x0002u)
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#define CSL_USB_AUTOREQ_RX2_AUTOREQ_RESETVAL (0x0000u)
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/*----RX2_AUTOREQ Tokens----*/
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#define CSL_USB_AUTOREQ_RX2_AUTOREQ_NOAUTO (0x0000u)
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#define CSL_USB_AUTOREQ_RX2_AUTOREQ_AUTO (0x0001u)
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#define CSL_USB_AUTOREQ_RX2_AUTOREQ_RSV (0x0002u)
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#define CSL_USB_AUTOREQ_RX2_AUTOREQ_AUTOALWYS (0x0003u)
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#define CSL_USB_AUTOREQ_RX1_AUTOREQ_MASK (0x0003u)
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#define CSL_USB_AUTOREQ_RX1_AUTOREQ_SHIFT (0x0000u)
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#define CSL_USB_AUTOREQ_RX1_AUTOREQ_RESETVAL (0x0000u)
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/*----RX1_AUTOREQ Tokens----*/
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#define CSL_USB_AUTOREQ_RX1_AUTOREQ_NOAUTO (0x0000u)
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#define CSL_USB_AUTOREQ_RX1_AUTOREQ_AUTO (0x0001u)
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#define CSL_USB_AUTOREQ_RX1_AUTOREQ_RSV (0x0002u)
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#define CSL_USB_AUTOREQ_RX1_AUTOREQ_AUTOALWYS (0x0003u)
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#define CSL_USB_AUTOREQ_RESETVAL (0x0000u)
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/* SPRFIXTIME1 */
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#define CSL_USB_SPRFIXTIME1_SRPFIXTIME_MASK (0xFFFFu)
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#define CSL_USB_SPRFIXTIME1_SRPFIXTIME_SHIFT (0x0000u)
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#define CSL_USB_SPRFIXTIME1_SRPFIXTIME_RESETVAL (0xDE80u)
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#define CSL_USB_SPRFIXTIME1_RESETVAL (0xDE80u)
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/* SPRFIXTIME2 */
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#define CSL_USB_SPRFIXTIME2_SRPFIXTIME_MASK (0xFFFFu)
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#define CSL_USB_SPRFIXTIME2_SRPFIXTIME_SHIFT (0x0000u)
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#define CSL_USB_SPRFIXTIME2_SRPFIXTIME_RESETVAL (0x0280u)
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#define CSL_USB_SPRFIXTIME2_RESETVAL (0x0280u)
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/* TEARDOWN1 */
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#define CSL_USB_TEARDOWN1_RX_TDOWN_MASK (0x001Eu)
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#define CSL_USB_TEARDOWN1_RX_TDOWN_SHIFT (0x0001u)
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#define CSL_USB_TEARDOWN1_RX_TDOWN_RESETVAL (0x0000u)
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/*----RX_TDOWN Tokens----*/
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#define CSL_USB_TEARDOWN1_RX_TDOWN_DISABLE (0x0000u)
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#define CSL_USB_TEARDOWN1_RX_TDOWN_ENABLE (0x0001u)
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#define CSL_USB_TEARDOWN1_RESETVAL (0x0000u)
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/* TEARDOWN2 */
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#define CSL_USB_TEARDOWN2_TX_TDOWN_MASK (0x001Eu)
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#define CSL_USB_TEARDOWN2_TX_TDOWN_SHIFT (0x0001u)
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#define CSL_USB_TEARDOWN2_TX_TDOWN_RESETVAL (0x0000u)
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/*----TX_TDOWN Tokens----*/
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#define CSL_USB_TEARDOWN2_TX_TDOWN_DISABLE (0x0000u)
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#define CSL_USB_TEARDOWN2_TX_TDOWN_ENABLE (0x0001u)
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#define CSL_USB_TEARDOWN2_RESETVAL (0x0000u)
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/* INTSRCR1 */
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#define CSL_USB_INTSRCR1_RX_MASK (0x1E00u)
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#define CSL_USB_INTSRCR1_RX_SHIFT (0x0009u)
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#define CSL_USB_INTSRCR1_RX_RESETVAL (0x0000u)
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#define CSL_USB_INTSRCR1_TX_MASK (0x001Fu)
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#define CSL_USB_INTSRCR1_TX_SHIFT (0x0000u)
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#define CSL_USB_INTSRCR1_TX_RESETVAL (0x0000u)
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#define CSL_USB_INTSRCR1_RESETVAL (0x0000u)
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/* INTSRCR2 */
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#define CSL_USB_INTSRCR2_USB_MASK (0x01FFu)
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#define CSL_USB_INTSRCR2_USB_SHIFT (0x0000u)
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#define CSL_USB_INTSRCR2_USB_RESETVAL (0x0000u)
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#define CSL_USB_INTSRCR2_RESETVAL (0x0000u)
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/* INTSETR1 */
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#define CSL_USB_INTSETR1_RX_MASK (0x1F00u)
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#define CSL_USB_INTSETR1_RX_SHIFT (0x0008u)
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#define CSL_USB_INTSETR1_RX_RESETVAL (0x0000u)
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#define CSL_USB_INTSETR1_TX_MASK (0x001Fu)
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#define CSL_USB_INTSETR1_TX_SHIFT (0x0000u)
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#define CSL_USB_INTSETR1_TX_RESETVAL (0x0000u)
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#define CSL_USB_INTSETR1_RESETVAL (0x0000u)
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/* INTSETR2 */
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#define CSL_USB_INTSETR2_USB_MASK (0x01FFu)
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#define CSL_USB_INTSETR2_USB_SHIFT (0x0000u)
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#define CSL_USB_INTSETR2_USB_RESETVAL (0x0000u)
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#define CSL_USB_INTSETR2_RESETVAL (0x0000u)
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/* INTCLRR1 */
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#define CSL_USB_INTCLRR1_RX_MASK (0x1F00u)
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#define CSL_USB_INTCLRR1_RX_SHIFT (0x0008u)
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#define CSL_USB_INTCLRR1_RX_RESETVAL (0x0000u)
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#define CSL_USB_INTCLRR1_TX_MASK (0x001Fu)
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#define CSL_USB_INTCLRR1_TX_SHIFT (0x0000u)
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#define CSL_USB_INTCLRR1_TX_RESETVAL (0x0000u)
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#define CSL_USB_INTCLRR1_RESETVAL (0x0000u)
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/* INTCLRR2 */
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#define CSL_USB_INTCLRR2_USB_MASK (0x01FFu)
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#define CSL_USB_INTCLRR2_USB_SHIFT (0x0000u)
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#define CSL_USB_INTCLRR2_USB_RESETVAL (0x0000u)
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#define CSL_USB_INTCLRR2_RESETVAL (0x0000u)
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/* INTMSKR1 */
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#define CSL_USB_INTMSKR1_RX_MASK (0x1F00u)
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#define CSL_USB_INTMSKR1_RX_SHIFT (0x0008u)
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#define CSL_USB_INTMSKR1_RX_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKR1_TX_MASK (0x001Fu)
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#define CSL_USB_INTMSKR1_TX_SHIFT (0x0000u)
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#define CSL_USB_INTMSKR1_TX_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKR1_RESETVAL (0x0000u)
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/* INTMSKR2 */
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#define CSL_USB_INTMSKR2_USB_MASK (0x01FFu)
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#define CSL_USB_INTMSKR2_USB_SHIFT (0x0000u)
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#define CSL_USB_INTMSKR2_USB_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKR2_RESETVAL (0x0000u)
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/* INTMSKSETR1 */
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#define CSL_USB_INTMSKSETR1_RX_MASK (0x1F00u)
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#define CSL_USB_INTMSKSETR1_RX_SHIFT (0x0008u)
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#define CSL_USB_INTMSKSETR1_RX_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKSETR1_TX_MASK (0x001Fu)
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#define CSL_USB_INTMSKSETR1_TX_SHIFT (0x0000u)
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#define CSL_USB_INTMSKSETR1_TX_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKSETR1_RESETVAL (0x0000u)
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/* INTMSKSETR2 */
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#define CSL_USB_INTMSKSETR2_USB_MASK (0x01FFu)
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#define CSL_USB_INTMSKSETR2_USB_SHIFT (0x0000u)
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#define CSL_USB_INTMSKSETR2_USB_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKSETR2_RESETVAL (0x0000u)
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/* INTMSKCLRR1 */
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#define CSL_USB_INTMSKCLRR1_RX_MASK (0x1F00u)
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#define CSL_USB_INTMSKCLRR1_RX_SHIFT (0x0008u)
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#define CSL_USB_INTMSKCLRR1_RX_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKCLRR1_TX_MASK (0x001Fu)
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#define CSL_USB_INTMSKCLRR1_TX_SHIFT (0x0000u)
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#define CSL_USB_INTMSKCLRR1_TX_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKCLRR1_RESETVAL (0x0000u)
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/* INTMSKCLRR2 */
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#define CSL_USB_INTMSKCLRR2_USB_MASK (0x01FFu)
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#define CSL_USB_INTMSKCLRR2_USB_SHIFT (0x0000u)
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#define CSL_USB_INTMSKCLRR2_USB_RESETVAL (0x0000u)
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#define CSL_USB_INTMSKCLRR2_RESETVAL (0x0000u)
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/* INTMASKEDR1 */
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#define CSL_USB_INTMASKEDR1_RX_MASK (0x1F00u)
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#define CSL_USB_INTMASKEDR1_RX_SHIFT (0x0008u)
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#define CSL_USB_INTMASKEDR1_RX_RESETVAL (0x0000u)
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#define CSL_USB_INTMASKEDR1_TX_MASK (0x001Fu)
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#define CSL_USB_INTMASKEDR1_TX_SHIFT (0x0000u)
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#define CSL_USB_INTMASKEDR1_TX_RESETVAL (0x0000u)
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#define CSL_USB_INTMASKEDR1_RESETVAL (0x0000u)
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/* INTMASKEDR2 */
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#define CSL_USB_INTMASKEDR2_USB_MASK (0x01FFu)
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#define CSL_USB_INTMASKEDR2_USB_SHIFT (0x0000u)
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#define CSL_USB_INTMASKEDR2_USB_RESETVAL (0x0000u)
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#define CSL_USB_INTMASKEDR2_RESETVAL (0x0000u)
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/* EOIR */
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#define CSL_USB_EOIR_EOI_VECTOR_MASK (0x00FFu)
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#define CSL_USB_EOIR_EOI_VECTOR_SHIFT (0x0000u)
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#define CSL_USB_EOIR_EOI_VECTOR_RESETVAL (0x0000u)
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#define CSL_USB_EOIR_RESETVAL (0x0000u)
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/* INTVECTR1 */
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#define CSL_USB_INTVECTR1_VECTOR_MASK (0xFFFFu)
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#define CSL_USB_INTVECTR1_VECTOR_SHIFT (0x0000u)
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#define CSL_USB_INTVECTR1_VECTOR_RESETVAL (0x0000u)
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#define CSL_USB_INTVECTR1_RESETVAL (0x0000u)
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/* INTVECTR2 */
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#define CSL_USB_INTVECTR2_VECTOR_MASK (0xFFFFu)
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#define CSL_USB_INTVECTR2_VECTOR_SHIFT (0x0000u)
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#define CSL_USB_INTVECTR2_VECTOR_RESETVAL (0x0000u)
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#define CSL_USB_INTVECTR2_RESETVAL (0x0000u)
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/* GREP1SZR1 */
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#define CSL_USB_GREP1SZR1_SIZE_MASK (0xFFFFu)
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#define CSL_USB_GREP1SZR1_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP1SZR1_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP1SZR1_RESETVAL (0x0000u)
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/* GREP1SZR2 */
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#define CSL_USB_GREP1SZR2_SIZE_MASK (0x0001u)
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#define CSL_USB_GREP1SZR2_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP1SZR2_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP1SZR2_RESETVAL (0x0000u)
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/* GREP2SZR1 */
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#define CSL_USB_GREP2SZR1_SIZE_MASK (0xFFFFu)
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#define CSL_USB_GREP2SZR1_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP2SZR1_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP2SZR1_RESETVAL (0x0000u)
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/* GREP2SZR2 */
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#define CSL_USB_GREP2SZR2_SIZE_MASK (0x0001u)
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#define CSL_USB_GREP2SZR2_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP2SZR2_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP2SZR2_RESETVAL (0x0000u)
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/* GREP3SZR1 */
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#define CSL_USB_GREP3SZR1_SIZE_MASK (0xFFFFu)
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#define CSL_USB_GREP3SZR1_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP3SZR1_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP3SZR1_RESETVAL (0x0000u)
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/* GREP3SZR2 */
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#define CSL_USB_GREP3SZR2_SIZE_MASK (0x0001u)
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#define CSL_USB_GREP3SZR2_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP3SZR2_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP3SZR2_RESETVAL (0x0000u)
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/* GREP4SZR1 */
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#define CSL_USB_GREP4SZR1_SIZE_MASK (0xFFFFu)
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#define CSL_USB_GREP4SZR1_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP4SZR1_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP4SZR1_RESETVAL (0x0000u)
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/* GREP4SZR2 */
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#define CSL_USB_GREP4SZR2_SIZE_MASK (0x0001u)
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#define CSL_USB_GREP4SZR2_SIZE_SHIFT (0x0000u)
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#define CSL_USB_GREP4SZR2_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_GREP4SZR2_RESETVAL (0x0000u)
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/* FADDR_POWER */
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#define CSL_USB_FADDR_POWER_ISOUPDATE_MASK (0x8000u)
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#define CSL_USB_FADDR_POWER_ISOUPDATE_SHIFT (0x000Fu)
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#define CSL_USB_FADDR_POWER_ISOUPDATE_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_SOFTCONN_MASK (0x4000u)
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#define CSL_USB_FADDR_POWER_SOFTCONN_SHIFT (0x000Eu)
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#define CSL_USB_FADDR_POWER_SOFTCONN_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_HSEN_MASK (0x2000u)
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#define CSL_USB_FADDR_POWER_HSEN_SHIFT (0x000Du)
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#define CSL_USB_FADDR_POWER_HSEN_RESETVAL (0x0001u)
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#define CSL_USB_FADDR_POWER_HSMODE_MASK (0x1000u)
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#define CSL_USB_FADDR_POWER_HSMODE_SHIFT (0x000Cu)
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#define CSL_USB_FADDR_POWER_HSMODE_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_RESET_MASK (0x0800u)
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#define CSL_USB_FADDR_POWER_RESET_SHIFT (0x000Bu)
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#define CSL_USB_FADDR_POWER_RESET_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_RESUME_MASK (0x0400u)
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#define CSL_USB_FADDR_POWER_RESUME_SHIFT (0x000Au)
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#define CSL_USB_FADDR_POWER_RESUME_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_SUSPENDM_MASK (0x0200u)
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#define CSL_USB_FADDR_POWER_SUSPENDM_SHIFT (0x0009u)
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#define CSL_USB_FADDR_POWER_SUSPENDM_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_ENSUSPM_MASK (0x0100u)
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#define CSL_USB_FADDR_POWER_ENSUSPM_SHIFT (0x0008u)
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#define CSL_USB_FADDR_POWER_ENSUSPM_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_FUNCADDR_MASK (0x007Fu)
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#define CSL_USB_FADDR_POWER_FUNCADDR_SHIFT (0x0000u)
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#define CSL_USB_FADDR_POWER_FUNCADDR_RESETVAL (0x0000u)
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#define CSL_USB_FADDR_POWER_RESETVAL (0x2000u)
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/* INTRTX */
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#define CSL_USB_INTRTX_EP4TX_MASK (0x0010u)
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#define CSL_USB_INTRTX_EP4TX_SHIFT (0x0004u)
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#define CSL_USB_INTRTX_EP4TX_RESETVAL (0x0000u)
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#define CSL_USB_INTRTX_EP3TX_MASK (0x0008u)
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#define CSL_USB_INTRTX_EP3TX_SHIFT (0x0003u)
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#define CSL_USB_INTRTX_EP3TX_RESETVAL (0x0000u)
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#define CSL_USB_INTRTX_EP2TX_MASK (0x0004u)
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#define CSL_USB_INTRTX_EP2TX_SHIFT (0x0002u)
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#define CSL_USB_INTRTX_EP2TX_RESETVAL (0x0000u)
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#define CSL_USB_INTRTX_EP1TX_MASK (0x0002u)
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#define CSL_USB_INTRTX_EP1TX_SHIFT (0x0001u)
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#define CSL_USB_INTRTX_EP1TX_RESETVAL (0x0000u)
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#define CSL_USB_INTRTX_EP0_MASK (0x0001u)
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#define CSL_USB_INTRTX_EP0_SHIFT (0x0000u)
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#define CSL_USB_INTRTX_EP0_RESETVAL (0x0000u)
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#define CSL_USB_INTRTX_RESETVAL (0x0000u)
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/* INTRRX */
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#define CSL_USB_INTRRX_EP4RX_MASK (0x0010u)
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#define CSL_USB_INTRRX_EP4RX_SHIFT (0x0004u)
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#define CSL_USB_INTRRX_EP4RX_RESETVAL (0x0000u)
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#define CSL_USB_INTRRX_EP3RX_MASK (0x0008u)
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#define CSL_USB_INTRRX_EP3RX_SHIFT (0x0003u)
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#define CSL_USB_INTRRX_EP3RX_RESETVAL (0x0000u)
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#define CSL_USB_INTRRX_EP2RX_MASK (0x0004u)
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#define CSL_USB_INTRRX_EP2RX_SHIFT (0x0002u)
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#define CSL_USB_INTRRX_EP2RX_RESETVAL (0x0000u)
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#define CSL_USB_INTRRX_EP1RX_MASK (0x0002u)
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#define CSL_USB_INTRRX_EP1RX_SHIFT (0x0001u)
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#define CSL_USB_INTRRX_EP1RX_RESETVAL (0x0000u)
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#define CSL_USB_INTRRX_RESETVAL (0x0000u)
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/* INTRTXE */
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#define CSL_USB_INTRTXE_EP4TX_MASK (0x0010u)
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#define CSL_USB_INTRTXE_EP4TX_SHIFT (0x0004u)
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#define CSL_USB_INTRTXE_EP4TX_RESETVAL (0x0001u)
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#define CSL_USB_INTRTXE_EP3TX_MASK (0x0008u)
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#define CSL_USB_INTRTXE_EP3TX_SHIFT (0x0003u)
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#define CSL_USB_INTRTXE_EP3TX_RESETVAL (0x0001u)
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#define CSL_USB_INTRTXE_EP2TX_MASK (0x0004u)
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#define CSL_USB_INTRTXE_EP2TX_SHIFT (0x0002u)
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#define CSL_USB_INTRTXE_EP2TX_RESETVAL (0x0001u)
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#define CSL_USB_INTRTXE_EP1TX_MASK (0x0002u)
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#define CSL_USB_INTRTXE_EP1TX_SHIFT (0x0001u)
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#define CSL_USB_INTRTXE_EP1TX_RESETVAL (0x0001u)
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#define CSL_USB_INTRTXE_EP0_MASK (0x0001u)
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#define CSL_USB_INTRTXE_EP0_SHIFT (0x0000u)
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#define CSL_USB_INTRTXE_EP0_RESETVAL (0x0001u)
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#define CSL_USB_INTRTXE_RESETVAL (0x001Fu)
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/* INTRRXE */
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#define CSL_USB_INTRRXE_EP4RX_MASK (0x0010u)
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#define CSL_USB_INTRRXE_EP4RX_SHIFT (0x0004u)
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#define CSL_USB_INTRRXE_EP4RX_RESETVAL (0x0001u)
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#define CSL_USB_INTRRXE_EP3RX_MASK (0x0008u)
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#define CSL_USB_INTRRXE_EP3RX_SHIFT (0x0003u)
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#define CSL_USB_INTRRXE_EP3RX_RESETVAL (0x0001u)
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#define CSL_USB_INTRRXE_EP2RX_MASK (0x0004u)
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#define CSL_USB_INTRRXE_EP2RX_SHIFT (0x0002u)
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#define CSL_USB_INTRRXE_EP2RX_RESETVAL (0x0001u)
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#define CSL_USB_INTRRXE_EP1RX_MASK (0x0002u)
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#define CSL_USB_INTRRXE_EP1RX_SHIFT (0x0001u)
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#define CSL_USB_INTRRXE_EP1RX_RESETVAL (0x0001u)
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#define CSL_USB_INTRRXE_RESETVAL (0x001Eu)
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/* INTRUSB_INTRUSBE */
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#define CSL_USB_INTRUSB_INTRUSBE_VBUSERR_E_MASK (0x8000u)
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#define CSL_USB_INTRUSB_INTRUSBE_VBUSERR_E_SHIFT (0x000Fu)
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#define CSL_USB_INTRUSB_INTRUSBE_VBUSERR_E_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_SESSREQ_E_MASK (0x4000u)
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#define CSL_USB_INTRUSB_INTRUSBE_SESSREQ_E_SHIFT (0x000Eu)
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#define CSL_USB_INTRUSB_INTRUSBE_SESSREQ_E_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_DISCON_E_MASK (0x2000u)
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#define CSL_USB_INTRUSB_INTRUSBE_DISCON_E_SHIFT (0x000Du)
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#define CSL_USB_INTRUSB_INTRUSBE_DISCON_E_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_CONN_E_MASK (0x1000u)
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#define CSL_USB_INTRUSB_INTRUSBE_CONN_E_SHIFT (0x000Cu)
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#define CSL_USB_INTRUSB_INTRUSBE_CONN_E_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_SOF_E_MASK (0x0800u)
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#define CSL_USB_INTRUSB_INTRUSBE_SOF_E_SHIFT (0x000Bu)
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#define CSL_USB_INTRUSB_INTRUSBE_SOF_E_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESET_BABBLE_E_MASK (0x0400u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESET_BABBLE_E_SHIFT (0x000Au)
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#define CSL_USB_INTRUSB_INTRUSBE_RESET_BABBLE_E_RESETVAL (0x0001u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESUME_E_MASK (0x0200u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESUME_E_SHIFT (0x0009u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESUME_E_RESETVAL (0x0001u)
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#define CSL_USB_INTRUSB_INTRUSBE_SUSPEND_E_MASK (0x0100u)
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#define CSL_USB_INTRUSB_INTRUSBE_SUSPEND_E_SHIFT (0x0008u)
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#define CSL_USB_INTRUSB_INTRUSBE_SUSPEND_E_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_VBUSERR_MASK (0x0080u)
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#define CSL_USB_INTRUSB_INTRUSBE_VBUSERR_SHIFT (0x0007u)
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#define CSL_USB_INTRUSB_INTRUSBE_VBUSERR_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_SESSREQ_MASK (0x0040u)
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#define CSL_USB_INTRUSB_INTRUSBE_SESSREQ_SHIFT (0x0006u)
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#define CSL_USB_INTRUSB_INTRUSBE_SESSREQ_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_DISCON_MASK (0x0020u)
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#define CSL_USB_INTRUSB_INTRUSBE_DISCON_SHIFT (0x0005u)
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#define CSL_USB_INTRUSB_INTRUSBE_DISCON_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_CONN_MASK (0x0010u)
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#define CSL_USB_INTRUSB_INTRUSBE_CONN_SHIFT (0x0004u)
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#define CSL_USB_INTRUSB_INTRUSBE_CONN_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_SOF_MASK (0x0008u)
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#define CSL_USB_INTRUSB_INTRUSBE_SOF_SHIFT (0x0003u)
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#define CSL_USB_INTRUSB_INTRUSBE_SOF_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESET_BABBLE_MASK (0x0004u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESET_BABBLE_SHIFT (0x0002u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESET_BABBLE_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESUME_MASK (0x0002u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESUME_SHIFT (0x0001u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESUME_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_SUSPEND_MASK (0x0001u)
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#define CSL_USB_INTRUSB_INTRUSBE_SUSPEND_SHIFT (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_SUSPEND_RESETVAL (0x0000u)
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#define CSL_USB_INTRUSB_INTRUSBE_RESETVAL (0x0600u)
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/* FRAME */
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#define CSL_USB_FRAME_FRAMENUMBER_MASK (0x07FFu)
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#define CSL_USB_FRAME_FRAMENUMBER_SHIFT (0x0000u)
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#define CSL_USB_FRAME_FRAMENUMBER_RESETVAL (0x0000u)
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#define CSL_USB_FRAME_RESETVAL (0x0000u)
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/* INDEX_TESTMODE */
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#define CSL_USB_INDEX_TESTMODE_FORCE_HOST_MASK (0x8000u)
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#define CSL_USB_INDEX_TESTMODE_FORCE_HOST_SHIFT (0x000Fu)
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#define CSL_USB_INDEX_TESTMODE_FORCE_HOST_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_FIFO_ACCESS_MASK (0x4000u)
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#define CSL_USB_INDEX_TESTMODE_FIFO_ACCESS_SHIFT (0x000Eu)
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#define CSL_USB_INDEX_TESTMODE_FIFO_ACCESS_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_FORCE_FS_MASK (0x2000u)
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#define CSL_USB_INDEX_TESTMODE_FORCE_FS_SHIFT (0x000Du)
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#define CSL_USB_INDEX_TESTMODE_FORCE_FS_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_FORCE_HS_MASK (0x1000u)
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#define CSL_USB_INDEX_TESTMODE_FORCE_HS_SHIFT (0x000Cu)
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#define CSL_USB_INDEX_TESTMODE_FORCE_HS_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_TEST_PACKET_MASK (0x0800u)
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#define CSL_USB_INDEX_TESTMODE_TEST_PACKET_SHIFT (0x000Bu)
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#define CSL_USB_INDEX_TESTMODE_TEST_PACKET_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_TEST_K_MASK (0x0400u)
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#define CSL_USB_INDEX_TESTMODE_TEST_K_SHIFT (0x000Au)
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#define CSL_USB_INDEX_TESTMODE_TEST_K_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_TEST_J_MASK (0x0200u)
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#define CSL_USB_INDEX_TESTMODE_TEST_J_SHIFT (0x0009u)
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#define CSL_USB_INDEX_TESTMODE_TEST_J_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_TEST_SE0_NAK_MASK (0x0100u)
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#define CSL_USB_INDEX_TESTMODE_TEST_SE0_NAK_SHIFT (0x0008u)
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#define CSL_USB_INDEX_TESTMODE_TEST_SE0_NAK_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_EPSEL_MASK (0x000Fu)
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#define CSL_USB_INDEX_TESTMODE_EPSEL_SHIFT (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_EPSEL_RESETVAL (0x0000u)
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#define CSL_USB_INDEX_TESTMODE_RESETVAL (0x0000u)
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/* TXMAXP_INDX */
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#define CSL_USB_TXMAXP_INDX_MAXPAYLOAD_MASK (0x07FFu)
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#define CSL_USB_TXMAXP_INDX_MAXPAYLOAD_SHIFT (0x0000u)
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#define CSL_USB_TXMAXP_INDX_MAXPAYLOAD_RESETVAL (0x0000u)
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#define CSL_USB_TXMAXP_INDX_RESETVAL (0x0000u)
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/* PERI_CSR0_INDX */
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#define CSL_USB_PERI_CSR0_INDX_FLUSHFIFO_MASK (0x0100u)
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#define CSL_USB_PERI_CSR0_INDX_FLUSHFIFO_SHIFT (0x0008u)
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#define CSL_USB_PERI_CSR0_INDX_FLUSHFIFO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_SERV_SETUPEND_MASK (0x0080u)
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#define CSL_USB_PERI_CSR0_INDX_SERV_SETUPEND_SHIFT (0x0007u)
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#define CSL_USB_PERI_CSR0_INDX_SERV_SETUPEND_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_SERV_RXPKTRDY_MASK (0x0040u)
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#define CSL_USB_PERI_CSR0_INDX_SERV_RXPKTRDY_SHIFT (0x0006u)
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#define CSL_USB_PERI_CSR0_INDX_SERV_RXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_SENDSTALL_MASK (0x0020u)
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#define CSL_USB_PERI_CSR0_INDX_SENDSTALL_SHIFT (0x0005u)
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#define CSL_USB_PERI_CSR0_INDX_SENDSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_SETUPEND_MASK (0x0010u)
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#define CSL_USB_PERI_CSR0_INDX_SETUPEND_SHIFT (0x0004u)
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#define CSL_USB_PERI_CSR0_INDX_SETUPEND_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_DATAEND_MASK (0x0008u)
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#define CSL_USB_PERI_CSR0_INDX_DATAEND_SHIFT (0x0003u)
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#define CSL_USB_PERI_CSR0_INDX_DATAEND_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_SENTSTALL_MASK (0x0004u)
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#define CSL_USB_PERI_CSR0_INDX_SENTSTALL_SHIFT (0x0002u)
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#define CSL_USB_PERI_CSR0_INDX_SENTSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_TXPKTRDY_MASK (0x0002u)
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#define CSL_USB_PERI_CSR0_INDX_TXPKTRDY_SHIFT (0x0001u)
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#define CSL_USB_PERI_CSR0_INDX_TXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_RXPKTRDY_MASK (0x0001u)
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#define CSL_USB_PERI_CSR0_INDX_RXPKTRDY_SHIFT (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_RXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_INDX_RESETVAL (0x0000u)
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/* PERI_TXCSR_INDX */
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#define CSL_USB_PERI_TXCSR_INDX_AUTOSET_MASK (0x8000u)
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#define CSL_USB_PERI_TXCSR_INDX_AUTOSET_SHIFT (0x000Fu)
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#define CSL_USB_PERI_TXCSR_INDX_AUTOSET_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_ISO_MASK (0x4000u)
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#define CSL_USB_PERI_TXCSR_INDX_ISO_SHIFT (0x000Eu)
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#define CSL_USB_PERI_TXCSR_INDX_ISO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_MODE_MASK (0x2000u)
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#define CSL_USB_PERI_TXCSR_INDX_MODE_SHIFT (0x000Du)
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#define CSL_USB_PERI_TXCSR_INDX_MODE_RESETVAL (0x0001u)
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#define CSL_USB_PERI_TXCSR_INDX_DMAEN_MASK (0x1000u)
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#define CSL_USB_PERI_TXCSR_INDX_DMAEN_SHIFT (0x000Cu)
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#define CSL_USB_PERI_TXCSR_INDX_DMAEN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_FRCDATATOG_MASK (0x0800u)
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#define CSL_USB_PERI_TXCSR_INDX_FRCDATATOG_SHIFT (0x000Bu)
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#define CSL_USB_PERI_TXCSR_INDX_FRCDATATOG_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_DMAMODE_MASK (0x0400u)
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#define CSL_USB_PERI_TXCSR_INDX_DMAMODE_SHIFT (0x000Au)
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#define CSL_USB_PERI_TXCSR_INDX_DMAMODE_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_CLRDATATOG_MASK (0x0040u)
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#define CSL_USB_PERI_TXCSR_INDX_CLRDATATOG_SHIFT (0x0006u)
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#define CSL_USB_PERI_TXCSR_INDX_CLRDATATOG_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_SENTSTALL_MASK (0x0020u)
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#define CSL_USB_PERI_TXCSR_INDX_SENTSTALL_SHIFT (0x0005u)
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#define CSL_USB_PERI_TXCSR_INDX_SENTSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_SENDSTALL_MASK (0x0010u)
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#define CSL_USB_PERI_TXCSR_INDX_SENDSTALL_SHIFT (0x0004u)
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#define CSL_USB_PERI_TXCSR_INDX_SENDSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_FLUSHFIFO_MASK (0x0008u)
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#define CSL_USB_PERI_TXCSR_INDX_FLUSHFIFO_SHIFT (0x0003u)
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#define CSL_USB_PERI_TXCSR_INDX_FLUSHFIFO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_UNDERRUN_MASK (0x0004u)
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#define CSL_USB_PERI_TXCSR_INDX_UNDERRUN_SHIFT (0x0002u)
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#define CSL_USB_PERI_TXCSR_INDX_UNDERRUN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_FIFONOTEMPTY_MASK (0x0002u)
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#define CSL_USB_PERI_TXCSR_INDX_FIFONOTEMPTY_SHIFT (0x0001u)
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#define CSL_USB_PERI_TXCSR_INDX_FIFONOTEMPTY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_TXPKTRDY_MASK (0x0001u)
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#define CSL_USB_PERI_TXCSR_INDX_TXPKTRDY_SHIFT (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_TXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_TXCSR_INDX_RESETVAL (0x2000u)
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/* RXMAXP_INDX */
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#define CSL_USB_RXMAXP_INDX_MAXPAYLOAD_MASK (0x07FFu)
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#define CSL_USB_RXMAXP_INDX_MAXPAYLOAD_SHIFT (0x0000u)
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#define CSL_USB_RXMAXP_INDX_MAXPAYLOAD_RESETVAL (0x0000u)
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#define CSL_USB_RXMAXP_INDX_RESETVAL (0x0000u)
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/* PERI_RXCSR_INDX */
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#define CSL_USB_PERI_RXCSR_INDX_AUTOCLEAR_MASK (0x8000u)
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#define CSL_USB_PERI_RXCSR_INDX_AUTOCLEAR_SHIFT (0x000Fu)
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#define CSL_USB_PERI_RXCSR_INDX_AUTOCLEAR_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_ISO_MASK (0x4000u)
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#define CSL_USB_PERI_RXCSR_INDX_ISO_SHIFT (0x000Eu)
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#define CSL_USB_PERI_RXCSR_INDX_ISO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_DMAEN_MASK (0x2000u)
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#define CSL_USB_PERI_RXCSR_INDX_DMAEN_SHIFT (0x000Du)
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#define CSL_USB_PERI_RXCSR_INDX_DMAEN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_DISNYET_MASK (0x1000u)
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#define CSL_USB_PERI_RXCSR_INDX_DISNYET_SHIFT (0x000Cu)
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#define CSL_USB_PERI_RXCSR_INDX_DISNYET_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_DMAMODE_MASK (0x0800u)
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#define CSL_USB_PERI_RXCSR_INDX_DMAMODE_SHIFT (0x000Bu)
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#define CSL_USB_PERI_RXCSR_INDX_DMAMODE_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_CLRDATATOG_MASK (0x0080u)
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#define CSL_USB_PERI_RXCSR_INDX_CLRDATATOG_SHIFT (0x0007u)
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#define CSL_USB_PERI_RXCSR_INDX_CLRDATATOG_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_SENTSTALL_MASK (0x0040u)
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#define CSL_USB_PERI_RXCSR_INDX_SENTSTALL_SHIFT (0x0006u)
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#define CSL_USB_PERI_RXCSR_INDX_SENTSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_SENDSTALL_MASK (0x0020u)
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#define CSL_USB_PERI_RXCSR_INDX_SENDSTALL_SHIFT (0x0005u)
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#define CSL_USB_PERI_RXCSR_INDX_SENDSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_FLUSHFIFO_MASK (0x0010u)
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#define CSL_USB_PERI_RXCSR_INDX_FLUSHFIFO_SHIFT (0x0004u)
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#define CSL_USB_PERI_RXCSR_INDX_FLUSHFIFO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_DATAERROR_MASK (0x0008u)
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#define CSL_USB_PERI_RXCSR_INDX_DATAERROR_SHIFT (0x0003u)
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#define CSL_USB_PERI_RXCSR_INDX_DATAERROR_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_OVERRUN_MASK (0x0004u)
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#define CSL_USB_PERI_RXCSR_INDX_OVERRUN_SHIFT (0x0002u)
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#define CSL_USB_PERI_RXCSR_INDX_OVERRUN_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_FIFOFULL_MASK (0x0002u)
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#define CSL_USB_PERI_RXCSR_INDX_FIFOFULL_SHIFT (0x0001u)
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#define CSL_USB_PERI_RXCSR_INDX_FIFOFULL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_RXPKTRDY_MASK (0x0001u)
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#define CSL_USB_PERI_RXCSR_INDX_RXPKTRDY_SHIFT (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_RXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_RXCSR_INDX_RESETVAL (0x0000u)
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/* COUNT0_INDX */
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#define CSL_USB_COUNT0_INDX_EP0RXCOUNT_MASK (0x007Fu)
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#define CSL_USB_COUNT0_INDX_EP0RXCOUNT_SHIFT (0x0000u)
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#define CSL_USB_COUNT0_INDX_EP0RXCOUNT_RESETVAL (0x0000u)
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#define CSL_USB_COUNT0_INDX_RESETVAL (0x0000u)
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/* RXCOUNT_INDX */
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#define CSL_USB_RXCOUNT_INDX_EPRXCOUNT_MASK (0x1FFFu)
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#define CSL_USB_RXCOUNT_INDX_EPRXCOUNT_SHIFT (0x0000u)
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#define CSL_USB_RXCOUNT_INDX_EPRXCOUNT_RESETVAL (0x0000u)
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#define CSL_USB_RXCOUNT_INDX_RESETVAL (0x0000u)
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/* CONFIGDATA_INDX */
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#define CSL_USB_CONFIGDATA_INDX_MPTXE_MASK (0x0040u)
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#define CSL_USB_CONFIGDATA_INDX_MPTXE_SHIFT (0x0006u)
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#define CSL_USB_CONFIGDATA_INDX_MPTXE_RESETVAL (0x0000u)
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/*----MPTXE Tokens----*/
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#define CSL_USB_CONFIGDATA_INDX_MPTXE_NOAUTO (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_MPTXE_AUTO (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_BIGENDIAN_MASK (0x0020u)
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#define CSL_USB_CONFIGDATA_INDX_BIGENDIAN_SHIFT (0x0005u)
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#define CSL_USB_CONFIGDATA_INDX_BIGENDIAN_RESETVAL (0x0000u)
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/*----BIGENDIAN Tokens----*/
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#define CSL_USB_CONFIGDATA_INDX_BIGENDIAN_LITTLE (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_BIGENDIAN_BIG (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_HBRXE_MASK (0x0010u)
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#define CSL_USB_CONFIGDATA_INDX_HBRXE_SHIFT (0x0004u)
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#define CSL_USB_CONFIGDATA_INDX_HBRXE_RESETVAL (0x0000u)
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/*----HBRXE Tokens----*/
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#define CSL_USB_CONFIGDATA_INDX_HBRXE_NOHIGHBW (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_HBRXE_HIGHBW (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_HBTXE_MASK (0x0008u)
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#define CSL_USB_CONFIGDATA_INDX_HBTXE_SHIFT (0x0003u)
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#define CSL_USB_CONFIGDATA_INDX_HBTXE_RESETVAL (0x0000u)
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/*----HBTXE Tokens----*/
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#define CSL_USB_CONFIGDATA_INDX_HBTXE_NOHIGHBW (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_HBTXE_HIGHBW (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_DYNFIFO_MASK (0x0004u)
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#define CSL_USB_CONFIGDATA_INDX_DYNFIFO_SHIFT (0x0002u)
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#define CSL_USB_CONFIGDATA_INDX_DYNFIFO_RESETVAL (0x0000u)
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/*----DYNFIFO Tokens----*/
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#define CSL_USB_CONFIGDATA_INDX_DYNFIFO_NODYMFIFO (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_DYNFIFO_DYMFIFO (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_SOFTCONE_MASK (0x0002u)
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#define CSL_USB_CONFIGDATA_INDX_SOFTCONE_SHIFT (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_SOFTCONE_RESETVAL (0x0000u)
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/*----SOFTCONE Tokens----*/
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#define CSL_USB_CONFIGDATA_INDX_SOFTCONE_NOSFTCON (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_SOFTCONE_SFTCON (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_UTMIDATAWIDTH_MASK (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_UTMIDATAWIDTH_SHIFT (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_UTMIDATAWIDTH_RESETVAL (0x0000u)
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/*----UTMIDATAWIDTH Tokens----*/
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#define CSL_USB_CONFIGDATA_INDX_UTMIDATAWIDTH_EIGHT (0x0000u)
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#define CSL_USB_CONFIGDATA_INDX_UTMIDATAWIDTH_SIXTEEN (0x0001u)
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#define CSL_USB_CONFIGDATA_INDX_RESETVAL (0x0000u)
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/* FIFO0R1 */
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#define CSL_USB_FIFO0R1_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO0R1_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO0R1_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO0R1_RESETVAL (0x0000u)
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/* FIFO0R2 */
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#define CSL_USB_FIFO0R2_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO0R2_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO0R2_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO0R2_RESETVAL (0x0000u)
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/* FIFO1R1 */
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#define CSL_USB_FIFO1R1_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO1R1_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO1R1_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO1R1_RESETVAL (0x0000u)
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/* FIFO1R2 */
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#define CSL_USB_FIFO1R2_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO1R2_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO1R2_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO1R2_RESETVAL (0x0000u)
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/* FIFO2R1 */
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#define CSL_USB_FIFO2R1_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO2R1_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO2R1_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO2R1_RESETVAL (0x0000u)
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/* FIFO2R2 */
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#define CSL_USB_FIFO2R2_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO2R2_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO2R2_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO2R2_RESETVAL (0x0000u)
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/* FIFO3R1 */
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#define CSL_USB_FIFO3R1_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO3R1_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO3R1_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO3R1_RESETVAL (0x0000u)
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/* FIFO3R2 */
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#define CSL_USB_FIFO3R2_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO3R2_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO3R2_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO3R2_RESETVAL (0x0000u)
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/* FIFO4R1 */
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#define CSL_USB_FIFO4R1_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO4R1_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO4R1_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO4R1_RESETVAL (0x0000u)
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/* FIFO4R2 */
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#define CSL_USB_FIFO4R2_DATA_MASK (0xFFFFu)
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#define CSL_USB_FIFO4R2_DATA_SHIFT (0x0000u)
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#define CSL_USB_FIFO4R2_DATA_RESETVAL (0x0000u)
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#define CSL_USB_FIFO4R2_RESETVAL (0x0000u)
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/* DEVCTL */
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#define CSL_USB_DEVCTL_BDEVICE_MASK (0x0080u)
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#define CSL_USB_DEVCTL_BDEVICE_SHIFT (0x0007u)
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#define CSL_USB_DEVCTL_BDEVICE_RESETVAL (0x0001u)
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/*----BDEVICE Tokens----*/
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#define CSL_USB_DEVCTL_BDEVICE_ADEVICE (0x0000u)
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#define CSL_USB_DEVCTL_BDEVICE_BDEVICE (0x0001u)
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#define CSL_USB_DEVCTL_FSDEV_MASK (0x0040u)
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#define CSL_USB_DEVCTL_FSDEV_SHIFT (0x0006u)
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#define CSL_USB_DEVCTL_FSDEV_RESETVAL (0x0000u)
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#define CSL_USB_DEVCTL_LSDEV_MASK (0x0020u)
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#define CSL_USB_DEVCTL_LSDEV_SHIFT (0x0005u)
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#define CSL_USB_DEVCTL_LSDEV_RESETVAL (0x0000u)
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#define CSL_USB_DEVCTL_VBUS_MASK (0x0018u)
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#define CSL_USB_DEVCTL_VBUS_SHIFT (0x0003u)
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#define CSL_USB_DEVCTL_VBUS_RESETVAL (0x0000u)
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/*----VBUS Tokens----*/
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#define CSL_USB_DEVCTL_VBUS_BELOW (0x0000u)
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#define CSL_USB_DEVCTL_VBUS_BELOWAVALID (0x0001u)
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#define CSL_USB_DEVCTL_VBUS_BELOWVBUSVALID (0x0002u)
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#define CSL_USB_DEVCTL_VBUS_ABOVEVBUSVALID (0x0003u)
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#define CSL_USB_DEVCTL_HOSTMODE_MASK (0x0004u)
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#define CSL_USB_DEVCTL_HOSTMODE_SHIFT (0x0002u)
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#define CSL_USB_DEVCTL_HOSTMODE_RESETVAL (0x0000u)
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#define CSL_USB_DEVCTL_HOSTREQ_MASK (0x0002u)
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#define CSL_USB_DEVCTL_HOSTREQ_SHIFT (0x0001u)
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#define CSL_USB_DEVCTL_HOSTREQ_RESETVAL (0x0000u)
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#define CSL_USB_DEVCTL_SESSION_MASK (0x0001u)
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#define CSL_USB_DEVCTL_SESSION_SHIFT (0x0000u)
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#define CSL_USB_DEVCTL_SESSION_RESETVAL (0x0000u)
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#define CSL_USB_DEVCTL_RESETVAL (0x0080u)
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/* TXFIFOSZ_RXFIFOSZ */
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RXDPB_MASK (0x1000u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RXDPB_SHIFT (0x000Cu)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RXDPB_RESETVAL (0x0000u)
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/*----RXDPB Tokens----*/
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RXDPB_SINGLE (0x0000u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RXDPB_DOUBLE (0x0001u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RCVSZ_MASK (0x0F00u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RCVSZ_SHIFT (0x0008u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RCVSZ_RESETVAL (0x0000u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXDPB_MASK (0x0010u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXDPB_SHIFT (0x0004u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXDPB_RESETVAL (0x0000u)
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/*----TXDPB Tokens----*/
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXDPB_SINGLE (0x0000u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXDPB_DOUBLE (0x0001u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXSZ_MASK (0x000Fu)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXSZ_SHIFT (0x0000u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_TXSZ_RESETVAL (0x0000u)
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#define CSL_USB_TXFIFOSZ_RXFIFOSZ_RESETVAL (0x0000u)
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/* TXFIFOADDR */
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#define CSL_USB_TXFIFOADDR_ADDR_MASK (0x1FFFu)
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#define CSL_USB_TXFIFOADDR_ADDR_SHIFT (0x0000u)
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#define CSL_USB_TXFIFOADDR_ADDR_RESETVAL (0x0000u)
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#define CSL_USB_TXFIFOADDR_RESETVAL (0x0000u)
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/* RXFIFOADDR */
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#define CSL_USB_RXFIFOADDR_ADDR_MASK (0x1FFFu)
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#define CSL_USB_RXFIFOADDR_ADDR_SHIFT (0x0000u)
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#define CSL_USB_RXFIFOADDR_ADDR_RESETVAL (0x0000u)
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#define CSL_USB_RXFIFOADDR_RESETVAL (0x0000u)
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/* HWVERS */
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#define CSL_USB_HWVERS_REVMAJ_MASK (0x7C00u)
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#define CSL_USB_HWVERS_REVMAJ_SHIFT (0x000Au)
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#define CSL_USB_HWVERS_REVMAJ_RESETVAL (0x0000u)
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#define CSL_USB_HWVERS_REVMIN_MASK (0x03FFu)
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#define CSL_USB_HWVERS_REVMIN_SHIFT (0x0000u)
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#define CSL_USB_HWVERS_REVMIN_RESETVAL (0x0000u)
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#define CSL_USB_HWVERS_RESETVAL (0x0000u)
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/* PERI_CSR0 */
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#define CSL_USB_PERI_CSR0_FLUSHFIFO_MASK (0x0100u)
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#define CSL_USB_PERI_CSR0_FLUSHFIFO_SHIFT (0x0008u)
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#define CSL_USB_PERI_CSR0_FLUSHFIFO_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_SERV_SETUPEND_MASK (0x0080u)
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#define CSL_USB_PERI_CSR0_SERV_SETUPEND_SHIFT (0x0007u)
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#define CSL_USB_PERI_CSR0_SERV_SETUPEND_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_SERV_RXPKTRDY_MASK (0x0040u)
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#define CSL_USB_PERI_CSR0_SERV_RXPKTRDY_SHIFT (0x0006u)
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#define CSL_USB_PERI_CSR0_SERV_RXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_SENDSTALL_MASK (0x0020u)
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#define CSL_USB_PERI_CSR0_SENDSTALL_SHIFT (0x0005u)
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#define CSL_USB_PERI_CSR0_SENDSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_SETUPEND_MASK (0x0010u)
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#define CSL_USB_PERI_CSR0_SETUPEND_SHIFT (0x0004u)
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#define CSL_USB_PERI_CSR0_SETUPEND_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_DATAEND_MASK (0x0008u)
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#define CSL_USB_PERI_CSR0_DATAEND_SHIFT (0x0003u)
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#define CSL_USB_PERI_CSR0_DATAEND_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_SENTSTALL_MASK (0x0004u)
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#define CSL_USB_PERI_CSR0_SENTSTALL_SHIFT (0x0002u)
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#define CSL_USB_PERI_CSR0_SENTSTALL_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_TXPKTRDY_MASK (0x0002u)
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#define CSL_USB_PERI_CSR0_TXPKTRDY_SHIFT (0x0001u)
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#define CSL_USB_PERI_CSR0_TXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_RXPKTRDY_MASK (0x0001u)
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#define CSL_USB_PERI_CSR0_RXPKTRDY_SHIFT (0x0000u)
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#define CSL_USB_PERI_CSR0_RXPKTRDY_RESETVAL (0x0000u)
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#define CSL_USB_PERI_CSR0_RESETVAL (0x0000u)
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/* COUNT0 */
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#define CSL_USB_COUNT0_EP0RXCOUNT_MASK (0x007Fu)
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#define CSL_USB_COUNT0_EP0RXCOUNT_SHIFT (0x0000u)
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#define CSL_USB_COUNT0_EP0RXCOUNT_RESETVAL (0x0000u)
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#define CSL_USB_COUNT0_RESETVAL (0x0000u)
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/* CONFIGDATA */
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#define CSL_USB_CONFIGDATA_MPTXE_MASK (0x0040u)
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#define CSL_USB_CONFIGDATA_MPTXE_SHIFT (0x0006u)
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#define CSL_USB_CONFIGDATA_MPTXE_RESETVAL (0x0000u)
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#define CSL_USB_CONFIGDATA_BIGENDIAN_MASK (0x0020u)
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#define CSL_USB_CONFIGDATA_BIGENDIAN_SHIFT (0x0005u)
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#define CSL_USB_CONFIGDATA_BIGENDIAN_RESETVAL (0x0000u)
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#define CSL_USB_CONFIGDATA_HBRXE_MASK (0x0010u)
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#define CSL_USB_CONFIGDATA_HBRXE_SHIFT (0x0004u)
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#define CSL_USB_CONFIGDATA_HBRXE_RESETVAL (0x0000u)
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#define CSL_USB_CONFIGDATA_HBTXE_MASK (0x0008u)
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#define CSL_USB_CONFIGDATA_HBTXE_SHIFT (0x0003u)
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#define CSL_USB_CONFIGDATA_HBTXE_RESETVAL (0x0000u)
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#define CSL_USB_CONFIGDATA_DYNFIFO_MASK (0x0004u)
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#define CSL_USB_CONFIGDATA_DYNFIFO_SHIFT (0x0002u)
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#define CSL_USB_CONFIGDATA_DYNFIFO_RESETVAL (0x0000u)
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#define CSL_USB_CONFIGDATA_SOFTCONE_MASK (0x0002u)
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#define CSL_USB_CONFIGDATA_SOFTCONE_SHIFT (0x0001u)
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#define CSL_USB_CONFIGDATA_SOFTCONE_RESETVAL (0x0000u)
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#define CSL_USB_CONFIGDATA_UTMIDATAWIDTH_MASK (0x0001u)
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#define CSL_USB_CONFIGDATA_UTMIDATAWIDTH_SHIFT (0x0000u)
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#define CSL_USB_CONFIGDATA_UTMIDATAWIDTH_RESETVAL (0x0000u)
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#define CSL_USB_CONFIGDATA_RESETVAL (0x0000u)
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/* DMAREVID1 */
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#define CSL_USB_DMAREVID1_REV_MASK (0xFFFFu)
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#define CSL_USB_DMAREVID1_REV_SHIFT (0x0000u)
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#define CSL_USB_DMAREVID1_REV_RESETVAL (0x1900u)
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#define CSL_USB_DMAREVID1_RESETVAL (0x1900u)
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/* DMAREVID2 */
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#define CSL_USB_DMAREVID2_REV_MASK (0xFFFFu)
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#define CSL_USB_DMAREVID2_REV_SHIFT (0x0000u)
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#define CSL_USB_DMAREVID2_REV_RESETVAL (0x0053u)
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#define CSL_USB_DMAREVID2_RESETVAL (0x0053u)
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/* TDFDQ */
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#define CSL_USB_TDFDQ_TD_DESC_QMGR_MASK (0x3000u)
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#define CSL_USB_TDFDQ_TD_DESC_QMGR_SHIFT (0x000Cu)
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#define CSL_USB_TDFDQ_TD_DESC_QMGR_RESETVAL (0x0000u)
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#define CSL_USB_TDFDQ_TD_DESC_QNUM_MASK (0x0FFFu)
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#define CSL_USB_TDFDQ_TD_DESC_QNUM_SHIFT (0x0000u)
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#define CSL_USB_TDFDQ_TD_DESC_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_TDFDQ_RESETVAL (0x0000u)
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/* DMAEMU */
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#define CSL_USB_DMAEMU_SOFT_MASK (0x0002u)
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#define CSL_USB_DMAEMU_SOFT_SHIFT (0x0001u)
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#define CSL_USB_DMAEMU_SOFT_RESETVAL (0x0000u)
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#define CSL_USB_DMAEMU_FREE_MASK (0x0001u)
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#define CSL_USB_DMAEMU_FREE_SHIFT (0x0000u)
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#define CSL_USB_DMAEMU_FREE_RESETVAL (0x0000u)
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#define CSL_USB_DMAEMU_RESETVAL (0x0000u)
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/* DMA_SCHED_CTRL1 */
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#define CSL_USB_DMA_SCHED_CTRL1_LAST_ENTRY_MASK (0x00FFu)
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#define CSL_USB_DMA_SCHED_CTRL1_LAST_ENTRY_SHIFT (0x0000u)
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#define CSL_USB_DMA_SCHED_CTRL1_LAST_ENTRY_RESETVAL (0x0000u)
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#define CSL_USB_DMA_SCHED_CTRL1_RESETVAL (0x0000u)
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/* DMA_SCHED_CTRL2 */
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#define CSL_USB_DMA_SCHED_CTRL2_ENABLE_MASK (0x8000u)
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#define CSL_USB_DMA_SCHED_CTRL2_ENABLE_SHIFT (0x000Fu)
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#define CSL_USB_DMA_SCHED_CTRL2_ENABLE_RESETVAL (0x0000u)
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/*----ENABLE Tokens----*/
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#define CSL_USB_DMA_SCHED_CTRL2_ENABLE_ENABLED (0x0000u)
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#define CSL_USB_DMA_SCHED_CTRL2_ENABLE_DISABLED (0x0001u)
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#define CSL_USB_DMA_SCHED_CTRL2_RESETVAL (0x0000u)
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/* QMGRREVID1 */
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#define CSL_USB_QMGRREVID1_REV_MASK (0xFFFFu)
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#define CSL_USB_QMGRREVID1_REV_SHIFT (0x0000u)
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#define CSL_USB_QMGRREVID1_REV_RESETVAL (0x1200u)
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#define CSL_USB_QMGRREVID1_RESETVAL (0x1200u)
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/* QMGRREVID2 */
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#define CSL_USB_QMGRREVID2_REV_MASK (0xFFFFu)
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#define CSL_USB_QMGRREVID2_REV_SHIFT (0x0000u)
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#define CSL_USB_QMGRREVID2_REV_RESETVAL (0x0052u)
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#define CSL_USB_QMGRREVID2_RESETVAL (0x0052u)
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/* DIVERSION1 */
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#define CSL_USB_DIVERSION1_SOURCE_QNUM_MASK (0x3FFFu)
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#define CSL_USB_DIVERSION1_SOURCE_QNUM_SHIFT (0x0000u)
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#define CSL_USB_DIVERSION1_SOURCE_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_DIVERSION1_RESETVAL (0x0000u)
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/* DIVERSION2 */
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#define CSL_USB_DIVERSION2_HEAD_TAIL_MASK (0x8000u)
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#define CSL_USB_DIVERSION2_HEAD_TAIL_SHIFT (0x000Fu)
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#define CSL_USB_DIVERSION2_HEAD_TAIL_RESETVAL (0x0000u)
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/*----HEAD_TAIL Tokens----*/
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#define CSL_USB_DIVERSION2_HEAD_TAIL_HEAD (0x0000u)
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#define CSL_USB_DIVERSION2_HEAD_TAIL_TAIL (0x0001u)
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#define CSL_USB_DIVERSION2_DEST_QNUM_MASK (0x003Fu)
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#define CSL_USB_DIVERSION2_DEST_QNUM_SHIFT (0x0000u)
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#define CSL_USB_DIVERSION2_DEST_QNUM_RESETVAL (0x0000u)
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#define CSL_USB_DIVERSION2_RESETVAL (0x0000u)
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/* FDBSC0 */
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#define CSL_USB_FDBSC0_FDBQ1_STARVE_CNT_MASK (0xFF00u)
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#define CSL_USB_FDBSC0_FDBQ1_STARVE_CNT_SHIFT (0x0008u)
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#define CSL_USB_FDBSC0_FDBQ1_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC0_FDBQ0_STARVE_CNT_MASK (0x00FFu)
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#define CSL_USB_FDBSC0_FDBQ0_STARVE_CNT_SHIFT (0x0000u)
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#define CSL_USB_FDBSC0_FDBQ0_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC0_RESETVAL (0x0000u)
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/* FDBSC1 */
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#define CSL_USB_FDBSC1_FDBQ3_STARVE_CNT_MASK (0xFF00u)
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#define CSL_USB_FDBSC1_FDBQ3_STARVE_CNT_SHIFT (0x0008u)
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#define CSL_USB_FDBSC1_FDBQ3_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC1_FDBQ2_STARVE_CNT_MASK (0x00FFu)
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#define CSL_USB_FDBSC1_FDBQ2_STARVE_CNT_SHIFT (0x0000u)
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|
#define CSL_USB_FDBSC1_FDBQ2_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC1_RESETVAL (0x0000u)
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|
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/* FDBSC2 */
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|
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#define CSL_USB_FDBSC2_FDBQ5_STARVE_CNT_MASK (0xFF00u)
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|
#define CSL_USB_FDBSC2_FDBQ5_STARVE_CNT_SHIFT (0x0008u)
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#define CSL_USB_FDBSC2_FDBQ5_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC2_FDBQ4_STARVE_CNT_MASK (0x00FFu)
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#define CSL_USB_FDBSC2_FDBQ4_STARVE_CNT_SHIFT (0x0000u)
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|
#define CSL_USB_FDBSC2_FDBQ4_STARVE_CNT_RESETVAL (0x0000u)
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|
|
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#define CSL_USB_FDBSC2_RESETVAL (0x0000u)
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|
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/* FDBSC3 */
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|
|
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#define CSL_USB_FDBSC3_FDBQ7_STARVE_CNT_MASK (0xFF00u)
|
|
#define CSL_USB_FDBSC3_FDBQ7_STARVE_CNT_SHIFT (0x0008u)
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|
#define CSL_USB_FDBSC3_FDBQ7_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC3_FDBQ6_STARVE_CNT_MASK (0x00FFu)
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|
#define CSL_USB_FDBSC3_FDBQ6_STARVE_CNT_SHIFT (0x0000u)
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|
#define CSL_USB_FDBSC3_FDBQ6_STARVE_CNT_RESETVAL (0x0000u)
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|
|
|
#define CSL_USB_FDBSC3_RESETVAL (0x0000u)
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|
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/* FDBSC4 */
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|
|
|
#define CSL_USB_FDBSC4_FDBQ9_STARVE_CNT_MASK (0xFF00u)
|
|
#define CSL_USB_FDBSC4_FDBQ9_STARVE_CNT_SHIFT (0x0008u)
|
|
#define CSL_USB_FDBSC4_FDBQ9_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC4_FDBQ8_STARVE_CNT_MASK (0x00FFu)
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|
#define CSL_USB_FDBSC4_FDBQ8_STARVE_CNT_SHIFT (0x0000u)
|
|
#define CSL_USB_FDBSC4_FDBQ8_STARVE_CNT_RESETVAL (0x0000u)
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|
|
|
#define CSL_USB_FDBSC4_RESETVAL (0x0000u)
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|
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/* FDBSC5 */
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|
|
|
#define CSL_USB_FDBSC5_FDBQ11_STARVE_CNT_MASK (0xFF00u)
|
|
#define CSL_USB_FDBSC5_FDBQ11_STARVE_CNT_SHIFT (0x0008u)
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#define CSL_USB_FDBSC5_FDBQ11_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC5_FDBQ10_STARVE_CNT_MASK (0x00FFu)
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#define CSL_USB_FDBSC5_FDBQ10_STARVE_CNT_SHIFT (0x0000u)
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#define CSL_USB_FDBSC5_FDBQ10_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC5_RESETVAL (0x0000u)
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/* FDBSC6 */
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#define CSL_USB_FDBSC6_FDBQ13_STARVE_CNT_MASK (0xFF00u)
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#define CSL_USB_FDBSC6_FDBQ13_STARVE_CNT_SHIFT (0x0008u)
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#define CSL_USB_FDBSC6_FDBQ13_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC6_FDBQ12_STARVE_CNT_MASK (0x00FFu)
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#define CSL_USB_FDBSC6_FDBQ12_STARVE_CNT_SHIFT (0x0000u)
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#define CSL_USB_FDBSC6_FDBQ12_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC6_RESETVAL (0x0000u)
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/* FDBSC7 */
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#define CSL_USB_FDBSC7_FDBQ15_STARVE_CNT_MASK (0xFF00u)
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#define CSL_USB_FDBSC7_FDBQ15_STARVE_CNT_SHIFT (0x0008u)
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#define CSL_USB_FDBSC7_FDBQ15_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC7_FDBQ14_STARVE_CNT_MASK (0x00FFu)
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#define CSL_USB_FDBSC7_FDBQ14_STARVE_CNT_SHIFT (0x0000u)
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#define CSL_USB_FDBSC7_FDBQ14_STARVE_CNT_RESETVAL (0x0000u)
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#define CSL_USB_FDBSC7_RESETVAL (0x0000u)
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/* LRAM0BASE1 */
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#define CSL_USB_LRAM0BASE1_REGION0_BASE_MASK (0xFFFFu)
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#define CSL_USB_LRAM0BASE1_REGION0_BASE_SHIFT (0x0000u)
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#define CSL_USB_LRAM0BASE1_REGION0_BASE_RESETVAL (0x0000u)
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#define CSL_USB_LRAM0BASE1_RESETVAL (0x0000u)
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/* LRAM0BASE2 */
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#define CSL_USB_LRAM0BASE2_REGION0_BASE_MASK (0xFFFFu)
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#define CSL_USB_LRAM0BASE2_REGION0_BASE_SHIFT (0x0000u)
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#define CSL_USB_LRAM0BASE2_REGION0_BASE_RESETVAL (0x0000u)
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#define CSL_USB_LRAM0BASE2_RESETVAL (0x0000u)
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/* LRAM0SIZE */
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#define CSL_USB_LRAM0SIZE_REGION0_SIZE_MASK (0x3FFFu)
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#define CSL_USB_LRAM0SIZE_REGION0_SIZE_SHIFT (0x0000u)
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#define CSL_USB_LRAM0SIZE_REGION0_SIZE_RESETVAL (0x0000u)
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#define CSL_USB_LRAM0SIZE_RESETVAL (0x0000u)
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/* LRAM1BASE1 */
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#define CSL_USB_LRAM1BASE1_REGION1_BASE_MASK (0xFFFFu)
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#define CSL_USB_LRAM1BASE1_REGION1_BASE_SHIFT (0x0000u)
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#define CSL_USB_LRAM1BASE1_REGION1_BASE_RESETVAL (0x0000u)
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#define CSL_USB_LRAM1BASE1_RESETVAL (0x0000u)
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/* LRAM1BASE2 */
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#define CSL_USB_LRAM1BASE2_REGION1_BASE_MASK (0xFFFFu)
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#define CSL_USB_LRAM1BASE2_REGION1_BASE_SHIFT (0x0000u)
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#define CSL_USB_LRAM1BASE2_REGION1_BASE_RESETVAL (0x0000u)
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#define CSL_USB_LRAM1BASE2_RESETVAL (0x0000u)
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/* PEND0 */
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#define CSL_USB_PEND0_QPEND_MASK (0xFFFFu)
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#define CSL_USB_PEND0_QPEND_SHIFT (0x0000u)
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#define CSL_USB_PEND0_QPEND_RESETVAL (0x0000u)
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#define CSL_USB_PEND0_RESETVAL (0x0000u)
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/* PEND1 */
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#define CSL_USB_PEND1_QPEND_MASK (0xFFFFu)
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#define CSL_USB_PEND1_QPEND_SHIFT (0x0000u)
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#define CSL_USB_PEND1_QPEND_RESETVAL (0x0000u)
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#define CSL_USB_PEND1_RESETVAL (0x0000u)
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/* PEND2 */
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#define CSL_USB_PEND2_QPEND_MASK (0xFFFFu)
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#define CSL_USB_PEND2_QPEND_SHIFT (0x0000u)
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#define CSL_USB_PEND2_QPEND_RESETVAL (0x0000u)
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#define CSL_USB_PEND2_RESETVAL (0x0000u)
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/* PEND3 */
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#define CSL_USB_PEND3_QPEND_MASK (0xFFFFu)
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#define CSL_USB_PEND3_QPEND_SHIFT (0x0000u)
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#define CSL_USB_PEND3_QPEND_RESETVAL (0x0000u)
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#define CSL_USB_PEND3_RESETVAL (0x0000u)
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/* PEND4 */
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#define CSL_USB_PEND4_QPEND_MASK (0xFFFFu)
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#define CSL_USB_PEND4_QPEND_SHIFT (0x0000u)
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#define CSL_USB_PEND4_QPEND_RESETVAL (0x0000u)
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#define CSL_USB_PEND4_RESETVAL (0x0000u)
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/* PEND5 */
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#define CSL_USB_PEND5_QPEND_MASK (0xFFFFu)
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#define CSL_USB_PEND5_QPEND_SHIFT (0x0000u)
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#define CSL_USB_PEND5_QPEND_RESETVAL (0x0000u)
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#define CSL_USB_PEND5_RESETVAL (0x0000u)
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#endif
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