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83 lines
3.1 KiB
C++
83 lines
3.1 KiB
C++
/// @file
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/// @brief QK/C++ port to ARM Cortex-M, preemptive QK kernel, GNU-ARM toolset
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/// @cond
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///***************************************************************************
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/// Last updated for version 6.9.2a
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/// Last updated on 2021-01-31
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///
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/// Q u a n t u m L e a P s
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/// ------------------------
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/// Modern Embedded Software
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///
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/// Copyright (C) 2005-2021 Quantum Leaps. All rights reserved.
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///
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/// This program is open source software: you can redistribute it and/or
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/// modify it under the terms of the GNU General Public License as published
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/// by the Free Software Foundation, either version 3 of the License, or
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/// (at your option) any later version.
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///
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/// Alternatively, this program may be distributed and modified under the
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/// terms of Quantum Leaps commercial licenses, which expressly supersede
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/// the GNU General Public License and are specifically designed for
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/// licensees interested in retaining the proprietary status of their code.
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///
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/// This program is distributed in the hope that it will be useful,
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/// but WITHOUT ANY WARRANTY; without even the implied warranty of
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/// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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/// GNU General Public License for more details.
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///
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/// You should have received a copy of the GNU General Public License
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/// along with this program. If not, see <www.gnu.org/licenses>.
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///
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/// Contact information:
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/// <www.state-machine.com/licensing>
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/// <info@state-machine.com>
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///***************************************************************************
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/// @endcond
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#ifndef QK_PORT_HPP
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#define QK_PORT_HPP
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// determination if the code executes in the ISR context
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#define QK_ISR_CONTEXT_() (QK_get_IPSR() != 0U)
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__attribute__((always_inline))
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static inline uint32_t QK_get_IPSR(void) {
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uint32_t regIPSR;
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__asm volatile ("mrs %0,ipsr" : "=r" (regIPSR));
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return regIPSR;
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}
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// QK interrupt entry and exit
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#define QK_ISR_ENTRY() ((void)0)
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#define QK_ISR_EXIT() do { \
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QF_INT_DISABLE(); \
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if (QK_sched_() != 0U) { \
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*Q_UINT2PTR_CAST(uint32_t, 0xE000ED04U) = (1U << 28U);\
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} \
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QF_INT_ENABLE(); \
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QK_ARM_ERRATUM_838869(); \
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} while (false)
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#if (__ARM_ARCH == 6) // Cortex-M0/M0+/M1 (v6-M, v6S-M)?
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#define QK_ARM_ERRATUM_838869() ((void)0)
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#else // Cortex-M3/M4/M7 (v7-M)
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// The following macro implements the recommended workaround for the
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// ARM Erratum 838869. Specifically, for Cortex-M3/M4/M7 the DSB
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// (memory barrier) instruction needs to be added before exiting an ISR.
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//
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#define QK_ARM_ERRATUM_838869() \
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__asm volatile ("dsb" ::: "memory")
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#endif
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// initialization of the QK kernel
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#define QK_INIT() QK_init()
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extern "C" void QK_init(void);
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extern "C" void QK_thread_ret(void);
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#include "qk.hpp" // QK platform-independent public interface
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#endif // QK_PORT_HPP
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