mirror of
https://github.com/QuantumLeaps/qpcpp.git
synced 2025-01-28 06:02:56 +08:00
84 lines
4.9 KiB
Plaintext
84 lines
4.9 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\linker\ST\IcfEditor\stm32h7xx.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_FLASH1_start__ = 0x08000000;
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define symbol __ICFEDIT_region_FLASH1_end__ = 0x080FFFFF;
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define symbol __ICFEDIT_region_FLASH2_start__ = 0x08100000;
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define symbol __ICFEDIT_region_FLASH2_end__ = 0x081FFFFF;
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define symbol __ICFEDIT_region_NORPSR_start__ = 0x0;
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define symbol __ICFEDIT_region_NORPSR_end__ = 0x0;
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define symbol __ICFEDIT_region_NAND_start__ = 0x0;
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define symbol __ICFEDIT_region_NAND_end__ = 0x0;
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define symbol __ICFEDIT_region_QSPI_start__ = 0x0;
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define symbol __ICFEDIT_region_QSPI_end__ = 0x0;
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define symbol __ICFEDIT_region_ITCMR_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ITCMR_end__ = 0x0000FFFF;
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define symbol __ICFEDIT_region_DTCMR_start__ = 0x20000000;
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define symbol __ICFEDIT_region_DTCMR_end__ = 0x2001FFFF;
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define symbol __ICFEDIT_region_AXISR_start__ = 0x24000000;
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define symbol __ICFEDIT_region_AXISR_end__ = 0x2407FFFF;
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define symbol __ICFEDIT_region_SRAM1_start__ = 0x30000000;
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define symbol __ICFEDIT_region_SRAM1_end__ = 0x3001FFFF;
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define symbol __ICFEDIT_region_SRAM2_start__ = 0x30020000;
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define symbol __ICFEDIT_region_SRAM2_end__ = 0x3003FFFF;
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define symbol __ICFEDIT_region_SRAM3_start__ = 0x30040000;
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define symbol __ICFEDIT_region_SRAM3_end__ = 0x30047FFF;
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define symbol __ICFEDIT_region_SRAM4_start__ = 0x38000000;
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define symbol __ICFEDIT_region_SRAM4_end__ = 0x3800FFFF;
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define symbol __ICFEDIT_region_BKPR_start__ = 0x38800000;
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define symbol __ICFEDIT_region_BKPR_end__ = 0x38800FFF;
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define symbol __ICFEDIT_region_SDR1_start__ = 0x0;
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define symbol __ICFEDIT_region_SDR1_end__ = 0x0;
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define symbol __ICFEDIT_region_SDR2_start__ = 0x0;
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define symbol __ICFEDIT_region_SDR2_end__ = 0x0;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 2048;
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define symbol __ICFEDIT_size_proc_stack__ = 0;
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define symbol __ICFEDIT_size_heap__ = 0;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region FLASH_region = mem:[from __ICFEDIT_region_FLASH1_start__ to __ICFEDIT_region_FLASH1_end__]
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| mem:[from __ICFEDIT_region_FLASH2_start__ to __ICFEDIT_region_FLASH2_end__];
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define region NORPSR_region = mem:[from __ICFEDIT_region_NORPSR_start__ to __ICFEDIT_region_NORPSR_end__];
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define region NAND_region = mem:[from __ICFEDIT_region_NAND_start__ to __ICFEDIT_region_NAND_end__ ];
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define region QSPI_region = mem:[from __ICFEDIT_region_QSPI_start__ to __ICFEDIT_region_QSPI_end__ ];
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define region ITCMR_region = mem:[from __ICFEDIT_region_ITCMR_start__ to __ICFEDIT_region_ITCMR_end__ ];
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define region DTCMR_region = mem:[from __ICFEDIT_region_DTCMR_start__ to __ICFEDIT_region_DTCMR_end__ ];
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define region AXISR_region = mem:[from __ICFEDIT_region_AXISR_start__ to __ICFEDIT_region_AXISR_end__ ];
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define region SRAM_region = mem:[from __ICFEDIT_region_SRAM1_start__ to __ICFEDIT_region_SRAM1_end__ ]
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| mem:[from __ICFEDIT_region_SRAM2_start__ to __ICFEDIT_region_SRAM2_end__ ]
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| mem:[from __ICFEDIT_region_SRAM3_start__ to __ICFEDIT_region_SRAM3_end__ ]
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| mem:[from __ICFEDIT_region_SRAM4_start__ to __ICFEDIT_region_SRAM4_end__ ];
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define region BKPR_region = mem:[from __ICFEDIT_region_BKPR_start__ to __ICFEDIT_region_BKPR_end__ ];
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define region SDR_region = mem:[from __ICFEDIT_region_SDR1_start__ to __ICFEDIT_region_SDR1_end__ ]
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| mem:[from __ICFEDIT_region_SDR2_start__ to __ICFEDIT_region_SDR2_end__ ];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
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{
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// Required in a multi-threaded application
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initialize by copy with packing = none { section __DLIB_PERTHREAD };
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}
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in FLASH_region { readonly };
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place in QSPI_region { readonly section application_specific_ro };
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//place in NORPSR_region { };
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//place in NAND_region { };
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place in ITCMR_region { section .textrw };
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place in DTCMR_region { section .dtcm_ram, block CSTACK, block PROC_STACK };
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place in SRAM_region { section .axi_sram, block HEAP };
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place in AXISR_region { readwrite };
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place in BKPR_region { section .backup_sram };
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place in SDR_region { readwrite section application_specific_rw }; |