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209 lines
7.6 KiB
C++
209 lines
7.6 KiB
C++
/// @file
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/// @brief QUTEST port for the EFM32-SLSTK3401A board
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/// @ingroup qs
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/// @cond
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///***************************************************************************
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/// Last updated for version 5.9.0
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/// Last updated on 2017-05-17
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///
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/// Q u a n t u m L e a P s
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/// ---------------------------
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/// innovating embedded systems
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///
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/// Copyright (C) 2005-2017 Quantum Leaps, LLC. All rights reserved.
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///
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/// This program is open source software: you can redistribute it and/or
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/// modify it under the terms of the GNU General Public License as published
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/// by the Free Software Foundation, either version 3 of the License, or
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/// (at your option) any later version.
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///
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/// Alternatively, this program may be distributed and modified under the
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/// terms of Quantum Leaps commercial licenses, which expressly supersede
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/// the GNU General Public License and are specifically designed for
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/// licensees interested in retaining the proprietary status of their code.
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///
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/// This program is distributed in the hope that it will be useful,
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/// but WITHOUT ANY WARRANTY; without even the implied warranty of
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/// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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/// GNU General Public License for more details.
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///
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/// You should have received a copy of the GNU General Public License
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/// along with this program. If not, see <http://www.gnu.org/licenses/>.
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///
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/// Contact information:
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/// https://state-machine.com
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/// mailto:info@state-machine.com
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///***************************************************************************
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/// @endcond
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#include "qpcpp.h"
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#include "em_device.h" // the device specific header (SiLabs)
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#include "em_cmu.h" // Clock Management Unit (SiLabs)
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#include "em_gpio.h" // GPIO (SiLabs)
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#include "em_usart.h" // USART (SiLabs)
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// add other drivers if necessary...
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//Q_DEFINE_THIS_MODULE("qutest_port")
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using namespace QP;
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// !!!!!!!!!!!!!!!!!!!!!!!!!!!!! CAUTION !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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// Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority().
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// DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
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//
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enum KernelUnawareISRs { // see NOTE00
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USART0_RX_PRIO,
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// ...
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MAX_KERNEL_UNAWARE_CMSIS_PRI // keep always last
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};
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// "kernel-unaware" interrupts can't overlap "kernel-aware" interrupts
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//Q_ASSERT_COMPILE(MAX_KERNEL_UNAWARE_CMSIS_PRI <= QF_AWARE_ISR_CMSIS_PRI);
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// ISRs defined in this BSP --------------------------------------------------
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extern "C" void USART0_RX_IRQHandler(void);
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// Local-scope objects -------------------------------------------------------
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static USART_TypeDef * const l_USART0 = ((USART_TypeDef *)(0x40010000UL));
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#define LED_PORT gpioPortF
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#define LED0_PIN 4
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#define LED1_PIN 5
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#define PB_PORT gpioPortF
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#define PB0_PIN 6
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#define PB1_PIN 7
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//............................................................................
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extern "C" {
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// ISR for receiving bytes from the QSPY Back-End
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// NOTE: This ISR is "QF-unaware" meaning that it does not interact with
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// the QF/QK and is not disabled. Such ISRs don't need to call QK_ISR_ENTRY/
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// QK_ISR_EXIT and they cannot post or publish events.
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//
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void USART0_RX_IRQHandler(void) {
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// while RX FIFO NOT empty
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while ((l_USART0->STATUS & USART_STATUS_RXDATAV) != 0) {
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uint32_t b = l_USART0->RXDATA;
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QP::QS::rxPut(b);
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}
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}
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} // extern "C"
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// QS callbacks ==============================================================
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bool QS::onStartup(void const *arg) {
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static uint8_t qsTxBuf[2*1024]; // buffer for QS transmit channel
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static uint8_t qsRxBuf[100]; // buffer for QS receive channel
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static USART_InitAsync_TypeDef init = {
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usartEnable, // Enable RX/TX when init completed
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0, // Use current clock for configuring baudrate
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115200, // 115200 bits/s
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usartOVS16, // 16x oversampling
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usartDatabits8, // 8 databits
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usartNoParity, // No parity
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usartStopbits1, // 1 stopbit
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0, // Do not disable majority vote
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0, // Not USART PRS input mode
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usartPrsRxCh0, // PRS channel 0
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0, // Auto CS functionality enable/disable switch
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0, // Auto CS Hold cycles
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0 // Auto CS Setup cycles
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};
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initBuf (qsTxBuf, sizeof(qsTxBuf));
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rxInitBuf(qsRxBuf, sizeof(qsRxBuf));
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// Enable peripheral clocks
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CMU_ClockEnable(cmuClock_HFPER, true);
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CMU_ClockEnable(cmuClock_GPIO, true);
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// To avoid false start, configure output as high
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GPIO_PinModeSet(gpioPortA, 0, gpioModePushPull, 1); // TX pin
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GPIO_PinModeSet(gpioPortA, 1, gpioModeInput, 0); // RX pin
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// Enable DK RS232/UART switch
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GPIO_PinModeSet(gpioPortA, 5, gpioModePushPull, 1);
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CMU_ClockEnable(cmuClock_USART0, true);
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// configure the UART for the desired baud rate, 8-N-1 operation
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init.enable = usartDisable;
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USART_InitAsync(l_USART0, &init);
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// enable pins at correct UART/USART location.
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l_USART0->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN;
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l_USART0->ROUTELOC0 = (l_USART0->ROUTELOC0 &
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~(_USART_ROUTELOC0_TXLOC_MASK
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| _USART_ROUTELOC0_RXLOC_MASK));
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// Clear previous RX interrupts
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USART_IntClear(l_USART0, USART_IF_RXDATAV);
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NVIC_ClearPendingIRQ(USART0_RX_IRQn);
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// Enable RX interrupts
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USART_IntEnable(l_USART0, USART_IF_RXDATAV);
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// NOTE: do not enable the UART0 interrupt in the NVIC yet.
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// Wait till QF::onStartup()
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// Finally enable the UART
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USART_Enable(l_USART0, usartEnable);
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// Clear previous RX interrupts
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USART_IntClear(l_USART0, USART_IF_RXDATAV);
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NVIC_ClearPendingIRQ(USART0_RX_IRQn);
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// Enable RX interrupts
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USART_IntEnable(l_USART0, USART_IF_RXDATAV);
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// enable the UART RX interrupt...
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NVIC_SetPriorityGrouping(0U);
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NVIC_SetPriority(USART0_RX_IRQn, USART0_RX_PRIO);
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NVIC_EnableIRQ(USART0_RX_IRQn); // UART0 interrupt used for QS-RX
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return true; // success
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}
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//............................................................................
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void QS::onCleanup(void) {
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}
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//............................................................................
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void QS::onFlush(void) {
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uint16_t b;
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while ((b = getByte()) != QS_EOD) { // while not End-Of-Data...
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GPIO->P[LED_PORT].DOUT |= (1U << LED0_PIN);
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// while TXE not empty
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while ((l_USART0->STATUS & USART_STATUS_TXBL) == 0U) {
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}
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l_USART0->TXDATA = (b & 0xFFU); // put into the DR register
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GPIO->P[LED_PORT].DOUT &= ~(1U << LED0_PIN);
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}
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}
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//............................................................................
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// callback function to reset the target (to be implemented in the BSP)
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void QS::onReset(void) {
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NVIC_SystemReset();
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}
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//............................................................................
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void QS::onTestLoop() {
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rxPriv_.inTestLoop = true;
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while (rxPriv_.inTestLoop) {
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// turn the LED1 on and off (glow)
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GPIO->P[LED_PORT].DOUT |= (1U << LED1_PIN);
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GPIO->P[LED_PORT].DOUT &= ~(1U << LED1_PIN);
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rxParse(); // parse all the received bytes
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if ((l_USART0->STATUS & USART_STATUS_TXBL) != 0) { // is TXE empty?
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uint16_t b = getByte();
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if (b != QS_EOD) { // not End-Of-Data?
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l_USART0->TXDATA = (b & 0xFFU); // put into the DR register
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}
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}
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}
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// set inTestLoop to true in case calls to QS_onTestLoop() nest,
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// which can happen through the calls to QS_TEST_WAIT().
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rxPriv_.inTestLoop = true;
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}
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