mirror of
https://github.com/QuantumLeaps/qpcpp.git
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480 lines
17 KiB
C++
480 lines
17 KiB
C++
///***************************************************************************
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// Product: DPP example, STM32 NUCLEO-L053R8 board, preemptive QXK kernel
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// Last Updated for Version: 6.1.1
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// Date of the Last Update: 2018-02-17
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//
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// Q u a n t u m L e a P s
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// ---------------------------
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// innovating embedded systems
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//
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// Copyright (C) Quantum Leaps, LLC. All rights reserved.
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//
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// This program is open source software: you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Alternatively, this program may be distributed and modified under the
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// terms of Quantum Leaps commercial licenses, which expressly supersede
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// the GNU General Public License and are specifically designed for
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// licensees interested in retaining the proprietary status of their code.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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// Contact information:
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// https://www.state-machine.com
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// mailto:info@state-machine.com
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//****************************************************************************
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#include "qpcpp.h"
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#include "dpp.h"
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#include "bsp.h"
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#include "stm32l0xx.h" // CMSIS-compliant header file for the MCU used
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// add other drivers if necessary...
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Q_DEFINE_THIS_FILE // define the name of this file for assertions
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// namespace DPP *************************************************************
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namespace DPP {
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// !!!!!!!!!!!!!!!!!!!!!!!!!!!!! CAUTION !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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// Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority().
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// DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
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//
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enum KernelUnawareISRs { // see NOTE1
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// ...
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MAX_KERNEL_UNAWARE_CMSIS_PRI // keep always last
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};
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// "kernel-unaware" interrupts can't overlap "kernel-aware" interrupts
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Q_ASSERT_COMPILE(MAX_KERNEL_UNAWARE_CMSIS_PRI <= QF_AWARE_ISR_CMSIS_PRI);
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enum KernelAwareISRs {
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EXTI0_1_PRIO = QF_AWARE_ISR_CMSIS_PRI, // see NOTE00
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SYSTICK_PRIO,
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// ...
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MAX_KERNEL_AWARE_CMSIS_PRI // keep always last
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};
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// "kernel-aware" interrupts should not overlap the PendSV priority
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Q_ASSERT_COMPILE(MAX_KERNEL_AWARE_CMSIS_PRI <= (0xFF >>(8-__NVIC_PRIO_BITS)));
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// Local-scope objects -------------------------------------------------------
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// LED pins available on the board (just one user LED LD2--Green on PA.5)
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#define LED_LD2 (1U << 5)
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// Button pins available on the board (just one user Button B1 on PC.13)
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#define BTN_B1 (1U << 13)
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static unsigned l_rnd; // random seed
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#ifdef Q_SPY
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QP::QSTimeCtr QS_tickTime_;
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QP::QSTimeCtr QS_tickPeriod_;
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// event-source identifiers used for tracing
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static uint8_t const l_SysTick_Handler = 0U;
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static uint8_t const l_EXTI0_1_IRQHandler = 0U;
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enum AppRecords { // application-specific trace records
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PHILO_STAT = QP::QS_USER,
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PAUSED_STAT,
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COMMAND_STAT,
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ON_CONTEXT_SW
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};
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#endif
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// ISRs used in this project =================================================
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extern "C" {
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//............................................................................
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void SysTick_Handler(void); // prototype
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void SysTick_Handler(void) {
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// state of the button debouncing, see below
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static struct ButtonsDebouncing {
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uint32_t depressed;
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uint32_t previous;
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} buttons = { ~0U, ~0U };
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uint32_t current;
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uint32_t tmp;
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QXK_ISR_ENTRY(); // inform QXK about entering an ISR
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#ifdef Q_SPY
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{
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tmp = SysTick->CTRL; // clear SysTick_CTRL_COUNTFLAG
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QS_tickTime_ += QS_tickPeriod_; // account for the clock rollover
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}
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#endif
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QP::QF::TICK_X(0U, &l_SysTick_Handler); // process time events for rate 0
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//the_Ticker0->POST(0, &l_SysTick_Handler); // post to Ticker0 active object
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// Perform the debouncing of buttons. The algorithm for debouncing
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// adapted from the book "Embedded Systems Dictionary" by Jack Ganssle
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// and Michael Barr, page 71.
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//
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current = ~GPIOC->IDR; // read Port C with the state of Button B1
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tmp = buttons.depressed; // save the debounced depressed buttons
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buttons.depressed |= (buttons.previous & current); // set depressed
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buttons.depressed &= (buttons.previous | current); // clear released
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buttons.previous = current; // update the history
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tmp ^= buttons.depressed; // changed debounced depressed
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if ((tmp & BTN_B1) != 0U) { // debounced BTN_B1 state changed?
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if ((buttons.depressed & BTN_B1) != 0U) { // is BTN_B1 depressed?
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static QP::QEvt const pauseEvt = { DPP::PAUSE_SIG, 0U, 0U};
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QP::QF::PUBLISH(&pauseEvt, &l_SysTick_Handler);
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}
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else { // the button is released
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static QP::QEvt const serveEvt = { DPP::SERVE_SIG, 0U, 0U};
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QP::QF::PUBLISH(&serveEvt, &l_SysTick_Handler);
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}
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}
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QXK_ISR_EXIT(); // inform QXK about exiting an ISR
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}
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//............................................................................
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void EXTI0_1_IRQHandler(void); // prototype
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void EXTI0_1_IRQHandler(void) {
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QXK_ISR_ENTRY(); // inform QXK about entering an ISR
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// for testing..
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DPP::AO_Table->POST(Q_NEW(QP::QEvt, DPP::MAX_PUB_SIG),
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&l_EXTI0_1_IRQHandler);
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QXK_ISR_EXIT(); // inform QXK about exiting an ISR
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}
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} // extern "C"
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// BSP functions =============================================================
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void BSP::init(void) {
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// NOTE: SystemInit() already called from the startup code
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// but SystemCoreClock needs to be updated
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//
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SystemCoreClockUpdate();
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// enable GPIOA clock port for the LED LD2
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RCC->IOPENR |= (1U << 0);
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// configure LED (PA.5) pin as push-pull output, no pull-up, pull-down
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GPIOA->MODER &= ~((3U << 2*5));
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GPIOA->MODER |= ((1U << 2*5));
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GPIOA->OTYPER &= ~((1U << 5));
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GPIOA->OSPEEDR &= ~((3U << 2*5));
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GPIOA->OSPEEDR |= ((1U << 2*5));
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GPIOA->PUPDR &= ~((3U << 2*5));
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// enable GPIOC clock port for the Button B1
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RCC->IOPENR |= (1U << 2);
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// configure Button (PC.13) pins as input, no pull-up, pull-down
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GPIOC->MODER &= ~(3U << 2*13);
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GPIOC->OSPEEDR &= ~(3U << 2*13);
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GPIOC->OSPEEDR |= (1U << 2*13);
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GPIOC->PUPDR &= ~(3U << 2*13);
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BSP::randomSeed(1234U);
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if (QS_INIT((void *)0) == 0U) { // initialize the QS software tracing
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Q_ERROR();
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}
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QS_OBJ_DICTIONARY(&l_SysTick_Handler);
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QS_OBJ_DICTIONARY(&l_EXTI0_1_IRQHandler);
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QS_USR_DICTIONARY(PHILO_STAT);
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QS_USR_DICTIONARY(PAUSED_STAT);
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QS_USR_DICTIONARY(COMMAND_STAT);
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QS_USR_DICTIONARY(ON_CONTEXT_SW);
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}
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//............................................................................
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void BSP::displayPhilStat(uint8_t n, char const *stat) {
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if (stat[0] == 'h') {
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GPIOA->BSRR |= LED_LD2; // turn LED on
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}
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else {
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GPIOA->BSRR |= (LED_LD2 << 16); // turn LED off
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}
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QS_BEGIN(PHILO_STAT, AO_Philo[n]) // application-specific record begin
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QS_U8(1, n); // Philosopher number
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QS_STR(stat); // Philosopher status
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QS_END()
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}
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//............................................................................
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void BSP::displayPaused(uint8_t paused) {
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// not enough LEDs to implement this feature
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if (paused != (uint8_t)0) {
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//GPIOA->BSRR |= (LED_LD2); // turn LED[n] on
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}
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else {
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//GPIOA->BSRR |= (LED_LD2 << 16); // turn LED[n] off
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}
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}
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//............................................................................
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uint32_t BSP::random(void) { // a very cheap pseudo-random-number generator
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QP::QSchedStatus lockStat = QP::QXK::schedLock(N_PHILO); // protect l_rnd
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// "Super-Duper" Linear Congruential Generator (LCG)
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// LCG(2^32, 3*7*11*13*23, 0, seed)
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//
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uint32_t rnd = l_rnd * (3U*7U*11U*13U*23U);
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l_rnd = rnd; // set for the next time
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QP::QXK::schedUnlock(lockStat); // sched unlock around l_rnd
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return (rnd >> 8);
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}
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//............................................................................
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void BSP::randomSeed(uint32_t seed) {
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l_rnd = seed;
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}
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//............................................................................
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void BSP::wait4SW1(void) {
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while ((GPIOC->IDR & BTN_B1) != 0U) {
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GPIOA->BSRR |= (LED_LD2); // turn LED2 on
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GPIOA->BSRR |= (LED_LD2 << 16); // turn LED2 off
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}
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}
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//............................................................................
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void BSP::ledOn(void) {
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GPIOA->BSRR |= (LED_LD2); // turn LED2 on
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}
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//............................................................................
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void BSP::ledOff(void) {
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GPIOA->BSRR |= (LED_LD2 << 16); // turn LED2 off
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}
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//............................................................................
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void BSP::terminate(int16_t result) {
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(void)result;
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}
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} // namespace DPP
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// namespace QP **************************************************************
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namespace QP {
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// QF callbacks ==============================================================
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void QF::onStartup(void) {
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// set up the SysTick timer to fire at BSP::TICKS_PER_SEC rate
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SysTick_Config(SystemCoreClock / DPP::BSP::TICKS_PER_SEC);
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// set priorities of ALL ISRs used in the system, see NOTE00
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//
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// !!!!!!!!!!!!!!!!!!!!!!!!!!!! CAUTION !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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// Assign a priority to EVERY ISR explicitly by calling NVIC_SetPriority().
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// DO NOT LEAVE THE ISR PRIORITIES AT THE DEFAULT VALUE!
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//
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NVIC_SetPriority(SysTick_IRQn, DPP::SYSTICK_PRIO);
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NVIC_SetPriority(EXTI0_1_IRQn, DPP::EXTI0_1_PRIO);
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// ...
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// enable IRQs...
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NVIC_EnableIRQ(EXTI0_1_IRQn);
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}
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//............................................................................
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void QF::onCleanup(void) {
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}
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//............................................................................
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#ifdef QXK_ON_CONTEXT_SW
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// NOTE: the context-switch callback is called with interrupts DISABLED
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extern "C"
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void QXK_onContextSw(QActive *prev, QActive *next) {
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(void)prev;
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if (next != (QActive *)0) {
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//_impure_ptr = next->thread; // switch to next TLS
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}
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QS_BEGIN_NOCRIT(DPP::ON_CONTEXT_SW, (void *)1) // no critical section!
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QS_OBJ(prev);
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QS_OBJ(next);
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QS_END_NOCRIT()
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}
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#endif // QXK_ON_CONTEXT_SW
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//............................................................................
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void QXK::onIdle(void) {
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// toggle the User LED on and then off (not enough LEDs, see NOTE01)
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QF_INT_DISABLE();
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//GPIOA->BSRR |= (LED_LD2); // turn LED[n] on
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//GPIOA->BSRR |= (LED_LD2 << 16); // turn LED[n] off
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QF_INT_ENABLE();
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#ifdef Q_SPY
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if ((USART2->ISR & 0x0080U) != 0) { // is TXE empty?
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QF_INT_DISABLE();
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uint16_t b = QS::getByte();
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QF_INT_ENABLE();
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if (b != QS_EOD) { // not End-Of-Data?
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USART2->TDR = (b & 0xFFU); // put into the DR register
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}
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}
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#elif defined NDEBUG
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// Put the CPU and peripherals to the low-power mode.
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// you might need to customize the clock management for your application,
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// see the datasheet for your particular Cortex-M3 MCU.
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//
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// !!!CAUTION!!!
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// The WFI instruction stops the CPU clock, which unfortunately disables
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// the JTAG port, so the ST-Link debugger can no longer connect to the
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// board. For that reason, the call to __WFI() has to be used with CAUTION.
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//
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// NOTE: If you find your board "frozen" like this, strap BOOT0 to VDD and
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// reset the board, then connect with ST-Link Utilities and erase the part.
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// The trick with BOOT(0) is it gets the part to run the System Loader
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// instead of your broken code. When done disconnect BOOT0, and start over.
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//__WFI(); // Wait-For-Interrupt
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#endif
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}
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//............................................................................
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extern "C" void Q_onAssert(char const *module, int loc) {
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//
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// NOTE: add here your application-specific error handling
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//
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(void)module;
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(void)loc;
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QS_ASSERTION(module, loc, static_cast<uint32_t>(10000U));
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#ifndef NDEBUG
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DPP::BSP::wait4SW1();
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#endif
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NVIC_SystemReset();
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}
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// QS callbacks ==============================================================
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#ifdef Q_SPY
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/*..........................................................................*/
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#define __DIV(__PCLK, __BAUD) (((__PCLK / 4U) * 25U)/(__BAUD))
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#define __DIVMANT(__PCLK, __BAUD) (__DIV(__PCLK, __BAUD)/100U)
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#define __DIVFRAQ(__PCLK, __BAUD) \
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(((__DIV(__PCLK, __BAUD) - (__DIVMANT(__PCLK, __BAUD) * 100U)) \
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* 16U + 50U) / 100U)
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#define __USART_BRR(__PCLK, __BAUD) \
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((__DIVMANT(__PCLK, __BAUD) << 4)|(__DIVFRAQ(__PCLK, __BAUD) & 0x0FU))
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//............................................................................
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bool QS::onStartup(void const *arg) {
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static uint8_t qsBuf[2*1024]; // buffer for Quantum Spy
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initBuf(qsBuf, sizeof(qsBuf));
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// enable peripheral clock for USART2
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RCC->IOPENR |= ( 1ul << 0); // Enable GPIOA clock
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RCC->APB1ENR |= ( 1ul << 17); // Enable USART#2 clock
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// Configure PA3 to USART2_RX, PA2 to USART2_TX */
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GPIOA->AFR[0] &= ~((15ul << 4* 3) | (15ul << 4* 2) );
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GPIOA->AFR[0] |= (( 4ul << 4* 3) | ( 4ul << 4* 2) );
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GPIOA->MODER &= ~(( 3ul << 2* 3) | ( 3ul << 2* 2) );
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GPIOA->MODER |= (( 2ul << 2* 3) | ( 2ul << 2* 2) );
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USART2->BRR = __USART_BRR(SystemCoreClock, 115200ul); // baud rate
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USART2->CR3 = 0x0000; // no flow control
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USART2->CR2 = 0x0000; // 1 stop bit
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USART2->CR1 = ((1ul << 2) | // enable RX
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(1ul << 3) | // enable TX
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(0ul << 12) | // 8 data bits
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(0ul << 28) | // 8 data bits
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(1ul << 0) ); // enable USART
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DPP::QS_tickPeriod_ = SystemCoreClock / DPP::BSP::TICKS_PER_SEC;
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DPP::QS_tickTime_ = DPP::QS_tickPeriod_; // to start the timestamp at zero
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// setup the QS filters...
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QS_FILTER_ON(QS_SM_RECORDS);
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QS_FILTER_ON(QS_UA_RECORDS);
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return true; // return success
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}
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//............................................................................
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void QS::onCleanup(void) {
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}
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//............................................................................
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QSTimeCtr QS::onGetTime(void) { // NOTE: invoked with interrupts DISABLED
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if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0) { // not set?
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return DPP::QS_tickTime_ - static_cast<QSTimeCtr>(SysTick->VAL);
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}
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else { // the rollover occured, but the SysTick_ISR did not run yet
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return DPP::QS_tickTime_ + DPP::QS_tickPeriod_
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- static_cast<QSTimeCtr>(SysTick->VAL);
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}
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}
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//............................................................................
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void QS::onFlush(void) {
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uint16_t b;
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QF_INT_DISABLE();
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while ((b = getByte()) != QS_EOD) { // while not End-Of-Data...
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QF_INT_ENABLE();
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while ((USART2->ISR & 0x0080U) == 0U) { // while TXE not empty
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}
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USART2->TDR = (b & 0xFFU); // put into the DR register
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QF_INT_DISABLE();
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}
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QF_INT_ENABLE();
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}
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//............................................................................
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//! callback function to reset the target (to be implemented in the BSP)
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void QS::onReset(void) {
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//TBD
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}
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//............................................................................
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//! callback function to execute a user command (to be implemented in BSP)
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void QS::onCommand(uint8_t cmdId, uint32_t param1,
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uint32_t param2, uint32_t param3)
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{
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(void)cmdId;
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(void)param1;
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(void)param2;
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(void)param3;
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//TBD
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}
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/*???
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void bug_test(void) {
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uint32_t i;
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for(i = 0; i < 10; i++) {
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QS_BEGIN(123, 0);
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QS_U32(8, 0);
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QS_END();
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}
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}
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*/
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#endif // Q_SPY
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//--------------------------------------------------------------------------*/
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} // namespace QP
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//****************************************************************************
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// NOTE1:
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// The QF_AWARE_ISR_CMSIS_PRI constant from the QF port specifies the highest
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// ISR priority that is disabled by the QF framework. The value is suitable
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// for the NVIC_SetPriority() CMSIS function.
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//
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// Only ISRs prioritized at or below the QF_AWARE_ISR_CMSIS_PRI level (i.e.,
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// with the numerical values of priorities equal or higher than
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// QF_AWARE_ISR_CMSIS_PRI) are allowed to call the QK_ISR_ENTRY/QK_ISR_ENTRY
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// macros or any other QF/QK services. These ISRs are "QF-aware".
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//
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// Conversely, any ISRs prioritized above the QF_AWARE_ISR_CMSIS_PRI priority
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// level (i.e., with the numerical values of priorities less than
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// QF_AWARE_ISR_CMSIS_PRI) are never disabled and are not aware of the kernel.
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// Such "QF-unaware" ISRs cannot call any QF/QK services. In particular they
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// can NOT call the macros QK_ISR_ENTRY/QK_ISR_ENTRY. The only mechanism
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// by which a "QF-unaware" ISR can communicate with the QF framework is by
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// triggering a "QF-aware" ISR, which can post/publish events.
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//
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// NOTE2:
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// The User LED is used to visualize the idle loop activity. The brightness
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// of the LED is proportional to the frequency of invcations of the idle loop.
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// Please note that the LED is toggled with interrupts locked, so no interrupt
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// execution time contributes to the brightness of the User LED.
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//
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