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162 lines
7.3 KiB
ArmAsm
162 lines
7.3 KiB
ArmAsm
;*****************************************************************************
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; Product: QK port to ARM Cortex-M (M0,M0+,M1,M3,M4,M4F), ARM-Keil assembler
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; Last Updated for Version: 5.1.0
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; Date of the Last Update: Sep 19, 2013
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;
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; Q u a n t u m L e a P s
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; ---------------------------
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; innovating embedded systems
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;
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; Copyright (C) 2002-2013 Quantum Leaps, LLC. All rights reserved.
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;
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; This program is open source software: you can redistribute it and/or
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; modify it under the terms of the GNU General Public License as published
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; by the Free Software Foundation, either version 2 of the License, or
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; (at your option) any later version.
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;
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; Alternatively, this program may be distributed and modified under the
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; terms of Quantum Leaps commercial licenses, which expressly supersede
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; the GNU General Public License and are specifically designed for
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; licensees interested in retaining the proprietary status of their code.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program. If not, see <http://www.gnu.org/licenses/>.
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;
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; Contact information:
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; Quantum Leaps Web sites: http://www.quantum-leaps.com
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; http://www.state-machine.com
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; e-mail: info@quantum-leaps.com
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;*****************************************************************************
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AREA |.text|, CODE, READONLY
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THUMB
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PRESERVE8 ; this code preserves 8-byte stack alignment
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EXPORT QK_init
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EXPORT PendSV_Handler ; CMSIS-compliant PendSV exception name
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EXPORT SVC_Handler ; CMSIS-compliant SVC exception name
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IMPORT QK_schedPrio_ ; external reference
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IMPORT QK_sched_ ; external reference
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;*****************************************************************************
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; The QK_init function sets the priorities of PendSV and SVCall exceptions
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; to 0xFF and 0x00, respectively. The function internally disables
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; interrupts, but restores the original interrupt lock before exit.
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;*****************************************************************************
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QK_init
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MRS r0,PRIMASK ; store the state of the PRIMASK in r0
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CPSID i ; disable interrupts (set PRIMASK)
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LDR r1,=0xE000ED18 ; System Handler Priority Register
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LDR r2,[r1,#8] ; load the System 12-15 Priority Register
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MOVS r3,#0xFF
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LSLS r3,r3,#16
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ORRS r2,r3 ; set PRI_14 (PendSV) to 0xFF
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STR r2,[r1,#8] ; write the System 12-15 Priority Register
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LDR r2,[r1,#4] ; load the System 8-11 Priority Register
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LSLS r3,r3,#8
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BICS r2,r3 ; set PRI_11 (SVCall) to 0x00
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STR r2,[r1,#4] ; write the System 8-11 Priority Register
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MSR PRIMASK,r0 ; restore the original PRIMASK
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BX lr ; return to the caller
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;*****************************************************************************
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; The PendSV_Handler exception handler is used for handling asynchronous
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; preemption in QK. The use of the PendSV exception is the recommended
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; and most efficient method for performing context switches with ARM Cortex-M.
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;
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; The PendSV exception should have the lowest priority in the whole system
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; (0xFF, see QK_init). All other exceptions and interrupts should have higher
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; priority. For example, for NVIC with 2 priority bits all interrupts and
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; exceptions must have numerical value of priority lower than 0xC0. In this
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; case the interrupt priority levels available to your applications are (in
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; the order from the lowest urgency to the highest urgency): 0x80, 0x40, 0x00.
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;
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; Also, *all* ISRs in the QK application must trigger the PendSV exception
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; by calling the QK_ISR_EXIT() macro.
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;
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; Due to tail-chaining and its lowest priority, the PendSV exception will be
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; entered immediately after the exit from the *last* nested interrupt (or
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; exception). In QK, this is exactly the time when the QK scheduler needs to
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; check for the asynchronous preemption.
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;*****************************************************************************
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PendSV_Handler
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PUSH {lr} ; push the exception lr (EXC_RETURN)
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IF {TARGET_ARCH_THUMB} == 3 ; Cortex-M0/M0+/M1 (v6-M, v6S-M)?
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CPSID i ; disable interrupts (set PRIMASK)
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ELSE ; Cortex-M3/M4/M4F
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MOVS r0,#(0xFF:SHR:2) ; Keep in synch with QF_BASEPRI in qf_port.h!
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MSR BASEPRI,r0 ; disable interrupts at processor level
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ENDIF
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BL QK_schedPrio_ ; check if we have preemption
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CMP r0,#0 ; is prio == 0 ?
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BNE.N scheduler ; if prio != 0, branch to scheduler
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IF {TARGET_ARCH_THUMB} == 3 ; Cortex-M0/M0+/M1 (v6-M, v6S-M)?
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CPSIE i ; enable interrupts (clear PRIMASK)
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ELSE ; Cortex-M3/M4/M4F
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MSR BASEPRI,r0 ; enable interrupts (r0 == 0 at this point)
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ENDIF
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POP {r0} ; pop the EXC_RETURN into r0 (low register)
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BX r0 ; exception-return to the task
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scheduler
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SUB sp,sp,#4 ; align the stack to 8-byte boundary
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MOVS r3,#1
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LSLS r3,r3,#24 ; r3:=(1 << 24), set the T bit (new xpsr)
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LDR r2,=QK_sched_ ; address of the QK scheduler (new pc)
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LDR r1,=svc_ret ; return address after the call (new lr)
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PUSH {r1-r3} ; push xpsr,pc,lr
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SUB sp,sp,#(4*4) ; don't care for r12,r3,r2,r1
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PUSH {r0} ; push the prio argument (new r0)
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MOVS r0,#0x6
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MVNS r0,r0 ; r0 := ~0x6 == 0xFFFFFFF9
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BX r0 ; exception-return to the scheduler
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svc_ret
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IF {TARGET_ARCH_THUMB} == 3 ; Cortex-M0/M0+/M1 (v6-M, v6S-M)?
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CPSIE i ; enable interrupts (clear PRIMASK)
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ELSE ; Cortex-M3/M4/M4F
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MOVS r0,#0
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MSR BASEPRI,r0 ; enable interrupts (remove BASEPRI)
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ENDIF
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IF {FPU} != "SoftVFP" ; If software FPU not used...
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MRS r0,CONTROL ; r0 := CONTROL
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MOVS r1,#4 ; r1 := 0x04 (FPCA bit)
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BICS r0,r1 ; r0 := r0 & ~r1
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MSR CONTROL,r0 ; CONTROL := r0
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ENDIF
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SVC #0 ; SV exception returns to the preempted task
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;*****************************************************************************
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; The SVC_Handler exception handler is used for returning back to the
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; interrupted task. The SVCall exception simply removes its own interrupt
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; stack frame from the stack and returns to the preempted task using the
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; interrupt stack frame that must be at the top of the stack.
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;*****************************************************************************
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SVC_Handler
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ADD sp,sp,#(9*4) ; remove one 8-register exception frame
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; plus the "aligner" from the stack
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POP {r0} ; pop the original EXC_RETURN into r0
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BX r0 ; return to the preempted task
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ALIGN ; make sure the END is properly aligned
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END
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